1 /* 2 * Copyright (c) 2016 QLogic Corporation. 3 * All rights reserved. 4 * www.qlogic.com 5 * 6 * See LICENSE.qede_pmd for copyright and licensing details. 7 */ 8 9 #include <limits.h> 10 #include <time.h> 11 #include <rte_alarm.h> 12 13 #include "qede_ethdev.h" 14 15 /* Alarm timeout. */ 16 #define QEDE_ALARM_TIMEOUT_US 100000 17 18 /* Global variable to hold absolute path of fw file */ 19 char fw_file[PATH_MAX]; 20 21 const char *QEDE_DEFAULT_FIRMWARE = 22 "/lib/firmware/qed/qed_init_values-8.30.12.0.bin"; 23 24 static void 25 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 26 { 27 int i; 28 29 for (i = 0; i < edev->num_hwfns; i++) { 30 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 31 p_hwfn->pf_params = *params; 32 } 33 } 34 35 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 36 { 37 edev->regview = pci_dev->mem_resource[0].addr; 38 edev->doorbells = pci_dev->mem_resource[2].addr; 39 edev->db_size = pci_dev->mem_resource[2].len; 40 } 41 42 static int 43 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 44 uint32_t dp_module, uint8_t dp_level, bool is_vf) 45 { 46 struct ecore_hw_prepare_params hw_prepare_params; 47 int rc; 48 49 ecore_init_struct(edev); 50 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 51 /* Protocol type is always fixed to PROTOCOL_ETH */ 52 53 if (is_vf) 54 edev->b_is_vf = true; 55 56 ecore_init_dp(edev, dp_module, dp_level, NULL); 57 qed_init_pci(edev, pci_dev); 58 59 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params)); 60 hw_prepare_params.personality = ECORE_PCI_ETH; 61 hw_prepare_params.drv_resc_alloc = false; 62 hw_prepare_params.chk_reg_fifo = false; 63 hw_prepare_params.initiate_pf_flr = true; 64 hw_prepare_params.allow_mdump = false; 65 hw_prepare_params.epoch = (u32)time(NULL); 66 rc = ecore_hw_prepare(edev, &hw_prepare_params); 67 if (rc) { 68 DP_ERR(edev, "hw prepare failed\n"); 69 return rc; 70 } 71 72 return rc; 73 } 74 75 static int qed_nic_setup(struct ecore_dev *edev) 76 { 77 int rc; 78 79 rc = ecore_resc_alloc(edev); 80 if (rc) 81 return rc; 82 83 DP_INFO(edev, "Allocated qed resources\n"); 84 ecore_resc_setup(edev); 85 86 return rc; 87 } 88 89 #ifdef CONFIG_ECORE_ZIPPED_FW 90 static int qed_alloc_stream_mem(struct ecore_dev *edev) 91 { 92 int i; 93 94 for_each_hwfn(edev, i) { 95 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 96 97 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 98 sizeof(*p_hwfn->stream)); 99 if (!p_hwfn->stream) 100 return -ENOMEM; 101 } 102 103 return 0; 104 } 105 106 static void qed_free_stream_mem(struct ecore_dev *edev) 107 { 108 int i; 109 110 for_each_hwfn(edev, i) { 111 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 112 113 if (!p_hwfn->stream) 114 return; 115 116 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 117 } 118 } 119 #endif 120 121 #ifdef CONFIG_ECORE_BINARY_FW 122 static int qed_load_firmware_data(struct ecore_dev *edev) 123 { 124 int fd; 125 struct stat st; 126 const char *fw = RTE_LIBRTE_QEDE_FW; 127 128 if (strcmp(fw, "") == 0) 129 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE); 130 else 131 strcpy(fw_file, fw); 132 133 fd = open(fw_file, O_RDONLY); 134 if (fd < 0) { 135 DP_ERR(edev, "Can't open firmware file\n"); 136 return -ENOENT; 137 } 138 139 if (fstat(fd, &st) < 0) { 140 DP_ERR(edev, "Can't stat firmware file\n"); 141 close(fd); 142 return -1; 143 } 144 145 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 146 RTE_CACHE_LINE_SIZE); 147 if (!edev->firmware) { 148 DP_ERR(edev, "Can't allocate memory for firmware\n"); 149 close(fd); 150 return -ENOMEM; 151 } 152 153 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 154 DP_ERR(edev, "Can't read firmware data\n"); 155 close(fd); 156 return -1; 157 } 158 159 edev->fw_len = st.st_size; 160 if (edev->fw_len < 104) { 161 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n", 162 edev->fw_len); 163 close(fd); 164 return -EINVAL; 165 } 166 167 close(fd); 168 return 0; 169 } 170 #endif 171 172 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn) 173 { 174 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced; 175 176 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac, 177 &is_mac_forced); 178 if (is_mac_exist && is_mac_forced) 179 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN); 180 181 /* Always update link configuration according to bulletin */ 182 qed_link_update(hwfn); 183 } 184 185 static void qede_vf_task(void *arg) 186 { 187 struct ecore_hwfn *p_hwfn = arg; 188 uint8_t change = 0; 189 190 /* Read the bulletin board, and re-schedule the task */ 191 ecore_vf_read_bulletin(p_hwfn, &change); 192 if (change) 193 qed_handle_bulletin_change(p_hwfn); 194 195 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn); 196 } 197 198 static void qed_start_iov_task(struct ecore_dev *edev) 199 { 200 struct ecore_hwfn *p_hwfn; 201 int i; 202 203 for_each_hwfn(edev, i) { 204 p_hwfn = &edev->hwfns[i]; 205 if (!IS_PF(edev)) 206 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, 207 p_hwfn); 208 } 209 } 210 211 static void qed_stop_iov_task(struct ecore_dev *edev) 212 { 213 struct ecore_hwfn *p_hwfn; 214 int i; 215 216 for_each_hwfn(edev, i) { 217 p_hwfn = &edev->hwfns[i]; 218 if (!IS_PF(edev)) 219 rte_eal_alarm_cancel(qede_vf_task, p_hwfn); 220 } 221 } 222 static int qed_slowpath_start(struct ecore_dev *edev, 223 struct qed_slowpath_params *params) 224 { 225 struct ecore_drv_load_params drv_load_params; 226 struct ecore_hw_init_params hw_init_params; 227 struct ecore_mcp_drv_version drv_version; 228 const uint8_t *data = NULL; 229 struct ecore_hwfn *hwfn; 230 struct ecore_ptt *p_ptt; 231 int rc; 232 233 if (IS_PF(edev)) { 234 #ifdef CONFIG_ECORE_BINARY_FW 235 rc = qed_load_firmware_data(edev); 236 if (rc) { 237 DP_ERR(edev, "Failed to find fw file %s\n", fw_file); 238 goto err; 239 } 240 #endif 241 hwfn = ECORE_LEADING_HWFN(edev); 242 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */ 243 p_ptt = ecore_ptt_acquire(hwfn); 244 if (p_ptt) { 245 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt; 246 } else { 247 DP_ERR(edev, "Failed to acquire PTT for flowdir\n"); 248 rc = -ENOMEM; 249 goto err; 250 } 251 } 252 } 253 254 rc = qed_nic_setup(edev); 255 if (rc) 256 goto err; 257 258 /* set int_coalescing_mode */ 259 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 260 261 #ifdef CONFIG_ECORE_ZIPPED_FW 262 if (IS_PF(edev)) { 263 /* Allocate stream for unzipping */ 264 rc = qed_alloc_stream_mem(edev); 265 if (rc) { 266 DP_ERR(edev, "Failed to allocate stream memory\n"); 267 goto err1; 268 } 269 } 270 #endif 271 272 qed_start_iov_task(edev); 273 274 #ifdef CONFIG_ECORE_BINARY_FW 275 if (IS_PF(edev)) 276 data = (const uint8_t *)edev->firmware + sizeof(u32); 277 #endif 278 279 /* Start the slowpath */ 280 memset(&hw_init_params, 0, sizeof(hw_init_params)); 281 hw_init_params.b_hw_start = true; 282 hw_init_params.int_mode = ECORE_INT_MODE_MSIX; 283 hw_init_params.allow_npar_tx_switch = true; 284 hw_init_params.bin_fw_data = data; 285 286 memset(&drv_load_params, 0, sizeof(drv_load_params)); 287 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT; 288 drv_load_params.avoid_eng_reset = false; 289 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS; 290 hw_init_params.p_drv_load_params = &drv_load_params; 291 292 rc = ecore_hw_init(edev, &hw_init_params); 293 if (rc) { 294 DP_ERR(edev, "ecore_hw_init failed\n"); 295 goto err2; 296 } 297 298 DP_INFO(edev, "HW inited and function started\n"); 299 300 if (IS_PF(edev)) { 301 hwfn = ECORE_LEADING_HWFN(edev); 302 drv_version.version = (params->drv_major << 24) | 303 (params->drv_minor << 16) | 304 (params->drv_rev << 8) | (params->drv_eng); 305 /* TBD: strlcpy() */ 306 strncpy((char *)drv_version.name, (const char *)params->name, 307 MCP_DRV_VER_STR_SIZE - 4); 308 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 309 &drv_version); 310 if (rc) { 311 DP_ERR(edev, "Failed sending drv version command\n"); 312 goto err3; 313 } 314 } 315 316 ecore_reset_vport_stats(edev); 317 318 return 0; 319 320 err3: 321 ecore_hw_stop(edev); 322 err2: 323 qed_stop_iov_task(edev); 324 #ifdef CONFIG_ECORE_ZIPPED_FW 325 qed_free_stream_mem(edev); 326 err1: 327 #endif 328 ecore_resc_free(edev); 329 err: 330 #ifdef CONFIG_ECORE_BINARY_FW 331 if (IS_PF(edev)) { 332 if (edev->firmware) 333 rte_free(edev->firmware); 334 edev->firmware = NULL; 335 } 336 #endif 337 qed_stop_iov_task(edev); 338 339 return rc; 340 } 341 342 static int 343 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 344 { 345 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev); 346 struct ecore_ptt *ptt = NULL; 347 struct ecore_tunnel_info *tun = &edev->tunnel; 348 349 memset(dev_info, 0, sizeof(struct qed_dev_info)); 350 351 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 352 tun->vxlan.b_mode_enabled) 353 dev_info->vxlan_enable = true; 354 355 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled && 356 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 357 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 358 dev_info->gre_enable = true; 359 360 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled && 361 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 362 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 363 dev_info->geneve_enable = true; 364 365 dev_info->num_hwfns = edev->num_hwfns; 366 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 367 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu; 368 dev_info->dev_type = edev->type; 369 370 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 371 ETHER_ADDR_LEN); 372 373 dev_info->fw_major = FW_MAJOR_VERSION; 374 dev_info->fw_minor = FW_MINOR_VERSION; 375 dev_info->fw_rev = FW_REVISION_VERSION; 376 dev_info->fw_eng = FW_ENGINEERING_VERSION; 377 378 if (IS_PF(edev)) { 379 dev_info->b_inter_pf_switch = 380 OSAL_TEST_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits); 381 if (!OSAL_TEST_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits)) 382 dev_info->b_arfs_capable = true; 383 dev_info->tx_switching = false; 384 385 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn); 386 387 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 388 if (ptt) { 389 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 390 &dev_info->mfw_rev, NULL); 391 392 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 393 &dev_info->flash_size); 394 395 /* Workaround to allow PHY-read commands for 396 * B0 bringup. 397 */ 398 if (ECORE_IS_BB_B0(edev)) 399 dev_info->flash_size = 0xffffffff; 400 401 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 402 } 403 } else { 404 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 405 &dev_info->mfw_rev, NULL); 406 } 407 408 return 0; 409 } 410 411 int 412 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 413 { 414 uint8_t queues = 0; 415 int i; 416 417 memset(info, 0, sizeof(*info)); 418 419 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 420 421 if (IS_PF(edev)) { 422 int max_vf_vlan_filters = 0; 423 424 info->num_queues = 0; 425 for_each_hwfn(edev, i) 426 info->num_queues += 427 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 428 429 if (IS_ECORE_SRIOV(edev)) 430 max_vf_vlan_filters = edev->p_iov_info->total_vfs * 431 ECORE_ETH_VF_NUM_VLAN_FILTERS; 432 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) - 433 max_vf_vlan_filters; 434 435 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 436 ETHER_ADDR_LEN); 437 } else { 438 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev), 439 &info->num_queues); 440 if (ECORE_IS_CMT(edev)) { 441 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues); 442 info->num_queues += queues; 443 } 444 445 ecore_vf_get_num_vlan_filters(&edev->hwfns[0], 446 (u8 *)&info->num_vlan_filters); 447 448 ecore_vf_get_port_mac(&edev->hwfns[0], 449 (uint8_t *)&info->port_mac); 450 451 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]); 452 } 453 454 qed_fill_dev_info(edev, &info->common); 455 456 if (IS_VF(edev)) 457 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN); 458 459 return 0; 460 } 461 462 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE]) 463 { 464 int i; 465 466 rte_memcpy(edev->name, name, NAME_SIZE); 467 for_each_hwfn(edev, i) { 468 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 469 } 470 } 471 472 static uint32_t 473 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 474 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id) 475 { 476 struct ecore_hwfn *p_hwfn; 477 int hwfn_index; 478 uint16_t rel_sb_id; 479 uint8_t n_hwfns = edev->num_hwfns; 480 uint32_t rc; 481 482 hwfn_index = sb_id % n_hwfns; 483 p_hwfn = &edev->hwfns[hwfn_index]; 484 rel_sb_id = sb_id / n_hwfns; 485 486 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 487 hwfn_index, rel_sb_id, sb_id); 488 489 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 490 sb_virt_addr, sb_phy_addr, rel_sb_id); 491 492 return rc; 493 } 494 495 static void qed_fill_link(struct ecore_hwfn *hwfn, 496 __rte_unused struct ecore_ptt *ptt, 497 struct qed_link_output *if_link) 498 { 499 struct ecore_mcp_link_params params; 500 struct ecore_mcp_link_state link; 501 struct ecore_mcp_link_capabilities link_caps; 502 uint8_t change = 0; 503 504 memset(if_link, 0, sizeof(*if_link)); 505 506 /* Prepare source inputs */ 507 if (IS_PF(hwfn->p_dev)) { 508 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 509 sizeof(params)); 510 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 511 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 512 sizeof(link_caps)); 513 } else { 514 ecore_vf_read_bulletin(hwfn, &change); 515 ecore_vf_get_link_params(hwfn, ¶ms); 516 ecore_vf_get_link_state(hwfn, &link); 517 ecore_vf_get_link_caps(hwfn, &link_caps); 518 } 519 520 /* Set the link parameters to pass to protocol driver */ 521 if (link.link_up) 522 if_link->link_up = true; 523 524 if (link.link_up) 525 if_link->speed = link.speed; 526 527 if_link->duplex = QEDE_DUPLEX_FULL; 528 529 /* Fill up the native advertised speed cap mask */ 530 if_link->adv_speed = params.speed.advertised_speeds; 531 532 if (params.speed.autoneg) 533 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 534 535 if (params.pause.autoneg || params.pause.forced_rx || 536 params.pause.forced_tx) 537 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 538 539 if (params.pause.autoneg) 540 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 541 542 if (params.pause.forced_rx) 543 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 544 545 if (params.pause.forced_tx) 546 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 547 548 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) { 549 if_link->eee_supported = false; 550 } else { 551 if_link->eee_supported = true; 552 if_link->eee_active = link.eee_active; 553 if_link->sup_caps = link_caps.eee_speed_caps; 554 /* MFW clears adv_caps on eee disable; use configured value */ 555 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps : 556 params.eee.adv_caps; 557 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps; 558 if_link->eee.enable = params.eee.enable; 559 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable; 560 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer; 561 } 562 } 563 564 static void 565 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 566 { 567 struct ecore_hwfn *hwfn; 568 struct ecore_ptt *ptt; 569 570 hwfn = &edev->hwfns[0]; 571 if (IS_PF(edev)) { 572 ptt = ecore_ptt_acquire(hwfn); 573 if (!ptt) 574 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n"); 575 576 qed_fill_link(hwfn, ptt, if_link); 577 578 if (ptt) 579 ecore_ptt_release(hwfn, ptt); 580 } else { 581 qed_fill_link(hwfn, NULL, if_link); 582 } 583 } 584 585 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 586 { 587 struct ecore_hwfn *hwfn; 588 struct ecore_ptt *ptt; 589 struct ecore_mcp_link_params *link_params; 590 int rc; 591 592 if (IS_VF(edev)) 593 return 0; 594 595 /* The link should be set only once per PF */ 596 hwfn = &edev->hwfns[0]; 597 598 ptt = ecore_ptt_acquire(hwfn); 599 if (!ptt) 600 return -EBUSY; 601 602 link_params = ecore_mcp_get_link_params(hwfn); 603 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 604 link_params->speed.autoneg = params->autoneg; 605 606 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 607 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 608 link_params->pause.autoneg = true; 609 else 610 link_params->pause.autoneg = false; 611 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 612 link_params->pause.forced_rx = true; 613 else 614 link_params->pause.forced_rx = false; 615 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 616 link_params->pause.forced_tx = true; 617 else 618 link_params->pause.forced_tx = false; 619 } 620 621 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG) 622 memcpy(&link_params->eee, ¶ms->eee, 623 sizeof(link_params->eee)); 624 625 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 626 627 ecore_ptt_release(hwfn, ptt); 628 629 return rc; 630 } 631 632 void qed_link_update(struct ecore_hwfn *hwfn) 633 { 634 struct ecore_dev *edev = hwfn->p_dev; 635 struct qede_dev *qdev = (struct qede_dev *)edev; 636 637 qede_link_update((struct rte_eth_dev *)qdev->ethdev, 0); 638 } 639 640 static int qed_drain(struct ecore_dev *edev) 641 { 642 struct ecore_hwfn *hwfn; 643 struct ecore_ptt *ptt; 644 int i, rc; 645 646 if (IS_VF(edev)) 647 return 0; 648 649 for_each_hwfn(edev, i) { 650 hwfn = &edev->hwfns[i]; 651 ptt = ecore_ptt_acquire(hwfn); 652 if (!ptt) { 653 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n"); 654 return -EBUSY; 655 } 656 rc = ecore_mcp_drain(hwfn, ptt); 657 if (rc) 658 return rc; 659 ecore_ptt_release(hwfn, ptt); 660 } 661 662 return 0; 663 } 664 665 static int qed_nic_stop(struct ecore_dev *edev) 666 { 667 int i, rc; 668 669 rc = ecore_hw_stop(edev); 670 for (i = 0; i < edev->num_hwfns; i++) { 671 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 672 673 if (p_hwfn->b_sp_dpc_enabled) 674 p_hwfn->b_sp_dpc_enabled = false; 675 } 676 return rc; 677 } 678 679 static int qed_slowpath_stop(struct ecore_dev *edev) 680 { 681 #ifdef CONFIG_QED_SRIOV 682 int i; 683 #endif 684 685 if (!edev) 686 return -ENODEV; 687 688 if (IS_PF(edev)) { 689 #ifdef CONFIG_ECORE_ZIPPED_FW 690 qed_free_stream_mem(edev); 691 #endif 692 693 #ifdef CONFIG_QED_SRIOV 694 if (IS_QED_ETH_IF(edev)) 695 qed_sriov_disable(edev, true); 696 #endif 697 } 698 699 qed_nic_stop(edev); 700 701 ecore_resc_free(edev); 702 qed_stop_iov_task(edev); 703 704 return 0; 705 } 706 707 static void qed_remove(struct ecore_dev *edev) 708 { 709 if (!edev) 710 return; 711 712 ecore_hw_remove(edev); 713 } 714 715 static int qed_send_drv_state(struct ecore_dev *edev, bool active) 716 { 717 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev); 718 struct ecore_ptt *ptt; 719 int status = 0; 720 721 ptt = ecore_ptt_acquire(hwfn); 722 if (!ptt) 723 return -EAGAIN; 724 725 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ? 726 ECORE_OV_DRIVER_STATE_ACTIVE : 727 ECORE_OV_DRIVER_STATE_DISABLED); 728 729 ecore_ptt_release(hwfn, ptt); 730 731 return status; 732 } 733 734 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb, 735 u16 qid, struct ecore_sb_info_dbg *sb_dbg) 736 { 737 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns]; 738 struct ecore_ptt *ptt; 739 int rc; 740 741 if (IS_VF(edev)) 742 return -EINVAL; 743 744 ptt = ecore_ptt_acquire(hwfn); 745 if (!ptt) { 746 DP_ERR(hwfn, "Can't acquire PTT\n"); 747 return -EAGAIN; 748 } 749 750 memset(sb_dbg, 0, sizeof(*sb_dbg)); 751 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg); 752 753 ecore_ptt_release(hwfn, ptt); 754 return rc; 755 } 756 757 const struct qed_common_ops qed_common_ops_pass = { 758 INIT_STRUCT_FIELD(probe, &qed_probe), 759 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 760 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 761 INIT_STRUCT_FIELD(set_name, &qed_set_name), 762 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 763 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 764 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 765 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info), 766 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 767 INIT_STRUCT_FIELD(set_link, &qed_set_link), 768 INIT_STRUCT_FIELD(drain, &qed_drain), 769 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 770 INIT_STRUCT_FIELD(remove, &qed_remove), 771 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state), 772 }; 773 774 const struct qed_eth_ops qed_eth_ops_pass = { 775 INIT_STRUCT_FIELD(common, &qed_common_ops_pass), 776 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info), 777 }; 778 779 const struct qed_eth_ops *qed_get_eth_ops(void) 780 { 781 return &qed_eth_ops_pass; 782 } 783