1 /* 2 * Copyright (c) 2016 QLogic Corporation. 3 * All rights reserved. 4 * www.qlogic.com 5 * 6 * See LICENSE.qede_pmd for copyright and licensing details. 7 */ 8 9 #include <limits.h> 10 #include <time.h> 11 #include <rte_alarm.h> 12 13 #include "qede_ethdev.h" 14 15 /* Alarm timeout. */ 16 #define QEDE_ALARM_TIMEOUT_US 100000 17 18 /* Global variable to hold absolute path of fw file */ 19 char fw_file[PATH_MAX]; 20 21 const char *QEDE_DEFAULT_FIRMWARE = 22 "/lib/firmware/qed/qed_init_values-8.20.0.0.bin"; 23 24 static void 25 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 26 { 27 int i; 28 29 for (i = 0; i < edev->num_hwfns; i++) { 30 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 31 p_hwfn->pf_params = *params; 32 } 33 } 34 35 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 36 { 37 edev->regview = pci_dev->mem_resource[0].addr; 38 edev->doorbells = pci_dev->mem_resource[2].addr; 39 } 40 41 static int 42 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 43 uint32_t dp_module, uint8_t dp_level, bool is_vf) 44 { 45 struct ecore_hw_prepare_params hw_prepare_params; 46 int rc; 47 48 ecore_init_struct(edev); 49 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 50 /* Protocol type is always fixed to PROTOCOL_ETH */ 51 52 if (is_vf) 53 edev->b_is_vf = true; 54 55 ecore_init_dp(edev, dp_module, dp_level, NULL); 56 qed_init_pci(edev, pci_dev); 57 58 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params)); 59 hw_prepare_params.personality = ECORE_PCI_ETH; 60 hw_prepare_params.drv_resc_alloc = false; 61 hw_prepare_params.chk_reg_fifo = false; 62 hw_prepare_params.initiate_pf_flr = true; 63 hw_prepare_params.allow_mdump = false; 64 hw_prepare_params.epoch = (u32)time(NULL); 65 rc = ecore_hw_prepare(edev, &hw_prepare_params); 66 if (rc) { 67 DP_ERR(edev, "hw prepare failed\n"); 68 return rc; 69 } 70 71 return rc; 72 } 73 74 static int qed_nic_setup(struct ecore_dev *edev) 75 { 76 int rc; 77 78 rc = ecore_resc_alloc(edev); 79 if (rc) 80 return rc; 81 82 DP_INFO(edev, "Allocated qed resources\n"); 83 ecore_resc_setup(edev); 84 85 return rc; 86 } 87 88 #ifdef CONFIG_ECORE_ZIPPED_FW 89 static int qed_alloc_stream_mem(struct ecore_dev *edev) 90 { 91 int i; 92 93 for_each_hwfn(edev, i) { 94 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 95 96 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 97 sizeof(*p_hwfn->stream)); 98 if (!p_hwfn->stream) 99 return -ENOMEM; 100 } 101 102 return 0; 103 } 104 105 static void qed_free_stream_mem(struct ecore_dev *edev) 106 { 107 int i; 108 109 for_each_hwfn(edev, i) { 110 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 111 112 if (!p_hwfn->stream) 113 return; 114 115 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 116 } 117 } 118 #endif 119 120 #ifdef CONFIG_ECORE_BINARY_FW 121 static int qed_load_firmware_data(struct ecore_dev *edev) 122 { 123 int fd; 124 struct stat st; 125 const char *fw = RTE_LIBRTE_QEDE_FW; 126 127 if (strcmp(fw, "") == 0) 128 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE); 129 else 130 strcpy(fw_file, fw); 131 132 fd = open(fw_file, O_RDONLY); 133 if (fd < 0) { 134 DP_ERR(edev, "Can't open firmware file\n"); 135 return -ENOENT; 136 } 137 138 if (fstat(fd, &st) < 0) { 139 DP_ERR(edev, "Can't stat firmware file\n"); 140 close(fd); 141 return -1; 142 } 143 144 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 145 RTE_CACHE_LINE_SIZE); 146 if (!edev->firmware) { 147 DP_ERR(edev, "Can't allocate memory for firmware\n"); 148 close(fd); 149 return -ENOMEM; 150 } 151 152 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 153 DP_ERR(edev, "Can't read firmware data\n"); 154 close(fd); 155 return -1; 156 } 157 158 edev->fw_len = st.st_size; 159 if (edev->fw_len < 104) { 160 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n", 161 edev->fw_len); 162 close(fd); 163 return -EINVAL; 164 } 165 166 close(fd); 167 return 0; 168 } 169 #endif 170 171 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn) 172 { 173 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced; 174 175 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac, 176 &is_mac_forced); 177 if (is_mac_exist && is_mac_forced) 178 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN); 179 180 /* Always update link configuration according to bulletin */ 181 qed_link_update(hwfn); 182 } 183 184 static void qede_vf_task(void *arg) 185 { 186 struct ecore_hwfn *p_hwfn = arg; 187 uint8_t change = 0; 188 189 /* Read the bulletin board, and re-schedule the task */ 190 ecore_vf_read_bulletin(p_hwfn, &change); 191 if (change) 192 qed_handle_bulletin_change(p_hwfn); 193 194 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn); 195 } 196 197 static void qed_start_iov_task(struct ecore_dev *edev) 198 { 199 struct ecore_hwfn *p_hwfn; 200 int i; 201 202 for_each_hwfn(edev, i) { 203 p_hwfn = &edev->hwfns[i]; 204 if (!IS_PF(edev)) 205 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, 206 p_hwfn); 207 } 208 } 209 210 static void qed_stop_iov_task(struct ecore_dev *edev) 211 { 212 struct ecore_hwfn *p_hwfn; 213 int i; 214 215 for_each_hwfn(edev, i) { 216 p_hwfn = &edev->hwfns[i]; 217 if (!IS_PF(edev)) 218 rte_eal_alarm_cancel(qede_vf_task, p_hwfn); 219 } 220 } 221 static int qed_slowpath_start(struct ecore_dev *edev, 222 struct qed_slowpath_params *params) 223 { 224 const uint8_t *data = NULL; 225 struct ecore_hwfn *hwfn; 226 struct ecore_mcp_drv_version drv_version; 227 struct ecore_hw_init_params hw_init_params; 228 struct ecore_ptt *p_ptt; 229 int rc; 230 231 if (IS_PF(edev)) { 232 #ifdef CONFIG_ECORE_BINARY_FW 233 rc = qed_load_firmware_data(edev); 234 if (rc) { 235 DP_ERR(edev, "Failed to find fw file %s\n", fw_file); 236 goto err; 237 } 238 #endif 239 hwfn = ECORE_LEADING_HWFN(edev); 240 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */ 241 p_ptt = ecore_ptt_acquire(hwfn); 242 if (p_ptt) { 243 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt; 244 } else { 245 DP_ERR(edev, "Failed to acquire PTT for flowdir\n"); 246 rc = -ENOMEM; 247 goto err; 248 } 249 } 250 } 251 252 rc = qed_nic_setup(edev); 253 if (rc) 254 goto err; 255 256 /* set int_coalescing_mode */ 257 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 258 259 #ifdef CONFIG_ECORE_ZIPPED_FW 260 if (IS_PF(edev)) { 261 /* Allocate stream for unzipping */ 262 rc = qed_alloc_stream_mem(edev); 263 if (rc) { 264 DP_ERR(edev, "Failed to allocate stream memory\n"); 265 goto err1; 266 } 267 } 268 #endif 269 270 qed_start_iov_task(edev); 271 272 #ifdef CONFIG_ECORE_BINARY_FW 273 if (IS_PF(edev)) 274 data = (const uint8_t *)edev->firmware + sizeof(u32); 275 #endif 276 277 /* Start the slowpath */ 278 memset(&hw_init_params, 0, sizeof(hw_init_params)); 279 hw_init_params.b_hw_start = true; 280 hw_init_params.int_mode = ECORE_INT_MODE_MSIX; 281 hw_init_params.allow_npar_tx_switch = true; 282 hw_init_params.bin_fw_data = data; 283 hw_init_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT; 284 hw_init_params.avoid_eng_reset = false; 285 rc = ecore_hw_init(edev, &hw_init_params); 286 if (rc) { 287 DP_ERR(edev, "ecore_hw_init failed\n"); 288 goto err2; 289 } 290 291 DP_INFO(edev, "HW inited and function started\n"); 292 293 if (IS_PF(edev)) { 294 hwfn = ECORE_LEADING_HWFN(edev); 295 drv_version.version = (params->drv_major << 24) | 296 (params->drv_minor << 16) | 297 (params->drv_rev << 8) | (params->drv_eng); 298 /* TBD: strlcpy() */ 299 strncpy((char *)drv_version.name, (const char *)params->name, 300 MCP_DRV_VER_STR_SIZE - 4); 301 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 302 &drv_version); 303 if (rc) { 304 DP_ERR(edev, "Failed sending drv version command\n"); 305 goto err3; 306 } 307 } 308 309 ecore_reset_vport_stats(edev); 310 311 return 0; 312 313 err3: 314 ecore_hw_stop(edev); 315 err2: 316 qed_stop_iov_task(edev); 317 #ifdef CONFIG_ECORE_ZIPPED_FW 318 qed_free_stream_mem(edev); 319 err1: 320 #endif 321 ecore_resc_free(edev); 322 err: 323 #ifdef CONFIG_ECORE_BINARY_FW 324 if (IS_PF(edev)) { 325 if (edev->firmware) 326 rte_free(edev->firmware); 327 edev->firmware = NULL; 328 } 329 #endif 330 qed_stop_iov_task(edev); 331 332 return rc; 333 } 334 335 static int 336 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 337 { 338 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev); 339 struct ecore_ptt *ptt = NULL; 340 struct ecore_tunnel_info *tun = &edev->tunnel; 341 342 memset(dev_info, 0, sizeof(struct qed_dev_info)); 343 344 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 345 tun->vxlan.b_mode_enabled) 346 dev_info->vxlan_enable = true; 347 348 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled && 349 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 350 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 351 dev_info->gre_enable = true; 352 353 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled && 354 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 355 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 356 dev_info->geneve_enable = true; 357 358 dev_info->num_hwfns = edev->num_hwfns; 359 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 360 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu; 361 dev_info->dev_type = edev->type; 362 363 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 364 ETHER_ADDR_LEN); 365 366 dev_info->fw_major = FW_MAJOR_VERSION; 367 dev_info->fw_minor = FW_MINOR_VERSION; 368 dev_info->fw_rev = FW_REVISION_VERSION; 369 dev_info->fw_eng = FW_ENGINEERING_VERSION; 370 371 if (IS_PF(edev)) { 372 dev_info->mf_mode = edev->mf_mode; 373 dev_info->tx_switching = false; 374 375 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn); 376 377 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 378 if (ptt) { 379 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 380 &dev_info->mfw_rev, NULL); 381 382 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 383 &dev_info->flash_size); 384 385 /* Workaround to allow PHY-read commands for 386 * B0 bringup. 387 */ 388 if (ECORE_IS_BB_B0(edev)) 389 dev_info->flash_size = 0xffffffff; 390 391 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 392 } 393 } else { 394 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 395 &dev_info->mfw_rev, NULL); 396 } 397 398 return 0; 399 } 400 401 int 402 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 403 { 404 uint8_t queues = 0; 405 int i; 406 407 memset(info, 0, sizeof(*info)); 408 409 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 410 411 if (IS_PF(edev)) { 412 int max_vf_vlan_filters = 0; 413 414 info->num_queues = 0; 415 for_each_hwfn(edev, i) 416 info->num_queues += 417 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 418 419 if (edev->p_iov_info) 420 max_vf_vlan_filters = edev->p_iov_info->total_vfs * 421 ECORE_ETH_VF_NUM_VLAN_FILTERS; 422 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) - 423 max_vf_vlan_filters; 424 425 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 426 ETHER_ADDR_LEN); 427 } else { 428 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev), 429 &info->num_queues); 430 if (edev->num_hwfns > 1) { 431 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues); 432 info->num_queues += queues; 433 } 434 435 ecore_vf_get_num_vlan_filters(&edev->hwfns[0], 436 (u8 *)&info->num_vlan_filters); 437 438 ecore_vf_get_port_mac(&edev->hwfns[0], 439 (uint8_t *)&info->port_mac); 440 441 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]); 442 } 443 444 qed_fill_dev_info(edev, &info->common); 445 446 if (IS_VF(edev)) 447 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN); 448 449 return 0; 450 } 451 452 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE]) 453 { 454 int i; 455 456 rte_memcpy(edev->name, name, NAME_SIZE); 457 for_each_hwfn(edev, i) { 458 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 459 } 460 } 461 462 static uint32_t 463 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 464 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id) 465 { 466 struct ecore_hwfn *p_hwfn; 467 int hwfn_index; 468 uint16_t rel_sb_id; 469 uint8_t n_hwfns = edev->num_hwfns; 470 uint32_t rc; 471 472 hwfn_index = sb_id % n_hwfns; 473 p_hwfn = &edev->hwfns[hwfn_index]; 474 rel_sb_id = sb_id / n_hwfns; 475 476 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 477 hwfn_index, rel_sb_id, sb_id); 478 479 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 480 sb_virt_addr, sb_phy_addr, rel_sb_id); 481 482 return rc; 483 } 484 485 static void qed_fill_link(struct ecore_hwfn *hwfn, 486 struct qed_link_output *if_link) 487 { 488 struct ecore_mcp_link_params params; 489 struct ecore_mcp_link_state link; 490 struct ecore_mcp_link_capabilities link_caps; 491 uint8_t change = 0; 492 493 memset(if_link, 0, sizeof(*if_link)); 494 495 /* Prepare source inputs */ 496 if (IS_PF(hwfn->p_dev)) { 497 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 498 sizeof(params)); 499 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 500 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 501 sizeof(link_caps)); 502 } else { 503 ecore_vf_read_bulletin(hwfn, &change); 504 ecore_vf_get_link_params(hwfn, ¶ms); 505 ecore_vf_get_link_state(hwfn, &link); 506 ecore_vf_get_link_caps(hwfn, &link_caps); 507 } 508 509 /* Set the link parameters to pass to protocol driver */ 510 if (link.link_up) 511 if_link->link_up = true; 512 513 if (link.link_up) 514 if_link->speed = link.speed; 515 516 if_link->duplex = QEDE_DUPLEX_FULL; 517 518 /* Fill up the native advertised speed cap mask */ 519 if_link->adv_speed = params.speed.advertised_speeds; 520 521 if (params.speed.autoneg) 522 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 523 524 if (params.pause.autoneg || params.pause.forced_rx || 525 params.pause.forced_tx) 526 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 527 528 if (params.pause.autoneg) 529 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 530 531 if (params.pause.forced_rx) 532 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 533 534 if (params.pause.forced_tx) 535 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 536 } 537 538 static void 539 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 540 { 541 qed_fill_link(&edev->hwfns[0], if_link); 542 543 #ifdef CONFIG_QED_SRIOV 544 for_each_hwfn(cdev, i) 545 qed_inform_vf_link_state(&cdev->hwfns[i]); 546 #endif 547 } 548 549 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 550 { 551 struct ecore_hwfn *hwfn; 552 struct ecore_ptt *ptt; 553 struct ecore_mcp_link_params *link_params; 554 int rc; 555 556 if (IS_VF(edev)) 557 return 0; 558 559 /* The link should be set only once per PF */ 560 hwfn = &edev->hwfns[0]; 561 562 ptt = ecore_ptt_acquire(hwfn); 563 if (!ptt) 564 return -EBUSY; 565 566 link_params = ecore_mcp_get_link_params(hwfn); 567 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 568 link_params->speed.autoneg = params->autoneg; 569 570 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 571 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 572 link_params->pause.autoneg = true; 573 else 574 link_params->pause.autoneg = false; 575 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 576 link_params->pause.forced_rx = true; 577 else 578 link_params->pause.forced_rx = false; 579 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 580 link_params->pause.forced_tx = true; 581 else 582 link_params->pause.forced_tx = false; 583 } 584 585 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 586 587 ecore_ptt_release(hwfn, ptt); 588 589 return rc; 590 } 591 592 void qed_link_update(struct ecore_hwfn *hwfn) 593 { 594 struct qed_link_output if_link; 595 596 qed_fill_link(hwfn, &if_link); 597 } 598 599 static int qed_drain(struct ecore_dev *edev) 600 { 601 struct ecore_hwfn *hwfn; 602 struct ecore_ptt *ptt; 603 int i, rc; 604 605 if (IS_VF(edev)) 606 return 0; 607 608 for_each_hwfn(edev, i) { 609 hwfn = &edev->hwfns[i]; 610 ptt = ecore_ptt_acquire(hwfn); 611 if (!ptt) { 612 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n"); 613 return -EBUSY; 614 } 615 rc = ecore_mcp_drain(hwfn, ptt); 616 if (rc) 617 return rc; 618 ecore_ptt_release(hwfn, ptt); 619 } 620 621 return 0; 622 } 623 624 static int qed_nic_stop(struct ecore_dev *edev) 625 { 626 int i, rc; 627 628 rc = ecore_hw_stop(edev); 629 for (i = 0; i < edev->num_hwfns; i++) { 630 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 631 632 if (p_hwfn->b_sp_dpc_enabled) 633 p_hwfn->b_sp_dpc_enabled = false; 634 } 635 return rc; 636 } 637 638 static int qed_slowpath_stop(struct ecore_dev *edev) 639 { 640 #ifdef CONFIG_QED_SRIOV 641 int i; 642 #endif 643 644 if (!edev) 645 return -ENODEV; 646 647 if (IS_PF(edev)) { 648 #ifdef CONFIG_ECORE_ZIPPED_FW 649 qed_free_stream_mem(edev); 650 #endif 651 652 #ifdef CONFIG_QED_SRIOV 653 if (IS_QED_ETH_IF(edev)) 654 qed_sriov_disable(edev, true); 655 #endif 656 } 657 658 qed_nic_stop(edev); 659 660 ecore_resc_free(edev); 661 qed_stop_iov_task(edev); 662 663 return 0; 664 } 665 666 static void qed_remove(struct ecore_dev *edev) 667 { 668 if (!edev) 669 return; 670 671 ecore_hw_remove(edev); 672 } 673 674 static int qed_send_drv_state(struct ecore_dev *edev, bool active) 675 { 676 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev); 677 struct ecore_ptt *ptt; 678 int status = 0; 679 680 ptt = ecore_ptt_acquire(hwfn); 681 if (!ptt) 682 return -EAGAIN; 683 684 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ? 685 ECORE_OV_DRIVER_STATE_ACTIVE : 686 ECORE_OV_DRIVER_STATE_DISABLED); 687 688 ecore_ptt_release(hwfn, ptt); 689 690 return status; 691 } 692 693 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb, 694 u16 qid, struct ecore_sb_info_dbg *sb_dbg) 695 { 696 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns]; 697 struct ecore_ptt *ptt; 698 int rc; 699 700 if (IS_VF(edev)) 701 return -EINVAL; 702 703 ptt = ecore_ptt_acquire(hwfn); 704 if (!ptt) { 705 DP_ERR(hwfn, "Can't acquire PTT\n"); 706 return -EAGAIN; 707 } 708 709 memset(sb_dbg, 0, sizeof(*sb_dbg)); 710 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg); 711 712 ecore_ptt_release(hwfn, ptt); 713 return rc; 714 } 715 716 const struct qed_common_ops qed_common_ops_pass = { 717 INIT_STRUCT_FIELD(probe, &qed_probe), 718 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 719 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 720 INIT_STRUCT_FIELD(set_name, &qed_set_name), 721 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 722 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 723 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 724 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info), 725 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 726 INIT_STRUCT_FIELD(set_link, &qed_set_link), 727 INIT_STRUCT_FIELD(drain, &qed_drain), 728 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 729 INIT_STRUCT_FIELD(remove, &qed_remove), 730 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state), 731 }; 732 733 const struct qed_eth_ops qed_eth_ops_pass = { 734 INIT_STRUCT_FIELD(common, &qed_common_ops_pass), 735 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info), 736 }; 737 738 const struct qed_eth_ops *qed_get_eth_ops(void) 739 { 740 return &qed_eth_ops_pass; 741 } 742