1 /* 2 * Copyright (c) 2016 QLogic Corporation. 3 * All rights reserved. 4 * www.qlogic.com 5 * 6 * See LICENSE.qede_pmd for copyright and licensing details. 7 */ 8 9 #include <sys/stat.h> 10 #include <fcntl.h> 11 #include <unistd.h> 12 #include <zlib.h> 13 #include <limits.h> 14 15 #include "qede_ethdev.h" 16 17 static uint8_t npar_tx_switching = 1; 18 19 #define CONFIG_QED_BINARY_FW 20 /* Global variable to hold absolute path of fw file */ 21 char fw_file[PATH_MAX]; 22 23 const char *QEDE_DEFAULT_FIRMWARE = 24 "/lib/firmware/qed/qed_init_values_zipped-8.7.7.0.bin"; 25 26 static void 27 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 28 { 29 int i; 30 31 for (i = 0; i < edev->num_hwfns; i++) { 32 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 33 p_hwfn->pf_params = *params; 34 } 35 } 36 37 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 38 { 39 edev->regview = pci_dev->mem_resource[0].addr; 40 edev->doorbells = pci_dev->mem_resource[2].addr; 41 } 42 43 static int 44 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 45 enum qed_protocol protocol, uint32_t dp_module, 46 uint8_t dp_level, bool is_vf) 47 { 48 struct qede_dev *qdev = (struct qede_dev *)edev; 49 int rc; 50 51 ecore_init_struct(edev); 52 qdev->protocol = protocol; 53 if (is_vf) { 54 edev->b_is_vf = true; 55 edev->sriov_info.b_hw_channel = true; 56 } 57 ecore_init_dp(edev, dp_module, dp_level, NULL); 58 qed_init_pci(edev, pci_dev); 59 rc = ecore_hw_prepare(edev, ECORE_PCI_DEFAULT); 60 if (rc) { 61 DP_ERR(edev, "hw prepare failed\n"); 62 return rc; 63 } 64 65 return rc; 66 } 67 68 static int qed_nic_setup(struct ecore_dev *edev) 69 { 70 int rc, i; 71 72 rc = ecore_resc_alloc(edev); 73 if (rc) 74 return rc; 75 76 DP_INFO(edev, "Allocated qed resources\n"); 77 ecore_resc_setup(edev); 78 79 return rc; 80 } 81 82 static int qed_alloc_stream_mem(struct ecore_dev *edev) 83 { 84 int i; 85 86 for_each_hwfn(edev, i) { 87 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 88 89 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 90 sizeof(*p_hwfn->stream)); 91 if (!p_hwfn->stream) 92 return -ENOMEM; 93 } 94 95 return 0; 96 } 97 98 static void qed_free_stream_mem(struct ecore_dev *edev) 99 { 100 int i; 101 102 for_each_hwfn(edev, i) { 103 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 104 105 if (!p_hwfn->stream) 106 return; 107 108 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 109 } 110 } 111 112 static int qed_load_firmware_data(struct ecore_dev *edev) 113 { 114 int fd; 115 struct stat st; 116 const char *fw = RTE_LIBRTE_QEDE_FW; 117 118 if (strcmp(fw, "") == 0) 119 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE); 120 else 121 strcpy(fw_file, fw); 122 123 fd = open(fw_file, O_RDONLY); 124 if (fd < 0) { 125 DP_NOTICE(edev, false, "Can't open firmware file\n"); 126 return -ENOENT; 127 } 128 129 if (fstat(fd, &st) < 0) { 130 DP_NOTICE(edev, false, "Can't stat firmware file\n"); 131 return -1; 132 } 133 134 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 135 RTE_CACHE_LINE_SIZE); 136 if (!edev->firmware) { 137 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n"); 138 close(fd); 139 return -ENOMEM; 140 } 141 142 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 143 DP_NOTICE(edev, false, "Can't read firmware data\n"); 144 close(fd); 145 return -1; 146 } 147 148 edev->fw_len = st.st_size; 149 if (edev->fw_len < 104) { 150 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n", 151 edev->fw_len); 152 return -EINVAL; 153 } 154 155 return 0; 156 } 157 158 static int qed_slowpath_start(struct ecore_dev *edev, 159 struct qed_slowpath_params *params) 160 { 161 bool allow_npar_tx_switching; 162 const uint8_t *data = NULL; 163 struct ecore_hwfn *hwfn; 164 struct ecore_mcp_drv_version drv_version; 165 struct qede_dev *qdev = (struct qede_dev *)edev; 166 int rc; 167 #ifdef QED_ENC_SUPPORTED 168 struct ecore_tunn_start_params tunn_info; 169 #endif 170 171 #ifdef CONFIG_QED_BINARY_FW 172 rc = qed_load_firmware_data(edev); 173 if (rc) { 174 DP_NOTICE(edev, true, 175 "Failed to find fw file %s\n", fw_file); 176 goto err; 177 } 178 #endif 179 180 rc = qed_nic_setup(edev); 181 if (rc) 182 goto err; 183 184 /* set int_coalescing_mode */ 185 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 186 187 /* Should go with CONFIG_QED_BINARY_FW */ 188 /* Allocate stream for unzipping */ 189 rc = qed_alloc_stream_mem(edev); 190 if (rc) { 191 DP_NOTICE(edev, true, 192 "Failed to allocate stream memory\n"); 193 goto err2; 194 } 195 196 /* Start the slowpath */ 197 #ifdef CONFIG_QED_BINARY_FW 198 data = edev->firmware; 199 #endif 200 allow_npar_tx_switching = npar_tx_switching ? true : false; 201 202 #ifdef QED_ENC_SUPPORTED 203 memset(&tunn_info, 0, sizeof(tunn_info)); 204 tunn_info.tunn_mode |= 1 << QED_MODE_VXLAN_TUNN | 205 1 << QED_MODE_L2GRE_TUNN | 206 1 << QED_MODE_IPGRE_TUNN | 207 1 << QED_MODE_L2GENEVE_TUNN | 1 << QED_MODE_IPGENEVE_TUNN; 208 tunn_info.tunn_clss_vxlan = QED_TUNN_CLSS_MAC_VLAN; 209 tunn_info.tunn_clss_l2gre = QED_TUNN_CLSS_MAC_VLAN; 210 tunn_info.tunn_clss_ipgre = QED_TUNN_CLSS_MAC_VLAN; 211 rc = ecore_hw_init(edev, &tunn_info, true, ECORE_INT_MODE_MSIX, 212 allow_npar_tx_switching, data); 213 #else 214 rc = ecore_hw_init(edev, NULL, true, ECORE_INT_MODE_MSIX, 215 allow_npar_tx_switching, data); 216 #endif 217 if (rc) { 218 DP_ERR(edev, "ecore_hw_init failed\n"); 219 goto err2; 220 } 221 222 DP_INFO(edev, "HW inited and function started\n"); 223 224 hwfn = ECORE_LEADING_HWFN(edev); 225 drv_version.version = (params->drv_major << 24) | 226 (params->drv_minor << 16) | 227 (params->drv_rev << 8) | (params->drv_eng); 228 /* TBD: strlcpy() */ 229 strncpy((char *)drv_version.name, (const char *)params->name, 230 MCP_DRV_VER_STR_SIZE - 4); 231 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 232 &drv_version); 233 if (rc) { 234 DP_NOTICE(edev, true, 235 "Failed sending drv version command\n"); 236 return rc; 237 } 238 239 return 0; 240 241 ecore_hw_stop(edev); 242 err2: 243 ecore_resc_free(edev); 244 err: 245 #ifdef CONFIG_QED_BINARY_FW 246 if (edev->firmware) 247 rte_free(edev->firmware); 248 edev->firmware = NULL; 249 #endif 250 return rc; 251 } 252 253 static int 254 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 255 { 256 struct ecore_ptt *ptt = NULL; 257 258 memset(dev_info, 0, sizeof(struct qed_dev_info)); 259 dev_info->num_hwfns = edev->num_hwfns; 260 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 261 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 262 ETHER_ADDR_LEN); 263 264 dev_info->fw_major = FW_MAJOR_VERSION; 265 dev_info->fw_minor = FW_MINOR_VERSION; 266 dev_info->fw_rev = FW_REVISION_VERSION; 267 dev_info->fw_eng = FW_ENGINEERING_VERSION; 268 dev_info->mf_mode = edev->mf_mode; 269 dev_info->tx_switching = false; 270 271 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 272 if (ptt) { 273 ecore_mcp_get_mfw_ver(edev, ptt, 274 &dev_info->mfw_rev, NULL); 275 276 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 277 &dev_info->flash_size); 278 279 /* Workaround to allow PHY-read commands for 280 * B0 bringup. 281 */ 282 if (ECORE_IS_BB_B0(edev)) 283 dev_info->flash_size = 0xffffffff; 284 285 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 286 } 287 288 return 0; 289 } 290 291 int 292 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 293 { 294 struct qede_dev *qdev = (struct qede_dev *)edev; 295 int i; 296 297 memset(info, 0, sizeof(*info)); 298 299 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 300 301 info->num_queues = 0; 302 for_each_hwfn(edev, i) 303 info->num_queues += 304 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 305 306 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN); 307 308 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 309 ETHER_ADDR_LEN); 310 311 qed_fill_dev_info(edev, &info->common); 312 313 return 0; 314 } 315 316 static void 317 qed_set_id(struct ecore_dev *edev, char name[NAME_SIZE], 318 const char ver_str[VER_SIZE]) 319 { 320 int i; 321 322 rte_memcpy(edev->name, name, NAME_SIZE); 323 for_each_hwfn(edev, i) { 324 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 325 } 326 rte_memcpy(edev->ver_str, ver_str, VER_SIZE); 327 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 328 } 329 330 static uint32_t 331 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 332 void *sb_virt_addr, dma_addr_t sb_phy_addr, 333 uint16_t sb_id, enum qed_sb_type type) 334 { 335 struct ecore_hwfn *p_hwfn; 336 int hwfn_index; 337 uint16_t rel_sb_id; 338 uint8_t n_hwfns; 339 uint32_t rc; 340 341 /* RoCE uses single engine and CMT uses two engines. When using both 342 * we force only a single engine. Storage uses only engine 0 too. 343 */ 344 if (type == QED_SB_TYPE_L2_QUEUE) 345 n_hwfns = edev->num_hwfns; 346 else 347 n_hwfns = 1; 348 349 hwfn_index = sb_id % n_hwfns; 350 p_hwfn = &edev->hwfns[hwfn_index]; 351 rel_sb_id = sb_id / n_hwfns; 352 353 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 354 hwfn_index, rel_sb_id, sb_id); 355 356 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 357 sb_virt_addr, sb_phy_addr, rel_sb_id); 358 359 return rc; 360 } 361 362 static void qed_fill_link(struct ecore_hwfn *hwfn, 363 struct qed_link_output *if_link) 364 { 365 struct ecore_mcp_link_params params; 366 struct ecore_mcp_link_state link; 367 struct ecore_mcp_link_capabilities link_caps; 368 uint32_t media_type; 369 uint8_t change = 0; 370 371 memset(if_link, 0, sizeof(*if_link)); 372 373 /* Prepare source inputs */ 374 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 375 sizeof(params)); 376 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 377 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 378 sizeof(link_caps)); 379 380 /* Set the link parameters to pass to protocol driver */ 381 if (link.link_up) 382 if_link->link_up = true; 383 384 if (link.link_up) 385 if_link->speed = link.speed; 386 387 if_link->duplex = QEDE_DUPLEX_FULL; 388 389 if (params.speed.autoneg) 390 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 391 392 if (params.pause.autoneg || params.pause.forced_rx || 393 params.pause.forced_tx) 394 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 395 396 if (params.pause.autoneg) 397 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 398 399 if (params.pause.forced_rx) 400 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 401 402 if (params.pause.forced_tx) 403 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 404 } 405 406 static void 407 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 408 { 409 qed_fill_link(&edev->hwfns[0], if_link); 410 411 #ifdef CONFIG_QED_SRIOV 412 for_each_hwfn(cdev, i) 413 qed_inform_vf_link_state(&cdev->hwfns[i]); 414 #endif 415 } 416 417 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 418 { 419 struct ecore_hwfn *hwfn; 420 struct ecore_ptt *ptt; 421 struct ecore_mcp_link_params *link_params; 422 int rc; 423 424 /* The link should be set only once per PF */ 425 hwfn = &edev->hwfns[0]; 426 427 ptt = ecore_ptt_acquire(hwfn); 428 if (!ptt) 429 return -EBUSY; 430 431 link_params = ecore_mcp_get_link_params(hwfn); 432 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 433 link_params->speed.autoneg = params->autoneg; 434 435 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 436 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 437 link_params->pause.autoneg = true; 438 else 439 link_params->pause.autoneg = false; 440 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 441 link_params->pause.forced_rx = true; 442 else 443 link_params->pause.forced_rx = false; 444 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 445 link_params->pause.forced_tx = true; 446 else 447 link_params->pause.forced_tx = false; 448 } 449 450 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 451 452 ecore_ptt_release(hwfn, ptt); 453 454 return rc; 455 } 456 457 static int qed_drain(struct ecore_dev *edev) 458 { 459 struct ecore_hwfn *hwfn; 460 struct ecore_ptt *ptt; 461 int i, rc; 462 463 for_each_hwfn(edev, i) { 464 hwfn = &edev->hwfns[i]; 465 ptt = ecore_ptt_acquire(hwfn); 466 if (!ptt) { 467 DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n"); 468 return -EBUSY; 469 } 470 rc = ecore_mcp_drain(hwfn, ptt); 471 if (rc) 472 return rc; 473 ecore_ptt_release(hwfn, ptt); 474 } 475 476 return 0; 477 } 478 479 static int qed_nic_stop(struct ecore_dev *edev) 480 { 481 int i, rc; 482 483 rc = ecore_hw_stop(edev); 484 for (i = 0; i < edev->num_hwfns; i++) { 485 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 486 487 if (p_hwfn->b_sp_dpc_enabled) 488 p_hwfn->b_sp_dpc_enabled = false; 489 } 490 return rc; 491 } 492 493 static int qed_nic_reset(struct ecore_dev *edev) 494 { 495 int rc; 496 497 rc = ecore_hw_reset(edev); 498 if (rc) 499 return rc; 500 501 ecore_resc_free(edev); 502 503 return 0; 504 } 505 506 static int qed_slowpath_stop(struct ecore_dev *edev) 507 { 508 #ifdef CONFIG_QED_SRIOV 509 int i; 510 #endif 511 512 if (!edev) 513 return -ENODEV; 514 515 qed_free_stream_mem(edev); 516 517 qed_nic_stop(edev); 518 519 qed_nic_reset(edev); 520 521 return 0; 522 } 523 524 static void qed_remove(struct ecore_dev *edev) 525 { 526 if (!edev) 527 return; 528 529 ecore_hw_remove(edev); 530 } 531 532 const struct qed_common_ops qed_common_ops_pass = { 533 INIT_STRUCT_FIELD(probe, &qed_probe), 534 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 535 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 536 INIT_STRUCT_FIELD(set_id, &qed_set_id), 537 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 538 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 539 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 540 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 541 INIT_STRUCT_FIELD(set_link, &qed_set_link), 542 INIT_STRUCT_FIELD(drain, &qed_drain), 543 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 544 INIT_STRUCT_FIELD(remove, &qed_remove), 545 }; 546