1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 */ 6 7 #include <limits.h> 8 #include <time.h> 9 #include <rte_alarm.h> 10 #include <rte_string_fns.h> 11 12 #include "qede_ethdev.h" 13 14 /* Alarm timeout. */ 15 #define QEDE_ALARM_TIMEOUT_US 100000 16 17 /* Global variable to hold absolute path of fw file */ 18 char qede_fw_file[PATH_MAX]; 19 20 static const char * const QEDE_DEFAULT_FIRMWARE = 21 "/lib/firmware/qed/qed_init_values-8.37.7.0.bin"; 22 23 static void 24 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 25 { 26 int i; 27 28 for (i = 0; i < edev->num_hwfns; i++) { 29 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 30 p_hwfn->pf_params = *params; 31 } 32 } 33 34 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 35 { 36 edev->regview = pci_dev->mem_resource[0].addr; 37 edev->doorbells = pci_dev->mem_resource[2].addr; 38 edev->db_size = pci_dev->mem_resource[2].len; 39 } 40 41 static int 42 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 43 uint32_t dp_module, uint8_t dp_level, bool is_vf) 44 { 45 struct ecore_hw_prepare_params hw_prepare_params; 46 int rc; 47 48 ecore_init_struct(edev); 49 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 50 /* Protocol type is always fixed to PROTOCOL_ETH */ 51 52 if (is_vf) 53 edev->b_is_vf = true; 54 55 ecore_init_dp(edev, dp_module, dp_level, NULL); 56 qed_init_pci(edev, pci_dev); 57 58 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params)); 59 hw_prepare_params.personality = ECORE_PCI_ETH; 60 hw_prepare_params.drv_resc_alloc = false; 61 hw_prepare_params.chk_reg_fifo = false; 62 hw_prepare_params.initiate_pf_flr = true; 63 hw_prepare_params.allow_mdump = false; 64 hw_prepare_params.b_en_pacing = false; 65 hw_prepare_params.epoch = (u32)time(NULL); 66 rc = ecore_hw_prepare(edev, &hw_prepare_params); 67 if (rc) { 68 DP_ERR(edev, "hw prepare failed\n"); 69 return rc; 70 } 71 72 return rc; 73 } 74 75 static int qed_nic_setup(struct ecore_dev *edev) 76 { 77 int rc; 78 79 rc = ecore_resc_alloc(edev); 80 if (rc) 81 return rc; 82 83 DP_INFO(edev, "Allocated qed resources\n"); 84 ecore_resc_setup(edev); 85 86 return rc; 87 } 88 89 #ifdef CONFIG_ECORE_ZIPPED_FW 90 static int qed_alloc_stream_mem(struct ecore_dev *edev) 91 { 92 int i; 93 94 for_each_hwfn(edev, i) { 95 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 96 97 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 98 sizeof(*p_hwfn->stream)); 99 if (!p_hwfn->stream) 100 return -ENOMEM; 101 } 102 103 return 0; 104 } 105 106 static void qed_free_stream_mem(struct ecore_dev *edev) 107 { 108 int i; 109 110 for_each_hwfn(edev, i) { 111 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 112 113 if (!p_hwfn->stream) 114 return; 115 116 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 117 } 118 } 119 #endif 120 121 #ifdef CONFIG_ECORE_BINARY_FW 122 static int qed_load_firmware_data(struct ecore_dev *edev) 123 { 124 int fd; 125 struct stat st; 126 const char *fw = RTE_LIBRTE_QEDE_FW; 127 128 if (strcmp(fw, "") == 0) 129 strcpy(qede_fw_file, QEDE_DEFAULT_FIRMWARE); 130 else 131 strcpy(qede_fw_file, fw); 132 133 fd = open(qede_fw_file, O_RDONLY); 134 if (fd < 0) { 135 DP_ERR(edev, "Can't open firmware file\n"); 136 return -ENOENT; 137 } 138 139 if (fstat(fd, &st) < 0) { 140 DP_ERR(edev, "Can't stat firmware file\n"); 141 close(fd); 142 return -1; 143 } 144 145 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 146 RTE_CACHE_LINE_SIZE); 147 if (!edev->firmware) { 148 DP_ERR(edev, "Can't allocate memory for firmware\n"); 149 close(fd); 150 return -ENOMEM; 151 } 152 153 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 154 DP_ERR(edev, "Can't read firmware data\n"); 155 close(fd); 156 return -1; 157 } 158 159 edev->fw_len = st.st_size; 160 if (edev->fw_len < 104) { 161 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n", 162 edev->fw_len); 163 close(fd); 164 return -EINVAL; 165 } 166 167 close(fd); 168 return 0; 169 } 170 #endif 171 172 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn) 173 { 174 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced; 175 176 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac, 177 &is_mac_forced); 178 if (is_mac_exist && is_mac_forced) 179 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN); 180 181 /* Always update link configuration according to bulletin */ 182 qed_link_update(hwfn); 183 } 184 185 static void qede_vf_task(void *arg) 186 { 187 struct ecore_hwfn *p_hwfn = arg; 188 uint8_t change = 0; 189 190 /* Read the bulletin board, and re-schedule the task */ 191 ecore_vf_read_bulletin(p_hwfn, &change); 192 if (change) 193 qed_handle_bulletin_change(p_hwfn); 194 195 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn); 196 } 197 198 static void qed_start_iov_task(struct ecore_dev *edev) 199 { 200 struct ecore_hwfn *p_hwfn; 201 int i; 202 203 for_each_hwfn(edev, i) { 204 p_hwfn = &edev->hwfns[i]; 205 if (!IS_PF(edev)) 206 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, 207 p_hwfn); 208 } 209 } 210 211 static void qed_stop_iov_task(struct ecore_dev *edev) 212 { 213 struct ecore_hwfn *p_hwfn; 214 int i; 215 216 for_each_hwfn(edev, i) { 217 p_hwfn = &edev->hwfns[i]; 218 if (!IS_PF(edev)) 219 rte_eal_alarm_cancel(qede_vf_task, p_hwfn); 220 } 221 } 222 static int qed_slowpath_start(struct ecore_dev *edev, 223 struct qed_slowpath_params *params) 224 { 225 struct ecore_drv_load_params drv_load_params; 226 struct ecore_hw_init_params hw_init_params; 227 struct ecore_mcp_drv_version drv_version; 228 const uint8_t *data = NULL; 229 struct ecore_hwfn *hwfn; 230 struct ecore_ptt *p_ptt; 231 int rc; 232 233 if (IS_PF(edev)) { 234 #ifdef CONFIG_ECORE_BINARY_FW 235 rc = qed_load_firmware_data(edev); 236 if (rc) { 237 DP_ERR(edev, "Failed to find fw file %s\n", 238 qede_fw_file); 239 goto err; 240 } 241 #endif 242 hwfn = ECORE_LEADING_HWFN(edev); 243 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */ 244 p_ptt = ecore_ptt_acquire(hwfn); 245 if (p_ptt) { 246 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt; 247 } else { 248 DP_ERR(edev, "Failed to acquire PTT for flowdir\n"); 249 rc = -ENOMEM; 250 goto err; 251 } 252 } 253 } 254 255 rc = qed_nic_setup(edev); 256 if (rc) 257 goto err; 258 259 /* set int_coalescing_mode */ 260 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 261 262 #ifdef CONFIG_ECORE_ZIPPED_FW 263 if (IS_PF(edev)) { 264 /* Allocate stream for unzipping */ 265 rc = qed_alloc_stream_mem(edev); 266 if (rc) { 267 DP_ERR(edev, "Failed to allocate stream memory\n"); 268 goto err1; 269 } 270 } 271 #endif 272 273 qed_start_iov_task(edev); 274 275 #ifdef CONFIG_ECORE_BINARY_FW 276 if (IS_PF(edev)) 277 data = (const uint8_t *)edev->firmware + sizeof(u32); 278 #endif 279 280 /* Start the slowpath */ 281 memset(&hw_init_params, 0, sizeof(hw_init_params)); 282 hw_init_params.b_hw_start = true; 283 hw_init_params.int_mode = params->int_mode; 284 hw_init_params.allow_npar_tx_switch = true; 285 hw_init_params.bin_fw_data = data; 286 287 memset(&drv_load_params, 0, sizeof(drv_load_params)); 288 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT; 289 drv_load_params.avoid_eng_reset = false; 290 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS; 291 hw_init_params.avoid_eng_affin = false; 292 hw_init_params.p_drv_load_params = &drv_load_params; 293 294 rc = ecore_hw_init(edev, &hw_init_params); 295 if (rc) { 296 DP_ERR(edev, "ecore_hw_init failed\n"); 297 goto err2; 298 } 299 300 DP_INFO(edev, "HW inited and function started\n"); 301 302 if (IS_PF(edev)) { 303 hwfn = ECORE_LEADING_HWFN(edev); 304 drv_version.version = (params->drv_major << 24) | 305 (params->drv_minor << 16) | 306 (params->drv_rev << 8) | (params->drv_eng); 307 strlcpy((char *)drv_version.name, (const char *)params->name, 308 sizeof(drv_version.name)); 309 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 310 &drv_version); 311 if (rc) { 312 DP_ERR(edev, "Failed sending drv version command\n"); 313 goto err3; 314 } 315 } 316 317 ecore_reset_vport_stats(edev); 318 319 return 0; 320 321 err3: 322 ecore_hw_stop(edev); 323 err2: 324 qed_stop_iov_task(edev); 325 #ifdef CONFIG_ECORE_ZIPPED_FW 326 qed_free_stream_mem(edev); 327 err1: 328 #endif 329 ecore_resc_free(edev); 330 err: 331 #ifdef CONFIG_ECORE_BINARY_FW 332 if (IS_PF(edev)) { 333 if (edev->firmware) 334 rte_free(edev->firmware); 335 edev->firmware = NULL; 336 } 337 #endif 338 qed_stop_iov_task(edev); 339 340 return rc; 341 } 342 343 static int 344 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 345 { 346 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev); 347 struct ecore_ptt *ptt = NULL; 348 struct ecore_tunnel_info *tun = &edev->tunnel; 349 350 memset(dev_info, 0, sizeof(struct qed_dev_info)); 351 352 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 353 tun->vxlan.b_mode_enabled) 354 dev_info->vxlan_enable = true; 355 356 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled && 357 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 358 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 359 dev_info->gre_enable = true; 360 361 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled && 362 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 363 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 364 dev_info->geneve_enable = true; 365 366 dev_info->num_hwfns = edev->num_hwfns; 367 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 368 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu; 369 dev_info->dev_type = edev->type; 370 371 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 372 RTE_ETHER_ADDR_LEN); 373 374 dev_info->fw_major = FW_MAJOR_VERSION; 375 dev_info->fw_minor = FW_MINOR_VERSION; 376 dev_info->fw_rev = FW_REVISION_VERSION; 377 dev_info->fw_eng = FW_ENGINEERING_VERSION; 378 379 if (IS_PF(edev)) { 380 dev_info->b_inter_pf_switch = 381 OSAL_TEST_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits); 382 if (!OSAL_TEST_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits)) 383 dev_info->b_arfs_capable = true; 384 dev_info->tx_switching = false; 385 386 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn); 387 388 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 389 if (ptt) { 390 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 391 &dev_info->mfw_rev, NULL); 392 393 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 394 &dev_info->flash_size); 395 396 /* Workaround to allow PHY-read commands for 397 * B0 bringup. 398 */ 399 if (ECORE_IS_BB_B0(edev)) 400 dev_info->flash_size = 0xffffffff; 401 402 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 403 } 404 } else { 405 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 406 &dev_info->mfw_rev, NULL); 407 } 408 409 return 0; 410 } 411 412 int 413 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 414 { 415 uint8_t queues = 0; 416 int i; 417 418 memset(info, 0, sizeof(*info)); 419 420 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 421 422 if (IS_PF(edev)) { 423 int max_vf_vlan_filters = 0; 424 425 info->num_queues = 0; 426 for_each_hwfn(edev, i) 427 info->num_queues += 428 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 429 430 if (IS_ECORE_SRIOV(edev)) 431 max_vf_vlan_filters = edev->p_iov_info->total_vfs * 432 ECORE_ETH_VF_NUM_VLAN_FILTERS; 433 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) - 434 max_vf_vlan_filters; 435 436 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 437 RTE_ETHER_ADDR_LEN); 438 } else { 439 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev), 440 &info->num_queues); 441 if (ECORE_IS_CMT(edev)) { 442 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues); 443 info->num_queues += queues; 444 } 445 446 ecore_vf_get_num_vlan_filters(&edev->hwfns[0], 447 (u8 *)&info->num_vlan_filters); 448 449 ecore_vf_get_port_mac(&edev->hwfns[0], 450 (uint8_t *)&info->port_mac); 451 452 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]); 453 } 454 455 qed_fill_dev_info(edev, &info->common); 456 457 if (IS_VF(edev)) 458 memset(&info->common.hw_mac, 0, RTE_ETHER_ADDR_LEN); 459 460 return 0; 461 } 462 463 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE]) 464 { 465 int i; 466 467 rte_memcpy(edev->name, name, NAME_SIZE); 468 for_each_hwfn(edev, i) { 469 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 470 } 471 } 472 473 static uint32_t 474 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 475 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id) 476 { 477 struct ecore_hwfn *p_hwfn; 478 int hwfn_index; 479 uint16_t rel_sb_id; 480 uint8_t n_hwfns = edev->num_hwfns; 481 uint32_t rc; 482 483 hwfn_index = sb_id % n_hwfns; 484 p_hwfn = &edev->hwfns[hwfn_index]; 485 rel_sb_id = sb_id / n_hwfns; 486 487 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 488 hwfn_index, rel_sb_id, sb_id); 489 490 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 491 sb_virt_addr, sb_phy_addr, rel_sb_id); 492 493 return rc; 494 } 495 496 static void qed_fill_link(struct ecore_hwfn *hwfn, 497 __rte_unused struct ecore_ptt *ptt, 498 struct qed_link_output *if_link) 499 { 500 struct ecore_mcp_link_params params; 501 struct ecore_mcp_link_state link; 502 struct ecore_mcp_link_capabilities link_caps; 503 uint8_t change = 0; 504 505 memset(if_link, 0, sizeof(*if_link)); 506 507 /* Prepare source inputs */ 508 if (IS_PF(hwfn->p_dev)) { 509 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 510 sizeof(params)); 511 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 512 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 513 sizeof(link_caps)); 514 } else { 515 ecore_vf_read_bulletin(hwfn, &change); 516 ecore_vf_get_link_params(hwfn, ¶ms); 517 ecore_vf_get_link_state(hwfn, &link); 518 ecore_vf_get_link_caps(hwfn, &link_caps); 519 } 520 521 /* Set the link parameters to pass to protocol driver */ 522 if (link.link_up) 523 if_link->link_up = true; 524 525 if (link.link_up) 526 if_link->speed = link.speed; 527 528 if_link->duplex = QEDE_DUPLEX_FULL; 529 530 /* Fill up the native advertised speed cap mask */ 531 if_link->adv_speed = params.speed.advertised_speeds; 532 533 if (params.speed.autoneg) 534 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 535 536 if (params.pause.autoneg || params.pause.forced_rx || 537 params.pause.forced_tx) 538 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 539 540 if (params.pause.autoneg) 541 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 542 543 if (params.pause.forced_rx) 544 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 545 546 if (params.pause.forced_tx) 547 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 548 549 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) { 550 if_link->eee_supported = false; 551 } else { 552 if_link->eee_supported = true; 553 if_link->eee_active = link.eee_active; 554 if_link->sup_caps = link_caps.eee_speed_caps; 555 /* MFW clears adv_caps on eee disable; use configured value */ 556 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps : 557 params.eee.adv_caps; 558 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps; 559 if_link->eee.enable = params.eee.enable; 560 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable; 561 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer; 562 } 563 } 564 565 static void 566 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 567 { 568 struct ecore_hwfn *hwfn; 569 struct ecore_ptt *ptt; 570 571 hwfn = &edev->hwfns[0]; 572 if (IS_PF(edev)) { 573 ptt = ecore_ptt_acquire(hwfn); 574 if (!ptt) 575 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n"); 576 577 qed_fill_link(hwfn, ptt, if_link); 578 579 if (ptt) 580 ecore_ptt_release(hwfn, ptt); 581 } else { 582 qed_fill_link(hwfn, NULL, if_link); 583 } 584 } 585 586 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 587 { 588 struct ecore_hwfn *hwfn; 589 struct ecore_ptt *ptt; 590 struct ecore_mcp_link_params *link_params; 591 int rc; 592 593 if (IS_VF(edev)) 594 return 0; 595 596 /* The link should be set only once per PF */ 597 hwfn = &edev->hwfns[0]; 598 599 ptt = ecore_ptt_acquire(hwfn); 600 if (!ptt) 601 return -EBUSY; 602 603 link_params = ecore_mcp_get_link_params(hwfn); 604 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 605 link_params->speed.autoneg = params->autoneg; 606 607 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 608 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 609 link_params->pause.autoneg = true; 610 else 611 link_params->pause.autoneg = false; 612 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 613 link_params->pause.forced_rx = true; 614 else 615 link_params->pause.forced_rx = false; 616 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 617 link_params->pause.forced_tx = true; 618 else 619 link_params->pause.forced_tx = false; 620 } 621 622 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG) 623 memcpy(&link_params->eee, ¶ms->eee, 624 sizeof(link_params->eee)); 625 626 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 627 628 ecore_ptt_release(hwfn, ptt); 629 630 return rc; 631 } 632 633 void qed_link_update(struct ecore_hwfn *hwfn) 634 { 635 struct ecore_dev *edev = hwfn->p_dev; 636 struct qede_dev *qdev = (struct qede_dev *)edev; 637 struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev; 638 639 if (!qede_link_update(dev, 0)) 640 _rte_eth_dev_callback_process(dev, 641 RTE_ETH_EVENT_INTR_LSC, NULL); 642 } 643 644 static int qed_drain(struct ecore_dev *edev) 645 { 646 struct ecore_hwfn *hwfn; 647 struct ecore_ptt *ptt; 648 int i, rc; 649 650 if (IS_VF(edev)) 651 return 0; 652 653 for_each_hwfn(edev, i) { 654 hwfn = &edev->hwfns[i]; 655 ptt = ecore_ptt_acquire(hwfn); 656 if (!ptt) { 657 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n"); 658 return -EBUSY; 659 } 660 rc = ecore_mcp_drain(hwfn, ptt); 661 if (rc) 662 return rc; 663 ecore_ptt_release(hwfn, ptt); 664 } 665 666 return 0; 667 } 668 669 static int qed_nic_stop(struct ecore_dev *edev) 670 { 671 int i, rc; 672 673 rc = ecore_hw_stop(edev); 674 for (i = 0; i < edev->num_hwfns; i++) { 675 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 676 677 if (p_hwfn->b_sp_dpc_enabled) 678 p_hwfn->b_sp_dpc_enabled = false; 679 } 680 return rc; 681 } 682 683 static int qed_slowpath_stop(struct ecore_dev *edev) 684 { 685 #ifdef CONFIG_QED_SRIOV 686 int i; 687 #endif 688 689 if (!edev) 690 return -ENODEV; 691 692 if (IS_PF(edev)) { 693 #ifdef CONFIG_ECORE_ZIPPED_FW 694 qed_free_stream_mem(edev); 695 #endif 696 697 #ifdef CONFIG_QED_SRIOV 698 if (IS_QED_ETH_IF(edev)) 699 qed_sriov_disable(edev, true); 700 #endif 701 } 702 703 qed_nic_stop(edev); 704 705 ecore_resc_free(edev); 706 qed_stop_iov_task(edev); 707 708 return 0; 709 } 710 711 static void qed_remove(struct ecore_dev *edev) 712 { 713 if (!edev) 714 return; 715 716 ecore_hw_remove(edev); 717 } 718 719 static int qed_send_drv_state(struct ecore_dev *edev, bool active) 720 { 721 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev); 722 struct ecore_ptt *ptt; 723 int status = 0; 724 725 ptt = ecore_ptt_acquire(hwfn); 726 if (!ptt) 727 return -EAGAIN; 728 729 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ? 730 ECORE_OV_DRIVER_STATE_ACTIVE : 731 ECORE_OV_DRIVER_STATE_DISABLED); 732 733 ecore_ptt_release(hwfn, ptt); 734 735 return status; 736 } 737 738 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb, 739 u16 qid, struct ecore_sb_info_dbg *sb_dbg) 740 { 741 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns]; 742 struct ecore_ptt *ptt; 743 int rc; 744 745 if (IS_VF(edev)) 746 return -EINVAL; 747 748 ptt = ecore_ptt_acquire(hwfn); 749 if (!ptt) { 750 DP_ERR(hwfn, "Can't acquire PTT\n"); 751 return -EAGAIN; 752 } 753 754 memset(sb_dbg, 0, sizeof(*sb_dbg)); 755 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg); 756 757 ecore_ptt_release(hwfn, ptt); 758 return rc; 759 } 760 761 const struct qed_common_ops qed_common_ops_pass = { 762 INIT_STRUCT_FIELD(probe, &qed_probe), 763 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 764 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 765 INIT_STRUCT_FIELD(set_name, &qed_set_name), 766 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 767 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 768 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 769 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info), 770 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 771 INIT_STRUCT_FIELD(set_link, &qed_set_link), 772 INIT_STRUCT_FIELD(drain, &qed_drain), 773 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 774 INIT_STRUCT_FIELD(remove, &qed_remove), 775 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state), 776 }; 777 778 const struct qed_eth_ops qed_eth_ops_pass = { 779 INIT_STRUCT_FIELD(common, &qed_common_ops_pass), 780 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info), 781 }; 782 783 const struct qed_eth_ops *qed_get_eth_ops(void) 784 { 785 return &qed_eth_ops_pass; 786 } 787