1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 */ 6 7 #include <limits.h> 8 #include <time.h> 9 #include <rte_alarm.h> 10 #include <rte_string_fns.h> 11 12 #include "qede_ethdev.h" 13 14 /* Alarm timeout. */ 15 #define QEDE_ALARM_TIMEOUT_US 100000 16 17 /* Global variable to hold absolute path of fw file */ 18 char fw_file[PATH_MAX]; 19 20 const char *QEDE_DEFAULT_FIRMWARE = 21 "/lib/firmware/qed/qed_init_values-8.33.12.0.bin"; 22 23 static void 24 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params) 25 { 26 int i; 27 28 for (i = 0; i < edev->num_hwfns; i++) { 29 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 30 p_hwfn->pf_params = *params; 31 } 32 } 33 34 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev) 35 { 36 edev->regview = pci_dev->mem_resource[0].addr; 37 edev->doorbells = pci_dev->mem_resource[2].addr; 38 edev->db_size = pci_dev->mem_resource[2].len; 39 } 40 41 static int 42 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev, 43 uint32_t dp_module, uint8_t dp_level, bool is_vf) 44 { 45 struct ecore_hw_prepare_params hw_prepare_params; 46 int rc; 47 48 ecore_init_struct(edev); 49 edev->drv_type = DRV_ID_DRV_TYPE_LINUX; 50 /* Protocol type is always fixed to PROTOCOL_ETH */ 51 52 if (is_vf) 53 edev->b_is_vf = true; 54 55 ecore_init_dp(edev, dp_module, dp_level, NULL); 56 qed_init_pci(edev, pci_dev); 57 58 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params)); 59 hw_prepare_params.personality = ECORE_PCI_ETH; 60 hw_prepare_params.drv_resc_alloc = false; 61 hw_prepare_params.chk_reg_fifo = false; 62 hw_prepare_params.initiate_pf_flr = true; 63 hw_prepare_params.allow_mdump = false; 64 hw_prepare_params.b_en_pacing = false; 65 hw_prepare_params.epoch = (u32)time(NULL); 66 rc = ecore_hw_prepare(edev, &hw_prepare_params); 67 if (rc) { 68 DP_ERR(edev, "hw prepare failed\n"); 69 return rc; 70 } 71 72 return rc; 73 } 74 75 static int qed_nic_setup(struct ecore_dev *edev) 76 { 77 int rc; 78 79 rc = ecore_resc_alloc(edev); 80 if (rc) 81 return rc; 82 83 DP_INFO(edev, "Allocated qed resources\n"); 84 ecore_resc_setup(edev); 85 86 return rc; 87 } 88 89 #ifdef CONFIG_ECORE_ZIPPED_FW 90 static int qed_alloc_stream_mem(struct ecore_dev *edev) 91 { 92 int i; 93 94 for_each_hwfn(edev, i) { 95 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 96 97 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 98 sizeof(*p_hwfn->stream)); 99 if (!p_hwfn->stream) 100 return -ENOMEM; 101 } 102 103 return 0; 104 } 105 106 static void qed_free_stream_mem(struct ecore_dev *edev) 107 { 108 int i; 109 110 for_each_hwfn(edev, i) { 111 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 112 113 if (!p_hwfn->stream) 114 return; 115 116 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream); 117 } 118 } 119 #endif 120 121 #ifdef CONFIG_ECORE_BINARY_FW 122 static int qed_load_firmware_data(struct ecore_dev *edev) 123 { 124 int fd; 125 struct stat st; 126 const char *fw = RTE_LIBRTE_QEDE_FW; 127 128 if (strcmp(fw, "") == 0) 129 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE); 130 else 131 strcpy(fw_file, fw); 132 133 fd = open(fw_file, O_RDONLY); 134 if (fd < 0) { 135 DP_ERR(edev, "Can't open firmware file\n"); 136 return -ENOENT; 137 } 138 139 if (fstat(fd, &st) < 0) { 140 DP_ERR(edev, "Can't stat firmware file\n"); 141 close(fd); 142 return -1; 143 } 144 145 edev->firmware = rte_zmalloc("qede_fw", st.st_size, 146 RTE_CACHE_LINE_SIZE); 147 if (!edev->firmware) { 148 DP_ERR(edev, "Can't allocate memory for firmware\n"); 149 close(fd); 150 return -ENOMEM; 151 } 152 153 if (read(fd, edev->firmware, st.st_size) != st.st_size) { 154 DP_ERR(edev, "Can't read firmware data\n"); 155 close(fd); 156 return -1; 157 } 158 159 edev->fw_len = st.st_size; 160 if (edev->fw_len < 104) { 161 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n", 162 edev->fw_len); 163 close(fd); 164 return -EINVAL; 165 } 166 167 close(fd); 168 return 0; 169 } 170 #endif 171 172 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn) 173 { 174 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced; 175 176 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac, 177 &is_mac_forced); 178 if (is_mac_exist && is_mac_forced) 179 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN); 180 181 /* Always update link configuration according to bulletin */ 182 qed_link_update(hwfn); 183 } 184 185 static void qede_vf_task(void *arg) 186 { 187 struct ecore_hwfn *p_hwfn = arg; 188 uint8_t change = 0; 189 190 /* Read the bulletin board, and re-schedule the task */ 191 ecore_vf_read_bulletin(p_hwfn, &change); 192 if (change) 193 qed_handle_bulletin_change(p_hwfn); 194 195 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn); 196 } 197 198 static void qed_start_iov_task(struct ecore_dev *edev) 199 { 200 struct ecore_hwfn *p_hwfn; 201 int i; 202 203 for_each_hwfn(edev, i) { 204 p_hwfn = &edev->hwfns[i]; 205 if (!IS_PF(edev)) 206 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, 207 p_hwfn); 208 } 209 } 210 211 static void qed_stop_iov_task(struct ecore_dev *edev) 212 { 213 struct ecore_hwfn *p_hwfn; 214 int i; 215 216 for_each_hwfn(edev, i) { 217 p_hwfn = &edev->hwfns[i]; 218 if (!IS_PF(edev)) 219 rte_eal_alarm_cancel(qede_vf_task, p_hwfn); 220 } 221 } 222 static int qed_slowpath_start(struct ecore_dev *edev, 223 struct qed_slowpath_params *params) 224 { 225 struct ecore_drv_load_params drv_load_params; 226 struct ecore_hw_init_params hw_init_params; 227 struct ecore_mcp_drv_version drv_version; 228 const uint8_t *data = NULL; 229 struct ecore_hwfn *hwfn; 230 struct ecore_ptt *p_ptt; 231 int rc; 232 233 if (IS_PF(edev)) { 234 #ifdef CONFIG_ECORE_BINARY_FW 235 rc = qed_load_firmware_data(edev); 236 if (rc) { 237 DP_ERR(edev, "Failed to find fw file %s\n", fw_file); 238 goto err; 239 } 240 #endif 241 hwfn = ECORE_LEADING_HWFN(edev); 242 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */ 243 p_ptt = ecore_ptt_acquire(hwfn); 244 if (p_ptt) { 245 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt; 246 } else { 247 DP_ERR(edev, "Failed to acquire PTT for flowdir\n"); 248 rc = -ENOMEM; 249 goto err; 250 } 251 } 252 } 253 254 rc = qed_nic_setup(edev); 255 if (rc) 256 goto err; 257 258 /* set int_coalescing_mode */ 259 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE; 260 261 #ifdef CONFIG_ECORE_ZIPPED_FW 262 if (IS_PF(edev)) { 263 /* Allocate stream for unzipping */ 264 rc = qed_alloc_stream_mem(edev); 265 if (rc) { 266 DP_ERR(edev, "Failed to allocate stream memory\n"); 267 goto err1; 268 } 269 } 270 #endif 271 272 qed_start_iov_task(edev); 273 274 #ifdef CONFIG_ECORE_BINARY_FW 275 if (IS_PF(edev)) 276 data = (const uint8_t *)edev->firmware + sizeof(u32); 277 #endif 278 279 /* Start the slowpath */ 280 memset(&hw_init_params, 0, sizeof(hw_init_params)); 281 hw_init_params.b_hw_start = true; 282 hw_init_params.int_mode = params->int_mode; 283 hw_init_params.allow_npar_tx_switch = true; 284 hw_init_params.bin_fw_data = data; 285 286 memset(&drv_load_params, 0, sizeof(drv_load_params)); 287 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT; 288 drv_load_params.avoid_eng_reset = false; 289 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS; 290 hw_init_params.p_drv_load_params = &drv_load_params; 291 292 rc = ecore_hw_init(edev, &hw_init_params); 293 if (rc) { 294 DP_ERR(edev, "ecore_hw_init failed\n"); 295 goto err2; 296 } 297 298 DP_INFO(edev, "HW inited and function started\n"); 299 300 if (IS_PF(edev)) { 301 hwfn = ECORE_LEADING_HWFN(edev); 302 drv_version.version = (params->drv_major << 24) | 303 (params->drv_minor << 16) | 304 (params->drv_rev << 8) | (params->drv_eng); 305 strlcpy((char *)drv_version.name, (const char *)params->name, 306 sizeof(drv_version.name)); 307 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt, 308 &drv_version); 309 if (rc) { 310 DP_ERR(edev, "Failed sending drv version command\n"); 311 goto err3; 312 } 313 } 314 315 ecore_reset_vport_stats(edev); 316 317 return 0; 318 319 err3: 320 ecore_hw_stop(edev); 321 err2: 322 qed_stop_iov_task(edev); 323 #ifdef CONFIG_ECORE_ZIPPED_FW 324 qed_free_stream_mem(edev); 325 err1: 326 #endif 327 ecore_resc_free(edev); 328 err: 329 #ifdef CONFIG_ECORE_BINARY_FW 330 if (IS_PF(edev)) { 331 if (edev->firmware) 332 rte_free(edev->firmware); 333 edev->firmware = NULL; 334 } 335 #endif 336 qed_stop_iov_task(edev); 337 338 return rc; 339 } 340 341 static int 342 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info) 343 { 344 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev); 345 struct ecore_ptt *ptt = NULL; 346 struct ecore_tunnel_info *tun = &edev->tunnel; 347 348 memset(dev_info, 0, sizeof(struct qed_dev_info)); 349 350 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 351 tun->vxlan.b_mode_enabled) 352 dev_info->vxlan_enable = true; 353 354 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled && 355 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 356 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 357 dev_info->gre_enable = true; 358 359 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled && 360 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN && 361 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN) 362 dev_info->geneve_enable = true; 363 364 dev_info->num_hwfns = edev->num_hwfns; 365 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]); 366 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu; 367 dev_info->dev_type = edev->type; 368 369 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 370 ETHER_ADDR_LEN); 371 372 dev_info->fw_major = FW_MAJOR_VERSION; 373 dev_info->fw_minor = FW_MINOR_VERSION; 374 dev_info->fw_rev = FW_REVISION_VERSION; 375 dev_info->fw_eng = FW_ENGINEERING_VERSION; 376 377 if (IS_PF(edev)) { 378 dev_info->b_inter_pf_switch = 379 OSAL_TEST_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits); 380 if (!OSAL_TEST_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits)) 381 dev_info->b_arfs_capable = true; 382 dev_info->tx_switching = false; 383 384 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn); 385 386 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev)); 387 if (ptt) { 388 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 389 &dev_info->mfw_rev, NULL); 390 391 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt, 392 &dev_info->flash_size); 393 394 /* Workaround to allow PHY-read commands for 395 * B0 bringup. 396 */ 397 if (ECORE_IS_BB_B0(edev)) 398 dev_info->flash_size = 0xffffffff; 399 400 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt); 401 } 402 } else { 403 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt, 404 &dev_info->mfw_rev, NULL); 405 } 406 407 return 0; 408 } 409 410 int 411 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info) 412 { 413 uint8_t queues = 0; 414 int i; 415 416 memset(info, 0, sizeof(*info)); 417 418 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */; 419 420 if (IS_PF(edev)) { 421 int max_vf_vlan_filters = 0; 422 423 info->num_queues = 0; 424 for_each_hwfn(edev, i) 425 info->num_queues += 426 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE); 427 428 if (IS_ECORE_SRIOV(edev)) 429 max_vf_vlan_filters = edev->p_iov_info->total_vfs * 430 ECORE_ETH_VF_NUM_VLAN_FILTERS; 431 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) - 432 max_vf_vlan_filters; 433 434 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr, 435 ETHER_ADDR_LEN); 436 } else { 437 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev), 438 &info->num_queues); 439 if (ECORE_IS_CMT(edev)) { 440 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues); 441 info->num_queues += queues; 442 } 443 444 ecore_vf_get_num_vlan_filters(&edev->hwfns[0], 445 (u8 *)&info->num_vlan_filters); 446 447 ecore_vf_get_port_mac(&edev->hwfns[0], 448 (uint8_t *)&info->port_mac); 449 450 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]); 451 } 452 453 qed_fill_dev_info(edev, &info->common); 454 455 if (IS_VF(edev)) 456 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN); 457 458 return 0; 459 } 460 461 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE]) 462 { 463 int i; 464 465 rte_memcpy(edev->name, name, NAME_SIZE); 466 for_each_hwfn(edev, i) { 467 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i); 468 } 469 } 470 471 static uint32_t 472 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info, 473 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id) 474 { 475 struct ecore_hwfn *p_hwfn; 476 int hwfn_index; 477 uint16_t rel_sb_id; 478 uint8_t n_hwfns = edev->num_hwfns; 479 uint32_t rc; 480 481 hwfn_index = sb_id % n_hwfns; 482 p_hwfn = &edev->hwfns[hwfn_index]; 483 rel_sb_id = sb_id / n_hwfns; 484 485 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n", 486 hwfn_index, rel_sb_id, sb_id); 487 488 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info, 489 sb_virt_addr, sb_phy_addr, rel_sb_id); 490 491 return rc; 492 } 493 494 static void qed_fill_link(struct ecore_hwfn *hwfn, 495 __rte_unused struct ecore_ptt *ptt, 496 struct qed_link_output *if_link) 497 { 498 struct ecore_mcp_link_params params; 499 struct ecore_mcp_link_state link; 500 struct ecore_mcp_link_capabilities link_caps; 501 uint8_t change = 0; 502 503 memset(if_link, 0, sizeof(*if_link)); 504 505 /* Prepare source inputs */ 506 if (IS_PF(hwfn->p_dev)) { 507 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn), 508 sizeof(params)); 509 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link)); 510 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn), 511 sizeof(link_caps)); 512 } else { 513 ecore_vf_read_bulletin(hwfn, &change); 514 ecore_vf_get_link_params(hwfn, ¶ms); 515 ecore_vf_get_link_state(hwfn, &link); 516 ecore_vf_get_link_caps(hwfn, &link_caps); 517 } 518 519 /* Set the link parameters to pass to protocol driver */ 520 if (link.link_up) 521 if_link->link_up = true; 522 523 if (link.link_up) 524 if_link->speed = link.speed; 525 526 if_link->duplex = QEDE_DUPLEX_FULL; 527 528 /* Fill up the native advertised speed cap mask */ 529 if_link->adv_speed = params.speed.advertised_speeds; 530 531 if (params.speed.autoneg) 532 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG; 533 534 if (params.pause.autoneg || params.pause.forced_rx || 535 params.pause.forced_tx) 536 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE; 537 538 if (params.pause.autoneg) 539 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 540 541 if (params.pause.forced_rx) 542 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE; 543 544 if (params.pause.forced_tx) 545 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE; 546 547 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) { 548 if_link->eee_supported = false; 549 } else { 550 if_link->eee_supported = true; 551 if_link->eee_active = link.eee_active; 552 if_link->sup_caps = link_caps.eee_speed_caps; 553 /* MFW clears adv_caps on eee disable; use configured value */ 554 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps : 555 params.eee.adv_caps; 556 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps; 557 if_link->eee.enable = params.eee.enable; 558 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable; 559 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer; 560 } 561 } 562 563 static void 564 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link) 565 { 566 struct ecore_hwfn *hwfn; 567 struct ecore_ptt *ptt; 568 569 hwfn = &edev->hwfns[0]; 570 if (IS_PF(edev)) { 571 ptt = ecore_ptt_acquire(hwfn); 572 if (!ptt) 573 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n"); 574 575 qed_fill_link(hwfn, ptt, if_link); 576 577 if (ptt) 578 ecore_ptt_release(hwfn, ptt); 579 } else { 580 qed_fill_link(hwfn, NULL, if_link); 581 } 582 } 583 584 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params) 585 { 586 struct ecore_hwfn *hwfn; 587 struct ecore_ptt *ptt; 588 struct ecore_mcp_link_params *link_params; 589 int rc; 590 591 if (IS_VF(edev)) 592 return 0; 593 594 /* The link should be set only once per PF */ 595 hwfn = &edev->hwfns[0]; 596 597 ptt = ecore_ptt_acquire(hwfn); 598 if (!ptt) 599 return -EBUSY; 600 601 link_params = ecore_mcp_get_link_params(hwfn); 602 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG) 603 link_params->speed.autoneg = params->autoneg; 604 605 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) { 606 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 607 link_params->pause.autoneg = true; 608 else 609 link_params->pause.autoneg = false; 610 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE) 611 link_params->pause.forced_rx = true; 612 else 613 link_params->pause.forced_rx = false; 614 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE) 615 link_params->pause.forced_tx = true; 616 else 617 link_params->pause.forced_tx = false; 618 } 619 620 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG) 621 memcpy(&link_params->eee, ¶ms->eee, 622 sizeof(link_params->eee)); 623 624 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up); 625 626 ecore_ptt_release(hwfn, ptt); 627 628 return rc; 629 } 630 631 void qed_link_update(struct ecore_hwfn *hwfn) 632 { 633 struct ecore_dev *edev = hwfn->p_dev; 634 struct qede_dev *qdev = (struct qede_dev *)edev; 635 struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev; 636 637 if (!qede_link_update(dev, 0)) 638 _rte_eth_dev_callback_process(dev, 639 RTE_ETH_EVENT_INTR_LSC, NULL); 640 } 641 642 static int qed_drain(struct ecore_dev *edev) 643 { 644 struct ecore_hwfn *hwfn; 645 struct ecore_ptt *ptt; 646 int i, rc; 647 648 if (IS_VF(edev)) 649 return 0; 650 651 for_each_hwfn(edev, i) { 652 hwfn = &edev->hwfns[i]; 653 ptt = ecore_ptt_acquire(hwfn); 654 if (!ptt) { 655 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n"); 656 return -EBUSY; 657 } 658 rc = ecore_mcp_drain(hwfn, ptt); 659 if (rc) 660 return rc; 661 ecore_ptt_release(hwfn, ptt); 662 } 663 664 return 0; 665 } 666 667 static int qed_nic_stop(struct ecore_dev *edev) 668 { 669 int i, rc; 670 671 rc = ecore_hw_stop(edev); 672 for (i = 0; i < edev->num_hwfns; i++) { 673 struct ecore_hwfn *p_hwfn = &edev->hwfns[i]; 674 675 if (p_hwfn->b_sp_dpc_enabled) 676 p_hwfn->b_sp_dpc_enabled = false; 677 } 678 return rc; 679 } 680 681 static int qed_slowpath_stop(struct ecore_dev *edev) 682 { 683 #ifdef CONFIG_QED_SRIOV 684 int i; 685 #endif 686 687 if (!edev) 688 return -ENODEV; 689 690 if (IS_PF(edev)) { 691 #ifdef CONFIG_ECORE_ZIPPED_FW 692 qed_free_stream_mem(edev); 693 #endif 694 695 #ifdef CONFIG_QED_SRIOV 696 if (IS_QED_ETH_IF(edev)) 697 qed_sriov_disable(edev, true); 698 #endif 699 } 700 701 qed_nic_stop(edev); 702 703 ecore_resc_free(edev); 704 qed_stop_iov_task(edev); 705 706 return 0; 707 } 708 709 static void qed_remove(struct ecore_dev *edev) 710 { 711 if (!edev) 712 return; 713 714 ecore_hw_remove(edev); 715 } 716 717 static int qed_send_drv_state(struct ecore_dev *edev, bool active) 718 { 719 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev); 720 struct ecore_ptt *ptt; 721 int status = 0; 722 723 ptt = ecore_ptt_acquire(hwfn); 724 if (!ptt) 725 return -EAGAIN; 726 727 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ? 728 ECORE_OV_DRIVER_STATE_ACTIVE : 729 ECORE_OV_DRIVER_STATE_DISABLED); 730 731 ecore_ptt_release(hwfn, ptt); 732 733 return status; 734 } 735 736 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb, 737 u16 qid, struct ecore_sb_info_dbg *sb_dbg) 738 { 739 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns]; 740 struct ecore_ptt *ptt; 741 int rc; 742 743 if (IS_VF(edev)) 744 return -EINVAL; 745 746 ptt = ecore_ptt_acquire(hwfn); 747 if (!ptt) { 748 DP_ERR(hwfn, "Can't acquire PTT\n"); 749 return -EAGAIN; 750 } 751 752 memset(sb_dbg, 0, sizeof(*sb_dbg)); 753 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg); 754 755 ecore_ptt_release(hwfn, ptt); 756 return rc; 757 } 758 759 const struct qed_common_ops qed_common_ops_pass = { 760 INIT_STRUCT_FIELD(probe, &qed_probe), 761 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params), 762 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start), 763 INIT_STRUCT_FIELD(set_name, &qed_set_name), 764 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc), 765 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free), 766 INIT_STRUCT_FIELD(sb_init, &qed_sb_init), 767 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info), 768 INIT_STRUCT_FIELD(get_link, &qed_get_current_link), 769 INIT_STRUCT_FIELD(set_link, &qed_set_link), 770 INIT_STRUCT_FIELD(drain, &qed_drain), 771 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop), 772 INIT_STRUCT_FIELD(remove, &qed_remove), 773 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state), 774 }; 775 776 const struct qed_eth_ops qed_eth_ops_pass = { 777 INIT_STRUCT_FIELD(common, &qed_common_ops_pass), 778 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info), 779 }; 780 781 const struct qed_eth_ops *qed_get_eth_ops(void) 782 { 783 return &qed_eth_ops_pass; 784 } 785