xref: /dpdk/drivers/net/qede/base/ecore_l2_api.h (revision 3b307c55f2ac7f3f4146bd0dc9b474e1f3076f97)
13126df22SRasesh Mody /* SPDX-License-Identifier: BSD-3-Clause
29adde217SRasesh Mody  * Copyright (c) 2016 - 2018 Cavium Inc.
35cdd769aSRasesh Mody  * All rights reserved.
49adde217SRasesh Mody  * www.cavium.com
55cdd769aSRasesh Mody  */
65cdd769aSRasesh Mody 
75cdd769aSRasesh Mody #ifndef __ECORE_L2_API_H__
85cdd769aSRasesh Mody #define __ECORE_L2_API_H__
95cdd769aSRasesh Mody 
105cdd769aSRasesh Mody #include "ecore_status.h"
115cdd769aSRasesh Mody #include "ecore_sp_api.h"
126e4fcea9SRasesh Mody #include "ecore_int_api.h"
135cdd769aSRasesh Mody 
145cdd769aSRasesh Mody #ifndef __EXTRACT__LINUX__
155cdd769aSRasesh Mody enum ecore_rss_caps {
165cdd769aSRasesh Mody 	ECORE_RSS_IPV4		= 0x1,
175cdd769aSRasesh Mody 	ECORE_RSS_IPV6		= 0x2,
185cdd769aSRasesh Mody 	ECORE_RSS_IPV4_TCP	= 0x4,
195cdd769aSRasesh Mody 	ECORE_RSS_IPV6_TCP	= 0x8,
205cdd769aSRasesh Mody 	ECORE_RSS_IPV4_UDP	= 0x10,
215cdd769aSRasesh Mody 	ECORE_RSS_IPV6_UDP	= 0x20,
225cdd769aSRasesh Mody };
235cdd769aSRasesh Mody 
245cdd769aSRasesh Mody /* Should be the same as ETH_RSS_IND_TABLE_ENTRIES_NUM */
255cdd769aSRasesh Mody #define ECORE_RSS_IND_TABLE_SIZE 128
265cdd769aSRasesh Mody #define ECORE_RSS_KEY_SIZE 10 /* size in 32b chunks */
275cdd769aSRasesh Mody #endif
285cdd769aSRasesh Mody 
2998bc693eSRasesh Mody struct ecore_queue_start_common_params {
30a55e422eSRasesh Mody 	/* Should always be relative to entity sending this. */
3198bc693eSRasesh Mody 	u8 vport_id;
32a55e422eSRasesh Mody 	u16 queue_id;
3398bc693eSRasesh Mody 
34a55e422eSRasesh Mody 	/* Relative, but relevant only for PFs */
3598bc693eSRasesh Mody 	u8 stats_id;
36a55e422eSRasesh Mody 
376e4fcea9SRasesh Mody 	struct ecore_sb_info *p_sb;
38a55e422eSRasesh Mody 	u8 sb_idx;
39a55e422eSRasesh Mody };
40a55e422eSRasesh Mody 
41a55e422eSRasesh Mody struct ecore_rxq_start_ret_params {
42a55e422eSRasesh Mody 	void OSAL_IOMEM *p_prod;
43a55e422eSRasesh Mody 	void *p_handle;
44a55e422eSRasesh Mody };
45a55e422eSRasesh Mody 
46a55e422eSRasesh Mody struct ecore_txq_start_ret_params {
47a55e422eSRasesh Mody 	void OSAL_IOMEM *p_doorbell;
48a55e422eSRasesh Mody 	void *p_handle;
4998bc693eSRasesh Mody };
5098bc693eSRasesh Mody 
515cdd769aSRasesh Mody struct ecore_rss_params {
525cdd769aSRasesh Mody 	u8 update_rss_config;
535cdd769aSRasesh Mody 	u8 rss_enable;
545cdd769aSRasesh Mody 	u8 rss_eng_id;
555cdd769aSRasesh Mody 	u8 update_rss_capabilities;
565cdd769aSRasesh Mody 	u8 update_rss_ind_table;
575cdd769aSRasesh Mody 	u8 update_rss_key;
585cdd769aSRasesh Mody 	u8 rss_caps;
595cdd769aSRasesh Mody 	u8 rss_table_size_log; /* The table size is 2 ^ rss_table_size_log */
6069d7ba88SRasesh Mody 
6169d7ba88SRasesh Mody 	/* Indirection table consist of rx queue handles */
6269d7ba88SRasesh Mody 	void *rss_ind_table[ECORE_RSS_IND_TABLE_SIZE];
635cdd769aSRasesh Mody 	u32 rss_key[ECORE_RSS_KEY_SIZE];
645cdd769aSRasesh Mody };
655cdd769aSRasesh Mody 
665cdd769aSRasesh Mody struct ecore_sge_tpa_params {
675cdd769aSRasesh Mody 	u8 max_buffers_per_cqe;
685cdd769aSRasesh Mody 
695cdd769aSRasesh Mody 	u8 update_tpa_en_flg;
705cdd769aSRasesh Mody 	u8 tpa_ipv4_en_flg;
715cdd769aSRasesh Mody 	u8 tpa_ipv6_en_flg;
725cdd769aSRasesh Mody 	u8 tpa_ipv4_tunn_en_flg;
735cdd769aSRasesh Mody 	u8 tpa_ipv6_tunn_en_flg;
745cdd769aSRasesh Mody 
755cdd769aSRasesh Mody 	u8 update_tpa_param_flg;
765cdd769aSRasesh Mody 	u8 tpa_pkt_split_flg;
775cdd769aSRasesh Mody 	u8 tpa_hdr_data_split_flg;
785cdd769aSRasesh Mody 	u8 tpa_gro_consistent_flg;
795cdd769aSRasesh Mody 	u8 tpa_max_aggs_num;
805cdd769aSRasesh Mody 	u16 tpa_max_size;
815cdd769aSRasesh Mody 	u16 tpa_min_size_to_start;
825cdd769aSRasesh Mody 	u16 tpa_min_size_to_cont;
835cdd769aSRasesh Mody };
845cdd769aSRasesh Mody 
855cdd769aSRasesh Mody enum ecore_filter_opcode {
865cdd769aSRasesh Mody 	ECORE_FILTER_ADD,
875cdd769aSRasesh Mody 	ECORE_FILTER_REMOVE,
885cdd769aSRasesh Mody 	ECORE_FILTER_MOVE,
895cdd769aSRasesh Mody 	ECORE_FILTER_REPLACE, /* Delete all MACs and add new one instead */
905cdd769aSRasesh Mody 	ECORE_FILTER_FLUSH, /* Removes all filters */
915cdd769aSRasesh Mody };
925cdd769aSRasesh Mody 
935cdd769aSRasesh Mody enum ecore_filter_ucast_type {
945cdd769aSRasesh Mody 	ECORE_FILTER_MAC,
955cdd769aSRasesh Mody 	ECORE_FILTER_VLAN,
965cdd769aSRasesh Mody 	ECORE_FILTER_MAC_VLAN,
975cdd769aSRasesh Mody 	ECORE_FILTER_INNER_MAC,
985cdd769aSRasesh Mody 	ECORE_FILTER_INNER_VLAN,
995cdd769aSRasesh Mody 	ECORE_FILTER_INNER_PAIR,
1005cdd769aSRasesh Mody 	ECORE_FILTER_INNER_MAC_VNI_PAIR,
1015cdd769aSRasesh Mody 	ECORE_FILTER_MAC_VNI_PAIR,
1025cdd769aSRasesh Mody 	ECORE_FILTER_VNI,
10352d94b57SHarish Patil 	ECORE_FILTER_UNUSED, /* @DPDK */
1045cdd769aSRasesh Mody };
1055cdd769aSRasesh Mody 
1065cdd769aSRasesh Mody struct ecore_filter_ucast {
1075cdd769aSRasesh Mody 	enum ecore_filter_opcode opcode;
1085cdd769aSRasesh Mody 	enum ecore_filter_ucast_type type;
1095cdd769aSRasesh Mody 	u8 is_rx_filter;
1105cdd769aSRasesh Mody 	u8 is_tx_filter;
1115cdd769aSRasesh Mody 	u8 vport_to_add_to;
1125cdd769aSRasesh Mody 	u8 vport_to_remove_from;
1135cdd769aSRasesh Mody 	unsigned char mac[ETH_ALEN];
1145cdd769aSRasesh Mody 	u8 assert_on_error;
1155cdd769aSRasesh Mody 	u16 vlan;
1165cdd769aSRasesh Mody 	u32 vni;
1175cdd769aSRasesh Mody };
1185cdd769aSRasesh Mody 
1195cdd769aSRasesh Mody struct ecore_filter_mcast {
1205cdd769aSRasesh Mody 	/* MOVE is not supported for multicast */
1215cdd769aSRasesh Mody 	enum ecore_filter_opcode opcode;
1225cdd769aSRasesh Mody 	u8 vport_to_add_to;
1235cdd769aSRasesh Mody 	u8 vport_to_remove_from;
1245cdd769aSRasesh Mody 	u8	num_mc_addrs;
1255cdd769aSRasesh Mody #define ECORE_MAX_MC_ADDRS	64
1265cdd769aSRasesh Mody 	unsigned char mac[ECORE_MAX_MC_ADDRS][ETH_ALEN];
1275cdd769aSRasesh Mody };
1285cdd769aSRasesh Mody 
1295cdd769aSRasesh Mody struct ecore_filter_accept_flags {
1305cdd769aSRasesh Mody 	u8 update_rx_mode_config;
1315cdd769aSRasesh Mody 	u8 update_tx_mode_config;
1325cdd769aSRasesh Mody 	u8 rx_accept_filter;
1335cdd769aSRasesh Mody 	u8 tx_accept_filter;
1345cdd769aSRasesh Mody #define	ECORE_ACCEPT_NONE		0x01
1355cdd769aSRasesh Mody #define ECORE_ACCEPT_UCAST_MATCHED	0x02
1365cdd769aSRasesh Mody #define ECORE_ACCEPT_UCAST_UNMATCHED	0x04
1375cdd769aSRasesh Mody #define ECORE_ACCEPT_MCAST_MATCHED	0x08
1385cdd769aSRasesh Mody #define ECORE_ACCEPT_MCAST_UNMATCHED	0x10
1395cdd769aSRasesh Mody #define ECORE_ACCEPT_BCAST		0x20
1403c361686SRasesh Mody #define ECORE_ACCEPT_ANY_VNI		0x40
1415cdd769aSRasesh Mody };
1425cdd769aSRasesh Mody 
143f5765f66SShahed Shaikh enum ecore_filter_config_mode {
144f5765f66SShahed Shaikh 	ECORE_FILTER_CONFIG_MODE_DISABLE,
145f5765f66SShahed Shaikh 	ECORE_FILTER_CONFIG_MODE_5_TUPLE,
146f5765f66SShahed Shaikh 	ECORE_FILTER_CONFIG_MODE_L4_PORT,
147f5765f66SShahed Shaikh 	ECORE_FILTER_CONFIG_MODE_IP_DEST,
148f5765f66SShahed Shaikh 	ECORE_FILTER_CONFIG_MODE_TUNN_TYPE,
149f5765f66SShahed Shaikh 	ECORE_FILTER_CONFIG_MODE_IP_SRC,
150f5765f66SShahed Shaikh };
151f5765f66SShahed Shaikh 
15253437002SHarish Patil struct ecore_arfs_config_params {
15353437002SHarish Patil 	bool tcp;
15453437002SHarish Patil 	bool udp;
15553437002SHarish Patil 	bool ipv4;
15653437002SHarish Patil 	bool ipv6;
157f5765f66SShahed Shaikh 	enum ecore_filter_config_mode mode;
15853437002SHarish Patil };
15953437002SHarish Patil 
1605cdd769aSRasesh Mody /* Add / remove / move / remove-all unicast MAC-VLAN filters.
1615cdd769aSRasesh Mody  * FW will assert in the following cases, so driver should take care...:
1625cdd769aSRasesh Mody  * 1. Adding a filter to a full table.
1635cdd769aSRasesh Mody  * 2. Adding a filter which already exists on that vport.
1645cdd769aSRasesh Mody  * 3. Removing a filter which doesn't exist.
1655cdd769aSRasesh Mody  */
1665cdd769aSRasesh Mody 
1675cdd769aSRasesh Mody enum _ecore_status_t
1685cdd769aSRasesh Mody ecore_filter_ucast_cmd(struct ecore_dev *p_dev,
1695cdd769aSRasesh Mody 		       struct ecore_filter_ucast *p_filter_cmd,
1705cdd769aSRasesh Mody 		       enum spq_mode comp_mode,
1715cdd769aSRasesh Mody 		       struct ecore_spq_comp_cb *p_comp_data);
1725cdd769aSRasesh Mody 
1735cdd769aSRasesh Mody /* Add / remove / move multicast MAC filters. */
1745cdd769aSRasesh Mody enum _ecore_status_t
1755cdd769aSRasesh Mody ecore_filter_mcast_cmd(struct ecore_dev *p_dev,
1765cdd769aSRasesh Mody 		       struct ecore_filter_mcast *p_filter_cmd,
1775cdd769aSRasesh Mody 		       enum spq_mode comp_mode,
1785cdd769aSRasesh Mody 		       struct ecore_spq_comp_cb *p_comp_data);
1795cdd769aSRasesh Mody 
1805cdd769aSRasesh Mody /* Set "accept" filters */
1815cdd769aSRasesh Mody enum _ecore_status_t
1829455b556SRasesh Mody ecore_filter_accept_cmd(
1839455b556SRasesh Mody 	struct ecore_dev		 *p_dev,
1845cdd769aSRasesh Mody 	u8				 vport,
1855cdd769aSRasesh Mody 	struct ecore_filter_accept_flags accept_flags,
1865cdd769aSRasesh Mody 	u8				 update_accept_any_vlan,
1875cdd769aSRasesh Mody 	u8				 accept_any_vlan,
1885cdd769aSRasesh Mody 	enum spq_mode			 comp_mode,
1895cdd769aSRasesh Mody 	struct ecore_spq_comp_cb	 *p_comp_data);
1905cdd769aSRasesh Mody 
1915cdd769aSRasesh Mody /**
192a55e422eSRasesh Mody  * @brief ecore_eth_rx_queue_start - RX Queue Start Ramrod
1935cdd769aSRasesh Mody  *
1945cdd769aSRasesh Mody  * This ramrod initializes an RX Queue for a VPort. An Assert is generated if
1955cdd769aSRasesh Mody  * the VPort ID is not currently initialized.
1965cdd769aSRasesh Mody  *
1975cdd769aSRasesh Mody  * @param p_hwfn
1985cdd769aSRasesh Mody  * @param opaque_fid
199a55e422eSRasesh Mody  * @p_params			Inputs; Relative for PF [SB being an exception]
2005cdd769aSRasesh Mody  * @param bd_max_bytes		Maximum bytes that can be placed on a BD
2015cdd769aSRasesh Mody  * @param bd_chain_phys_addr	Physical address of BDs for receive.
2025cdd769aSRasesh Mody  * @param cqe_pbl_addr		Physical address of the CQE PBL Table.
2035cdd769aSRasesh Mody  * @param cqe_pbl_size		Size of the CQE PBL Table
204a55e422eSRasesh Mody  * @param p_ret_params		Pointed struct to be filled with outputs.
2055cdd769aSRasesh Mody  *
2065cdd769aSRasesh Mody  * @return enum _ecore_status_t
2075cdd769aSRasesh Mody  */
20898bc693eSRasesh Mody enum _ecore_status_t
209a55e422eSRasesh Mody ecore_eth_rx_queue_start(struct ecore_hwfn *p_hwfn,
2105cdd769aSRasesh Mody 			 u16 opaque_fid,
21198bc693eSRasesh Mody 			 struct ecore_queue_start_common_params *p_params,
2125cdd769aSRasesh Mody 			 u16 bd_max_bytes,
2135cdd769aSRasesh Mody 			 dma_addr_t bd_chain_phys_addr,
2145cdd769aSRasesh Mody 			 dma_addr_t cqe_pbl_addr,
2155cdd769aSRasesh Mody 			 u16 cqe_pbl_size,
216a55e422eSRasesh Mody 			 struct ecore_rxq_start_ret_params *p_ret_params);
2175cdd769aSRasesh Mody 
2185cdd769aSRasesh Mody /**
219a55e422eSRasesh Mody  * @brief ecore_eth_rx_queue_stop - This ramrod closes an Rx queue
2205cdd769aSRasesh Mody  *
2215cdd769aSRasesh Mody  * @param p_hwfn
222a55e422eSRasesh Mody  * @param p_rxq			Handler of queue to close
2235cdd769aSRasesh Mody  * @param eq_completion_only	If True completion will be on
2245cdd769aSRasesh Mody  *				EQe, if False completion will be
2255cdd769aSRasesh Mody  *				on EQe if p_hwfn opaque
2265cdd769aSRasesh Mody  *				different from the RXQ opaque
2275cdd769aSRasesh Mody  *				otherwise on CQe.
2285cdd769aSRasesh Mody  * @param cqe_completion	If True completion will be
2295cdd769aSRasesh Mody  *				receive on CQe.
2305cdd769aSRasesh Mody  * @return enum _ecore_status_t
2315cdd769aSRasesh Mody  */
2325cdd769aSRasesh Mody enum _ecore_status_t
233a55e422eSRasesh Mody ecore_eth_rx_queue_stop(struct ecore_hwfn *p_hwfn,
234a55e422eSRasesh Mody 			void *p_rxq,
2359455b556SRasesh Mody 			bool eq_completion_only,
2369455b556SRasesh Mody 			bool cqe_completion);
2375cdd769aSRasesh Mody 
2385cdd769aSRasesh Mody /**
239a55e422eSRasesh Mody  * @brief - TX Queue Start Ramrod
2405cdd769aSRasesh Mody  *
2415cdd769aSRasesh Mody  * This ramrod initializes a TX Queue for a VPort. An Assert is generated if
2425cdd769aSRasesh Mody  * the VPort is not currently initialized.
2435cdd769aSRasesh Mody  *
2445cdd769aSRasesh Mody  * @param p_hwfn
2455cdd769aSRasesh Mody  * @param opaque_fid
24698bc693eSRasesh Mody  * @p_params
24722d07d93SRasesh Mody  * @param tc			traffic class to use with this L2 txq
2485cdd769aSRasesh Mody  * @param pbl_addr		address of the pbl array
2495cdd769aSRasesh Mody  * @param pbl_size		number of entries in pbl
250a55e422eSRasesh Mody  * @param p_ret_params		Pointer to fill the return parameters in.
2515cdd769aSRasesh Mody  *
2525cdd769aSRasesh Mody  * @return enum _ecore_status_t
2535cdd769aSRasesh Mody  */
25498bc693eSRasesh Mody enum _ecore_status_t
255a55e422eSRasesh Mody ecore_eth_tx_queue_start(struct ecore_hwfn *p_hwfn,
2565cdd769aSRasesh Mody 			 u16 opaque_fid,
25798bc693eSRasesh Mody 			 struct ecore_queue_start_common_params *p_params,
25822d07d93SRasesh Mody 			 u8 tc,
2595cdd769aSRasesh Mody 			 dma_addr_t pbl_addr,
2605cdd769aSRasesh Mody 			 u16 pbl_size,
261a55e422eSRasesh Mody 			 struct ecore_txq_start_ret_params *p_ret_params);
2625cdd769aSRasesh Mody 
2635cdd769aSRasesh Mody /**
264a55e422eSRasesh Mody  * @brief ecore_eth_tx_queue_stop - closes a Tx queue
2655cdd769aSRasesh Mody  *
2665cdd769aSRasesh Mody  * @param p_hwfn
267a55e422eSRasesh Mody  * @param p_txq - handle to Tx queue needed to be closed
2685cdd769aSRasesh Mody  *
2695cdd769aSRasesh Mody  * @return enum _ecore_status_t
2705cdd769aSRasesh Mody  */
271a55e422eSRasesh Mody enum _ecore_status_t ecore_eth_tx_queue_stop(struct ecore_hwfn *p_hwfn,
272a55e422eSRasesh Mody 					     void *p_txq);
2735cdd769aSRasesh Mody 
2745cdd769aSRasesh Mody enum ecore_tpa_mode	{
2755cdd769aSRasesh Mody 	ECORE_TPA_MODE_NONE,
2765cdd769aSRasesh Mody 	ECORE_TPA_MODE_RSC,
2775cdd769aSRasesh Mody 	ECORE_TPA_MODE_GRO,
2785cdd769aSRasesh Mody 	ECORE_TPA_MODE_MAX
2795cdd769aSRasesh Mody };
2805cdd769aSRasesh Mody 
2815cdd769aSRasesh Mody struct ecore_sp_vport_start_params {
2825cdd769aSRasesh Mody 	enum ecore_tpa_mode tpa_mode;
2835cdd769aSRasesh Mody 	bool remove_inner_vlan;	/* Inner VLAN removal is enabled */
2845cdd769aSRasesh Mody 	bool tx_switching;	/* Vport supports tx-switching */
2855cdd769aSRasesh Mody 	bool handle_ptp_pkts;	/* Handle PTP packets */
2865cdd769aSRasesh Mody 	bool only_untagged;	/* Untagged pkt control */
2875cdd769aSRasesh Mody 	bool drop_ttl0;		/* Drop packets with TTL = 0 */
2885cdd769aSRasesh Mody 	u8 max_buffers_per_cqe;
2895cdd769aSRasesh Mody 	u32 concrete_fid;
2905cdd769aSRasesh Mody 	u16 opaque_fid;
2915cdd769aSRasesh Mody 	u8 vport_id;		/* VPORT ID */
2925cdd769aSRasesh Mody 	u16 mtu;		/* VPORT MTU */
2935cdd769aSRasesh Mody 	bool zero_placement_offset;
29422d07d93SRasesh Mody 	bool check_mac;
29522d07d93SRasesh Mody 	bool check_ethtype;
29647b302d6SRasesh Mody 
29747b302d6SRasesh Mody 	/* Strict behavior on transmission errors */
29847b302d6SRasesh Mody 	bool b_err_illegal_vlan_mode;
29947b302d6SRasesh Mody 	bool b_err_illegal_inband_mode;
30047b302d6SRasesh Mody 	bool b_err_vlan_insert_with_inband;
30147b302d6SRasesh Mody 	bool b_err_small_pkt;
30247b302d6SRasesh Mody 	bool b_err_big_pkt;
30347b302d6SRasesh Mody 	bool b_err_anti_spoof;
30447b302d6SRasesh Mody 	bool b_err_ctrl_frame;
305*3b307c55SRasesh Mody 	bool b_en_rgfs;
306*3b307c55SRasesh Mody 	bool b_en_tgfs;
3075cdd769aSRasesh Mody };
3085cdd769aSRasesh Mody 
3095cdd769aSRasesh Mody /**
3105cdd769aSRasesh Mody  * @brief ecore_sp_vport_start -
3115cdd769aSRasesh Mody  *
3125cdd769aSRasesh Mody  * This ramrod initializes a VPort. An Assert if generated if the Function ID
3135cdd769aSRasesh Mody  * of the VPort is not enabled.
3145cdd769aSRasesh Mody  *
3155cdd769aSRasesh Mody  * @param p_hwfn
3165cdd769aSRasesh Mody  * @param p_params		VPORT start params
3175cdd769aSRasesh Mody  *
3185cdd769aSRasesh Mody  * @return enum _ecore_status_t
3195cdd769aSRasesh Mody  */
3205cdd769aSRasesh Mody enum _ecore_status_t
3215cdd769aSRasesh Mody ecore_sp_vport_start(struct ecore_hwfn *p_hwfn,
3225cdd769aSRasesh Mody 		     struct ecore_sp_vport_start_params *p_params);
3235cdd769aSRasesh Mody 
3245cdd769aSRasesh Mody struct ecore_sp_vport_update_params {
3255cdd769aSRasesh Mody 	u16			opaque_fid;
3265cdd769aSRasesh Mody 	u8			vport_id;
3275cdd769aSRasesh Mody 	u8			update_vport_active_rx_flg;
3285cdd769aSRasesh Mody 	u8			vport_active_rx_flg;
3295cdd769aSRasesh Mody 	u8			update_vport_active_tx_flg;
3305cdd769aSRasesh Mody 	u8			vport_active_tx_flg;
3315cdd769aSRasesh Mody 	u8			update_inner_vlan_removal_flg;
3325cdd769aSRasesh Mody 	u8			inner_vlan_removal_flg;
3335cdd769aSRasesh Mody 	u8			silent_vlan_removal_flg;
3345cdd769aSRasesh Mody 	u8			update_default_vlan_enable_flg;
3355cdd769aSRasesh Mody 	u8			default_vlan_enable_flg;
3365cdd769aSRasesh Mody 	u8			update_default_vlan_flg;
3375cdd769aSRasesh Mody 	u16			default_vlan;
3385cdd769aSRasesh Mody 	u8			update_tx_switching_flg;
3395cdd769aSRasesh Mody 	u8			tx_switching_flg;
3405cdd769aSRasesh Mody 	u8			update_approx_mcast_flg;
3415cdd769aSRasesh Mody 	u8			update_anti_spoofing_en_flg;
3425cdd769aSRasesh Mody 	u8			anti_spoofing_en;
3435cdd769aSRasesh Mody 	u8			update_accept_any_vlan_flg;
3445cdd769aSRasesh Mody 	u8			accept_any_vlan;
345413ecf29SHarish Patil 	u32			bins[8];
3465cdd769aSRasesh Mody 	struct ecore_rss_params	*rss_params;
3475cdd769aSRasesh Mody 	struct ecore_filter_accept_flags accept_flags;
3485cdd769aSRasesh Mody 	struct ecore_sge_tpa_params *sge_tpa_params;
34920e961bcSHarish Patil 	/* MTU change - notice this requires the vport to be disabled.
35020e961bcSHarish Patil 	 * If non-zero, value would be used.
35120e961bcSHarish Patil 	 */
35220e961bcSHarish Patil 	u16                     mtu;
353ab67e837SRasesh Mody 	u8			update_ctl_frame_check;
354ab67e837SRasesh Mody 	u8			mac_chk_en;
355ab67e837SRasesh Mody 	u8			ethtype_chk_en;
3565cdd769aSRasesh Mody };
3575cdd769aSRasesh Mody 
3585cdd769aSRasesh Mody /**
3595cdd769aSRasesh Mody  * @brief ecore_sp_vport_update -
3605cdd769aSRasesh Mody  *
3615cdd769aSRasesh Mody  * This ramrod updates the parameters of the VPort. Every field can be updated
3625cdd769aSRasesh Mody  * independently, according to flags.
3635cdd769aSRasesh Mody  *
3645cdd769aSRasesh Mody  * This ramrod is also used to set the VPort state to active after creation.
3655cdd769aSRasesh Mody  * An Assert is generated if the VPort does not contain an RX queue.
3665cdd769aSRasesh Mody  *
3675cdd769aSRasesh Mody  * @param p_hwfn
3685cdd769aSRasesh Mody  * @param p_params
3695cdd769aSRasesh Mody  *
3705cdd769aSRasesh Mody  * @return enum _ecore_status_t
3715cdd769aSRasesh Mody  */
3725cdd769aSRasesh Mody enum _ecore_status_t
3735cdd769aSRasesh Mody ecore_sp_vport_update(struct ecore_hwfn *p_hwfn,
3745cdd769aSRasesh Mody 		      struct ecore_sp_vport_update_params *p_params,
3755cdd769aSRasesh Mody 		      enum spq_mode comp_mode,
3765cdd769aSRasesh Mody 		      struct ecore_spq_comp_cb *p_comp_data);
3775cdd769aSRasesh Mody /**
3785cdd769aSRasesh Mody  * @brief ecore_sp_vport_stop -
3795cdd769aSRasesh Mody  *
3805cdd769aSRasesh Mody  * This ramrod closes a VPort after all its RX and TX queues are terminated.
3815cdd769aSRasesh Mody  * An Assert is generated if any queues are left open.
3825cdd769aSRasesh Mody  *
3835cdd769aSRasesh Mody  * @param p_hwfn
3845cdd769aSRasesh Mody  * @param opaque_fid
3855cdd769aSRasesh Mody  * @param vport_id VPort ID
3865cdd769aSRasesh Mody  *
3875cdd769aSRasesh Mody  * @return enum _ecore_status_t
3885cdd769aSRasesh Mody  */
3895cdd769aSRasesh Mody enum _ecore_status_t ecore_sp_vport_stop(struct ecore_hwfn *p_hwfn,
3909455b556SRasesh Mody 					 u16 opaque_fid,
3919455b556SRasesh Mody 					 u8 vport_id);
3925cdd769aSRasesh Mody 
3935cdd769aSRasesh Mody enum _ecore_status_t
3945cdd769aSRasesh Mody ecore_sp_eth_filter_ucast(struct ecore_hwfn *p_hwfn,
3955cdd769aSRasesh Mody 			  u16 opaque_fid,
3965cdd769aSRasesh Mody 			  struct ecore_filter_ucast *p_filter_cmd,
3975cdd769aSRasesh Mody 			  enum spq_mode comp_mode,
3985cdd769aSRasesh Mody 			  struct ecore_spq_comp_cb *p_comp_data);
3995cdd769aSRasesh Mody 
4005cdd769aSRasesh Mody /**
4015cdd769aSRasesh Mody  * @brief ecore_sp_rx_eth_queues_update -
4025cdd769aSRasesh Mody  *
4035cdd769aSRasesh Mody  * This ramrod updates an RX queue. It is used for setting the active state
4045cdd769aSRasesh Mody  * of the queue and updating the TPA and SGE parameters.
4055cdd769aSRasesh Mody  *
4065cdd769aSRasesh Mody  * @note Final phase API.
4075cdd769aSRasesh Mody  *
4085cdd769aSRasesh Mody  * @param p_hwfn
409a55e422eSRasesh Mody  * @param pp_rxq_handlers	An array of queue handlers to be updated.
410a55e422eSRasesh Mody  * @param num_rxqs              number of queues to update.
4115cdd769aSRasesh Mody  * @param complete_cqe_flg	Post completion to the CQE Ring if set
4125cdd769aSRasesh Mody  * @param complete_event_flg	Post completion to the Event Ring if set
413a55e422eSRasesh Mody  * @param comp_mode
414a55e422eSRasesh Mody  * @param p_comp_data
4155cdd769aSRasesh Mody  *
4165cdd769aSRasesh Mody  * @return enum _ecore_status_t
4175cdd769aSRasesh Mody  */
4185cdd769aSRasesh Mody 
4195cdd769aSRasesh Mody enum _ecore_status_t
4205cdd769aSRasesh Mody ecore_sp_eth_rx_queues_update(struct ecore_hwfn *p_hwfn,
421a55e422eSRasesh Mody 			      void **pp_rxq_handlers,
4225cdd769aSRasesh Mody 			      u8 num_rxqs,
4235cdd769aSRasesh Mody 			      u8 complete_cqe_flg,
4245cdd769aSRasesh Mody 			      u8 complete_event_flg,
4255cdd769aSRasesh Mody 			      enum spq_mode comp_mode,
4265cdd769aSRasesh Mody 			      struct ecore_spq_comp_cb *p_comp_data);
4275cdd769aSRasesh Mody 
4285cdd769aSRasesh Mody void __ecore_get_vport_stats(struct ecore_hwfn *p_hwfn,
4295cdd769aSRasesh Mody 			     struct ecore_ptt *p_ptt,
4305cdd769aSRasesh Mody 			     struct ecore_eth_stats *stats,
4315cdd769aSRasesh Mody 			     u16 statistics_bin, bool b_get_port_stats);
4325cdd769aSRasesh Mody 
4335cdd769aSRasesh Mody void ecore_get_vport_stats(struct ecore_dev *p_dev,
4345cdd769aSRasesh Mody 			   struct ecore_eth_stats *stats);
4355cdd769aSRasesh Mody 
4365cdd769aSRasesh Mody void ecore_reset_vport_stats(struct ecore_dev *p_dev);
4375cdd769aSRasesh Mody 
43853437002SHarish Patil /**
43953437002SHarish Patil  *@brief ecore_arfs_mode_configure -
44053437002SHarish Patil  *
44153437002SHarish Patil  *Enable or disable rfs mode. It must accept atleast one of tcp or udp true
44253437002SHarish Patil  *and atleast one of ipv4 or ipv6 true to enable rfs mode.
44353437002SHarish Patil  *
44453437002SHarish Patil  *@param p_hwfn
44553437002SHarish Patil  *@param p_ptt
44653437002SHarish Patil  *@param p_cfg_params		arfs mode configuration parameters.
44753437002SHarish Patil  *
44853437002SHarish Patil  */
44953437002SHarish Patil void ecore_arfs_mode_configure(struct ecore_hwfn *p_hwfn,
45053437002SHarish Patil 			       struct ecore_ptt *p_ptt,
45153437002SHarish Patil 			       struct ecore_arfs_config_params *p_cfg_params);
45230ecf673SRasesh Mody 
4532c0784ebSShahed Shaikh struct ecore_ntuple_filter_params {
4542c0784ebSShahed Shaikh 	/* Physically mapped address containing header of buffer to be used
4552c0784ebSShahed Shaikh 	 * as filter.
4562c0784ebSShahed Shaikh 	 */
4572c0784ebSShahed Shaikh 	dma_addr_t addr;
4582c0784ebSShahed Shaikh 
4592c0784ebSShahed Shaikh 	/* Length of header in bytes */
4602c0784ebSShahed Shaikh 	u16 length;
4612c0784ebSShahed Shaikh 
4622c0784ebSShahed Shaikh 	/* Relative queue-id to receive classified packet */
4632c0784ebSShahed Shaikh 	#define ECORE_RFS_NTUPLE_QID_RSS ((u16)-1)
4642c0784ebSShahed Shaikh 	u16 qid;
4652c0784ebSShahed Shaikh 
4662c0784ebSShahed Shaikh 	/* Identifier can either be according to vport-id or vfid */
4672c0784ebSShahed Shaikh 	bool b_is_vf;
4682c0784ebSShahed Shaikh 	u8 vport_id;
4692c0784ebSShahed Shaikh 	u8 vf_id;
4702c0784ebSShahed Shaikh 
4712c0784ebSShahed Shaikh 	/* true if this filter is to be added. Else to be removed */
4722c0784ebSShahed Shaikh 	bool b_is_add;
4732c0784ebSShahed Shaikh 
4742c0784ebSShahed Shaikh 	/* If packet needs to be dropped */
4752c0784ebSShahed Shaikh 	bool b_is_drop;
4762c0784ebSShahed Shaikh };
4772c0784ebSShahed Shaikh 
47830ecf673SRasesh Mody /**
47930ecf673SRasesh Mody  * @brief - ecore_configure_rfs_ntuple_filter
48030ecf673SRasesh Mody  *
48130ecf673SRasesh Mody  * This ramrod should be used to add or remove arfs hw filter
48230ecf673SRasesh Mody  *
48330ecf673SRasesh Mody  * @params p_hwfn
48430ecf673SRasesh Mody  * @params p_cb		Used for ECORE_SPQ_MODE_CB,where client would initialize
48530ecf673SRasesh Mody  *			it with cookie and callback function address, if not
48630ecf673SRasesh Mody  *			using this mode then client must pass NULL.
4872c0784ebSShahed Shaikh  * @params p_params
48830ecf673SRasesh Mody  */
48930ecf673SRasesh Mody enum _ecore_status_t
49030ecf673SRasesh Mody ecore_configure_rfs_ntuple_filter(struct ecore_hwfn *p_hwfn,
49130ecf673SRasesh Mody 				  struct ecore_spq_comp_cb *p_cb,
4922c0784ebSShahed Shaikh 				  struct ecore_ntuple_filter_params *p_params);
4930b855a34SRasesh Mody 
4940b855a34SRasesh Mody /**
4950b855a34SRasesh Mody  * @brief - ecore_update_eth_rss_ind_table_entry
4960b855a34SRasesh Mody  *
4970b855a34SRasesh Mody  * This function being used to update RSS indirection table entry to FW RAM
4980b855a34SRasesh Mody  * instead of using the SP vport update ramrod with rss params.
4990b855a34SRasesh Mody  *
5000b855a34SRasesh Mody  * Notice:
5010b855a34SRasesh Mody  * This function supports only one outstanding command per engine. Ecore
5020b855a34SRasesh Mody  * clients which use this function should call ecore_mcp_ind_table_lock() prior
5030b855a34SRasesh Mody  * to it and ecore_mcp_ind_table_unlock() after it.
5040b855a34SRasesh Mody  *
5050b855a34SRasesh Mody  * @params p_hwfn
5060b855a34SRasesh Mody  * @params vport_id
5070b855a34SRasesh Mody  * @params ind_table_index
5080b855a34SRasesh Mody  * @params ind_table_value
5090b855a34SRasesh Mody  *
5100b855a34SRasesh Mody  * @return enum _ecore_status_t
5110b855a34SRasesh Mody  */
5120b855a34SRasesh Mody enum _ecore_status_t
5130b855a34SRasesh Mody ecore_update_eth_rss_ind_table_entry(struct ecore_hwfn *p_hwfn,
5140b855a34SRasesh Mody 				     u8 vport_id,
5150b855a34SRasesh Mody 				     u8 ind_table_index,
5160b855a34SRasesh Mody 				     u16 ind_table_value);
5175cdd769aSRasesh Mody #endif
518