xref: /dpdk/drivers/net/qede/base/ecore_init_ops.h (revision d80e42cce4c7017ed8c99dabb8ae444a492acc1c)
1 /*
2  * Copyright (c) 2016 - 2018 Cavium Inc.
3  * All rights reserved.
4  * www.cavium.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8 
9 #ifndef __ECORE_INIT_OPS__
10 #define __ECORE_INIT_OPS__
11 
12 #include "ecore.h"
13 
14 /**
15  * @brief ecore_init_iro_array - init iro_arr.
16  *
17  *
18  * @param p_dev
19  */
20 void ecore_init_iro_array(struct ecore_dev *p_dev);
21 
22 /**
23  * @brief ecore_init_run - Run the init-sequence.
24  *
25  *
26  * @param p_hwfn
27  * @param p_ptt
28  * @param phase
29  * @param phase_id
30  * @param modes
31  * @return _ecore_status_t
32  */
33 enum _ecore_status_t ecore_init_run(struct ecore_hwfn *p_hwfn,
34 				    struct ecore_ptt *p_ptt,
35 				    int               phase,
36 				    int               phase_id,
37 				    int               modes);
38 
39 /**
40  * @brief ecore_init_hwfn_allocate - Allocate RT array, Store 'values' ptrs.
41  *
42  *
43  * @param p_hwfn
44  *
45  * @return _ecore_status_t
46  */
47 enum _ecore_status_t ecore_init_alloc(struct ecore_hwfn *p_hwfn);
48 
49 /**
50  * @brief ecore_init_hwfn_deallocate
51  *
52  *
53  * @param p_hwfn
54  */
55 void ecore_init_free(struct ecore_hwfn *p_hwfn);
56 
57 
58 /**
59  * @brief ecore_init_clear_rt_data - Clears the runtime init array.
60  *
61  *
62  * @param p_hwfn
63  */
64 void ecore_init_clear_rt_data(struct ecore_hwfn *p_hwfn);
65 
66 /**
67  * @brief ecore_init_store_rt_reg - Store a configuration value in the RT array.
68  *
69  *
70  * @param p_hwfn
71  * @param rt_offset
72  * @param val
73  */
74 void ecore_init_store_rt_reg(struct ecore_hwfn *p_hwfn,
75 			     u32               rt_offset,
76 			     u32               val);
77 
78 #define STORE_RT_REG(hwfn, offset, val)				\
79 	ecore_init_store_rt_reg(hwfn, offset, val)
80 
81 #define OVERWRITE_RT_REG(hwfn, offset, val)			\
82 	ecore_init_store_rt_reg(hwfn, offset, val)
83 
84 /**
85 * @brief
86 *
87 *
88 * @param p_hwfn
89 * @param rt_offset
90 * @param val
91 * @param size
92 */
93 
94 void ecore_init_store_rt_agg(struct ecore_hwfn *p_hwfn,
95 			     u32               rt_offset,
96 			     u32               *val,
97 			     osal_size_t       size);
98 
99 #define STORE_RT_REG_AGG(hwfn, offset, val)			\
100 	ecore_init_store_rt_agg(hwfn, offset, (u32 *)&val, sizeof(val))
101 
102 
103 /**
104  * @brief
105  *      Initialize GTT global windows and set admin window
106  *      related params of GTT/PTT to default values.
107  *
108  * @param p_hwfn
109  */
110 void ecore_gtt_init(struct ecore_hwfn *p_hwfn,
111 		    struct ecore_ptt *p_ptt);
112 #endif /* __ECORE_INIT_OPS__ */
113