1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 */ 6 7 #include "bcm_osal.h" 8 #include "ecore.h" 9 #include "ecore_sp_commands.h" 10 #include "ecore_dcbx.h" 11 #include "ecore_cxt.h" 12 #include "ecore_gtt_reg_addr.h" 13 #include "ecore_iro.h" 14 #include "ecore_iov_api.h" 15 16 #define ECORE_DCBX_MAX_MIB_READ_TRY (100) 17 #define ECORE_ETH_TYPE_DEFAULT (0) 18 19 #define ECORE_DCBX_INVALID_PRIORITY 0xFF 20 21 /* Get Traffic Class from priority traffic class table, 4 bits represent 22 * the traffic class corresponding to the priority. 23 */ 24 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \ 25 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7) 26 27 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap) 28 { 29 return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) == 30 DCBX_APP_SF_ETHTYPE); 31 } 32 33 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap) 34 { 35 u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 36 37 /* Old MFW */ 38 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 39 return ecore_dcbx_app_ethtype(app_info_bitmap); 40 41 return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE); 42 } 43 44 static bool ecore_dcbx_app_port(u32 app_info_bitmap) 45 { 46 return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) == 47 DCBX_APP_SF_PORT); 48 } 49 50 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type) 51 { 52 u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE); 53 54 /* Old MFW */ 55 if (mfw_val == DCBX_APP_SF_IEEE_RESERVED) 56 return ecore_dcbx_app_port(app_info_bitmap); 57 58 return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT); 59 } 60 61 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee) 62 { 63 bool ethtype; 64 65 if (ieee) 66 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap); 67 else 68 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap); 69 70 return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT)); 71 } 72 73 static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap, 74 u16 proto_id, bool ieee) 75 { 76 bool port; 77 78 if (!p_hwfn->p_dcbx_info->iwarp_port) 79 return false; 80 81 if (ieee) 82 port = ecore_dcbx_ieee_app_port(app_info_bitmap, 83 DCBX_APP_SF_IEEE_TCP_PORT); 84 else 85 port = ecore_dcbx_app_port(app_info_bitmap); 86 87 return !!(port && (proto_id == p_hwfn->p_dcbx_info->iwarp_port)); 88 } 89 90 static void 91 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn, 92 struct ecore_dcbx_results *p_data) 93 { 94 enum dcbx_protocol_type id; 95 int i; 96 97 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n", 98 p_data->dcbx_enabled); 99 100 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) { 101 id = ecore_dcbx_app_update[i].id; 102 103 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 104 "%s info: update %d, enable %d, prio %d, tc %d," 105 " num_active_tc %d dscp_enable = %d dscp_val = %d\n", 106 ecore_dcbx_app_update[i].name, 107 p_data->arr[id].update, 108 p_data->arr[id].enable, p_data->arr[id].priority, 109 p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc, 110 p_data->arr[id].dscp_enable, 111 p_data->arr[id].dscp_val); 112 } 113 } 114 115 u8 ecore_dcbx_get_dscp_value(struct ecore_hwfn *p_hwfn, u8 pri) 116 { 117 struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp; 118 u8 i; 119 120 if (!dscp->enabled) 121 return ECORE_DCBX_DSCP_DISABLED; 122 123 for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++) 124 if (pri == dscp->dscp_pri_map[i]) 125 return i; 126 127 return ECORE_DCBX_DSCP_DISABLED; 128 } 129 130 static void 131 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data, 132 struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 133 bool enable, u8 prio, u8 tc, 134 enum dcbx_protocol_type type, 135 enum ecore_pci_personality personality) 136 { 137 /* PF update ramrod data */ 138 p_data->arr[type].enable = enable; 139 p_data->arr[type].priority = prio; 140 p_data->arr[type].tc = tc; 141 p_data->arr[type].dscp_val = ecore_dcbx_get_dscp_value(p_hwfn, prio); 142 if (p_data->arr[type].dscp_val == ECORE_DCBX_DSCP_DISABLED) { 143 p_data->arr[type].dscp_enable = false; 144 p_data->arr[type].dscp_val = 0; 145 } else { 146 p_data->arr[type].dscp_enable = true; 147 } 148 p_data->arr[type].update = UPDATE_DCB_DSCP; 149 150 /* Do not add valn tag 0 when DCB is enabled and port is in UFP mode */ 151 if (OSAL_GET_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits)) 152 p_data->arr[type].dont_add_vlan0 = true; 153 154 /* QM reconf data */ 155 if (p_hwfn->hw_info.personality == personality) 156 p_hwfn->hw_info.offload_tc = tc; 157 158 /* Configure dcbx vlan priority in doorbell block for roce EDPM */ 159 if (OSAL_GET_BIT(ECORE_MF_UFP_SPECIFIC, &p_hwfn->p_dev->mf_bits) && 160 type == DCBX_PROTOCOL_ROCE) { 161 ecore_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1); 162 ecore_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP, prio << 1); 163 } 164 } 165 166 /* Update app protocol data and hw_info fields with the TLV info */ 167 static void 168 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data, 169 struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 170 bool enable, u8 prio, u8 tc, 171 enum dcbx_protocol_type type) 172 { 173 enum ecore_pci_personality personality; 174 enum dcbx_protocol_type id; 175 int i; 176 177 for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) { 178 id = ecore_dcbx_app_update[i].id; 179 180 if (type != id) 181 continue; 182 183 personality = ecore_dcbx_app_update[i].personality; 184 185 ecore_dcbx_set_params(p_data, p_hwfn, p_ptt, enable, 186 prio, tc, type, personality); 187 } 188 } 189 190 static enum _ecore_status_t 191 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority) 192 { 193 u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES; 194 u32 index = ECORE_MAX_PFC_PRIORITIES - 1; 195 enum _ecore_status_t rc = ECORE_SUCCESS; 196 197 /* Bitmap 1 corresponds to priority 0, return priority 0 */ 198 if (pri_bitmap == 1) { 199 *priority = 0; 200 return rc; 201 } 202 203 /* Choose the highest priority */ 204 while ((pri == ECORE_MAX_PFC_PRIORITIES) && index) { 205 pri_mask = 1 << index; 206 if (pri_bitmap & pri_mask) 207 pri = index; 208 index--; 209 } 210 211 if (pri < ECORE_MAX_PFC_PRIORITIES) 212 *priority = (u8)pri; 213 else 214 rc = ECORE_INVAL; 215 216 return rc; 217 } 218 219 static bool 220 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn, 221 u32 app_prio_bitmap, u16 id, 222 enum dcbx_protocol_type *type, bool ieee) 223 { 224 if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) { 225 *type = DCBX_PROTOCOL_ETH; 226 } else { 227 *type = DCBX_MAX_PROTOCOL_TYPE; 228 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 229 "No action required, App TLV entry = 0x%x\n", 230 app_prio_bitmap); 231 return false; 232 } 233 234 return true; 235 } 236 237 /* Parse app TLV's to update TC information in hw_info structure for 238 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 239 */ 240 static enum _ecore_status_t 241 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 242 struct ecore_dcbx_results *p_data, 243 struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl, 244 int count, u8 dcbx_version) 245 { 246 enum dcbx_protocol_type type; 247 bool enable, ieee, eth_tlv; 248 u8 tc, priority_map; 249 u16 protocol_id; 250 u8 priority; 251 enum _ecore_status_t rc = ECORE_SUCCESS; 252 int i; 253 254 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 255 "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n", 256 count, pri_tc_tbl, dcbx_version); 257 258 ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE); 259 eth_tlv = false; 260 /* Parse APP TLV */ 261 for (i = 0; i < count; i++) { 262 protocol_id = GET_MFW_FIELD(p_tbl[i].entry, 263 DCBX_APP_PROTOCOL_ID); 264 priority_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 265 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n", 266 protocol_id, priority_map); 267 rc = ecore_dcbx_get_app_priority(priority_map, &priority); 268 if (rc == ECORE_INVAL) { 269 DP_ERR(p_hwfn, "Invalid priority\n"); 270 return ECORE_INVAL; 271 } 272 273 tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority); 274 if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 275 protocol_id, &type, 276 ieee)) { 277 /* ETH always have the enable bit reset, as it gets 278 * vlan information per packet. For other protocols, 279 * should be set according to the dcbx_enabled 280 * indication, but we only got here if there was an 281 * app tlv for the protocol, so dcbx must be enabled. 282 */ 283 if (type == DCBX_PROTOCOL_ETH) { 284 enable = false; 285 eth_tlv = true; 286 } else { 287 enable = true; 288 } 289 290 ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, 291 enable, priority, tc, type); 292 } 293 } 294 295 /* If Eth TLV is not detected, use UFP TC as default TC */ 296 if (OSAL_GET_BIT(ECORE_MF_UFP_SPECIFIC, 297 &p_hwfn->p_dev->mf_bits) && !eth_tlv) 298 p_data->arr[DCBX_PROTOCOL_ETH].tc = p_hwfn->ufp_info.tc; 299 300 /* Update ramrod protocol data and hw_info fields 301 * with default info when corresponding APP TLV's are not detected. 302 * The enabled field has a different logic for ethernet as only for 303 * ethernet dcb should disabled by default, as the information arrives 304 * from the OS (unless an explicit app tlv was present). 305 */ 306 tc = p_data->arr[DCBX_PROTOCOL_ETH].tc; 307 priority = p_data->arr[DCBX_PROTOCOL_ETH].priority; 308 for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) { 309 if (p_data->arr[type].update) 310 continue; 311 312 /* if no app tlv was present, don't override in FW */ 313 ecore_dcbx_update_app_info(p_data, p_hwfn, p_ptt, 314 p_data->arr[DCBX_PROTOCOL_ETH].enable, 315 priority, tc, type); 316 } 317 318 return ECORE_SUCCESS; 319 } 320 321 /* Parse app TLV's to update TC information in hw_info structure for 322 * reconfiguring QM. Get protocol specific data for PF update ramrod command. 323 */ 324 static enum _ecore_status_t 325 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt) 326 { 327 struct dcbx_app_priority_feature *p_app; 328 struct dcbx_app_priority_entry *p_tbl; 329 struct ecore_dcbx_results data; 330 struct dcbx_ets_feature *p_ets; 331 struct ecore_hw_info *p_info; 332 u32 pri_tc_tbl, flags; 333 u8 dcbx_version; 334 int num_entries; 335 enum _ecore_status_t rc = ECORE_SUCCESS; 336 337 flags = p_hwfn->p_dcbx_info->operational.flags; 338 dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION); 339 340 p_app = &p_hwfn->p_dcbx_info->operational.features.app; 341 p_tbl = p_app->app_pri_tbl; 342 343 p_ets = &p_hwfn->p_dcbx_info->operational.features.ets; 344 pri_tc_tbl = p_ets->pri_tc_tbl[0]; 345 346 p_info = &p_hwfn->hw_info; 347 num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES); 348 349 OSAL_MEMSET(&data, 0, sizeof(struct ecore_dcbx_results)); 350 rc = ecore_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl, 351 num_entries, dcbx_version); 352 if (rc != ECORE_SUCCESS) 353 return rc; 354 355 p_info->num_active_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS); 356 p_hwfn->qm_info.ooo_tc = GET_MFW_FIELD(p_ets->flags, DCBX_OOO_TC); 357 data.pf_id = p_hwfn->rel_pf_id; 358 data.dcbx_enabled = !!dcbx_version; 359 360 ecore_dcbx_dp_protocol(p_hwfn, &data); 361 362 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data, 363 sizeof(struct ecore_dcbx_results)); 364 365 return ECORE_SUCCESS; 366 } 367 368 static enum _ecore_status_t 369 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn, 370 struct ecore_ptt *p_ptt, 371 struct ecore_dcbx_mib_meta_data *p_data, 372 enum ecore_mib_read_type type) 373 { 374 u32 prefix_seq_num, suffix_seq_num; 375 int read_count = 0; 376 enum _ecore_status_t rc = ECORE_SUCCESS; 377 378 /* The data is considered to be valid only if both sequence numbers are 379 * the same. 380 */ 381 do { 382 if (type == ECORE_DCBX_REMOTE_LLDP_MIB) { 383 ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote, 384 p_data->addr, p_data->size); 385 prefix_seq_num = p_data->lldp_remote->prefix_seq_num; 386 suffix_seq_num = p_data->lldp_remote->suffix_seq_num; 387 } else if (type == ECORE_DCBX_LLDP_TLVS) { 388 ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_tlvs, 389 p_data->addr, p_data->size); 390 prefix_seq_num = p_data->lldp_tlvs->prefix_seq_num; 391 suffix_seq_num = p_data->lldp_tlvs->suffix_seq_num; 392 393 } else { 394 ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib, 395 p_data->addr, p_data->size); 396 prefix_seq_num = p_data->mib->prefix_seq_num; 397 suffix_seq_num = p_data->mib->suffix_seq_num; 398 } 399 read_count++; 400 401 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 402 "mib type = %d, try count = %d prefix seq num =" 403 " %d suffix seq num = %d\n", 404 type, read_count, prefix_seq_num, suffix_seq_num); 405 } while ((prefix_seq_num != suffix_seq_num) && 406 (read_count < ECORE_DCBX_MAX_MIB_READ_TRY)); 407 408 if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) { 409 DP_ERR(p_hwfn, 410 "MIB read err, mib type = %d, try count =" 411 " %d prefix seq num = %d suffix seq num = %d\n", 412 type, read_count, prefix_seq_num, suffix_seq_num); 413 rc = ECORE_IO; 414 } 415 416 return rc; 417 } 418 419 static void 420 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn, 421 struct ecore_dcbx_app_prio *p_prio, 422 struct ecore_dcbx_results *p_results) 423 { 424 u8 val; 425 426 if (p_results->arr[DCBX_PROTOCOL_ETH].update && 427 p_results->arr[DCBX_PROTOCOL_ETH].enable) 428 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority; 429 430 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 431 "Priorities: eth %d\n", 432 p_prio->eth); 433 } 434 435 static void 436 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn, 437 struct dcbx_app_priority_feature *p_app, 438 struct dcbx_app_priority_entry *p_tbl, 439 struct ecore_dcbx_params *p_params, bool ieee) 440 { 441 struct ecore_app_entry *entry; 442 u8 pri_map; 443 int i; 444 445 p_params->app_willing = GET_MFW_FIELD(p_app->flags, DCBX_APP_WILLING); 446 p_params->app_valid = GET_MFW_FIELD(p_app->flags, DCBX_APP_ENABLED); 447 p_params->app_error = GET_MFW_FIELD(p_app->flags, DCBX_APP_ERROR); 448 p_params->num_app_entries = GET_MFW_FIELD(p_app->flags, 449 DCBX_APP_NUM_ENTRIES); 450 for (i = 0; i < p_params->num_app_entries; i++) { 451 entry = &p_params->app_entry[i]; 452 if (ieee) { 453 u8 sf_ieee; 454 u32 val; 455 456 sf_ieee = GET_MFW_FIELD(p_tbl[i].entry, 457 DCBX_APP_SF_IEEE); 458 switch (sf_ieee) { 459 case DCBX_APP_SF_IEEE_RESERVED: 460 /* Old MFW */ 461 val = GET_MFW_FIELD(p_tbl[i].entry, 462 DCBX_APP_SF); 463 entry->sf_ieee = val ? 464 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT : 465 ECORE_DCBX_SF_IEEE_ETHTYPE; 466 break; 467 case DCBX_APP_SF_IEEE_ETHTYPE: 468 entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE; 469 break; 470 case DCBX_APP_SF_IEEE_TCP_PORT: 471 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT; 472 break; 473 case DCBX_APP_SF_IEEE_UDP_PORT: 474 entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT; 475 break; 476 case DCBX_APP_SF_IEEE_TCP_UDP_PORT: 477 entry->sf_ieee = 478 ECORE_DCBX_SF_IEEE_TCP_UDP_PORT; 479 break; 480 } 481 } else { 482 entry->ethtype = !(GET_MFW_FIELD(p_tbl[i].entry, 483 DCBX_APP_SF)); 484 } 485 486 pri_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP); 487 ecore_dcbx_get_app_priority(pri_map, &entry->prio); 488 entry->proto_id = GET_MFW_FIELD(p_tbl[i].entry, 489 DCBX_APP_PROTOCOL_ID); 490 ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry, 491 entry->proto_id, 492 &entry->proto_type, ieee); 493 } 494 495 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 496 "APP params: willing %d, valid %d error = %d\n", 497 p_params->app_willing, p_params->app_valid, 498 p_params->app_error); 499 } 500 501 static void 502 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn, 503 u32 pfc, struct ecore_dcbx_params *p_params) 504 { 505 u8 pfc_map; 506 507 p_params->pfc.willing = GET_MFW_FIELD(pfc, DCBX_PFC_WILLING); 508 p_params->pfc.max_tc = GET_MFW_FIELD(pfc, DCBX_PFC_CAPS); 509 p_params->pfc.enabled = GET_MFW_FIELD(pfc, DCBX_PFC_ENABLED); 510 pfc_map = GET_MFW_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); 511 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); 512 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); 513 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); 514 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); 515 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); 516 p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5); 517 p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6); 518 p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7); 519 520 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 521 "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n", 522 p_params->pfc.willing, pfc_map, p_params->pfc.max_tc, 523 p_params->pfc.enabled); 524 } 525 526 static void 527 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn, 528 struct dcbx_ets_feature *p_ets, 529 struct ecore_dcbx_params *p_params) 530 { 531 u32 bw_map[2], tsa_map[2], pri_map; 532 int i; 533 534 p_params->ets_willing = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_WILLING); 535 p_params->ets_enabled = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_ENABLED); 536 p_params->ets_cbs = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_CBS); 537 p_params->max_ets_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS); 538 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 539 "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n", 540 p_params->ets_willing, p_params->ets_enabled, 541 p_params->ets_cbs, p_ets->pri_tc_tbl[0], 542 p_params->max_ets_tc); 543 544 /* 8 bit tsa and bw data corresponding to each of the 8 TC's are 545 * encoded in a type u32 array of size 2. 546 */ 547 bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]); 548 bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]); 549 tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]); 550 tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]); 551 pri_map = p_ets->pri_tc_tbl[0]; 552 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) { 553 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i]; 554 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i]; 555 p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i); 556 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 557 "elem %d bw_tbl %x tsa_tbl %x\n", 558 i, p_params->ets_tc_bw_tbl[i], 559 p_params->ets_tc_tsa_tbl[i]); 560 } 561 } 562 563 static void 564 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn, 565 struct dcbx_app_priority_feature *p_app, 566 struct dcbx_app_priority_entry *p_tbl, 567 struct dcbx_ets_feature *p_ets, 568 u32 pfc, struct ecore_dcbx_params *p_params, 569 bool ieee) 570 { 571 ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee); 572 ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params); 573 ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params); 574 } 575 576 static void 577 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn, 578 struct ecore_dcbx_get *params) 579 { 580 struct dcbx_features *p_feat; 581 582 p_feat = &p_hwfn->p_dcbx_info->local_admin.features; 583 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app, 584 p_feat->app.app_pri_tbl, &p_feat->ets, 585 p_feat->pfc, ¶ms->local.params, false); 586 params->local.valid = true; 587 } 588 589 static void 590 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn, 591 struct ecore_dcbx_get *params) 592 { 593 struct dcbx_features *p_feat; 594 595 p_feat = &p_hwfn->p_dcbx_info->remote.features; 596 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app, 597 p_feat->app.app_pri_tbl, &p_feat->ets, 598 p_feat->pfc, ¶ms->remote.params, 599 false); 600 params->remote.valid = true; 601 } 602 603 static void ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn, 604 struct ecore_dcbx_get *params) 605 { 606 struct ecore_dcbx_dscp_params *p_dscp; 607 struct dcb_dscp_map *p_dscp_map; 608 int i, j, entry; 609 u32 pri_map; 610 611 p_dscp = ¶ms->dscp; 612 p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map; 613 p_dscp->enabled = GET_MFW_FIELD(p_dscp_map->flags, DCB_DSCP_ENABLE); 614 615 /* MFW encodes 64 dscp entries into 8 element array of u32 entries, 616 * where each entry holds the 4bit priority map for 8 dscp entries. 617 */ 618 for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) { 619 pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]); 620 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n", 621 entry, pri_map); 622 for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++) 623 p_dscp->dscp_pri_map[entry] = (u32)(pri_map >> 624 (j * 4)) & 0xf; 625 } 626 } 627 628 static void 629 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn, 630 struct ecore_dcbx_get *params) 631 { 632 struct ecore_dcbx_operational_params *p_operational; 633 struct ecore_dcbx_results *p_results; 634 struct dcbx_features *p_feat; 635 bool enabled, err; 636 u32 flags; 637 bool val; 638 639 flags = p_hwfn->p_dcbx_info->operational.flags; 640 641 /* If DCBx version is non zero, then negotiation 642 * was successfuly performed 643 */ 644 p_operational = ¶ms->operational; 645 enabled = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) != 646 DCBX_CONFIG_VERSION_DISABLED); 647 if (!enabled) { 648 p_operational->enabled = enabled; 649 p_operational->valid = false; 650 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n"); 651 return; 652 } 653 654 p_feat = &p_hwfn->p_dcbx_info->operational.features; 655 p_results = &p_hwfn->p_dcbx_info->results; 656 657 val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) == 658 DCBX_CONFIG_VERSION_IEEE); 659 p_operational->ieee = val; 660 661 val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) == 662 DCBX_CONFIG_VERSION_CEE); 663 p_operational->cee = val; 664 665 val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) == 666 DCBX_CONFIG_VERSION_STATIC); 667 p_operational->local = val; 668 669 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 670 "Version support: ieee %d, cee %d, static %d\n", 671 p_operational->ieee, p_operational->cee, 672 p_operational->local); 673 674 ecore_dcbx_get_common_params(p_hwfn, &p_feat->app, 675 p_feat->app.app_pri_tbl, &p_feat->ets, 676 p_feat->pfc, ¶ms->operational.params, 677 p_operational->ieee); 678 ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio, 679 p_results); 680 err = GET_MFW_FIELD(p_feat->app.flags, DCBX_APP_ERROR); 681 p_operational->err = err; 682 p_operational->enabled = enabled; 683 p_operational->valid = true; 684 } 685 686 static void ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn, 687 struct ecore_dcbx_get *params) 688 { 689 struct lldp_config_params_s *p_local; 690 691 p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE]; 692 693 OSAL_MEMCPY(params->lldp_local.local_chassis_id, 694 p_local->local_chassis_id, 695 sizeof(params->lldp_local.local_chassis_id)); 696 OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id, 697 sizeof(params->lldp_local.local_port_id)); 698 } 699 700 static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn, 701 struct ecore_dcbx_get *params) 702 { 703 struct lldp_status_params_s *p_remote; 704 705 p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE]; 706 707 OSAL_MEMCPY(params->lldp_remote.peer_chassis_id, 708 p_remote->peer_chassis_id, 709 sizeof(params->lldp_remote.peer_chassis_id)); 710 OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id, 711 sizeof(params->lldp_remote.peer_port_id)); 712 } 713 714 static enum _ecore_status_t 715 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn, 716 struct ecore_dcbx_get *p_params, 717 enum ecore_mib_read_type type) 718 { 719 switch (type) { 720 case ECORE_DCBX_REMOTE_MIB: 721 ecore_dcbx_get_remote_params(p_hwfn, p_params); 722 break; 723 case ECORE_DCBX_LOCAL_MIB: 724 ecore_dcbx_get_local_params(p_hwfn, p_params); 725 break; 726 case ECORE_DCBX_OPERATIONAL_MIB: 727 ecore_dcbx_get_operational_params(p_hwfn, p_params); 728 break; 729 case ECORE_DCBX_REMOTE_LLDP_MIB: 730 ecore_dcbx_get_remote_lldp_params(p_hwfn, p_params); 731 break; 732 case ECORE_DCBX_LOCAL_LLDP_MIB: 733 ecore_dcbx_get_local_lldp_params(p_hwfn, p_params); 734 break; 735 default: 736 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 737 return ECORE_INVAL; 738 } 739 740 return ECORE_SUCCESS; 741 } 742 743 static enum _ecore_status_t 744 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn, 745 struct ecore_ptt *p_ptt) 746 { 747 struct ecore_dcbx_mib_meta_data data; 748 enum _ecore_status_t rc = ECORE_SUCCESS; 749 750 OSAL_MEM_ZERO(&data, sizeof(data)); 751 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 752 lldp_config_params); 753 data.lldp_local = p_hwfn->p_dcbx_info->lldp_local; 754 data.size = sizeof(struct lldp_config_params_s); 755 ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size); 756 757 return rc; 758 } 759 760 static enum _ecore_status_t 761 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn, 762 struct ecore_ptt *p_ptt, 763 enum ecore_mib_read_type type) 764 { 765 struct ecore_dcbx_mib_meta_data data; 766 enum _ecore_status_t rc = ECORE_SUCCESS; 767 768 OSAL_MEM_ZERO(&data, sizeof(data)); 769 data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port, 770 lldp_status_params); 771 data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote; 772 data.size = sizeof(struct lldp_status_params_s); 773 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 774 775 return rc; 776 } 777 778 static enum _ecore_status_t 779 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn, 780 struct ecore_ptt *p_ptt, 781 enum ecore_mib_read_type type) 782 { 783 struct ecore_dcbx_mib_meta_data data; 784 enum _ecore_status_t rc = ECORE_SUCCESS; 785 786 OSAL_MEM_ZERO(&data, sizeof(data)); 787 data.addr = p_hwfn->mcp_info->port_addr + 788 offsetof(struct public_port, operational_dcbx_mib); 789 data.mib = &p_hwfn->p_dcbx_info->operational; 790 data.size = sizeof(struct dcbx_mib); 791 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 792 793 return rc; 794 } 795 796 static enum _ecore_status_t 797 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn, 798 struct ecore_ptt *p_ptt, 799 enum ecore_mib_read_type type) 800 { 801 struct ecore_dcbx_mib_meta_data data; 802 enum _ecore_status_t rc = ECORE_SUCCESS; 803 804 OSAL_MEM_ZERO(&data, sizeof(data)); 805 data.addr = p_hwfn->mcp_info->port_addr + 806 offsetof(struct public_port, remote_dcbx_mib); 807 data.mib = &p_hwfn->p_dcbx_info->remote; 808 data.size = sizeof(struct dcbx_mib); 809 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type); 810 811 return rc; 812 } 813 814 static enum _ecore_status_t 815 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt) 816 { 817 struct ecore_dcbx_mib_meta_data data; 818 enum _ecore_status_t rc = ECORE_SUCCESS; 819 820 OSAL_MEM_ZERO(&data, sizeof(data)); 821 data.addr = p_hwfn->mcp_info->port_addr + 822 offsetof(struct public_port, local_admin_dcbx_mib); 823 data.local_admin = &p_hwfn->p_dcbx_info->local_admin; 824 data.size = sizeof(struct dcbx_local_params); 825 ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin, 826 data.addr, data.size); 827 828 return rc; 829 } 830 831 static void 832 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt) 833 { 834 struct ecore_dcbx_mib_meta_data data; 835 836 data.addr = p_hwfn->mcp_info->port_addr + 837 offsetof(struct public_port, dcb_dscp_map); 838 data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map; 839 data.size = sizeof(struct dcb_dscp_map); 840 ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size); 841 } 842 843 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn, 844 struct ecore_ptt *p_ptt, 845 enum ecore_mib_read_type type) 846 { 847 enum _ecore_status_t rc = ECORE_INVAL; 848 849 switch (type) { 850 case ECORE_DCBX_OPERATIONAL_MIB: 851 ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt); 852 rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type); 853 break; 854 case ECORE_DCBX_REMOTE_MIB: 855 rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type); 856 break; 857 case ECORE_DCBX_LOCAL_MIB: 858 rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt); 859 break; 860 case ECORE_DCBX_REMOTE_LLDP_MIB: 861 rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type); 862 break; 863 case ECORE_DCBX_LOCAL_LLDP_MIB: 864 rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt); 865 break; 866 default: 867 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type); 868 } 869 870 return ECORE_SUCCESS; 871 } 872 873 /* 874 * Read updated MIB. 875 * Reconfigure QM and invoke PF update ramrod command if operational MIB 876 * change is detected. 877 */ 878 enum _ecore_status_t 879 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 880 enum ecore_mib_read_type type) 881 { 882 enum _ecore_status_t rc = ECORE_SUCCESS; 883 884 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type); 885 if (rc) 886 return rc; 887 888 if (type == ECORE_DCBX_OPERATIONAL_MIB) { 889 ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get); 890 891 rc = ecore_dcbx_process_mib_info(p_hwfn, p_ptt); 892 if (!rc) { 893 /* reconfigure tcs of QM queues according 894 * to negotiation results 895 */ 896 ecore_qm_reconf(p_hwfn, p_ptt); 897 898 /* update storm FW with negotiation results */ 899 ecore_sp_pf_update_dcbx(p_hwfn); 900 } 901 } 902 903 ecore_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type); 904 905 /* Update the DSCP to TC mapping enable bit if required */ 906 if ((type == ECORE_DCBX_OPERATIONAL_MIB) && 907 p_hwfn->p_dcbx_info->dscp_nig_update) { 908 u8 val = !!p_hwfn->p_dcbx_info->get.dscp.enabled; 909 u32 addr = NIG_REG_DSCP_TO_TC_MAP_ENABLE; 910 911 rc = ecore_all_ppfids_wr(p_hwfn, p_ptt, addr, val); 912 if (rc != ECORE_SUCCESS) { 913 DP_NOTICE(p_hwfn, false, 914 "Failed to update the DSCP to TC mapping enable bit\n"); 915 return rc; 916 } 917 918 p_hwfn->p_dcbx_info->dscp_nig_update = false; 919 } 920 921 OSAL_DCBX_AEN(p_hwfn, type); 922 923 return rc; 924 } 925 926 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn) 927 { 928 p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, 929 sizeof(*p_hwfn->p_dcbx_info)); 930 if (!p_hwfn->p_dcbx_info) { 931 DP_NOTICE(p_hwfn, false, 932 "Failed to allocate `struct ecore_dcbx_info'"); 933 return ECORE_NOMEM; 934 } 935 936 p_hwfn->p_dcbx_info->iwarp_port = 937 p_hwfn->pf_params.rdma_pf_params.iwarp_port; 938 939 return ECORE_SUCCESS; 940 } 941 942 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn) 943 { 944 OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info); 945 } 946 947 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data, 948 struct ecore_dcbx_results *p_src, 949 enum dcbx_protocol_type type) 950 { 951 p_data->dcb_enable_flag = p_src->arr[type].enable; 952 p_data->dcb_priority = p_src->arr[type].priority; 953 p_data->dcb_tc = p_src->arr[type].tc; 954 p_data->dscp_enable_flag = p_src->arr[type].dscp_enable; 955 p_data->dscp_val = p_src->arr[type].dscp_val; 956 p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0; 957 } 958 959 /* Set pf update ramrod command params */ 960 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src, 961 struct pf_update_ramrod_data *p_dest) 962 { 963 struct protocol_dcb_data *p_dcb_data; 964 u8 update_flag; 965 966 update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update; 967 p_dest->update_eth_dcb_data_mode = update_flag; 968 update_flag = p_src->arr[DCBX_PROTOCOL_IWARP].update; 969 p_dest->update_iwarp_dcb_data_mode = update_flag; 970 971 p_dcb_data = &p_dest->eth_dcb_data; 972 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH); 973 p_dcb_data = &p_dest->iwarp_dcb_data; 974 ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_IWARP); 975 } 976 977 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn, 978 struct ecore_dcbx_get *p_get, 979 enum ecore_mib_read_type type) 980 { 981 struct ecore_ptt *p_ptt; 982 enum _ecore_status_t rc; 983 984 if (IS_VF(p_hwfn->p_dev)) 985 return ECORE_INVAL; 986 987 p_ptt = ecore_ptt_acquire(p_hwfn); 988 if (!p_ptt) 989 return ECORE_TIMEOUT; 990 991 rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type); 992 if (rc != ECORE_SUCCESS) 993 goto out; 994 995 ecore_dcbx_get_dscp_params(p_hwfn, p_get); 996 997 rc = ecore_dcbx_get_params(p_hwfn, p_get, type); 998 999 out: 1000 ecore_ptt_release(p_hwfn, p_ptt); 1001 return rc; 1002 } 1003 1004 static void 1005 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn, 1006 u32 *pfc, struct ecore_dcbx_params *p_params) 1007 { 1008 u8 pfc_map = 0; 1009 int i; 1010 1011 if (p_params->pfc.willing) 1012 *pfc |= DCBX_PFC_WILLING_MASK; 1013 else 1014 *pfc &= ~DCBX_PFC_WILLING_MASK; 1015 1016 if (p_params->pfc.enabled) 1017 *pfc |= DCBX_PFC_ENABLED_MASK; 1018 else 1019 *pfc &= ~DCBX_PFC_ENABLED_MASK; 1020 1021 *pfc &= ~DCBX_PFC_CAPS_MASK; 1022 *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_OFFSET; 1023 1024 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) 1025 if (p_params->pfc.prio[i]) 1026 pfc_map |= (1 << i); 1027 *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK; 1028 *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_OFFSET); 1029 1030 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc); 1031 } 1032 1033 static void 1034 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn, 1035 struct dcbx_ets_feature *p_ets, 1036 struct ecore_dcbx_params *p_params) 1037 { 1038 u8 *bw_map, *tsa_map; 1039 u32 val; 1040 int i; 1041 1042 if (p_params->ets_willing) 1043 p_ets->flags |= DCBX_ETS_WILLING_MASK; 1044 else 1045 p_ets->flags &= ~DCBX_ETS_WILLING_MASK; 1046 1047 if (p_params->ets_cbs) 1048 p_ets->flags |= DCBX_ETS_CBS_MASK; 1049 else 1050 p_ets->flags &= ~DCBX_ETS_CBS_MASK; 1051 1052 if (p_params->ets_enabled) 1053 p_ets->flags |= DCBX_ETS_ENABLED_MASK; 1054 else 1055 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK; 1056 1057 p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK; 1058 p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_OFFSET; 1059 1060 bw_map = (u8 *)&p_ets->tc_bw_tbl[0]; 1061 tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0]; 1062 p_ets->pri_tc_tbl[0] = 0; 1063 for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) { 1064 bw_map[i] = p_params->ets_tc_bw_tbl[i]; 1065 tsa_map[i] = p_params->ets_tc_tsa_tbl[i]; 1066 /* Copy the priority value to the corresponding 4 bits in the 1067 * traffic class table. 1068 */ 1069 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4)); 1070 p_ets->pri_tc_tbl[0] |= val; 1071 } 1072 for (i = 0; i < 2; i++) { 1073 p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]); 1074 p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]); 1075 } 1076 1077 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 1078 "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n", 1079 p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0], 1080 p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0], 1081 p_ets->tc_tsa_tbl[1]); 1082 } 1083 1084 static void 1085 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn, 1086 struct dcbx_app_priority_feature *p_app, 1087 struct ecore_dcbx_params *p_params, bool ieee) 1088 { 1089 u32 *entry; 1090 int i; 1091 1092 if (p_params->app_willing) 1093 p_app->flags |= DCBX_APP_WILLING_MASK; 1094 else 1095 p_app->flags &= ~DCBX_APP_WILLING_MASK; 1096 1097 if (p_params->app_valid) 1098 p_app->flags |= DCBX_APP_ENABLED_MASK; 1099 else 1100 p_app->flags &= ~DCBX_APP_ENABLED_MASK; 1101 1102 p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK; 1103 p_app->flags |= (u32)p_params->num_app_entries << 1104 DCBX_APP_NUM_ENTRIES_OFFSET; 1105 1106 for (i = 0; i < p_params->num_app_entries; i++) { 1107 entry = &p_app->app_pri_tbl[i].entry; 1108 *entry = 0; 1109 if (ieee) { 1110 *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK); 1111 switch (p_params->app_entry[i].sf_ieee) { 1112 case ECORE_DCBX_SF_IEEE_ETHTYPE: 1113 *entry |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE << 1114 DCBX_APP_SF_IEEE_OFFSET); 1115 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1116 DCBX_APP_SF_OFFSET); 1117 break; 1118 case ECORE_DCBX_SF_IEEE_TCP_PORT: 1119 *entry |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT << 1120 DCBX_APP_SF_IEEE_OFFSET); 1121 *entry |= ((u32)DCBX_APP_SF_PORT << 1122 DCBX_APP_SF_OFFSET); 1123 break; 1124 case ECORE_DCBX_SF_IEEE_UDP_PORT: 1125 *entry |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT << 1126 DCBX_APP_SF_IEEE_OFFSET); 1127 *entry |= ((u32)DCBX_APP_SF_PORT << 1128 DCBX_APP_SF_OFFSET); 1129 break; 1130 case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT: 1131 *entry |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT << 1132 DCBX_APP_SF_IEEE_OFFSET; 1133 *entry |= ((u32)DCBX_APP_SF_PORT << 1134 DCBX_APP_SF_OFFSET); 1135 break; 1136 } 1137 } else { 1138 *entry &= ~DCBX_APP_SF_MASK; 1139 if (p_params->app_entry[i].ethtype) 1140 *entry |= ((u32)DCBX_APP_SF_ETHTYPE << 1141 DCBX_APP_SF_OFFSET); 1142 else 1143 *entry |= ((u32)DCBX_APP_SF_PORT << 1144 DCBX_APP_SF_OFFSET); 1145 } 1146 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK; 1147 *entry |= ((u32)p_params->app_entry[i].proto_id << 1148 DCBX_APP_PROTOCOL_ID_OFFSET); 1149 *entry &= ~DCBX_APP_PRI_MAP_MASK; 1150 *entry |= ((u32)(p_params->app_entry[i].prio) << 1151 DCBX_APP_PRI_MAP_OFFSET); 1152 } 1153 1154 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags); 1155 } 1156 1157 static void 1158 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn, 1159 struct dcbx_local_params *local_admin, 1160 struct ecore_dcbx_set *params) 1161 { 1162 bool ieee = false; 1163 1164 local_admin->flags = 0; 1165 OSAL_MEMCPY(&local_admin->features, 1166 &p_hwfn->p_dcbx_info->operational.features, 1167 sizeof(local_admin->features)); 1168 1169 if (params->enabled) { 1170 local_admin->config = params->ver_num; 1171 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE); 1172 } else { 1173 local_admin->config = DCBX_CONFIG_VERSION_DISABLED; 1174 } 1175 1176 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx version = %d\n", 1177 local_admin->config); 1178 1179 if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG) 1180 ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc, 1181 ¶ms->config.params); 1182 1183 if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG) 1184 ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets, 1185 ¶ms->config.params); 1186 1187 if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG) 1188 ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app, 1189 ¶ms->config.params, ieee); 1190 } 1191 1192 static enum _ecore_status_t 1193 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn, 1194 struct dcb_dscp_map *p_dscp_map, 1195 struct ecore_dcbx_set *p_params) 1196 { 1197 int entry, i, j; 1198 u32 val; 1199 1200 OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map, 1201 sizeof(*p_dscp_map)); 1202 1203 p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK; 1204 if (p_params->dscp.enabled) 1205 p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK; 1206 1207 for (i = 0, entry = 0; i < 8; i++) { 1208 val = 0; 1209 for (j = 0; j < 8; j++, entry++) 1210 val |= (((u32)p_params->dscp.dscp_pri_map[entry]) << 1211 (j * 4)); 1212 1213 p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val); 1214 } 1215 1216 p_hwfn->p_dcbx_info->dscp_nig_update = true; 1217 1218 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags); 1219 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, 1220 "pri_map[] = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", 1221 p_dscp_map->dscp_pri_map[0], p_dscp_map->dscp_pri_map[1], 1222 p_dscp_map->dscp_pri_map[2], p_dscp_map->dscp_pri_map[3], 1223 p_dscp_map->dscp_pri_map[4], p_dscp_map->dscp_pri_map[5], 1224 p_dscp_map->dscp_pri_map[6], p_dscp_map->dscp_pri_map[7]); 1225 1226 return ECORE_SUCCESS; 1227 } 1228 1229 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn, 1230 struct ecore_ptt *p_ptt, 1231 struct ecore_dcbx_set *params, 1232 bool hw_commit) 1233 { 1234 struct dcbx_local_params local_admin; 1235 struct ecore_dcbx_mib_meta_data data; 1236 struct dcb_dscp_map dscp_map; 1237 u32 resp = 0, param = 0; 1238 enum _ecore_status_t rc = ECORE_SUCCESS; 1239 1240 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params, 1241 sizeof(p_hwfn->p_dcbx_info->set)); 1242 if (!hw_commit) 1243 return ECORE_SUCCESS; 1244 1245 OSAL_MEMSET(&local_admin, 0, sizeof(local_admin)); 1246 ecore_dcbx_set_local_params(p_hwfn, &local_admin, params); 1247 1248 data.addr = p_hwfn->mcp_info->port_addr + 1249 offsetof(struct public_port, local_admin_dcbx_mib); 1250 data.local_admin = &local_admin; 1251 data.size = sizeof(struct dcbx_local_params); 1252 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size); 1253 1254 if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) { 1255 OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map)); 1256 ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params); 1257 1258 data.addr = p_hwfn->mcp_info->port_addr + 1259 offsetof(struct public_port, dcb_dscp_map); 1260 data.dscp_map = &dscp_map; 1261 data.size = sizeof(struct dcb_dscp_map); 1262 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map, 1263 data.size); 1264 } 1265 1266 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX, 1267 1 << DRV_MB_PARAM_LLDP_SEND_OFFSET, &resp, ¶m); 1268 if (rc != ECORE_SUCCESS) 1269 DP_NOTICE(p_hwfn, false, 1270 "Failed to send DCBX update request\n"); 1271 1272 return rc; 1273 } 1274 1275 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn, 1276 struct ecore_dcbx_set *params) 1277 { 1278 struct ecore_dcbx_get *dcbx_info; 1279 int rc; 1280 1281 if (p_hwfn->p_dcbx_info->set.config.valid) { 1282 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set, 1283 sizeof(struct ecore_dcbx_set)); 1284 return ECORE_SUCCESS; 1285 } 1286 1287 dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL, 1288 sizeof(*dcbx_info)); 1289 if (!dcbx_info) 1290 return ECORE_NOMEM; 1291 1292 OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info)); 1293 rc = ecore_dcbx_query_params(p_hwfn, dcbx_info, 1294 ECORE_DCBX_OPERATIONAL_MIB); 1295 if (rc) { 1296 OSAL_FREE(p_hwfn->p_dev, dcbx_info); 1297 return rc; 1298 } 1299 p_hwfn->p_dcbx_info->set.override_flags = 0; 1300 1301 p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED; 1302 if (dcbx_info->operational.cee) 1303 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE; 1304 if (dcbx_info->operational.ieee) 1305 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE; 1306 if (dcbx_info->operational.local) 1307 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC; 1308 1309 p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled; 1310 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.dscp, 1311 &p_hwfn->p_dcbx_info->get.dscp, 1312 sizeof(struct ecore_dcbx_dscp_params)); 1313 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params, 1314 &dcbx_info->operational.params, 1315 sizeof(p_hwfn->p_dcbx_info->set.config.params)); 1316 p_hwfn->p_dcbx_info->set.config.valid = true; 1317 1318 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set, 1319 sizeof(struct ecore_dcbx_set)); 1320 1321 OSAL_FREE(p_hwfn->p_dev, dcbx_info); 1322 1323 return ECORE_SUCCESS; 1324 } 1325 1326 enum _ecore_status_t ecore_lldp_register_tlv(struct ecore_hwfn *p_hwfn, 1327 struct ecore_ptt *p_ptt, 1328 enum ecore_lldp_agent agent, 1329 u8 tlv_type) 1330 { 1331 u32 mb_param = 0, mcp_resp = 0, mcp_param = 0, val = 0; 1332 enum _ecore_status_t rc = ECORE_SUCCESS; 1333 1334 switch (agent) { 1335 case ECORE_LLDP_NEAREST_BRIDGE: 1336 val = LLDP_NEAREST_BRIDGE; 1337 break; 1338 case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE: 1339 val = LLDP_NEAREST_NON_TPMR_BRIDGE; 1340 break; 1341 case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE: 1342 val = LLDP_NEAREST_CUSTOMER_BRIDGE; 1343 break; 1344 default: 1345 DP_ERR(p_hwfn, "Invalid agent type %d\n", agent); 1346 return ECORE_INVAL; 1347 } 1348 1349 SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val); 1350 SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_TLV_RX_TYPE, tlv_type); 1351 1352 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_REGISTER_LLDP_TLVS_RX, 1353 mb_param, &mcp_resp, &mcp_param); 1354 if (rc != ECORE_SUCCESS) 1355 DP_NOTICE(p_hwfn, false, "Failed to register TLV\n"); 1356 1357 return rc; 1358 } 1359 1360 enum _ecore_status_t 1361 ecore_lldp_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt) 1362 { 1363 struct ecore_dcbx_mib_meta_data data; 1364 enum _ecore_status_t rc = ECORE_SUCCESS; 1365 struct lldp_received_tlvs_s tlvs; 1366 int i; 1367 1368 for (i = 0; i < LLDP_MAX_LLDP_AGENTS; i++) { 1369 OSAL_MEM_ZERO(&data, sizeof(data)); 1370 data.addr = p_hwfn->mcp_info->port_addr + 1371 offsetof(struct public_port, lldp_received_tlvs[i]); 1372 data.lldp_tlvs = &tlvs; 1373 data.size = sizeof(tlvs); 1374 rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, 1375 ECORE_DCBX_LLDP_TLVS); 1376 if (rc != ECORE_SUCCESS) { 1377 DP_NOTICE(p_hwfn, false, "Failed to read lldp TLVs\n"); 1378 return rc; 1379 } 1380 1381 if (!tlvs.length) 1382 continue; 1383 1384 for (i = 0; i < MAX_TLV_BUFFER; i++) 1385 tlvs.tlvs_buffer[i] = 1386 OSAL_CPU_TO_BE32(tlvs.tlvs_buffer[i]); 1387 1388 OSAL_LLDP_RX_TLVS(p_hwfn, tlvs.tlvs_buffer, tlvs.length); 1389 } 1390 1391 return rc; 1392 } 1393 1394 enum _ecore_status_t 1395 ecore_lldp_get_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1396 struct ecore_lldp_config_params *p_params) 1397 { 1398 struct lldp_config_params_s lldp_params; 1399 u32 addr, val; 1400 int i; 1401 1402 switch (p_params->agent) { 1403 case ECORE_LLDP_NEAREST_BRIDGE: 1404 val = LLDP_NEAREST_BRIDGE; 1405 break; 1406 case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE: 1407 val = LLDP_NEAREST_NON_TPMR_BRIDGE; 1408 break; 1409 case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE: 1410 val = LLDP_NEAREST_CUSTOMER_BRIDGE; 1411 break; 1412 default: 1413 DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent); 1414 return ECORE_INVAL; 1415 } 1416 1417 addr = p_hwfn->mcp_info->port_addr + 1418 offsetof(struct public_port, lldp_config_params[val]); 1419 1420 ecore_memcpy_from(p_hwfn, p_ptt, &lldp_params, addr, 1421 sizeof(lldp_params)); 1422 1423 p_params->tx_interval = GET_MFW_FIELD(lldp_params.config, 1424 LLDP_CONFIG_TX_INTERVAL); 1425 p_params->tx_hold = GET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_HOLD); 1426 p_params->tx_credit = GET_MFW_FIELD(lldp_params.config, 1427 LLDP_CONFIG_MAX_CREDIT); 1428 p_params->rx_enable = GET_MFW_FIELD(lldp_params.config, 1429 LLDP_CONFIG_ENABLE_RX); 1430 p_params->tx_enable = GET_MFW_FIELD(lldp_params.config, 1431 LLDP_CONFIG_ENABLE_TX); 1432 1433 OSAL_MEMCPY(p_params->chassis_id_tlv, lldp_params.local_chassis_id, 1434 sizeof(p_params->chassis_id_tlv)); 1435 for (i = 0; i < ECORE_LLDP_CHASSIS_ID_STAT_LEN; i++) 1436 p_params->chassis_id_tlv[i] = 1437 OSAL_BE32_TO_CPU(p_params->chassis_id_tlv[i]); 1438 1439 OSAL_MEMCPY(p_params->port_id_tlv, lldp_params.local_port_id, 1440 sizeof(p_params->port_id_tlv)); 1441 for (i = 0; i < ECORE_LLDP_PORT_ID_STAT_LEN; i++) 1442 p_params->port_id_tlv[i] = 1443 OSAL_BE32_TO_CPU(p_params->port_id_tlv[i]); 1444 1445 return ECORE_SUCCESS; 1446 } 1447 1448 enum _ecore_status_t 1449 ecore_lldp_set_params(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1450 struct ecore_lldp_config_params *p_params) 1451 { 1452 u32 mb_param = 0, mcp_resp = 0, mcp_param = 0; 1453 struct lldp_config_params_s lldp_params; 1454 enum _ecore_status_t rc = ECORE_SUCCESS; 1455 u32 addr, val; 1456 int i; 1457 1458 switch (p_params->agent) { 1459 case ECORE_LLDP_NEAREST_BRIDGE: 1460 val = LLDP_NEAREST_BRIDGE; 1461 break; 1462 case ECORE_LLDP_NEAREST_NON_TPMR_BRIDGE: 1463 val = LLDP_NEAREST_NON_TPMR_BRIDGE; 1464 break; 1465 case ECORE_LLDP_NEAREST_CUSTOMER_BRIDGE: 1466 val = LLDP_NEAREST_CUSTOMER_BRIDGE; 1467 break; 1468 default: 1469 DP_ERR(p_hwfn, "Invalid agent type %d\n", p_params->agent); 1470 return ECORE_INVAL; 1471 } 1472 1473 SET_MFW_FIELD(mb_param, DRV_MB_PARAM_LLDP_AGENT, val); 1474 addr = p_hwfn->mcp_info->port_addr + 1475 offsetof(struct public_port, lldp_config_params[val]); 1476 1477 OSAL_MEMSET(&lldp_params, 0, sizeof(lldp_params)); 1478 SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_TX_INTERVAL, 1479 p_params->tx_interval); 1480 SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_HOLD, p_params->tx_hold); 1481 SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_MAX_CREDIT, 1482 p_params->tx_credit); 1483 SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_ENABLE_RX, 1484 !!p_params->rx_enable); 1485 SET_MFW_FIELD(lldp_params.config, LLDP_CONFIG_ENABLE_TX, 1486 !!p_params->tx_enable); 1487 1488 for (i = 0; i < ECORE_LLDP_CHASSIS_ID_STAT_LEN; i++) 1489 p_params->chassis_id_tlv[i] = 1490 OSAL_CPU_TO_BE32(p_params->chassis_id_tlv[i]); 1491 OSAL_MEMCPY(lldp_params.local_chassis_id, p_params->chassis_id_tlv, 1492 sizeof(lldp_params.local_chassis_id)); 1493 1494 for (i = 0; i < ECORE_LLDP_PORT_ID_STAT_LEN; i++) 1495 p_params->port_id_tlv[i] = 1496 OSAL_CPU_TO_BE32(p_params->port_id_tlv[i]); 1497 OSAL_MEMCPY(lldp_params.local_port_id, p_params->port_id_tlv, 1498 sizeof(lldp_params.local_port_id)); 1499 1500 ecore_memcpy_to(p_hwfn, p_ptt, addr, &lldp_params, sizeof(lldp_params)); 1501 1502 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LLDP, 1503 mb_param, &mcp_resp, &mcp_param); 1504 if (rc != ECORE_SUCCESS) 1505 DP_NOTICE(p_hwfn, false, "SET_LLDP failed, error = %d\n", rc); 1506 1507 return rc; 1508 } 1509 1510 enum _ecore_status_t 1511 ecore_lldp_set_system_tlvs(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1512 struct ecore_lldp_sys_tlvs *p_params) 1513 { 1514 u32 mb_param = 0, mcp_resp = 0, mcp_param = 0; 1515 enum _ecore_status_t rc = ECORE_SUCCESS; 1516 struct lldp_system_tlvs_buffer_s lld_tlv_buf; 1517 u32 addr, *p_val; 1518 u8 len; 1519 int i; 1520 1521 p_val = (u32 *)p_params->buf; 1522 for (i = 0; i < ECORE_LLDP_SYS_TLV_SIZE / 4; i++) 1523 p_val[i] = OSAL_CPU_TO_BE32(p_val[i]); 1524 1525 OSAL_MEMSET(&lld_tlv_buf, 0, sizeof(lld_tlv_buf)); 1526 SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_VALID, 1); 1527 SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_MANDATORY, 1528 !!p_params->discard_mandatory_tlv); 1529 SET_MFW_FIELD(lld_tlv_buf.flags, LLDP_SYSTEM_TLV_LENGTH, 1530 p_params->buf_size); 1531 len = ECORE_LLDP_SYS_TLV_SIZE / 2; 1532 OSAL_MEMCPY(lld_tlv_buf.data, p_params->buf, len); 1533 1534 addr = p_hwfn->mcp_info->port_addr + 1535 offsetof(struct public_port, system_lldp_tlvs_buf); 1536 ecore_memcpy_to(p_hwfn, p_ptt, addr, &lld_tlv_buf, sizeof(lld_tlv_buf)); 1537 1538 if (p_params->buf_size > len) { 1539 addr = p_hwfn->mcp_info->port_addr + 1540 offsetof(struct public_port, system_lldp_tlvs_buf2); 1541 ecore_memcpy_to(p_hwfn, p_ptt, addr, &p_params->buf[len], 1542 ECORE_LLDP_SYS_TLV_SIZE / 2); 1543 } 1544 1545 rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LLDP, 1546 mb_param, &mcp_resp, &mcp_param); 1547 if (rc != ECORE_SUCCESS) 1548 DP_NOTICE(p_hwfn, false, "SET_LLDP failed, error = %d\n", rc); 1549 1550 return rc; 1551 } 1552 1553 enum _ecore_status_t 1554 ecore_dcbx_get_dscp_priority(struct ecore_hwfn *p_hwfn, 1555 u8 dscp_index, u8 *p_dscp_pri) 1556 { 1557 struct ecore_dcbx_get *p_dcbx_info; 1558 enum _ecore_status_t rc; 1559 1560 if (dscp_index >= ECORE_DCBX_DSCP_SIZE) { 1561 DP_ERR(p_hwfn, "Invalid dscp index %d\n", dscp_index); 1562 return ECORE_INVAL; 1563 } 1564 1565 p_dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL, 1566 sizeof(*p_dcbx_info)); 1567 if (!p_dcbx_info) 1568 return ECORE_NOMEM; 1569 1570 OSAL_MEMSET(p_dcbx_info, 0, sizeof(*p_dcbx_info)); 1571 rc = ecore_dcbx_query_params(p_hwfn, p_dcbx_info, 1572 ECORE_DCBX_OPERATIONAL_MIB); 1573 if (rc) { 1574 OSAL_FREE(p_hwfn->p_dev, p_dcbx_info); 1575 return rc; 1576 } 1577 1578 *p_dscp_pri = p_dcbx_info->dscp.dscp_pri_map[dscp_index]; 1579 OSAL_FREE(p_hwfn->p_dev, p_dcbx_info); 1580 1581 return ECORE_SUCCESS; 1582 } 1583 1584 enum _ecore_status_t 1585 ecore_dcbx_set_dscp_priority(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, 1586 u8 dscp_index, u8 pri_val) 1587 { 1588 struct ecore_dcbx_set dcbx_set; 1589 enum _ecore_status_t rc; 1590 1591 if (dscp_index >= ECORE_DCBX_DSCP_SIZE || 1592 pri_val >= ECORE_MAX_PFC_PRIORITIES) { 1593 DP_ERR(p_hwfn, "Invalid dscp params: index = %d pri = %d\n", 1594 dscp_index, pri_val); 1595 return ECORE_INVAL; 1596 } 1597 1598 OSAL_MEMSET(&dcbx_set, 0, sizeof(dcbx_set)); 1599 rc = ecore_dcbx_get_config_params(p_hwfn, &dcbx_set); 1600 if (rc) 1601 return rc; 1602 1603 dcbx_set.override_flags = ECORE_DCBX_OVERRIDE_DSCP_CFG; 1604 dcbx_set.dscp.dscp_pri_map[dscp_index] = pri_val; 1605 1606 return ecore_dcbx_config_params(p_hwfn, p_ptt, &dcbx_set, 1); 1607 } 1608