1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct octeontx_vdev_init_params { 28 uint8_t nr_port; 29 }; 30 31 uint16_t 32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 33 34 enum octeontx_link_speed { 35 OCTEONTX_LINK_SPEED_SGMII, 36 OCTEONTX_LINK_SPEED_XAUI, 37 OCTEONTX_LINK_SPEED_RXAUI, 38 OCTEONTX_LINK_SPEED_10G_R, 39 OCTEONTX_LINK_SPEED_40G_R, 40 OCTEONTX_LINK_SPEED_RESERVE1, 41 OCTEONTX_LINK_SPEED_QSGMII, 42 OCTEONTX_LINK_SPEED_RESERVE2 43 }; 44 45 int otx_net_logtype_mbox; 46 int otx_net_logtype_init; 47 int otx_net_logtype_driver; 48 49 RTE_INIT(otx_net_init_log); 50 static void 51 otx_net_init_log(void) 52 { 53 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 54 if (otx_net_logtype_mbox >= 0) 55 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 56 57 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 58 if (otx_net_logtype_init >= 0) 59 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 60 61 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 62 if (otx_net_logtype_driver >= 0) 63 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 64 } 65 66 /* Parse integer from integer argument */ 67 static int 68 parse_integer_arg(const char *key __rte_unused, 69 const char *value, void *extra_args) 70 { 71 int *i = (int *)extra_args; 72 73 *i = atoi(value); 74 if (*i < 0) { 75 octeontx_log_err("argument has to be positive."); 76 return -1; 77 } 78 79 return 0; 80 } 81 82 static int 83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 84 struct rte_vdev_device *dev) 85 { 86 struct rte_kvargs *kvlist = NULL; 87 int ret = 0; 88 89 static const char * const octeontx_vdev_valid_params[] = { 90 OCTEONTX_VDEV_NR_PORT_ARG, 91 NULL 92 }; 93 94 const char *input_args = rte_vdev_device_args(dev); 95 if (params == NULL) 96 return -EINVAL; 97 98 99 if (input_args) { 100 kvlist = rte_kvargs_parse(input_args, 101 octeontx_vdev_valid_params); 102 if (kvlist == NULL) 103 return -1; 104 105 ret = rte_kvargs_process(kvlist, 106 OCTEONTX_VDEV_NR_PORT_ARG, 107 &parse_integer_arg, 108 ¶ms->nr_port); 109 if (ret < 0) 110 goto free_kvlist; 111 } 112 113 free_kvlist: 114 rte_kvargs_free(kvlist); 115 return ret; 116 } 117 118 static int 119 octeontx_port_open(struct octeontx_nic *nic) 120 { 121 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 122 int res; 123 124 res = 0; 125 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 126 PMD_INIT_FUNC_TRACE(); 127 128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 129 if (res < 0) { 130 octeontx_log_err("failed to open port %d", res); 131 return res; 132 } 133 134 nic->node = bgx_port_conf.node; 135 nic->port_ena = bgx_port_conf.enable; 136 nic->base_ichan = bgx_port_conf.base_chan; 137 nic->base_ochan = bgx_port_conf.base_chan; 138 nic->num_ichans = bgx_port_conf.num_chans; 139 nic->num_ochans = bgx_port_conf.num_chans; 140 nic->mtu = bgx_port_conf.mtu; 141 nic->bpen = bgx_port_conf.bpen; 142 nic->fcs_strip = bgx_port_conf.fcs_strip; 143 nic->bcast_mode = bgx_port_conf.bcast_mode; 144 nic->mcast_mode = bgx_port_conf.mcast_mode; 145 nic->speed = bgx_port_conf.mode; 146 147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_port_close(struct octeontx_nic *nic) 155 { 156 PMD_INIT_FUNC_TRACE(); 157 158 octeontx_bgx_port_close(nic->port_id); 159 octeontx_log_dbg("port closed %d", nic->port_id); 160 } 161 162 static int 163 octeontx_port_start(struct octeontx_nic *nic) 164 { 165 PMD_INIT_FUNC_TRACE(); 166 167 return octeontx_bgx_port_start(nic->port_id); 168 } 169 170 static int 171 octeontx_port_stop(struct octeontx_nic *nic) 172 { 173 PMD_INIT_FUNC_TRACE(); 174 175 return octeontx_bgx_port_stop(nic->port_id); 176 } 177 178 static void 179 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 180 { 181 struct rte_eth_dev *dev; 182 int res; 183 184 res = 0; 185 PMD_INIT_FUNC_TRACE(); 186 dev = nic->dev; 187 188 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 189 if (res < 0) 190 octeontx_log_err("failed to set promiscuous mode %d", 191 nic->port_id); 192 193 /* Set proper flag for the mode */ 194 dev->data->promiscuous = (en != 0) ? 1 : 0; 195 196 octeontx_log_dbg("port %d : promiscuous mode %s", 197 nic->port_id, en ? "set" : "unset"); 198 } 199 200 static int 201 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 202 { 203 octeontx_mbox_bgx_port_stats_t bgx_stats; 204 int res; 205 206 PMD_INIT_FUNC_TRACE(); 207 208 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 209 if (res < 0) { 210 octeontx_log_err("failed to get port stats %d", nic->port_id); 211 return res; 212 } 213 214 stats->ipackets = bgx_stats.rx_packets; 215 stats->ibytes = bgx_stats.rx_bytes; 216 stats->imissed = bgx_stats.rx_dropped; 217 stats->ierrors = bgx_stats.rx_errors; 218 stats->opackets = bgx_stats.tx_packets; 219 stats->obytes = bgx_stats.tx_bytes; 220 stats->oerrors = bgx_stats.tx_errors; 221 222 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 223 nic->port_id, stats->ipackets, stats->opackets); 224 225 return 0; 226 } 227 228 static void 229 octeontx_port_stats_clr(struct octeontx_nic *nic) 230 { 231 PMD_INIT_FUNC_TRACE(); 232 233 octeontx_bgx_port_stats_clr(nic->port_id); 234 } 235 236 static inline void 237 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 238 struct rte_event_dev_info *info) 239 { 240 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 241 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 242 243 dev_conf->nb_event_ports = info->max_event_ports; 244 dev_conf->nb_event_queues = info->max_event_queues; 245 246 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 247 dev_conf->nb_event_port_dequeue_depth = 248 info->max_event_port_dequeue_depth; 249 dev_conf->nb_event_port_enqueue_depth = 250 info->max_event_port_enqueue_depth; 251 dev_conf->nb_event_port_enqueue_depth = 252 info->max_event_port_enqueue_depth; 253 dev_conf->nb_events_limit = 254 info->max_num_events; 255 } 256 257 static int 258 octeontx_dev_configure(struct rte_eth_dev *dev) 259 { 260 struct rte_eth_dev_data *data = dev->data; 261 struct rte_eth_conf *conf = &data->dev_conf; 262 struct rte_eth_rxmode *rxmode = &conf->rxmode; 263 struct rte_eth_txmode *txmode = &conf->txmode; 264 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 265 int ret; 266 267 PMD_INIT_FUNC_TRACE(); 268 RTE_SET_USED(conf); 269 270 if (!rte_eal_has_hugepages()) { 271 octeontx_log_err("huge page is not configured"); 272 return -EINVAL; 273 } 274 275 if (txmode->mq_mode) { 276 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 277 return -EINVAL; 278 } 279 280 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 281 rxmode->mq_mode != ETH_MQ_RX_RSS) { 282 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 283 return -EINVAL; 284 } 285 286 if (!rxmode->hw_strip_crc) { 287 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); 288 rxmode->hw_strip_crc = 1; 289 } 290 291 if (rxmode->hw_ip_checksum) { 292 PMD_INIT_LOG(NOTICE, "rxcksum not supported"); 293 rxmode->hw_ip_checksum = 0; 294 } 295 296 if (rxmode->split_hdr_size) { 297 octeontx_log_err("rxmode does not support split header"); 298 return -EINVAL; 299 } 300 301 if (rxmode->hw_vlan_filter) { 302 octeontx_log_err("VLAN filter not supported"); 303 return -EINVAL; 304 } 305 306 if (rxmode->hw_vlan_extend) { 307 octeontx_log_err("VLAN extended not supported"); 308 return -EINVAL; 309 } 310 311 if (rxmode->enable_lro) { 312 octeontx_log_err("LRO not supported"); 313 return -EINVAL; 314 } 315 316 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 317 octeontx_log_err("setting link speed/duplex not supported"); 318 return -EINVAL; 319 } 320 321 if (conf->dcb_capability_en) { 322 octeontx_log_err("DCB enable not supported"); 323 return -EINVAL; 324 } 325 326 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 327 octeontx_log_err("flow director not supported"); 328 return -EINVAL; 329 } 330 331 nic->num_tx_queues = dev->data->nb_tx_queues; 332 333 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ, 334 nic->num_tx_queues, 335 nic->base_ochan); 336 if (ret) { 337 octeontx_log_err("failed to open channel %d no-of-txq %d", 338 nic->base_ochan, nic->num_tx_queues); 339 return -EFAULT; 340 } 341 342 nic->pki.classifier_enable = false; 343 nic->pki.hash_enable = true; 344 nic->pki.initialized = false; 345 346 return 0; 347 } 348 349 static void 350 octeontx_dev_close(struct rte_eth_dev *dev) 351 { 352 struct octeontx_txq *txq = NULL; 353 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 354 unsigned int i; 355 int ret; 356 357 PMD_INIT_FUNC_TRACE(); 358 359 rte_event_dev_close(nic->evdev); 360 361 ret = octeontx_pko_channel_close(nic->base_ochan); 362 if (ret < 0) { 363 octeontx_log_err("failed to close channel %d VF%d %d %d", 364 nic->base_ochan, nic->port_id, nic->num_tx_queues, 365 ret); 366 } 367 /* Free txq resources for this port */ 368 for (i = 0; i < nic->num_tx_queues; i++) { 369 txq = dev->data->tx_queues[i]; 370 if (!txq) 371 continue; 372 373 rte_free(txq); 374 } 375 } 376 377 static int 378 octeontx_dev_start(struct rte_eth_dev *dev) 379 { 380 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 381 int ret; 382 383 ret = 0; 384 385 PMD_INIT_FUNC_TRACE(); 386 /* 387 * Tx start 388 */ 389 dev->tx_pkt_burst = octeontx_xmit_pkts; 390 ret = octeontx_pko_channel_start(nic->base_ochan); 391 if (ret < 0) { 392 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 393 nic->port_id, nic->num_tx_queues, nic->base_ochan, 394 ret); 395 goto error; 396 } 397 398 /* 399 * Rx start 400 */ 401 dev->rx_pkt_burst = octeontx_recv_pkts; 402 ret = octeontx_pki_port_start(nic->port_id); 403 if (ret < 0) { 404 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 405 goto channel_stop_error; 406 } 407 408 /* 409 * Start port 410 */ 411 ret = octeontx_port_start(nic); 412 if (ret < 0) { 413 octeontx_log_err("failed start port %d", ret); 414 goto pki_port_stop_error; 415 } 416 417 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 418 nic->base_ochan, nic->num_tx_queues, nic->port_id); 419 420 ret = rte_event_dev_start(nic->evdev); 421 if (ret < 0) { 422 octeontx_log_err("failed to start evdev: ret (%d)", ret); 423 goto pki_port_stop_error; 424 } 425 426 /* Success */ 427 return ret; 428 429 pki_port_stop_error: 430 octeontx_pki_port_stop(nic->port_id); 431 channel_stop_error: 432 octeontx_pko_channel_stop(nic->base_ochan); 433 error: 434 return ret; 435 } 436 437 static void 438 octeontx_dev_stop(struct rte_eth_dev *dev) 439 { 440 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 441 int ret; 442 443 PMD_INIT_FUNC_TRACE(); 444 445 rte_event_dev_stop(nic->evdev); 446 447 ret = octeontx_port_stop(nic); 448 if (ret < 0) { 449 octeontx_log_err("failed to req stop port %d res=%d", 450 nic->port_id, ret); 451 return; 452 } 453 454 ret = octeontx_pki_port_stop(nic->port_id); 455 if (ret < 0) { 456 octeontx_log_err("failed to stop pki port %d res=%d", 457 nic->port_id, ret); 458 return; 459 } 460 461 ret = octeontx_pko_channel_stop(nic->base_ochan); 462 if (ret < 0) { 463 octeontx_log_err("failed to stop channel %d VF%d %d %d", 464 nic->base_ochan, nic->port_id, nic->num_tx_queues, 465 ret); 466 return; 467 } 468 469 dev->tx_pkt_burst = NULL; 470 dev->rx_pkt_burst = NULL; 471 } 472 473 static void 474 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 475 { 476 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 477 478 PMD_INIT_FUNC_TRACE(); 479 octeontx_port_promisc_set(nic, 1); 480 } 481 482 static void 483 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 484 { 485 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 486 487 PMD_INIT_FUNC_TRACE(); 488 octeontx_port_promisc_set(nic, 0); 489 } 490 491 static int 492 octeontx_port_link_status(struct octeontx_nic *nic) 493 { 494 int res; 495 496 PMD_INIT_FUNC_TRACE(); 497 res = octeontx_bgx_port_link_status(nic->port_id); 498 if (res < 0) { 499 octeontx_log_err("failed to get port %d link status", 500 nic->port_id); 501 return res; 502 } 503 504 nic->link_up = (uint8_t)res; 505 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 506 507 return res; 508 } 509 510 /* 511 * Return 0 means link status changed, -1 means not changed 512 */ 513 static int 514 octeontx_dev_link_update(struct rte_eth_dev *dev, 515 int wait_to_complete __rte_unused) 516 { 517 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 518 struct rte_eth_link link; 519 int res; 520 521 res = 0; 522 PMD_INIT_FUNC_TRACE(); 523 524 res = octeontx_port_link_status(nic); 525 if (res < 0) { 526 octeontx_log_err("failed to request link status %d", res); 527 return res; 528 } 529 530 link.link_status = nic->link_up; 531 532 switch (nic->speed) { 533 case OCTEONTX_LINK_SPEED_SGMII: 534 link.link_speed = ETH_SPEED_NUM_1G; 535 break; 536 537 case OCTEONTX_LINK_SPEED_XAUI: 538 link.link_speed = ETH_SPEED_NUM_10G; 539 break; 540 541 case OCTEONTX_LINK_SPEED_RXAUI: 542 case OCTEONTX_LINK_SPEED_10G_R: 543 link.link_speed = ETH_SPEED_NUM_10G; 544 break; 545 case OCTEONTX_LINK_SPEED_QSGMII: 546 link.link_speed = ETH_SPEED_NUM_5G; 547 break; 548 case OCTEONTX_LINK_SPEED_40G_R: 549 link.link_speed = ETH_SPEED_NUM_40G; 550 break; 551 552 case OCTEONTX_LINK_SPEED_RESERVE1: 553 case OCTEONTX_LINK_SPEED_RESERVE2: 554 default: 555 octeontx_log_err("incorrect link speed %d", nic->speed); 556 break; 557 } 558 559 link.link_duplex = ETH_LINK_FULL_DUPLEX; 560 link.link_autoneg = ETH_LINK_AUTONEG; 561 562 return rte_eth_linkstatus_set(dev, &link); 563 } 564 565 static int 566 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 567 { 568 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 569 570 PMD_INIT_FUNC_TRACE(); 571 return octeontx_port_stats(nic, stats); 572 } 573 574 static void 575 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 576 { 577 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 578 579 PMD_INIT_FUNC_TRACE(); 580 octeontx_port_stats_clr(nic); 581 } 582 583 static void 584 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 585 struct ether_addr *addr) 586 { 587 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 588 int ret; 589 590 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 591 if (ret != 0) 592 octeontx_log_err("failed to set MAC address on port %d", 593 nic->port_id); 594 } 595 596 static void 597 octeontx_dev_info(struct rte_eth_dev *dev, 598 struct rte_eth_dev_info *dev_info) 599 { 600 RTE_SET_USED(dev); 601 602 /* Autonegotiation may be disabled */ 603 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 604 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 605 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 606 ETH_LINK_SPEED_40G; 607 608 dev_info->driver_name = RTE_STR(rte_octeontx_pmd); 609 dev_info->max_mac_addrs = 1; 610 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 611 dev_info->max_rx_queues = 1; 612 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 613 dev_info->min_rx_bufsize = 0; 614 dev_info->pci_dev = NULL; 615 616 dev_info->default_rxconf = (struct rte_eth_rxconf) { 617 .rx_free_thresh = 0, 618 .rx_drop_en = 0, 619 }; 620 621 dev_info->default_txconf = (struct rte_eth_txconf) { 622 .tx_free_thresh = 0, 623 .txq_flags = 624 ETH_TXQ_FLAGS_NOMULTSEGS | 625 ETH_TXQ_FLAGS_NOOFFLOADS | 626 ETH_TXQ_FLAGS_NOXSUMS, 627 }; 628 629 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE; 630 } 631 632 static void 633 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 634 { 635 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 636 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 637 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 638 } 639 640 static int 641 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 642 uint16_t qidx) 643 { 644 struct octeontx_txq *txq; 645 int res; 646 647 PMD_INIT_FUNC_TRACE(); 648 649 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 650 return 0; 651 652 txq = dev->data->tx_queues[qidx]; 653 654 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 655 &txq->dq, 656 sizeof(octeontx_dq_t), 657 txq->queue_id, 658 octeontx_dq_info_getter); 659 if (res < 0) { 660 res = -EFAULT; 661 goto close_port; 662 } 663 664 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 665 return res; 666 667 close_port: 668 (void)octeontx_port_stop(nic); 669 octeontx_pko_channel_stop(nic->base_ochan); 670 octeontx_pko_channel_close(nic->base_ochan); 671 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 672 return res; 673 } 674 675 static int 676 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 677 { 678 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 679 680 PMD_INIT_FUNC_TRACE(); 681 qidx = qidx % PKO_VF_NUM_DQ; 682 return octeontx_vf_start_tx_queue(dev, nic, qidx); 683 } 684 685 static inline int 686 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 687 uint16_t qidx) 688 { 689 int ret = 0; 690 691 RTE_SET_USED(nic); 692 PMD_INIT_FUNC_TRACE(); 693 694 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 695 return 0; 696 697 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 698 return ret; 699 } 700 701 static int 702 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 703 { 704 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 705 706 PMD_INIT_FUNC_TRACE(); 707 qidx = qidx % PKO_VF_NUM_DQ; 708 709 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 710 } 711 712 static void 713 octeontx_dev_tx_queue_release(void *tx_queue) 714 { 715 struct octeontx_txq *txq = tx_queue; 716 int res; 717 718 PMD_INIT_FUNC_TRACE(); 719 720 if (txq) { 721 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 722 if (res < 0) 723 octeontx_log_err("failed stop tx_queue(%d)\n", 724 txq->queue_id); 725 726 rte_free(txq); 727 } 728 } 729 730 static int 731 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 732 uint16_t nb_desc, unsigned int socket_id, 733 const struct rte_eth_txconf *tx_conf) 734 { 735 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 736 struct octeontx_txq *txq = NULL; 737 uint16_t dq_num; 738 int res = 0; 739 740 RTE_SET_USED(nb_desc); 741 RTE_SET_USED(socket_id); 742 RTE_SET_USED(tx_conf); 743 744 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; 745 746 /* Socket id check */ 747 if (socket_id != (unsigned int)SOCKET_ID_ANY && 748 socket_id != (unsigned int)nic->node) 749 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 750 socket_id, nic->node); 751 752 /* Free memory prior to re-allocation if needed. */ 753 if (dev->data->tx_queues[qidx] != NULL) { 754 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 755 qidx); 756 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 757 dev->data->tx_queues[qidx] = NULL; 758 } 759 760 /* Allocating tx queue data structure */ 761 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 762 RTE_CACHE_LINE_SIZE, nic->node); 763 if (txq == NULL) { 764 octeontx_log_err("failed to allocate txq=%d", qidx); 765 res = -ENOMEM; 766 goto err; 767 } 768 769 txq->eth_dev = dev; 770 txq->queue_id = dq_num; 771 dev->data->tx_queues[qidx] = txq; 772 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 773 774 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 775 &txq->dq, 776 sizeof(octeontx_dq_t), 777 txq->queue_id, 778 octeontx_dq_info_getter); 779 if (res < 0) { 780 res = -EFAULT; 781 goto err; 782 } 783 784 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 785 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 786 txq->dq.ioreg_va, 787 txq->dq.fc_status_va); 788 789 return res; 790 791 err: 792 if (txq) 793 rte_free(txq); 794 795 return res; 796 } 797 798 static int 799 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 800 uint16_t nb_desc, unsigned int socket_id, 801 const struct rte_eth_rxconf *rx_conf, 802 struct rte_mempool *mb_pool) 803 { 804 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 805 struct rte_mempool_ops *mp_ops = NULL; 806 struct octeontx_rxq *rxq = NULL; 807 pki_pktbuf_cfg_t pktbuf_conf; 808 pki_hash_cfg_t pki_hash; 809 pki_qos_cfg_t pki_qos; 810 uintptr_t pool; 811 int ret, port; 812 uint8_t gaura; 813 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 814 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 815 816 RTE_SET_USED(nb_desc); 817 818 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 819 memset(&pki_hash, 0, sizeof(pki_hash)); 820 memset(&pki_qos, 0, sizeof(pki_qos)); 821 822 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 823 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 824 octeontx_log_err("failed to find octeontx_fpavf mempool"); 825 return -ENOTSUP; 826 } 827 828 /* Handle forbidden configurations */ 829 if (nic->pki.classifier_enable) { 830 octeontx_log_err("cannot setup queue %d. " 831 "Classifier option unsupported", qidx); 832 return -EINVAL; 833 } 834 835 port = nic->port_id; 836 837 /* Rx deferred start is not supported */ 838 if (rx_conf->rx_deferred_start) { 839 octeontx_log_err("rx deferred start not supported"); 840 return -EINVAL; 841 } 842 843 /* Verify queue index */ 844 if (qidx >= dev->data->nb_rx_queues) { 845 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 846 qidx, (dev->data->nb_rx_queues - 1)); 847 return -ENOTSUP; 848 } 849 850 /* Socket id check */ 851 if (socket_id != (unsigned int)SOCKET_ID_ANY && 852 socket_id != (unsigned int)nic->node) 853 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 854 socket_id, nic->node); 855 856 /* Allocating rx queue data structure */ 857 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 858 RTE_CACHE_LINE_SIZE, nic->node); 859 if (rxq == NULL) { 860 octeontx_log_err("failed to allocate rxq=%d", qidx); 861 return -ENOMEM; 862 } 863 864 if (!nic->pki.initialized) { 865 pktbuf_conf.port_type = 0; 866 pki_hash.port_type = 0; 867 pki_qos.port_type = 0; 868 869 pktbuf_conf.mmask.f_wqe_skip = 1; 870 pktbuf_conf.mmask.f_first_skip = 1; 871 pktbuf_conf.mmask.f_later_skip = 1; 872 pktbuf_conf.mmask.f_mbuff_size = 1; 873 pktbuf_conf.mmask.f_cache_mode = 1; 874 875 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 876 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP; 877 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 878 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 879 RTE_PKTMBUF_HEADROOM - 880 sizeof(struct rte_mbuf)); 881 882 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 883 884 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 885 if (ret != 0) { 886 octeontx_log_err("fail to configure pktbuf for port %d", 887 port); 888 rte_free(rxq); 889 return ret; 890 } 891 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 892 "\tmbuf_size:\t0x%0x\n" 893 "\twqe_skip:\t0x%0x\n" 894 "\tfirst_skip:\t0x%0x\n" 895 "\tlater_skip:\t0x%0x\n" 896 "\tcache_mode:\t%s\n", 897 port, 898 pktbuf_conf.mbuff_size, 899 pktbuf_conf.wqe_skip, 900 pktbuf_conf.first_skip, 901 pktbuf_conf.later_skip, 902 (pktbuf_conf.cache_mode == 903 PKI_OPC_MODE_STT) ? 904 "STT" : 905 (pktbuf_conf.cache_mode == 906 PKI_OPC_MODE_STF) ? 907 "STF" : 908 (pktbuf_conf.cache_mode == 909 PKI_OPC_MODE_STF1_STT) ? 910 "STF1_STT" : "STF2_STT"); 911 912 if (nic->pki.hash_enable) { 913 pki_hash.tag_dlc = 1; 914 pki_hash.tag_slc = 1; 915 pki_hash.tag_dlf = 1; 916 pki_hash.tag_slf = 1; 917 pki_hash.tag_prt = 1; 918 octeontx_pki_port_hash_config(port, &pki_hash); 919 } 920 921 pool = (uintptr_t)mb_pool->pool_id; 922 923 /* Get the gpool Id */ 924 gaura = octeontx_fpa_bufpool_gpool(pool); 925 926 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 927 pki_qos.num_entry = 1; 928 pki_qos.drop_policy = 0; 929 pki_qos.tag_type = 0L; 930 pki_qos.qos_entry[0].port_add = 0; 931 pki_qos.qos_entry[0].gaura = gaura; 932 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 933 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 934 pki_qos.qos_entry[0].grptag_bad = 0; 935 pki_qos.qos_entry[0].grptag_ok = 0; 936 937 ret = octeontx_pki_port_create_qos(port, &pki_qos); 938 if (ret < 0) { 939 octeontx_log_err("failed to create QOS port=%d, q=%d", 940 port, qidx); 941 rte_free(rxq); 942 return ret; 943 } 944 nic->pki.initialized = true; 945 } 946 947 rxq->port_id = nic->port_id; 948 rxq->eth_dev = dev; 949 rxq->queue_id = qidx; 950 rxq->evdev = nic->evdev; 951 rxq->ev_queues = ev_queues; 952 rxq->ev_ports = ev_ports; 953 954 dev->data->rx_queues[qidx] = rxq; 955 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 956 return 0; 957 } 958 959 static void 960 octeontx_dev_rx_queue_release(void *rxq) 961 { 962 rte_free(rxq); 963 } 964 965 static const uint32_t * 966 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 967 { 968 static const uint32_t ptypes[] = { 969 RTE_PTYPE_L3_IPV4, 970 RTE_PTYPE_L3_IPV4_EXT, 971 RTE_PTYPE_L3_IPV6, 972 RTE_PTYPE_L3_IPV6_EXT, 973 RTE_PTYPE_L4_TCP, 974 RTE_PTYPE_L4_UDP, 975 RTE_PTYPE_L4_FRAG, 976 RTE_PTYPE_UNKNOWN 977 }; 978 979 if (dev->rx_pkt_burst == octeontx_recv_pkts) 980 return ptypes; 981 982 return NULL; 983 } 984 985 static int 986 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 987 { 988 RTE_SET_USED(dev); 989 990 if (!strcmp(pool, "octeontx_fpavf")) 991 return 0; 992 993 return -ENOTSUP; 994 } 995 996 /* Initialize and register driver with DPDK Application */ 997 static const struct eth_dev_ops octeontx_dev_ops = { 998 .dev_configure = octeontx_dev_configure, 999 .dev_infos_get = octeontx_dev_info, 1000 .dev_close = octeontx_dev_close, 1001 .dev_start = octeontx_dev_start, 1002 .dev_stop = octeontx_dev_stop, 1003 .promiscuous_enable = octeontx_dev_promisc_enable, 1004 .promiscuous_disable = octeontx_dev_promisc_disable, 1005 .link_update = octeontx_dev_link_update, 1006 .stats_get = octeontx_dev_stats_get, 1007 .stats_reset = octeontx_dev_stats_reset, 1008 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1009 .tx_queue_start = octeontx_dev_tx_queue_start, 1010 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1011 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1012 .tx_queue_release = octeontx_dev_tx_queue_release, 1013 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1014 .rx_queue_release = octeontx_dev_rx_queue_release, 1015 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1016 .pool_ops_supported = octeontx_pool_ops, 1017 }; 1018 1019 /* Create Ethdev interface per BGX LMAC ports */ 1020 static int 1021 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1022 int socket_id) 1023 { 1024 int res; 1025 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1026 struct octeontx_nic *nic = NULL; 1027 struct rte_eth_dev *eth_dev = NULL; 1028 struct rte_eth_dev_data *data = NULL; 1029 const char *name = rte_vdev_device_name(dev); 1030 1031 PMD_INIT_FUNC_TRACE(); 1032 1033 sprintf(octtx_name, "%s_%d", name, port); 1034 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1035 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1036 if (eth_dev == NULL) 1037 return -ENODEV; 1038 1039 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1040 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1041 return 0; 1042 } 1043 1044 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id); 1045 if (data == NULL) { 1046 octeontx_log_err("failed to allocate devdata"); 1047 res = -ENOMEM; 1048 goto err; 1049 } 1050 1051 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1052 if (nic == NULL) { 1053 octeontx_log_err("failed to allocate nic structure"); 1054 res = -ENOMEM; 1055 goto err; 1056 } 1057 1058 nic->port_id = port; 1059 nic->evdev = evdev; 1060 1061 res = octeontx_port_open(nic); 1062 if (res < 0) 1063 goto err; 1064 1065 /* Rx side port configuration */ 1066 res = octeontx_pki_port_open(port); 1067 if (res != 0) { 1068 octeontx_log_err("failed to open PKI port %d", port); 1069 res = -ENODEV; 1070 goto err; 1071 } 1072 1073 /* Reserve an ethdev entry */ 1074 eth_dev = rte_eth_dev_allocate(octtx_name); 1075 if (eth_dev == NULL) { 1076 octeontx_log_err("failed to allocate rte_eth_dev"); 1077 res = -ENOMEM; 1078 goto err; 1079 } 1080 1081 eth_dev->device = &dev->device; 1082 eth_dev->intr_handle = NULL; 1083 eth_dev->data->kdrv = RTE_KDRV_NONE; 1084 eth_dev->data->numa_node = dev->device.numa_node; 1085 1086 rte_memcpy(data, (eth_dev)->data, sizeof(*data)); 1087 data->dev_private = nic; 1088 1089 data->port_id = eth_dev->data->port_id; 1090 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name); 1091 1092 nic->ev_queues = 1; 1093 nic->ev_ports = 1; 1094 1095 data->dev_link.link_status = ETH_LINK_DOWN; 1096 data->dev_started = 0; 1097 data->promiscuous = 0; 1098 data->all_multicast = 0; 1099 data->scattered_rx = 0; 1100 1101 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0, 1102 socket_id); 1103 if (data->mac_addrs == NULL) { 1104 octeontx_log_err("failed to allocate memory for mac_addrs"); 1105 res = -ENOMEM; 1106 goto err; 1107 } 1108 1109 eth_dev->data = data; 1110 eth_dev->dev_ops = &octeontx_dev_ops; 1111 1112 /* Finally save ethdev pointer to the NIC structure */ 1113 nic->dev = eth_dev; 1114 1115 if (nic->port_id != data->port_id) { 1116 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1117 data->port_id, nic->port_id); 1118 res = -EINVAL; 1119 goto err; 1120 } 1121 1122 /* Update port_id mac to eth_dev */ 1123 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN); 1124 1125 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1126 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1127 nic->port_id, nic->port_ena, 1128 nic->base_ochan, nic->num_ochans, 1129 nic->num_tx_queues); 1130 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1131 1132 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1133 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1134 1135 return data->port_id; 1136 1137 err: 1138 if (nic) 1139 octeontx_port_close(nic); 1140 1141 if (eth_dev != NULL) { 1142 rte_free(eth_dev->data->mac_addrs); 1143 rte_free(data); 1144 rte_free(nic); 1145 rte_eth_dev_release_port(eth_dev); 1146 } 1147 1148 return res; 1149 } 1150 1151 /* Un initialize octeontx device */ 1152 static int 1153 octeontx_remove(struct rte_vdev_device *dev) 1154 { 1155 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1156 struct rte_eth_dev *eth_dev = NULL; 1157 struct octeontx_nic *nic = NULL; 1158 int i; 1159 1160 if (dev == NULL) 1161 return -EINVAL; 1162 1163 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1164 sprintf(octtx_name, "eth_octeontx_%d", i); 1165 1166 /* reserve an ethdev entry */ 1167 eth_dev = rte_eth_dev_allocated(octtx_name); 1168 if (eth_dev == NULL) 1169 return -ENODEV; 1170 1171 nic = octeontx_pmd_priv(eth_dev); 1172 rte_event_dev_stop(nic->evdev); 1173 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1174 1175 rte_free(eth_dev->data->mac_addrs); 1176 rte_free(eth_dev->data->dev_private); 1177 rte_free(eth_dev->data); 1178 rte_eth_dev_release_port(eth_dev); 1179 rte_event_dev_close(nic->evdev); 1180 } 1181 1182 /* Free FC resource */ 1183 octeontx_pko_fc_free(); 1184 1185 return 0; 1186 } 1187 1188 /* Initialize octeontx device */ 1189 static int 1190 octeontx_probe(struct rte_vdev_device *dev) 1191 { 1192 const char *dev_name; 1193 static int probe_once; 1194 uint8_t socket_id, qlist; 1195 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1196 struct rte_event_dev_config dev_conf; 1197 const char *eventdev_name = "event_octeontx"; 1198 struct rte_event_dev_info info; 1199 1200 struct octeontx_vdev_init_params init_params = { 1201 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1202 }; 1203 1204 dev_name = rte_vdev_device_name(dev); 1205 res = octeontx_parse_vdev_init_params(&init_params, dev); 1206 if (res < 0) 1207 return -EINVAL; 1208 1209 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1210 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1211 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1212 return -ENOTSUP; 1213 } 1214 1215 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1216 1217 socket_id = rte_socket_id(); 1218 1219 tx_vfcnt = octeontx_pko_vf_count(); 1220 1221 if (tx_vfcnt < init_params.nr_port) { 1222 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1223 tx_vfcnt, init_params.nr_port); 1224 return -EINVAL; 1225 } 1226 evdev = rte_event_dev_get_dev_id(eventdev_name); 1227 if (evdev < 0) { 1228 octeontx_log_err("eventdev %s not found", eventdev_name); 1229 return -ENODEV; 1230 } 1231 1232 res = rte_event_dev_info_get(evdev, &info); 1233 if (res < 0) { 1234 octeontx_log_err("failed to eventdev info %d", res); 1235 return -EINVAL; 1236 } 1237 1238 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1239 info.max_event_queues, info.max_event_ports); 1240 1241 if (octeontx_pko_init_fc(tx_vfcnt)) 1242 return -ENOMEM; 1243 1244 devconf_set_default_sane_values(&dev_conf, &info); 1245 res = rte_event_dev_configure(evdev, &dev_conf); 1246 if (res < 0) 1247 goto parse_error; 1248 1249 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1250 (uint32_t *)&pnum); 1251 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1252 (uint32_t *)&qnum); 1253 if (pnum < qnum) { 1254 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1255 pnum, qnum); 1256 res = -EINVAL; 1257 goto parse_error; 1258 } 1259 if (pnum > qnum) { 1260 /* 1261 * We don't poll on event ports 1262 * that do not have any queues assigned. 1263 */ 1264 pnum = qnum; 1265 PMD_INIT_LOG(INFO, 1266 "reducing number of active event ports to %d", pnum); 1267 } 1268 for (i = 0; i < qnum; i++) { 1269 res = rte_event_queue_setup(evdev, i, NULL); 1270 if (res < 0) { 1271 octeontx_log_err("failed to setup event_q(%d): res %d", 1272 i, res); 1273 goto parse_error; 1274 } 1275 } 1276 1277 for (i = 0; i < pnum; i++) { 1278 res = rte_event_port_setup(evdev, i, NULL); 1279 if (res < 0) { 1280 res = -ENODEV; 1281 octeontx_log_err("failed to setup ev port(%d) res=%d", 1282 i, res); 1283 goto parse_error; 1284 } 1285 /* Link one queue to one event port */ 1286 qlist = i; 1287 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1288 if (res < 0) { 1289 res = -ENODEV; 1290 octeontx_log_err("failed to link port (%d): res=%d", 1291 i, res); 1292 goto parse_error; 1293 } 1294 } 1295 1296 /* Create ethdev interface */ 1297 for (i = 0; i < init_params.nr_port; i++) { 1298 port_id = octeontx_create(dev, i, evdev, socket_id); 1299 if (port_id < 0) { 1300 octeontx_log_err("failed to create device %s", 1301 dev_name); 1302 res = -ENODEV; 1303 goto parse_error; 1304 } 1305 1306 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1307 port_id); 1308 } 1309 1310 if (probe_once) { 1311 octeontx_log_err("interface %s not supported", dev_name); 1312 octeontx_remove(dev); 1313 res = -ENOTSUP; 1314 goto parse_error; 1315 } 1316 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1317 probe_once = 1; 1318 1319 return 0; 1320 1321 parse_error: 1322 octeontx_pko_fc_free(); 1323 return res; 1324 } 1325 1326 static struct rte_vdev_driver octeontx_pmd_drv = { 1327 .probe = octeontx_probe, 1328 .remove = octeontx_remove, 1329 }; 1330 1331 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1332 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1333 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1334