1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_bus_vdev.h> 15 #include <rte_cycles.h> 16 #include <rte_debug.h> 17 #include <rte_devargs.h> 18 #include <rte_dev.h> 19 #include <rte_kvargs.h> 20 #include <rte_malloc.h> 21 #include <rte_mbuf_pool_ops.h> 22 #include <rte_prefetch.h> 23 24 #include "octeontx_ethdev.h" 25 #include "octeontx_rxtx.h" 26 #include "octeontx_logs.h" 27 28 struct evdev_priv_data { 29 OFFLOAD_FLAGS; /*Sequence should not be changed */ 30 } __rte_cache_aligned; 31 32 struct octeontx_vdev_init_params { 33 uint8_t nr_port; 34 }; 35 36 uint16_t 37 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 38 39 enum octeontx_link_speed { 40 OCTEONTX_LINK_SPEED_SGMII, 41 OCTEONTX_LINK_SPEED_XAUI, 42 OCTEONTX_LINK_SPEED_RXAUI, 43 OCTEONTX_LINK_SPEED_10G_R, 44 OCTEONTX_LINK_SPEED_40G_R, 45 OCTEONTX_LINK_SPEED_RESERVE1, 46 OCTEONTX_LINK_SPEED_QSGMII, 47 OCTEONTX_LINK_SPEED_RESERVE2 48 }; 49 50 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE); 51 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE); 52 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE); 53 54 /* Parse integer from integer argument */ 55 static int 56 parse_integer_arg(const char *key __rte_unused, 57 const char *value, void *extra_args) 58 { 59 int *i = (int *)extra_args; 60 61 *i = atoi(value); 62 if (*i < 0) { 63 octeontx_log_err("argument has to be positive."); 64 return -1; 65 } 66 67 return 0; 68 } 69 70 static int 71 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 72 struct rte_vdev_device *dev) 73 { 74 struct rte_kvargs *kvlist = NULL; 75 int ret = 0; 76 77 static const char * const octeontx_vdev_valid_params[] = { 78 OCTEONTX_VDEV_NR_PORT_ARG, 79 NULL 80 }; 81 82 const char *input_args = rte_vdev_device_args(dev); 83 if (params == NULL) 84 return -EINVAL; 85 86 87 if (input_args) { 88 kvlist = rte_kvargs_parse(input_args, 89 octeontx_vdev_valid_params); 90 if (kvlist == NULL) 91 return -1; 92 93 ret = rte_kvargs_process(kvlist, 94 OCTEONTX_VDEV_NR_PORT_ARG, 95 &parse_integer_arg, 96 ¶ms->nr_port); 97 if (ret < 0) 98 goto free_kvlist; 99 } 100 101 free_kvlist: 102 rte_kvargs_free(kvlist); 103 return ret; 104 } 105 106 static int 107 octeontx_port_open(struct octeontx_nic *nic) 108 { 109 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 110 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg; 111 int res; 112 113 res = 0; 114 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 115 PMD_INIT_FUNC_TRACE(); 116 117 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 118 if (res < 0) { 119 octeontx_log_err("failed to open port %d", res); 120 return res; 121 } 122 123 nic->node = bgx_port_conf.node; 124 nic->port_ena = bgx_port_conf.enable; 125 nic->base_ichan = bgx_port_conf.base_chan; 126 nic->base_ochan = bgx_port_conf.base_chan; 127 nic->num_ichans = bgx_port_conf.num_chans; 128 nic->num_ochans = bgx_port_conf.num_chans; 129 nic->bgx_mtu = bgx_port_conf.mtu; 130 nic->bpen = bgx_port_conf.bpen; 131 nic->fcs_strip = bgx_port_conf.fcs_strip; 132 nic->bcast_mode = bgx_port_conf.bcast_mode; 133 nic->mcast_mode = bgx_port_conf.mcast_mode; 134 nic->speed = bgx_port_conf.mode; 135 136 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg)); 137 138 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg); 139 if (res < 0) { 140 octeontx_log_err("failed to get port %d fifo cfg", res); 141 return res; 142 } 143 144 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz; 145 146 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 147 RTE_ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_link_status_print(struct rte_eth_dev *eth_dev, 155 struct rte_eth_link *link) 156 { 157 if (link && link->link_status) 158 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s", 159 (eth_dev->data->port_id), 160 link->link_speed, 161 link->link_duplex == ETH_LINK_FULL_DUPLEX ? 162 "full-duplex" : "half-duplex"); 163 else 164 octeontx_log_info("Port %d: Link Down", 165 (int)(eth_dev->data->port_id)); 166 } 167 168 static void 169 octeontx_link_status_update(struct octeontx_nic *nic, 170 struct rte_eth_link *link) 171 { 172 memset(link, 0, sizeof(*link)); 173 174 link->link_status = nic->link_up ? ETH_LINK_UP : ETH_LINK_DOWN; 175 176 switch (nic->speed) { 177 case OCTEONTX_LINK_SPEED_SGMII: 178 link->link_speed = ETH_SPEED_NUM_1G; 179 break; 180 181 case OCTEONTX_LINK_SPEED_XAUI: 182 link->link_speed = ETH_SPEED_NUM_10G; 183 break; 184 185 case OCTEONTX_LINK_SPEED_RXAUI: 186 case OCTEONTX_LINK_SPEED_10G_R: 187 link->link_speed = ETH_SPEED_NUM_10G; 188 break; 189 case OCTEONTX_LINK_SPEED_QSGMII: 190 link->link_speed = ETH_SPEED_NUM_5G; 191 break; 192 case OCTEONTX_LINK_SPEED_40G_R: 193 link->link_speed = ETH_SPEED_NUM_40G; 194 break; 195 196 case OCTEONTX_LINK_SPEED_RESERVE1: 197 case OCTEONTX_LINK_SPEED_RESERVE2: 198 default: 199 link->link_speed = ETH_SPEED_NUM_NONE; 200 octeontx_log_err("incorrect link speed %d", nic->speed); 201 break; 202 } 203 204 link->link_duplex = ETH_LINK_FULL_DUPLEX; 205 link->link_autoneg = ETH_LINK_AUTONEG; 206 } 207 208 static void 209 octeontx_link_status_poll(void *arg) 210 { 211 struct octeontx_nic *nic = arg; 212 struct rte_eth_link link; 213 struct rte_eth_dev *dev; 214 int res; 215 216 PMD_INIT_FUNC_TRACE(); 217 218 dev = nic->dev; 219 220 res = octeontx_bgx_port_link_status(nic->port_id); 221 if (res < 0) { 222 octeontx_log_err("Failed to get port %d link status", 223 nic->port_id); 224 } else { 225 if (nic->link_up != (uint8_t)res) { 226 nic->link_up = (uint8_t)res; 227 octeontx_link_status_update(nic, &link); 228 octeontx_link_status_print(dev, &link); 229 rte_eth_linkstatus_set(dev, &link); 230 rte_eth_dev_callback_process(dev, 231 RTE_ETH_EVENT_INTR_LSC, 232 NULL); 233 } 234 } 235 236 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 237 octeontx_link_status_poll, nic); 238 if (res < 0) 239 octeontx_log_err("Failed to restart alarm for port %d, err: %d", 240 nic->port_id, res); 241 } 242 243 static void 244 octeontx_port_close(struct octeontx_nic *nic) 245 { 246 PMD_INIT_FUNC_TRACE(); 247 248 rte_eal_alarm_cancel(octeontx_link_status_poll, nic); 249 octeontx_bgx_port_close(nic->port_id); 250 octeontx_log_dbg("port closed %d", nic->port_id); 251 } 252 253 static int 254 octeontx_port_start(struct octeontx_nic *nic) 255 { 256 PMD_INIT_FUNC_TRACE(); 257 258 return octeontx_bgx_port_start(nic->port_id); 259 } 260 261 static int 262 octeontx_port_stop(struct octeontx_nic *nic) 263 { 264 PMD_INIT_FUNC_TRACE(); 265 266 return octeontx_bgx_port_stop(nic->port_id); 267 } 268 269 static int 270 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 271 { 272 struct rte_eth_dev *dev; 273 int res; 274 275 res = 0; 276 PMD_INIT_FUNC_TRACE(); 277 dev = nic->dev; 278 279 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 280 if (res < 0) { 281 octeontx_log_err("failed to set promiscuous mode %d", 282 nic->port_id); 283 return res; 284 } 285 286 /* Set proper flag for the mode */ 287 dev->data->promiscuous = (en != 0) ? 1 : 0; 288 289 octeontx_log_dbg("port %d : promiscuous mode %s", 290 nic->port_id, en ? "set" : "unset"); 291 292 return 0; 293 } 294 295 static int 296 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 297 { 298 octeontx_mbox_bgx_port_stats_t bgx_stats; 299 int res; 300 301 PMD_INIT_FUNC_TRACE(); 302 303 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 304 if (res < 0) { 305 octeontx_log_err("failed to get port stats %d", nic->port_id); 306 return res; 307 } 308 309 stats->ipackets = bgx_stats.rx_packets; 310 stats->ibytes = bgx_stats.rx_bytes; 311 stats->imissed = bgx_stats.rx_dropped; 312 stats->ierrors = bgx_stats.rx_errors; 313 stats->opackets = bgx_stats.tx_packets; 314 stats->obytes = bgx_stats.tx_bytes; 315 stats->oerrors = bgx_stats.tx_errors; 316 317 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 318 nic->port_id, stats->ipackets, stats->opackets); 319 320 return 0; 321 } 322 323 static int 324 octeontx_port_stats_clr(struct octeontx_nic *nic) 325 { 326 PMD_INIT_FUNC_TRACE(); 327 328 return octeontx_bgx_port_stats_clr(nic->port_id); 329 } 330 331 static inline void 332 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 333 struct rte_event_dev_info *info) 334 { 335 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 336 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 337 338 dev_conf->nb_event_ports = info->max_event_ports; 339 dev_conf->nb_event_queues = info->max_event_queues; 340 341 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 342 dev_conf->nb_event_port_dequeue_depth = 343 info->max_event_port_dequeue_depth; 344 dev_conf->nb_event_port_enqueue_depth = 345 info->max_event_port_enqueue_depth; 346 dev_conf->nb_event_port_enqueue_depth = 347 info->max_event_port_enqueue_depth; 348 dev_conf->nb_events_limit = 349 info->max_num_events; 350 } 351 352 static uint16_t 353 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 354 { 355 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 356 uint16_t flags = 0; 357 358 if (nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM || 359 nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM) 360 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F; 361 362 if (nic->tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM || 363 nic->tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM || 364 nic->tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM || 365 nic->tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) 366 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F; 367 368 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)) 369 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F; 370 371 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS) 372 flags |= OCCTX_TX_MULTI_SEG_F; 373 374 return flags; 375 } 376 377 static uint16_t 378 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 379 { 380 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 381 uint16_t flags = 0; 382 383 if (nic->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM | 384 DEV_RX_OFFLOAD_UDP_CKSUM)) 385 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 386 387 if (nic->rx_offloads & (DEV_RX_OFFLOAD_IPV4_CKSUM | 388 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) 389 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 390 391 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) { 392 flags |= OCCTX_RX_MULTI_SEG_F; 393 eth_dev->data->scattered_rx = 1; 394 /* If scatter mode is enabled, TX should also be in multi 395 * seg mode, else memory leak will occur 396 */ 397 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; 398 } 399 400 return flags; 401 } 402 403 static int 404 octeontx_dev_configure(struct rte_eth_dev *dev) 405 { 406 struct rte_eth_dev_data *data = dev->data; 407 struct rte_eth_conf *conf = &data->dev_conf; 408 struct rte_eth_rxmode *rxmode = &conf->rxmode; 409 struct rte_eth_txmode *txmode = &conf->txmode; 410 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 411 int ret; 412 413 PMD_INIT_FUNC_TRACE(); 414 RTE_SET_USED(conf); 415 416 if (!rte_eal_has_hugepages()) { 417 octeontx_log_err("huge page is not configured"); 418 return -EINVAL; 419 } 420 421 if (txmode->mq_mode) { 422 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 423 return -EINVAL; 424 } 425 426 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 427 rxmode->mq_mode != ETH_MQ_RX_RSS) { 428 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 429 return -EINVAL; 430 } 431 432 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 433 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 434 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 435 } 436 437 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 438 octeontx_log_err("setting link speed/duplex not supported"); 439 return -EINVAL; 440 } 441 442 if (conf->dcb_capability_en) { 443 octeontx_log_err("DCB enable not supported"); 444 return -EINVAL; 445 } 446 447 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 448 octeontx_log_err("flow director not supported"); 449 return -EINVAL; 450 } 451 452 nic->num_tx_queues = dev->data->nb_tx_queues; 453 454 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 455 nic->num_tx_queues, 456 nic->base_ochan); 457 if (ret) { 458 octeontx_log_err("failed to open channel %d no-of-txq %d", 459 nic->base_ochan, nic->num_tx_queues); 460 return -EFAULT; 461 } 462 463 ret = octeontx_dev_vlan_offload_init(dev); 464 if (ret) { 465 octeontx_log_err("failed to initialize vlan offload"); 466 return -EFAULT; 467 } 468 469 nic->pki.classifier_enable = false; 470 nic->pki.hash_enable = true; 471 nic->pki.initialized = false; 472 473 nic->rx_offloads |= rxmode->offloads; 474 nic->tx_offloads |= txmode->offloads; 475 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 476 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 477 478 return 0; 479 } 480 481 static int 482 octeontx_dev_close(struct rte_eth_dev *dev) 483 { 484 struct octeontx_txq *txq = NULL; 485 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 486 unsigned int i; 487 int ret; 488 489 PMD_INIT_FUNC_TRACE(); 490 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 491 return 0; 492 493 rte_event_dev_close(nic->evdev); 494 495 octeontx_dev_flow_ctrl_fini(dev); 496 497 octeontx_dev_vlan_offload_fini(dev); 498 499 ret = octeontx_pko_channel_close(nic->base_ochan); 500 if (ret < 0) { 501 octeontx_log_err("failed to close channel %d VF%d %d %d", 502 nic->base_ochan, nic->port_id, nic->num_tx_queues, 503 ret); 504 } 505 /* Free txq resources for this port */ 506 for (i = 0; i < nic->num_tx_queues; i++) { 507 txq = dev->data->tx_queues[i]; 508 if (!txq) 509 continue; 510 511 rte_free(txq); 512 } 513 514 octeontx_port_close(nic); 515 516 return 0; 517 } 518 519 static int 520 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 521 { 522 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD; 523 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 524 struct rte_eth_dev_data *data = eth_dev->data; 525 int rc = 0; 526 527 /* Check if MTU is within the allowed range */ 528 if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS) 529 return -EINVAL; 530 531 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; 532 533 /* Refuse MTU that requires the support of scattered packets 534 * when this feature has not been enabled before. 535 */ 536 if (data->dev_started && frame_size > buffsz && 537 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) { 538 octeontx_log_err("Scatter mode is disabled"); 539 return -EINVAL; 540 } 541 542 /* Check <seg size> * <max_seg> >= max_frame */ 543 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) && 544 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX)) 545 return -EINVAL; 546 547 rc = octeontx_pko_send_mtu(nic->port_id, frame_size); 548 if (rc) 549 return rc; 550 551 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size); 552 if (rc) 553 return rc; 554 555 if (frame_size > OCCTX_L2_MAX_LEN) 556 nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; 557 else 558 nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME; 559 560 /* Update max_rx_pkt_len */ 561 data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 562 octeontx_log_info("Received pkt beyond maxlen %d will be dropped", 563 frame_size); 564 565 return rc; 566 } 567 568 static int 569 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 570 { 571 struct rte_eth_dev *eth_dev = rxq->eth_dev; 572 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 573 struct rte_eth_dev_data *data = eth_dev->data; 574 struct rte_pktmbuf_pool_private *mbp_priv; 575 struct evdev_priv_data *evdev_priv; 576 struct rte_eventdev *dev; 577 uint32_t buffsz; 578 579 /* Get rx buffer size */ 580 mbp_priv = rte_mempool_get_priv(rxq->pool); 581 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 582 583 /* Setup scatter mode if needed by jumbo */ 584 if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) { 585 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 586 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 587 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 588 } 589 590 /* Sharing offload flags via eventdev priv region */ 591 dev = &rte_eventdevs[rxq->evdev]; 592 evdev_priv = dev->data->dev_private; 593 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 594 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 595 596 /* Setup MTU based on max_rx_pkt_len */ 597 nic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD; 598 599 return 0; 600 } 601 602 static int 603 octeontx_dev_start(struct rte_eth_dev *dev) 604 { 605 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 606 struct octeontx_rxq *rxq; 607 int ret, i; 608 609 PMD_INIT_FUNC_TRACE(); 610 /* Rechecking if any new offload set to update 611 * rx/tx burst function pointer accordingly. 612 */ 613 for (i = 0; i < dev->data->nb_rx_queues; i++) { 614 rxq = dev->data->rx_queues[i]; 615 octeontx_recheck_rx_offloads(rxq); 616 } 617 618 /* Setting up the mtu based on max_rx_pkt_len */ 619 ret = octeontx_dev_mtu_set(dev, nic->mtu); 620 if (ret) { 621 octeontx_log_err("Failed to set default MTU size %d", ret); 622 goto error; 623 } 624 625 /* 626 * Tx start 627 */ 628 octeontx_set_tx_function(dev); 629 ret = octeontx_pko_channel_start(nic->base_ochan); 630 if (ret < 0) { 631 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 632 nic->port_id, nic->num_tx_queues, nic->base_ochan, 633 ret); 634 goto error; 635 } 636 637 /* 638 * Rx start 639 */ 640 dev->rx_pkt_burst = octeontx_recv_pkts; 641 ret = octeontx_pki_port_start(nic->port_id); 642 if (ret < 0) { 643 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 644 goto channel_stop_error; 645 } 646 647 /* 648 * Start port 649 */ 650 ret = octeontx_port_start(nic); 651 if (ret < 0) { 652 octeontx_log_err("failed start port %d", ret); 653 goto pki_port_stop_error; 654 } 655 656 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 657 nic->base_ochan, nic->num_tx_queues, nic->port_id); 658 659 ret = rte_event_dev_start(nic->evdev); 660 if (ret < 0) { 661 octeontx_log_err("failed to start evdev: ret (%d)", ret); 662 goto pki_port_stop_error; 663 } 664 665 /* Success */ 666 return ret; 667 668 pki_port_stop_error: 669 octeontx_pki_port_stop(nic->port_id); 670 channel_stop_error: 671 octeontx_pko_channel_stop(nic->base_ochan); 672 error: 673 return ret; 674 } 675 676 static int 677 octeontx_dev_stop(struct rte_eth_dev *dev) 678 { 679 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 680 int ret; 681 682 PMD_INIT_FUNC_TRACE(); 683 684 rte_event_dev_stop(nic->evdev); 685 686 ret = octeontx_port_stop(nic); 687 if (ret < 0) { 688 octeontx_log_err("failed to req stop port %d res=%d", 689 nic->port_id, ret); 690 return ret; 691 } 692 693 ret = octeontx_pki_port_stop(nic->port_id); 694 if (ret < 0) { 695 octeontx_log_err("failed to stop pki port %d res=%d", 696 nic->port_id, ret); 697 return ret; 698 } 699 700 ret = octeontx_pko_channel_stop(nic->base_ochan); 701 if (ret < 0) { 702 octeontx_log_err("failed to stop channel %d VF%d %d %d", 703 nic->base_ochan, nic->port_id, nic->num_tx_queues, 704 ret); 705 return ret; 706 } 707 708 return 0; 709 } 710 711 static int 712 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 713 { 714 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 715 716 PMD_INIT_FUNC_TRACE(); 717 return octeontx_port_promisc_set(nic, 1); 718 } 719 720 static int 721 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 722 { 723 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 724 725 PMD_INIT_FUNC_TRACE(); 726 return octeontx_port_promisc_set(nic, 0); 727 } 728 729 static int 730 octeontx_port_link_status(struct octeontx_nic *nic) 731 { 732 int res; 733 734 PMD_INIT_FUNC_TRACE(); 735 res = octeontx_bgx_port_link_status(nic->port_id); 736 if (res < 0) { 737 octeontx_log_err("failed to get port %d link status", 738 nic->port_id); 739 return res; 740 } 741 742 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) { 743 nic->link_up = (uint8_t)res; 744 nic->print_flag = 1; 745 } 746 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 747 748 return res; 749 } 750 751 /* 752 * Return 0 means link status changed, -1 means not changed 753 */ 754 static int 755 octeontx_dev_link_update(struct rte_eth_dev *dev, 756 int wait_to_complete __rte_unused) 757 { 758 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 759 struct rte_eth_link link; 760 int res; 761 762 PMD_INIT_FUNC_TRACE(); 763 764 res = octeontx_port_link_status(nic); 765 if (res < 0) { 766 octeontx_log_err("failed to request link status %d", res); 767 return res; 768 } 769 770 octeontx_link_status_update(nic, &link); 771 if (nic->print_flag) { 772 octeontx_link_status_print(nic->dev, &link); 773 nic->print_flag = 0; 774 } 775 776 return rte_eth_linkstatus_set(dev, &link); 777 } 778 779 static int 780 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 781 { 782 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 783 784 PMD_INIT_FUNC_TRACE(); 785 return octeontx_port_stats(nic, stats); 786 } 787 788 static int 789 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 790 { 791 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 792 793 PMD_INIT_FUNC_TRACE(); 794 return octeontx_port_stats_clr(nic); 795 } 796 797 static void 798 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 799 { 800 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 801 int ret; 802 803 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 804 if (ret != 0) 805 octeontx_log_err("failed to del MAC address filter on port %d", 806 nic->port_id); 807 } 808 809 static int 810 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 811 struct rte_ether_addr *mac_addr, 812 uint32_t index, 813 __rte_unused uint32_t vmdq) 814 { 815 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 816 int ret; 817 818 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 819 index); 820 if (ret < 0) { 821 octeontx_log_err("failed to add MAC address filter on port %d", 822 nic->port_id); 823 return ret; 824 } 825 826 return 0; 827 } 828 829 static int 830 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 831 struct rte_ether_addr *addr) 832 { 833 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 834 int ret; 835 836 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 837 if (ret == 0) { 838 /* Update same mac address to BGX CAM table */ 839 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 840 0); 841 } 842 if (ret < 0) { 843 octeontx_log_err("failed to set MAC address on port %d", 844 nic->port_id); 845 } 846 847 return ret; 848 } 849 850 static int 851 octeontx_dev_info(struct rte_eth_dev *dev, 852 struct rte_eth_dev_info *dev_info) 853 { 854 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 855 856 /* Autonegotiation may be disabled */ 857 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 858 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 859 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 860 ETH_LINK_SPEED_40G; 861 862 /* Min/Max MTU supported */ 863 dev_info->min_rx_bufsize = OCCTX_MIN_FRS; 864 dev_info->max_rx_pktlen = OCCTX_MAX_FRS; 865 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD; 866 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD; 867 868 dev_info->max_mac_addrs = 869 octeontx_bgx_port_mac_entries_get(nic->port_id); 870 dev_info->max_rx_queues = 1; 871 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 872 dev_info->min_rx_bufsize = 0; 873 874 dev_info->default_rxconf = (struct rte_eth_rxconf) { 875 .rx_free_thresh = 0, 876 .rx_drop_en = 0, 877 .offloads = OCTEONTX_RX_OFFLOADS, 878 }; 879 880 dev_info->default_txconf = (struct rte_eth_txconf) { 881 .tx_free_thresh = 0, 882 .offloads = OCTEONTX_TX_OFFLOADS, 883 }; 884 885 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 886 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 887 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 888 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 889 890 return 0; 891 } 892 893 static void 894 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 895 { 896 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 897 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 898 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 899 } 900 901 static int 902 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 903 uint16_t qidx) 904 { 905 struct octeontx_txq *txq; 906 int res; 907 908 PMD_INIT_FUNC_TRACE(); 909 910 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 911 return 0; 912 913 txq = dev->data->tx_queues[qidx]; 914 915 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 916 &txq->dq, 917 sizeof(octeontx_dq_t), 918 txq->queue_id, 919 octeontx_dq_info_getter); 920 if (res < 0) { 921 res = -EFAULT; 922 goto close_port; 923 } 924 925 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 926 return res; 927 928 close_port: 929 (void)octeontx_port_stop(nic); 930 octeontx_pko_channel_stop(nic->base_ochan); 931 octeontx_pko_channel_close(nic->base_ochan); 932 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 933 return res; 934 } 935 936 int 937 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 938 { 939 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 940 941 PMD_INIT_FUNC_TRACE(); 942 qidx = qidx % PKO_VF_NUM_DQ; 943 return octeontx_vf_start_tx_queue(dev, nic, qidx); 944 } 945 946 static inline int 947 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 948 uint16_t qidx) 949 { 950 int ret = 0; 951 952 RTE_SET_USED(nic); 953 PMD_INIT_FUNC_TRACE(); 954 955 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 956 return 0; 957 958 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 959 return ret; 960 } 961 962 int 963 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 964 { 965 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 966 967 PMD_INIT_FUNC_TRACE(); 968 qidx = qidx % PKO_VF_NUM_DQ; 969 970 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 971 } 972 973 static void 974 octeontx_dev_tx_queue_release(void *tx_queue) 975 { 976 struct octeontx_txq *txq = tx_queue; 977 int res; 978 979 PMD_INIT_FUNC_TRACE(); 980 981 if (txq) { 982 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 983 if (res < 0) 984 octeontx_log_err("failed stop tx_queue(%d)\n", 985 txq->queue_id); 986 987 rte_free(txq); 988 } 989 } 990 991 static int 992 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 993 uint16_t nb_desc, unsigned int socket_id, 994 const struct rte_eth_txconf *tx_conf __rte_unused) 995 { 996 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 997 struct octeontx_txq *txq = NULL; 998 uint16_t dq_num; 999 int res = 0; 1000 1001 RTE_SET_USED(nb_desc); 1002 RTE_SET_USED(socket_id); 1003 1004 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 1005 1006 /* Socket id check */ 1007 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1008 socket_id != (unsigned int)nic->node) 1009 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 1010 socket_id, nic->node); 1011 1012 /* Free memory prior to re-allocation if needed. */ 1013 if (dev->data->tx_queues[qidx] != NULL) { 1014 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 1015 qidx); 1016 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 1017 dev->data->tx_queues[qidx] = NULL; 1018 } 1019 1020 /* Allocating tx queue data structure */ 1021 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 1022 RTE_CACHE_LINE_SIZE, nic->node); 1023 if (txq == NULL) { 1024 octeontx_log_err("failed to allocate txq=%d", qidx); 1025 res = -ENOMEM; 1026 goto err; 1027 } 1028 1029 txq->eth_dev = dev; 1030 txq->queue_id = dq_num; 1031 dev->data->tx_queues[qidx] = txq; 1032 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1033 1034 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1035 &txq->dq, 1036 sizeof(octeontx_dq_t), 1037 txq->queue_id, 1038 octeontx_dq_info_getter); 1039 if (res < 0) { 1040 res = -EFAULT; 1041 goto err; 1042 } 1043 1044 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 1045 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 1046 txq->dq.ioreg_va, 1047 txq->dq.fc_status_va); 1048 1049 return res; 1050 1051 err: 1052 if (txq) 1053 rte_free(txq); 1054 1055 return res; 1056 } 1057 1058 static int 1059 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1060 uint16_t nb_desc, unsigned int socket_id, 1061 const struct rte_eth_rxconf *rx_conf, 1062 struct rte_mempool *mb_pool) 1063 { 1064 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1065 struct rte_mempool_ops *mp_ops = NULL; 1066 struct octeontx_rxq *rxq = NULL; 1067 pki_pktbuf_cfg_t pktbuf_conf; 1068 pki_hash_cfg_t pki_hash; 1069 pki_qos_cfg_t pki_qos; 1070 uintptr_t pool; 1071 int ret, port; 1072 uint16_t gaura; 1073 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 1074 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 1075 1076 RTE_SET_USED(nb_desc); 1077 1078 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 1079 memset(&pki_hash, 0, sizeof(pki_hash)); 1080 memset(&pki_qos, 0, sizeof(pki_qos)); 1081 1082 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 1083 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 1084 octeontx_log_err("failed to find octeontx_fpavf mempool"); 1085 return -ENOTSUP; 1086 } 1087 1088 /* Handle forbidden configurations */ 1089 if (nic->pki.classifier_enable) { 1090 octeontx_log_err("cannot setup queue %d. " 1091 "Classifier option unsupported", qidx); 1092 return -EINVAL; 1093 } 1094 1095 port = nic->port_id; 1096 1097 /* Rx deferred start is not supported */ 1098 if (rx_conf->rx_deferred_start) { 1099 octeontx_log_err("rx deferred start not supported"); 1100 return -EINVAL; 1101 } 1102 1103 /* Verify queue index */ 1104 if (qidx >= dev->data->nb_rx_queues) { 1105 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 1106 qidx, (dev->data->nb_rx_queues - 1)); 1107 return -ENOTSUP; 1108 } 1109 1110 /* Socket id check */ 1111 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1112 socket_id != (unsigned int)nic->node) 1113 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 1114 socket_id, nic->node); 1115 1116 /* Allocating rx queue data structure */ 1117 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 1118 RTE_CACHE_LINE_SIZE, nic->node); 1119 if (rxq == NULL) { 1120 octeontx_log_err("failed to allocate rxq=%d", qidx); 1121 return -ENOMEM; 1122 } 1123 1124 if (!nic->pki.initialized) { 1125 pktbuf_conf.port_type = 0; 1126 pki_hash.port_type = 0; 1127 pki_qos.port_type = 0; 1128 1129 pktbuf_conf.mmask.f_wqe_skip = 1; 1130 pktbuf_conf.mmask.f_first_skip = 1; 1131 pktbuf_conf.mmask.f_later_skip = 1; 1132 pktbuf_conf.mmask.f_mbuff_size = 1; 1133 pktbuf_conf.mmask.f_cache_mode = 1; 1134 1135 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 1136 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 1137 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 1138 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 1139 RTE_PKTMBUF_HEADROOM - 1140 rte_pktmbuf_priv_size(mb_pool) - 1141 sizeof(struct rte_mbuf)); 1142 1143 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 1144 1145 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1146 if (ret != 0) { 1147 octeontx_log_err("fail to configure pktbuf for port %d", 1148 port); 1149 rte_free(rxq); 1150 return ret; 1151 } 1152 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1153 "\tmbuf_size:\t0x%0x\n" 1154 "\twqe_skip:\t0x%0x\n" 1155 "\tfirst_skip:\t0x%0x\n" 1156 "\tlater_skip:\t0x%0x\n" 1157 "\tcache_mode:\t%s\n", 1158 port, 1159 pktbuf_conf.mbuff_size, 1160 pktbuf_conf.wqe_skip, 1161 pktbuf_conf.first_skip, 1162 pktbuf_conf.later_skip, 1163 (pktbuf_conf.cache_mode == 1164 PKI_OPC_MODE_STT) ? 1165 "STT" : 1166 (pktbuf_conf.cache_mode == 1167 PKI_OPC_MODE_STF) ? 1168 "STF" : 1169 (pktbuf_conf.cache_mode == 1170 PKI_OPC_MODE_STF1_STT) ? 1171 "STF1_STT" : "STF2_STT"); 1172 1173 if (nic->pki.hash_enable) { 1174 pki_hash.tag_dlc = 1; 1175 pki_hash.tag_slc = 1; 1176 pki_hash.tag_dlf = 1; 1177 pki_hash.tag_slf = 1; 1178 pki_hash.tag_prt = 1; 1179 octeontx_pki_port_hash_config(port, &pki_hash); 1180 } 1181 1182 pool = (uintptr_t)mb_pool->pool_id; 1183 1184 /* Get the gaura Id */ 1185 gaura = octeontx_fpa_bufpool_gaura(pool); 1186 1187 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1188 pki_qos.num_entry = 1; 1189 pki_qos.drop_policy = 0; 1190 pki_qos.tag_type = 0L; 1191 pki_qos.qos_entry[0].port_add = 0; 1192 pki_qos.qos_entry[0].gaura = gaura; 1193 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1194 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1195 pki_qos.qos_entry[0].grptag_bad = 0; 1196 pki_qos.qos_entry[0].grptag_ok = 0; 1197 1198 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1199 if (ret < 0) { 1200 octeontx_log_err("failed to create QOS port=%d, q=%d", 1201 port, qidx); 1202 rte_free(rxq); 1203 return ret; 1204 } 1205 nic->pki.initialized = true; 1206 } 1207 1208 rxq->port_id = nic->port_id; 1209 rxq->eth_dev = dev; 1210 rxq->queue_id = qidx; 1211 rxq->evdev = nic->evdev; 1212 rxq->ev_queues = ev_queues; 1213 rxq->ev_ports = ev_ports; 1214 rxq->pool = mb_pool; 1215 1216 octeontx_recheck_rx_offloads(rxq); 1217 dev->data->rx_queues[qidx] = rxq; 1218 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1219 1220 return 0; 1221 } 1222 1223 static void 1224 octeontx_dev_rx_queue_release(void *rxq) 1225 { 1226 rte_free(rxq); 1227 } 1228 1229 static const uint32_t * 1230 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1231 { 1232 static const uint32_t ptypes[] = { 1233 RTE_PTYPE_L3_IPV4, 1234 RTE_PTYPE_L3_IPV4_EXT, 1235 RTE_PTYPE_L3_IPV6, 1236 RTE_PTYPE_L3_IPV6_EXT, 1237 RTE_PTYPE_L4_TCP, 1238 RTE_PTYPE_L4_UDP, 1239 RTE_PTYPE_L4_FRAG, 1240 RTE_PTYPE_UNKNOWN 1241 }; 1242 1243 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1244 return ptypes; 1245 1246 return NULL; 1247 } 1248 1249 static int 1250 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1251 { 1252 RTE_SET_USED(dev); 1253 1254 if (!strcmp(pool, "octeontx_fpavf")) 1255 return 0; 1256 1257 return -ENOTSUP; 1258 } 1259 1260 /* Initialize and register driver with DPDK Application */ 1261 static const struct eth_dev_ops octeontx_dev_ops = { 1262 .dev_configure = octeontx_dev_configure, 1263 .dev_infos_get = octeontx_dev_info, 1264 .dev_close = octeontx_dev_close, 1265 .dev_start = octeontx_dev_start, 1266 .dev_stop = octeontx_dev_stop, 1267 .promiscuous_enable = octeontx_dev_promisc_enable, 1268 .promiscuous_disable = octeontx_dev_promisc_disable, 1269 .link_update = octeontx_dev_link_update, 1270 .stats_get = octeontx_dev_stats_get, 1271 .stats_reset = octeontx_dev_stats_reset, 1272 .mac_addr_remove = octeontx_dev_mac_addr_del, 1273 .mac_addr_add = octeontx_dev_mac_addr_add, 1274 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1275 .vlan_offload_set = octeontx_dev_vlan_offload_set, 1276 .vlan_filter_set = octeontx_dev_vlan_filter_set, 1277 .tx_queue_start = octeontx_dev_tx_queue_start, 1278 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1279 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1280 .tx_queue_release = octeontx_dev_tx_queue_release, 1281 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1282 .rx_queue_release = octeontx_dev_rx_queue_release, 1283 .dev_set_link_up = octeontx_dev_set_link_up, 1284 .dev_set_link_down = octeontx_dev_set_link_down, 1285 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1286 .mtu_set = octeontx_dev_mtu_set, 1287 .pool_ops_supported = octeontx_pool_ops, 1288 .flow_ctrl_get = octeontx_dev_flow_ctrl_get, 1289 .flow_ctrl_set = octeontx_dev_flow_ctrl_set, 1290 }; 1291 1292 /* Create Ethdev interface per BGX LMAC ports */ 1293 static int 1294 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1295 int socket_id) 1296 { 1297 int res; 1298 size_t pko_vfid; 1299 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1300 struct octeontx_nic *nic = NULL; 1301 struct rte_eth_dev *eth_dev = NULL; 1302 struct rte_eth_dev_data *data; 1303 const char *name = rte_vdev_device_name(dev); 1304 int max_entries; 1305 1306 PMD_INIT_FUNC_TRACE(); 1307 1308 sprintf(octtx_name, "%s_%d", name, port); 1309 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1310 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1311 if (eth_dev == NULL) 1312 return -ENODEV; 1313 1314 eth_dev->dev_ops = &octeontx_dev_ops; 1315 eth_dev->device = &dev->device; 1316 octeontx_set_tx_function(eth_dev); 1317 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1318 rte_eth_dev_probing_finish(eth_dev); 1319 return 0; 1320 } 1321 1322 /* Reserve an ethdev entry */ 1323 eth_dev = rte_eth_dev_allocate(octtx_name); 1324 if (eth_dev == NULL) { 1325 octeontx_log_err("failed to allocate rte_eth_dev"); 1326 res = -ENOMEM; 1327 goto err; 1328 } 1329 data = eth_dev->data; 1330 1331 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1332 if (nic == NULL) { 1333 octeontx_log_err("failed to allocate nic structure"); 1334 res = -ENOMEM; 1335 goto err; 1336 } 1337 data->dev_private = nic; 1338 pko_vfid = octeontx_pko_get_vfid(); 1339 1340 if (pko_vfid == SIZE_MAX) { 1341 octeontx_log_err("failed to get pko vfid"); 1342 res = -ENODEV; 1343 goto err; 1344 } 1345 1346 nic->pko_vfid = pko_vfid; 1347 nic->port_id = port; 1348 nic->evdev = evdev; 1349 1350 res = octeontx_port_open(nic); 1351 if (res < 0) 1352 goto err; 1353 1354 /* Rx side port configuration */ 1355 res = octeontx_pki_port_open(port); 1356 if (res != 0) { 1357 octeontx_log_err("failed to open PKI port %d", port); 1358 res = -ENODEV; 1359 goto err; 1360 } 1361 1362 eth_dev->device = &dev->device; 1363 eth_dev->intr_handle = NULL; 1364 eth_dev->data->numa_node = dev->device.numa_node; 1365 1366 data->port_id = eth_dev->data->port_id; 1367 1368 nic->ev_queues = 1; 1369 nic->ev_ports = 1; 1370 nic->print_flag = -1; 1371 1372 data->dev_link.link_status = ETH_LINK_DOWN; 1373 data->dev_started = 0; 1374 data->promiscuous = 0; 1375 data->all_multicast = 0; 1376 data->scattered_rx = 0; 1377 data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1378 1379 /* Get maximum number of supported MAC entries */ 1380 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1381 if (max_entries < 0) { 1382 octeontx_log_err("Failed to get max entries for mac addr"); 1383 res = -ENOTSUP; 1384 goto err; 1385 } 1386 1387 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1388 RTE_ETHER_ADDR_LEN, 0, 1389 socket_id); 1390 if (data->mac_addrs == NULL) { 1391 octeontx_log_err("failed to allocate memory for mac_addrs"); 1392 res = -ENOMEM; 1393 goto err; 1394 } 1395 1396 eth_dev->dev_ops = &octeontx_dev_ops; 1397 1398 /* Finally save ethdev pointer to the NIC structure */ 1399 nic->dev = eth_dev; 1400 1401 if (nic->port_id != data->port_id) { 1402 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1403 data->port_id, nic->port_id); 1404 res = -EINVAL; 1405 goto free_mac_addrs; 1406 } 1407 1408 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 1409 octeontx_link_status_poll, nic); 1410 if (res) { 1411 octeontx_log_err("Failed to start link polling alarm"); 1412 goto err; 1413 } 1414 1415 /* Update port_id mac to eth_dev */ 1416 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1417 1418 /* Update same mac address to BGX CAM table at index 0 */ 1419 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1420 1421 res = octeontx_dev_flow_ctrl_init(eth_dev); 1422 if (res < 0) 1423 goto err; 1424 1425 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1426 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1427 nic->port_id, nic->port_ena, 1428 nic->base_ochan, nic->num_ochans, 1429 nic->num_tx_queues); 1430 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu); 1431 1432 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1433 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1434 1435 rte_eth_dev_probing_finish(eth_dev); 1436 return data->port_id; 1437 1438 free_mac_addrs: 1439 rte_free(data->mac_addrs); 1440 data->mac_addrs = NULL; 1441 err: 1442 if (nic) 1443 octeontx_port_close(nic); 1444 1445 rte_eth_dev_release_port(eth_dev); 1446 1447 return res; 1448 } 1449 1450 /* Un initialize octeontx device */ 1451 static int 1452 octeontx_remove(struct rte_vdev_device *dev) 1453 { 1454 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1455 struct rte_eth_dev *eth_dev = NULL; 1456 struct octeontx_nic *nic = NULL; 1457 int i; 1458 1459 if (dev == NULL) 1460 return -EINVAL; 1461 1462 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1463 sprintf(octtx_name, "eth_octeontx_%d", i); 1464 1465 eth_dev = rte_eth_dev_allocated(octtx_name); 1466 if (eth_dev == NULL) 1467 continue; /* port already released */ 1468 1469 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1470 rte_eth_dev_release_port(eth_dev); 1471 continue; 1472 } 1473 1474 nic = octeontx_pmd_priv(eth_dev); 1475 rte_event_dev_stop(nic->evdev); 1476 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1477 octeontx_dev_close(eth_dev); 1478 rte_eth_dev_release_port(eth_dev); 1479 } 1480 1481 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1482 return 0; 1483 1484 /* Free FC resource */ 1485 octeontx_pko_fc_free(); 1486 1487 return 0; 1488 } 1489 1490 /* Initialize octeontx device */ 1491 static int 1492 octeontx_probe(struct rte_vdev_device *dev) 1493 { 1494 const char *dev_name; 1495 static int probe_once; 1496 uint8_t socket_id, qlist; 1497 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1498 struct rte_event_dev_config dev_conf; 1499 const char *eventdev_name = "event_octeontx"; 1500 struct rte_event_dev_info info; 1501 struct rte_eth_dev *eth_dev; 1502 1503 struct octeontx_vdev_init_params init_params = { 1504 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1505 }; 1506 1507 dev_name = rte_vdev_device_name(dev); 1508 1509 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1510 strlen(rte_vdev_device_args(dev)) == 0) { 1511 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1512 if (!eth_dev) { 1513 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1514 return -1; 1515 } 1516 /* TODO: request info from primary to set up Rx and Tx */ 1517 eth_dev->dev_ops = &octeontx_dev_ops; 1518 eth_dev->device = &dev->device; 1519 rte_eth_dev_probing_finish(eth_dev); 1520 return 0; 1521 } 1522 1523 res = octeontx_parse_vdev_init_params(&init_params, dev); 1524 if (res < 0) 1525 return -EINVAL; 1526 1527 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1528 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1529 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1530 return -ENOTSUP; 1531 } 1532 1533 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1534 1535 socket_id = rte_socket_id(); 1536 1537 tx_vfcnt = octeontx_pko_vf_count(); 1538 1539 if (tx_vfcnt < init_params.nr_port) { 1540 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1541 tx_vfcnt, init_params.nr_port); 1542 return -EINVAL; 1543 } 1544 evdev = rte_event_dev_get_dev_id(eventdev_name); 1545 if (evdev < 0) { 1546 octeontx_log_err("eventdev %s not found", eventdev_name); 1547 return -ENODEV; 1548 } 1549 1550 res = rte_event_dev_info_get(evdev, &info); 1551 if (res < 0) { 1552 octeontx_log_err("failed to eventdev info %d", res); 1553 return -EINVAL; 1554 } 1555 1556 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1557 info.max_event_queues, info.max_event_ports); 1558 1559 if (octeontx_pko_init_fc(tx_vfcnt)) 1560 return -ENOMEM; 1561 1562 devconf_set_default_sane_values(&dev_conf, &info); 1563 res = rte_event_dev_configure(evdev, &dev_conf); 1564 if (res < 0) 1565 goto parse_error; 1566 1567 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1568 (uint32_t *)&pnum); 1569 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1570 (uint32_t *)&qnum); 1571 if (pnum < qnum) { 1572 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1573 pnum, qnum); 1574 res = -EINVAL; 1575 goto parse_error; 1576 } 1577 1578 /* Enable all queues available */ 1579 for (i = 0; i < qnum; i++) { 1580 res = rte_event_queue_setup(evdev, i, NULL); 1581 if (res < 0) { 1582 octeontx_log_err("failed to setup event_q(%d): res %d", 1583 i, res); 1584 goto parse_error; 1585 } 1586 } 1587 1588 /* Enable all ports available */ 1589 for (i = 0; i < pnum; i++) { 1590 res = rte_event_port_setup(evdev, i, NULL); 1591 if (res < 0) { 1592 res = -ENODEV; 1593 octeontx_log_err("failed to setup ev port(%d) res=%d", 1594 i, res); 1595 goto parse_error; 1596 } 1597 } 1598 1599 /* 1600 * Do 1:1 links for ports & queues. All queues would be mapped to 1601 * one port. If there are more ports than queues, then some ports 1602 * won't be linked to any queue. 1603 */ 1604 for (i = 0; i < qnum; i++) { 1605 /* Link one queue to one event port */ 1606 qlist = i; 1607 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1608 if (res < 0) { 1609 res = -ENODEV; 1610 octeontx_log_err("failed to link port (%d): res=%d", 1611 i, res); 1612 goto parse_error; 1613 } 1614 } 1615 1616 /* Create ethdev interface */ 1617 for (i = 0; i < init_params.nr_port; i++) { 1618 port_id = octeontx_create(dev, i, evdev, socket_id); 1619 if (port_id < 0) { 1620 octeontx_log_err("failed to create device %s", 1621 dev_name); 1622 res = -ENODEV; 1623 goto parse_error; 1624 } 1625 1626 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1627 port_id); 1628 } 1629 1630 if (probe_once) { 1631 octeontx_log_err("interface %s not supported", dev_name); 1632 octeontx_remove(dev); 1633 res = -ENOTSUP; 1634 goto parse_error; 1635 } 1636 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1637 probe_once = 1; 1638 1639 return 0; 1640 1641 parse_error: 1642 octeontx_pko_fc_free(); 1643 return res; 1644 } 1645 1646 static struct rte_vdev_driver octeontx_pmd_drv = { 1647 .probe = octeontx_probe, 1648 .remove = octeontx_remove, 1649 }; 1650 1651 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1652 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1653 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1654