1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct octeontx_vdev_init_params { 28 uint8_t nr_port; 29 }; 30 31 uint16_t 32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 33 34 enum octeontx_link_speed { 35 OCTEONTX_LINK_SPEED_SGMII, 36 OCTEONTX_LINK_SPEED_XAUI, 37 OCTEONTX_LINK_SPEED_RXAUI, 38 OCTEONTX_LINK_SPEED_10G_R, 39 OCTEONTX_LINK_SPEED_40G_R, 40 OCTEONTX_LINK_SPEED_RESERVE1, 41 OCTEONTX_LINK_SPEED_QSGMII, 42 OCTEONTX_LINK_SPEED_RESERVE2 43 }; 44 45 int otx_net_logtype_mbox; 46 int otx_net_logtype_init; 47 int otx_net_logtype_driver; 48 49 RTE_INIT(otx_net_init_log); 50 static void 51 otx_net_init_log(void) 52 { 53 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 54 if (otx_net_logtype_mbox >= 0) 55 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 56 57 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 58 if (otx_net_logtype_init >= 0) 59 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 60 61 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 62 if (otx_net_logtype_driver >= 0) 63 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 64 } 65 66 /* Parse integer from integer argument */ 67 static int 68 parse_integer_arg(const char *key __rte_unused, 69 const char *value, void *extra_args) 70 { 71 int *i = (int *)extra_args; 72 73 *i = atoi(value); 74 if (*i < 0) { 75 octeontx_log_err("argument has to be positive."); 76 return -1; 77 } 78 79 return 0; 80 } 81 82 static int 83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 84 struct rte_vdev_device *dev) 85 { 86 struct rte_kvargs *kvlist = NULL; 87 int ret = 0; 88 89 static const char * const octeontx_vdev_valid_params[] = { 90 OCTEONTX_VDEV_NR_PORT_ARG, 91 NULL 92 }; 93 94 const char *input_args = rte_vdev_device_args(dev); 95 if (params == NULL) 96 return -EINVAL; 97 98 99 if (input_args) { 100 kvlist = rte_kvargs_parse(input_args, 101 octeontx_vdev_valid_params); 102 if (kvlist == NULL) 103 return -1; 104 105 ret = rte_kvargs_process(kvlist, 106 OCTEONTX_VDEV_NR_PORT_ARG, 107 &parse_integer_arg, 108 ¶ms->nr_port); 109 if (ret < 0) 110 goto free_kvlist; 111 } 112 113 free_kvlist: 114 rte_kvargs_free(kvlist); 115 return ret; 116 } 117 118 static int 119 octeontx_port_open(struct octeontx_nic *nic) 120 { 121 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 122 int res; 123 124 res = 0; 125 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 126 PMD_INIT_FUNC_TRACE(); 127 128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 129 if (res < 0) { 130 octeontx_log_err("failed to open port %d", res); 131 return res; 132 } 133 134 nic->node = bgx_port_conf.node; 135 nic->port_ena = bgx_port_conf.enable; 136 nic->base_ichan = bgx_port_conf.base_chan; 137 nic->base_ochan = bgx_port_conf.base_chan; 138 nic->num_ichans = bgx_port_conf.num_chans; 139 nic->num_ochans = bgx_port_conf.num_chans; 140 nic->mtu = bgx_port_conf.mtu; 141 nic->bpen = bgx_port_conf.bpen; 142 nic->fcs_strip = bgx_port_conf.fcs_strip; 143 nic->bcast_mode = bgx_port_conf.bcast_mode; 144 nic->mcast_mode = bgx_port_conf.mcast_mode; 145 nic->speed = bgx_port_conf.mode; 146 147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_port_close(struct octeontx_nic *nic) 155 { 156 PMD_INIT_FUNC_TRACE(); 157 158 octeontx_bgx_port_close(nic->port_id); 159 octeontx_log_dbg("port closed %d", nic->port_id); 160 } 161 162 static int 163 octeontx_port_start(struct octeontx_nic *nic) 164 { 165 PMD_INIT_FUNC_TRACE(); 166 167 return octeontx_bgx_port_start(nic->port_id); 168 } 169 170 static int 171 octeontx_port_stop(struct octeontx_nic *nic) 172 { 173 PMD_INIT_FUNC_TRACE(); 174 175 return octeontx_bgx_port_stop(nic->port_id); 176 } 177 178 static void 179 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 180 { 181 struct rte_eth_dev *dev; 182 int res; 183 184 res = 0; 185 PMD_INIT_FUNC_TRACE(); 186 dev = nic->dev; 187 188 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 189 if (res < 0) 190 octeontx_log_err("failed to set promiscuous mode %d", 191 nic->port_id); 192 193 /* Set proper flag for the mode */ 194 dev->data->promiscuous = (en != 0) ? 1 : 0; 195 196 octeontx_log_dbg("port %d : promiscuous mode %s", 197 nic->port_id, en ? "set" : "unset"); 198 } 199 200 static int 201 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 202 { 203 octeontx_mbox_bgx_port_stats_t bgx_stats; 204 int res; 205 206 PMD_INIT_FUNC_TRACE(); 207 208 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 209 if (res < 0) { 210 octeontx_log_err("failed to get port stats %d", nic->port_id); 211 return res; 212 } 213 214 stats->ipackets = bgx_stats.rx_packets; 215 stats->ibytes = bgx_stats.rx_bytes; 216 stats->imissed = bgx_stats.rx_dropped; 217 stats->ierrors = bgx_stats.rx_errors; 218 stats->opackets = bgx_stats.tx_packets; 219 stats->obytes = bgx_stats.tx_bytes; 220 stats->oerrors = bgx_stats.tx_errors; 221 222 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 223 nic->port_id, stats->ipackets, stats->opackets); 224 225 return 0; 226 } 227 228 static void 229 octeontx_port_stats_clr(struct octeontx_nic *nic) 230 { 231 PMD_INIT_FUNC_TRACE(); 232 233 octeontx_bgx_port_stats_clr(nic->port_id); 234 } 235 236 static inline void 237 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 238 struct rte_event_dev_info *info) 239 { 240 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 241 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 242 243 dev_conf->nb_event_ports = info->max_event_ports; 244 dev_conf->nb_event_queues = info->max_event_queues; 245 246 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 247 dev_conf->nb_event_port_dequeue_depth = 248 info->max_event_port_dequeue_depth; 249 dev_conf->nb_event_port_enqueue_depth = 250 info->max_event_port_enqueue_depth; 251 dev_conf->nb_event_port_enqueue_depth = 252 info->max_event_port_enqueue_depth; 253 dev_conf->nb_events_limit = 254 info->max_num_events; 255 } 256 257 static int 258 octeontx_dev_configure(struct rte_eth_dev *dev) 259 { 260 struct rte_eth_dev_data *data = dev->data; 261 struct rte_eth_conf *conf = &data->dev_conf; 262 struct rte_eth_rxmode *rxmode = &conf->rxmode; 263 struct rte_eth_txmode *txmode = &conf->txmode; 264 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 265 int ret; 266 267 PMD_INIT_FUNC_TRACE(); 268 RTE_SET_USED(conf); 269 270 if (!rte_eal_has_hugepages()) { 271 octeontx_log_err("huge page is not configured"); 272 return -EINVAL; 273 } 274 275 if (txmode->mq_mode) { 276 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 277 return -EINVAL; 278 } 279 280 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 281 rxmode->mq_mode != ETH_MQ_RX_RSS) { 282 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 283 return -EINVAL; 284 } 285 286 if (!(rxmode->offloads & DEV_RX_OFFLOAD_CRC_STRIP)) { 287 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); 288 rxmode->offloads |= DEV_RX_OFFLOAD_CRC_STRIP; 289 } 290 291 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 292 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 293 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 294 } 295 296 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 297 octeontx_log_err("setting link speed/duplex not supported"); 298 return -EINVAL; 299 } 300 301 if (conf->dcb_capability_en) { 302 octeontx_log_err("DCB enable not supported"); 303 return -EINVAL; 304 } 305 306 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 307 octeontx_log_err("flow director not supported"); 308 return -EINVAL; 309 } 310 311 nic->num_tx_queues = dev->data->nb_tx_queues; 312 313 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ, 314 nic->num_tx_queues, 315 nic->base_ochan); 316 if (ret) { 317 octeontx_log_err("failed to open channel %d no-of-txq %d", 318 nic->base_ochan, nic->num_tx_queues); 319 return -EFAULT; 320 } 321 322 nic->pki.classifier_enable = false; 323 nic->pki.hash_enable = true; 324 nic->pki.initialized = false; 325 326 return 0; 327 } 328 329 static void 330 octeontx_dev_close(struct rte_eth_dev *dev) 331 { 332 struct octeontx_txq *txq = NULL; 333 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 334 unsigned int i; 335 int ret; 336 337 PMD_INIT_FUNC_TRACE(); 338 339 rte_event_dev_close(nic->evdev); 340 341 ret = octeontx_pko_channel_close(nic->base_ochan); 342 if (ret < 0) { 343 octeontx_log_err("failed to close channel %d VF%d %d %d", 344 nic->base_ochan, nic->port_id, nic->num_tx_queues, 345 ret); 346 } 347 /* Free txq resources for this port */ 348 for (i = 0; i < nic->num_tx_queues; i++) { 349 txq = dev->data->tx_queues[i]; 350 if (!txq) 351 continue; 352 353 rte_free(txq); 354 } 355 } 356 357 static int 358 octeontx_dev_start(struct rte_eth_dev *dev) 359 { 360 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 361 int ret; 362 363 ret = 0; 364 365 PMD_INIT_FUNC_TRACE(); 366 /* 367 * Tx start 368 */ 369 dev->tx_pkt_burst = octeontx_xmit_pkts; 370 ret = octeontx_pko_channel_start(nic->base_ochan); 371 if (ret < 0) { 372 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 373 nic->port_id, nic->num_tx_queues, nic->base_ochan, 374 ret); 375 goto error; 376 } 377 378 /* 379 * Rx start 380 */ 381 dev->rx_pkt_burst = octeontx_recv_pkts; 382 ret = octeontx_pki_port_start(nic->port_id); 383 if (ret < 0) { 384 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 385 goto channel_stop_error; 386 } 387 388 /* 389 * Start port 390 */ 391 ret = octeontx_port_start(nic); 392 if (ret < 0) { 393 octeontx_log_err("failed start port %d", ret); 394 goto pki_port_stop_error; 395 } 396 397 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 398 nic->base_ochan, nic->num_tx_queues, nic->port_id); 399 400 ret = rte_event_dev_start(nic->evdev); 401 if (ret < 0) { 402 octeontx_log_err("failed to start evdev: ret (%d)", ret); 403 goto pki_port_stop_error; 404 } 405 406 /* Success */ 407 return ret; 408 409 pki_port_stop_error: 410 octeontx_pki_port_stop(nic->port_id); 411 channel_stop_error: 412 octeontx_pko_channel_stop(nic->base_ochan); 413 error: 414 return ret; 415 } 416 417 static void 418 octeontx_dev_stop(struct rte_eth_dev *dev) 419 { 420 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 421 int ret; 422 423 PMD_INIT_FUNC_TRACE(); 424 425 rte_event_dev_stop(nic->evdev); 426 427 ret = octeontx_port_stop(nic); 428 if (ret < 0) { 429 octeontx_log_err("failed to req stop port %d res=%d", 430 nic->port_id, ret); 431 return; 432 } 433 434 ret = octeontx_pki_port_stop(nic->port_id); 435 if (ret < 0) { 436 octeontx_log_err("failed to stop pki port %d res=%d", 437 nic->port_id, ret); 438 return; 439 } 440 441 ret = octeontx_pko_channel_stop(nic->base_ochan); 442 if (ret < 0) { 443 octeontx_log_err("failed to stop channel %d VF%d %d %d", 444 nic->base_ochan, nic->port_id, nic->num_tx_queues, 445 ret); 446 return; 447 } 448 449 dev->tx_pkt_burst = NULL; 450 dev->rx_pkt_burst = NULL; 451 } 452 453 static void 454 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 455 { 456 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 457 458 PMD_INIT_FUNC_TRACE(); 459 octeontx_port_promisc_set(nic, 1); 460 } 461 462 static void 463 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 464 { 465 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 466 467 PMD_INIT_FUNC_TRACE(); 468 octeontx_port_promisc_set(nic, 0); 469 } 470 471 static int 472 octeontx_port_link_status(struct octeontx_nic *nic) 473 { 474 int res; 475 476 PMD_INIT_FUNC_TRACE(); 477 res = octeontx_bgx_port_link_status(nic->port_id); 478 if (res < 0) { 479 octeontx_log_err("failed to get port %d link status", 480 nic->port_id); 481 return res; 482 } 483 484 nic->link_up = (uint8_t)res; 485 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 486 487 return res; 488 } 489 490 /* 491 * Return 0 means link status changed, -1 means not changed 492 */ 493 static int 494 octeontx_dev_link_update(struct rte_eth_dev *dev, 495 int wait_to_complete __rte_unused) 496 { 497 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 498 struct rte_eth_link link; 499 int res; 500 501 PMD_INIT_FUNC_TRACE(); 502 503 res = octeontx_port_link_status(nic); 504 if (res < 0) { 505 octeontx_log_err("failed to request link status %d", res); 506 return res; 507 } 508 509 link.link_status = nic->link_up; 510 511 switch (nic->speed) { 512 case OCTEONTX_LINK_SPEED_SGMII: 513 link.link_speed = ETH_SPEED_NUM_1G; 514 break; 515 516 case OCTEONTX_LINK_SPEED_XAUI: 517 link.link_speed = ETH_SPEED_NUM_10G; 518 break; 519 520 case OCTEONTX_LINK_SPEED_RXAUI: 521 case OCTEONTX_LINK_SPEED_10G_R: 522 link.link_speed = ETH_SPEED_NUM_10G; 523 break; 524 case OCTEONTX_LINK_SPEED_QSGMII: 525 link.link_speed = ETH_SPEED_NUM_5G; 526 break; 527 case OCTEONTX_LINK_SPEED_40G_R: 528 link.link_speed = ETH_SPEED_NUM_40G; 529 break; 530 531 case OCTEONTX_LINK_SPEED_RESERVE1: 532 case OCTEONTX_LINK_SPEED_RESERVE2: 533 default: 534 link.link_speed = ETH_SPEED_NUM_NONE; 535 octeontx_log_err("incorrect link speed %d", nic->speed); 536 break; 537 } 538 539 link.link_duplex = ETH_LINK_FULL_DUPLEX; 540 link.link_autoneg = ETH_LINK_AUTONEG; 541 542 return rte_eth_linkstatus_set(dev, &link); 543 } 544 545 static int 546 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 547 { 548 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 549 550 PMD_INIT_FUNC_TRACE(); 551 return octeontx_port_stats(nic, stats); 552 } 553 554 static void 555 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 556 { 557 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 558 559 PMD_INIT_FUNC_TRACE(); 560 octeontx_port_stats_clr(nic); 561 } 562 563 static int 564 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 565 struct ether_addr *addr) 566 { 567 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 568 int ret; 569 570 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 571 if (ret != 0) 572 octeontx_log_err("failed to set MAC address on port %d", 573 nic->port_id); 574 575 return ret; 576 } 577 578 static void 579 octeontx_dev_info(struct rte_eth_dev *dev, 580 struct rte_eth_dev_info *dev_info) 581 { 582 RTE_SET_USED(dev); 583 584 /* Autonegotiation may be disabled */ 585 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 586 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 587 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 588 ETH_LINK_SPEED_40G; 589 590 dev_info->max_mac_addrs = 1; 591 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 592 dev_info->max_rx_queues = 1; 593 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 594 dev_info->min_rx_bufsize = 0; 595 596 dev_info->default_rxconf = (struct rte_eth_rxconf) { 597 .rx_free_thresh = 0, 598 .rx_drop_en = 0, 599 .offloads = OCTEONTX_RX_OFFLOADS, 600 }; 601 602 dev_info->default_txconf = (struct rte_eth_txconf) { 603 .tx_free_thresh = 0, 604 .offloads = OCTEONTX_TX_OFFLOADS, 605 }; 606 607 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 608 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 609 } 610 611 static void 612 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 613 { 614 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 615 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 616 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 617 } 618 619 static int 620 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 621 uint16_t qidx) 622 { 623 struct octeontx_txq *txq; 624 int res; 625 626 PMD_INIT_FUNC_TRACE(); 627 628 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 629 return 0; 630 631 txq = dev->data->tx_queues[qidx]; 632 633 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 634 &txq->dq, 635 sizeof(octeontx_dq_t), 636 txq->queue_id, 637 octeontx_dq_info_getter); 638 if (res < 0) { 639 res = -EFAULT; 640 goto close_port; 641 } 642 643 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 644 return res; 645 646 close_port: 647 (void)octeontx_port_stop(nic); 648 octeontx_pko_channel_stop(nic->base_ochan); 649 octeontx_pko_channel_close(nic->base_ochan); 650 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 651 return res; 652 } 653 654 static int 655 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 656 { 657 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 658 659 PMD_INIT_FUNC_TRACE(); 660 qidx = qidx % PKO_VF_NUM_DQ; 661 return octeontx_vf_start_tx_queue(dev, nic, qidx); 662 } 663 664 static inline int 665 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 666 uint16_t qidx) 667 { 668 int ret = 0; 669 670 RTE_SET_USED(nic); 671 PMD_INIT_FUNC_TRACE(); 672 673 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 674 return 0; 675 676 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 677 return ret; 678 } 679 680 static int 681 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 682 { 683 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 684 685 PMD_INIT_FUNC_TRACE(); 686 qidx = qidx % PKO_VF_NUM_DQ; 687 688 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 689 } 690 691 static void 692 octeontx_dev_tx_queue_release(void *tx_queue) 693 { 694 struct octeontx_txq *txq = tx_queue; 695 int res; 696 697 PMD_INIT_FUNC_TRACE(); 698 699 if (txq) { 700 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 701 if (res < 0) 702 octeontx_log_err("failed stop tx_queue(%d)\n", 703 txq->queue_id); 704 705 rte_free(txq); 706 } 707 } 708 709 static int 710 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 711 uint16_t nb_desc, unsigned int socket_id, 712 const struct rte_eth_txconf *tx_conf __rte_unused) 713 { 714 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 715 struct octeontx_txq *txq = NULL; 716 uint16_t dq_num; 717 int res = 0; 718 719 RTE_SET_USED(nb_desc); 720 RTE_SET_USED(socket_id); 721 722 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; 723 724 /* Socket id check */ 725 if (socket_id != (unsigned int)SOCKET_ID_ANY && 726 socket_id != (unsigned int)nic->node) 727 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 728 socket_id, nic->node); 729 730 /* Free memory prior to re-allocation if needed. */ 731 if (dev->data->tx_queues[qidx] != NULL) { 732 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 733 qidx); 734 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 735 dev->data->tx_queues[qidx] = NULL; 736 } 737 738 /* Allocating tx queue data structure */ 739 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 740 RTE_CACHE_LINE_SIZE, nic->node); 741 if (txq == NULL) { 742 octeontx_log_err("failed to allocate txq=%d", qidx); 743 res = -ENOMEM; 744 goto err; 745 } 746 747 txq->eth_dev = dev; 748 txq->queue_id = dq_num; 749 dev->data->tx_queues[qidx] = txq; 750 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 751 752 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 753 &txq->dq, 754 sizeof(octeontx_dq_t), 755 txq->queue_id, 756 octeontx_dq_info_getter); 757 if (res < 0) { 758 res = -EFAULT; 759 goto err; 760 } 761 762 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 763 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 764 txq->dq.ioreg_va, 765 txq->dq.fc_status_va); 766 767 return res; 768 769 err: 770 if (txq) 771 rte_free(txq); 772 773 return res; 774 } 775 776 static int 777 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 778 uint16_t nb_desc, unsigned int socket_id, 779 const struct rte_eth_rxconf *rx_conf, 780 struct rte_mempool *mb_pool) 781 { 782 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 783 struct rte_mempool_ops *mp_ops = NULL; 784 struct octeontx_rxq *rxq = NULL; 785 pki_pktbuf_cfg_t pktbuf_conf; 786 pki_hash_cfg_t pki_hash; 787 pki_qos_cfg_t pki_qos; 788 uintptr_t pool; 789 int ret, port; 790 uint8_t gaura; 791 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 792 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 793 794 RTE_SET_USED(nb_desc); 795 796 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 797 memset(&pki_hash, 0, sizeof(pki_hash)); 798 memset(&pki_qos, 0, sizeof(pki_qos)); 799 800 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 801 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 802 octeontx_log_err("failed to find octeontx_fpavf mempool"); 803 return -ENOTSUP; 804 } 805 806 /* Handle forbidden configurations */ 807 if (nic->pki.classifier_enable) { 808 octeontx_log_err("cannot setup queue %d. " 809 "Classifier option unsupported", qidx); 810 return -EINVAL; 811 } 812 813 port = nic->port_id; 814 815 /* Rx deferred start is not supported */ 816 if (rx_conf->rx_deferred_start) { 817 octeontx_log_err("rx deferred start not supported"); 818 return -EINVAL; 819 } 820 821 /* Verify queue index */ 822 if (qidx >= dev->data->nb_rx_queues) { 823 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 824 qidx, (dev->data->nb_rx_queues - 1)); 825 return -ENOTSUP; 826 } 827 828 /* Socket id check */ 829 if (socket_id != (unsigned int)SOCKET_ID_ANY && 830 socket_id != (unsigned int)nic->node) 831 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 832 socket_id, nic->node); 833 834 /* Allocating rx queue data structure */ 835 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 836 RTE_CACHE_LINE_SIZE, nic->node); 837 if (rxq == NULL) { 838 octeontx_log_err("failed to allocate rxq=%d", qidx); 839 return -ENOMEM; 840 } 841 842 if (!nic->pki.initialized) { 843 pktbuf_conf.port_type = 0; 844 pki_hash.port_type = 0; 845 pki_qos.port_type = 0; 846 847 pktbuf_conf.mmask.f_wqe_skip = 1; 848 pktbuf_conf.mmask.f_first_skip = 1; 849 pktbuf_conf.mmask.f_later_skip = 1; 850 pktbuf_conf.mmask.f_mbuff_size = 1; 851 pktbuf_conf.mmask.f_cache_mode = 1; 852 853 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 854 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP; 855 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 856 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 857 RTE_PKTMBUF_HEADROOM - 858 sizeof(struct rte_mbuf)); 859 860 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 861 862 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 863 if (ret != 0) { 864 octeontx_log_err("fail to configure pktbuf for port %d", 865 port); 866 rte_free(rxq); 867 return ret; 868 } 869 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 870 "\tmbuf_size:\t0x%0x\n" 871 "\twqe_skip:\t0x%0x\n" 872 "\tfirst_skip:\t0x%0x\n" 873 "\tlater_skip:\t0x%0x\n" 874 "\tcache_mode:\t%s\n", 875 port, 876 pktbuf_conf.mbuff_size, 877 pktbuf_conf.wqe_skip, 878 pktbuf_conf.first_skip, 879 pktbuf_conf.later_skip, 880 (pktbuf_conf.cache_mode == 881 PKI_OPC_MODE_STT) ? 882 "STT" : 883 (pktbuf_conf.cache_mode == 884 PKI_OPC_MODE_STF) ? 885 "STF" : 886 (pktbuf_conf.cache_mode == 887 PKI_OPC_MODE_STF1_STT) ? 888 "STF1_STT" : "STF2_STT"); 889 890 if (nic->pki.hash_enable) { 891 pki_hash.tag_dlc = 1; 892 pki_hash.tag_slc = 1; 893 pki_hash.tag_dlf = 1; 894 pki_hash.tag_slf = 1; 895 pki_hash.tag_prt = 1; 896 octeontx_pki_port_hash_config(port, &pki_hash); 897 } 898 899 pool = (uintptr_t)mb_pool->pool_id; 900 901 /* Get the gpool Id */ 902 gaura = octeontx_fpa_bufpool_gpool(pool); 903 904 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 905 pki_qos.num_entry = 1; 906 pki_qos.drop_policy = 0; 907 pki_qos.tag_type = 0L; 908 pki_qos.qos_entry[0].port_add = 0; 909 pki_qos.qos_entry[0].gaura = gaura; 910 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 911 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 912 pki_qos.qos_entry[0].grptag_bad = 0; 913 pki_qos.qos_entry[0].grptag_ok = 0; 914 915 ret = octeontx_pki_port_create_qos(port, &pki_qos); 916 if (ret < 0) { 917 octeontx_log_err("failed to create QOS port=%d, q=%d", 918 port, qidx); 919 rte_free(rxq); 920 return ret; 921 } 922 nic->pki.initialized = true; 923 } 924 925 rxq->port_id = nic->port_id; 926 rxq->eth_dev = dev; 927 rxq->queue_id = qidx; 928 rxq->evdev = nic->evdev; 929 rxq->ev_queues = ev_queues; 930 rxq->ev_ports = ev_ports; 931 932 dev->data->rx_queues[qidx] = rxq; 933 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 934 return 0; 935 } 936 937 static void 938 octeontx_dev_rx_queue_release(void *rxq) 939 { 940 rte_free(rxq); 941 } 942 943 static const uint32_t * 944 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 945 { 946 static const uint32_t ptypes[] = { 947 RTE_PTYPE_L3_IPV4, 948 RTE_PTYPE_L3_IPV4_EXT, 949 RTE_PTYPE_L3_IPV6, 950 RTE_PTYPE_L3_IPV6_EXT, 951 RTE_PTYPE_L4_TCP, 952 RTE_PTYPE_L4_UDP, 953 RTE_PTYPE_L4_FRAG, 954 RTE_PTYPE_UNKNOWN 955 }; 956 957 if (dev->rx_pkt_burst == octeontx_recv_pkts) 958 return ptypes; 959 960 return NULL; 961 } 962 963 static int 964 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 965 { 966 RTE_SET_USED(dev); 967 968 if (!strcmp(pool, "octeontx_fpavf")) 969 return 0; 970 971 return -ENOTSUP; 972 } 973 974 /* Initialize and register driver with DPDK Application */ 975 static const struct eth_dev_ops octeontx_dev_ops = { 976 .dev_configure = octeontx_dev_configure, 977 .dev_infos_get = octeontx_dev_info, 978 .dev_close = octeontx_dev_close, 979 .dev_start = octeontx_dev_start, 980 .dev_stop = octeontx_dev_stop, 981 .promiscuous_enable = octeontx_dev_promisc_enable, 982 .promiscuous_disable = octeontx_dev_promisc_disable, 983 .link_update = octeontx_dev_link_update, 984 .stats_get = octeontx_dev_stats_get, 985 .stats_reset = octeontx_dev_stats_reset, 986 .mac_addr_set = octeontx_dev_default_mac_addr_set, 987 .tx_queue_start = octeontx_dev_tx_queue_start, 988 .tx_queue_stop = octeontx_dev_tx_queue_stop, 989 .tx_queue_setup = octeontx_dev_tx_queue_setup, 990 .tx_queue_release = octeontx_dev_tx_queue_release, 991 .rx_queue_setup = octeontx_dev_rx_queue_setup, 992 .rx_queue_release = octeontx_dev_rx_queue_release, 993 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 994 .pool_ops_supported = octeontx_pool_ops, 995 }; 996 997 /* Create Ethdev interface per BGX LMAC ports */ 998 static int 999 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1000 int socket_id) 1001 { 1002 int res; 1003 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1004 struct octeontx_nic *nic = NULL; 1005 struct rte_eth_dev *eth_dev = NULL; 1006 struct rte_eth_dev_data *data; 1007 const char *name = rte_vdev_device_name(dev); 1008 1009 PMD_INIT_FUNC_TRACE(); 1010 1011 sprintf(octtx_name, "%s_%d", name, port); 1012 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1013 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1014 if (eth_dev == NULL) 1015 return -ENODEV; 1016 1017 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1018 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1019 return 0; 1020 } 1021 1022 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1023 if (nic == NULL) { 1024 octeontx_log_err("failed to allocate nic structure"); 1025 res = -ENOMEM; 1026 goto err; 1027 } 1028 1029 nic->port_id = port; 1030 nic->evdev = evdev; 1031 1032 res = octeontx_port_open(nic); 1033 if (res < 0) 1034 goto err; 1035 1036 /* Rx side port configuration */ 1037 res = octeontx_pki_port_open(port); 1038 if (res != 0) { 1039 octeontx_log_err("failed to open PKI port %d", port); 1040 res = -ENODEV; 1041 goto err; 1042 } 1043 1044 /* Reserve an ethdev entry */ 1045 eth_dev = rte_eth_dev_allocate(octtx_name); 1046 if (eth_dev == NULL) { 1047 octeontx_log_err("failed to allocate rte_eth_dev"); 1048 res = -ENOMEM; 1049 goto err; 1050 } 1051 1052 eth_dev->device = &dev->device; 1053 eth_dev->intr_handle = NULL; 1054 eth_dev->data->kdrv = RTE_KDRV_NONE; 1055 eth_dev->data->numa_node = dev->device.numa_node; 1056 1057 data = eth_dev->data; 1058 data->dev_private = nic; 1059 data->port_id = eth_dev->data->port_id; 1060 1061 nic->ev_queues = 1; 1062 nic->ev_ports = 1; 1063 1064 data->dev_link.link_status = ETH_LINK_DOWN; 1065 data->dev_started = 0; 1066 data->promiscuous = 0; 1067 data->all_multicast = 0; 1068 data->scattered_rx = 0; 1069 1070 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0, 1071 socket_id); 1072 if (data->mac_addrs == NULL) { 1073 octeontx_log_err("failed to allocate memory for mac_addrs"); 1074 res = -ENOMEM; 1075 goto err; 1076 } 1077 1078 eth_dev->dev_ops = &octeontx_dev_ops; 1079 1080 /* Finally save ethdev pointer to the NIC structure */ 1081 nic->dev = eth_dev; 1082 1083 if (nic->port_id != data->port_id) { 1084 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1085 data->port_id, nic->port_id); 1086 res = -EINVAL; 1087 goto err; 1088 } 1089 1090 /* Update port_id mac to eth_dev */ 1091 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN); 1092 1093 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1094 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1095 nic->port_id, nic->port_ena, 1096 nic->base_ochan, nic->num_ochans, 1097 nic->num_tx_queues); 1098 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1099 1100 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1101 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1102 1103 return data->port_id; 1104 1105 err: 1106 if (nic) 1107 octeontx_port_close(nic); 1108 1109 if (eth_dev != NULL) { 1110 rte_free(eth_dev->data->mac_addrs); 1111 rte_free(data); 1112 rte_free(nic); 1113 rte_eth_dev_release_port(eth_dev); 1114 } 1115 1116 return res; 1117 } 1118 1119 /* Un initialize octeontx device */ 1120 static int 1121 octeontx_remove(struct rte_vdev_device *dev) 1122 { 1123 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1124 struct rte_eth_dev *eth_dev = NULL; 1125 struct octeontx_nic *nic = NULL; 1126 int i; 1127 1128 if (dev == NULL) 1129 return -EINVAL; 1130 1131 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1132 sprintf(octtx_name, "eth_octeontx_%d", i); 1133 1134 /* reserve an ethdev entry */ 1135 eth_dev = rte_eth_dev_allocated(octtx_name); 1136 if (eth_dev == NULL) 1137 return -ENODEV; 1138 1139 nic = octeontx_pmd_priv(eth_dev); 1140 rte_event_dev_stop(nic->evdev); 1141 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1142 1143 rte_free(eth_dev->data->mac_addrs); 1144 rte_free(eth_dev->data->dev_private); 1145 rte_eth_dev_release_port(eth_dev); 1146 rte_event_dev_close(nic->evdev); 1147 } 1148 1149 /* Free FC resource */ 1150 octeontx_pko_fc_free(); 1151 1152 return 0; 1153 } 1154 1155 /* Initialize octeontx device */ 1156 static int 1157 octeontx_probe(struct rte_vdev_device *dev) 1158 { 1159 const char *dev_name; 1160 static int probe_once; 1161 uint8_t socket_id, qlist; 1162 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1163 struct rte_event_dev_config dev_conf; 1164 const char *eventdev_name = "event_octeontx"; 1165 struct rte_event_dev_info info; 1166 struct rte_eth_dev *eth_dev; 1167 1168 struct octeontx_vdev_init_params init_params = { 1169 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1170 }; 1171 1172 dev_name = rte_vdev_device_name(dev); 1173 1174 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1175 strlen(rte_vdev_device_args(dev)) == 0) { 1176 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1177 if (!eth_dev) { 1178 RTE_LOG(ERR, PMD, "Failed to probe %s\n", dev_name); 1179 return -1; 1180 } 1181 /* TODO: request info from primary to set up Rx and Tx */ 1182 eth_dev->dev_ops = &octeontx_dev_ops; 1183 return 0; 1184 } 1185 1186 res = octeontx_parse_vdev_init_params(&init_params, dev); 1187 if (res < 0) 1188 return -EINVAL; 1189 1190 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1191 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1192 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1193 return -ENOTSUP; 1194 } 1195 1196 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1197 1198 socket_id = rte_socket_id(); 1199 1200 tx_vfcnt = octeontx_pko_vf_count(); 1201 1202 if (tx_vfcnt < init_params.nr_port) { 1203 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1204 tx_vfcnt, init_params.nr_port); 1205 return -EINVAL; 1206 } 1207 evdev = rte_event_dev_get_dev_id(eventdev_name); 1208 if (evdev < 0) { 1209 octeontx_log_err("eventdev %s not found", eventdev_name); 1210 return -ENODEV; 1211 } 1212 1213 res = rte_event_dev_info_get(evdev, &info); 1214 if (res < 0) { 1215 octeontx_log_err("failed to eventdev info %d", res); 1216 return -EINVAL; 1217 } 1218 1219 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1220 info.max_event_queues, info.max_event_ports); 1221 1222 if (octeontx_pko_init_fc(tx_vfcnt)) 1223 return -ENOMEM; 1224 1225 devconf_set_default_sane_values(&dev_conf, &info); 1226 res = rte_event_dev_configure(evdev, &dev_conf); 1227 if (res < 0) 1228 goto parse_error; 1229 1230 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1231 (uint32_t *)&pnum); 1232 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1233 (uint32_t *)&qnum); 1234 if (pnum < qnum) { 1235 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1236 pnum, qnum); 1237 res = -EINVAL; 1238 goto parse_error; 1239 } 1240 if (pnum > qnum) { 1241 /* 1242 * We don't poll on event ports 1243 * that do not have any queues assigned. 1244 */ 1245 pnum = qnum; 1246 PMD_INIT_LOG(INFO, 1247 "reducing number of active event ports to %d", pnum); 1248 } 1249 for (i = 0; i < qnum; i++) { 1250 res = rte_event_queue_setup(evdev, i, NULL); 1251 if (res < 0) { 1252 octeontx_log_err("failed to setup event_q(%d): res %d", 1253 i, res); 1254 goto parse_error; 1255 } 1256 } 1257 1258 for (i = 0; i < pnum; i++) { 1259 res = rte_event_port_setup(evdev, i, NULL); 1260 if (res < 0) { 1261 res = -ENODEV; 1262 octeontx_log_err("failed to setup ev port(%d) res=%d", 1263 i, res); 1264 goto parse_error; 1265 } 1266 /* Link one queue to one event port */ 1267 qlist = i; 1268 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1269 if (res < 0) { 1270 res = -ENODEV; 1271 octeontx_log_err("failed to link port (%d): res=%d", 1272 i, res); 1273 goto parse_error; 1274 } 1275 } 1276 1277 /* Create ethdev interface */ 1278 for (i = 0; i < init_params.nr_port; i++) { 1279 port_id = octeontx_create(dev, i, evdev, socket_id); 1280 if (port_id < 0) { 1281 octeontx_log_err("failed to create device %s", 1282 dev_name); 1283 res = -ENODEV; 1284 goto parse_error; 1285 } 1286 1287 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1288 port_id); 1289 } 1290 1291 if (probe_once) { 1292 octeontx_log_err("interface %s not supported", dev_name); 1293 octeontx_remove(dev); 1294 res = -ENOTSUP; 1295 goto parse_error; 1296 } 1297 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1298 probe_once = 1; 1299 1300 return 0; 1301 1302 parse_error: 1303 octeontx_pko_fc_free(); 1304 return res; 1305 } 1306 1307 static struct rte_vdev_driver octeontx_pmd_drv = { 1308 .probe = octeontx_probe, 1309 .remove = octeontx_remove, 1310 }; 1311 1312 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1313 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1314 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1315