xref: /dpdk/drivers/net/octeontx/octeontx_ethdev.c (revision bb44fb6fe7713ddcd023d5b9bacadf074d68092e)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Cavium, Inc
3  */
4 
5 #include <stdio.h>
6 #include <stdarg.h>
7 #include <stdbool.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
16 #include <rte_dev.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
22 
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
26 
27 struct octeontx_vdev_init_params {
28 	uint8_t	nr_port;
29 };
30 
31 uint16_t
32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
33 
34 enum octeontx_link_speed {
35 	OCTEONTX_LINK_SPEED_SGMII,
36 	OCTEONTX_LINK_SPEED_XAUI,
37 	OCTEONTX_LINK_SPEED_RXAUI,
38 	OCTEONTX_LINK_SPEED_10G_R,
39 	OCTEONTX_LINK_SPEED_40G_R,
40 	OCTEONTX_LINK_SPEED_RESERVE1,
41 	OCTEONTX_LINK_SPEED_QSGMII,
42 	OCTEONTX_LINK_SPEED_RESERVE2
43 };
44 
45 int otx_net_logtype_mbox;
46 int otx_net_logtype_init;
47 int otx_net_logtype_driver;
48 
49 RTE_INIT(otx_net_init_log)
50 {
51 	otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
52 	if (otx_net_logtype_mbox >= 0)
53 		rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
54 
55 	otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
56 	if (otx_net_logtype_init >= 0)
57 		rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
58 
59 	otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
60 	if (otx_net_logtype_driver >= 0)
61 		rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
62 }
63 
64 /* Parse integer from integer argument */
65 static int
66 parse_integer_arg(const char *key __rte_unused,
67 		const char *value, void *extra_args)
68 {
69 	int *i = (int *)extra_args;
70 
71 	*i = atoi(value);
72 	if (*i < 0) {
73 		octeontx_log_err("argument has to be positive.");
74 		return -1;
75 	}
76 
77 	return 0;
78 }
79 
80 static int
81 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
82 				struct rte_vdev_device *dev)
83 {
84 	struct rte_kvargs *kvlist = NULL;
85 	int ret = 0;
86 
87 	static const char * const octeontx_vdev_valid_params[] = {
88 		OCTEONTX_VDEV_NR_PORT_ARG,
89 		NULL
90 	};
91 
92 	const char *input_args = rte_vdev_device_args(dev);
93 	if (params == NULL)
94 		return -EINVAL;
95 
96 
97 	if (input_args) {
98 		kvlist = rte_kvargs_parse(input_args,
99 				octeontx_vdev_valid_params);
100 		if (kvlist == NULL)
101 			return -1;
102 
103 		ret = rte_kvargs_process(kvlist,
104 					OCTEONTX_VDEV_NR_PORT_ARG,
105 					&parse_integer_arg,
106 					&params->nr_port);
107 		if (ret < 0)
108 			goto free_kvlist;
109 	}
110 
111 free_kvlist:
112 	rte_kvargs_free(kvlist);
113 	return ret;
114 }
115 
116 static int
117 octeontx_port_open(struct octeontx_nic *nic)
118 {
119 	octeontx_mbox_bgx_port_conf_t bgx_port_conf;
120 	int res;
121 
122 	res = 0;
123 	memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
124 	PMD_INIT_FUNC_TRACE();
125 
126 	res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
127 	if (res < 0) {
128 		octeontx_log_err("failed to open port %d", res);
129 		return res;
130 	}
131 
132 	nic->node = bgx_port_conf.node;
133 	nic->port_ena = bgx_port_conf.enable;
134 	nic->base_ichan = bgx_port_conf.base_chan;
135 	nic->base_ochan = bgx_port_conf.base_chan;
136 	nic->num_ichans = bgx_port_conf.num_chans;
137 	nic->num_ochans = bgx_port_conf.num_chans;
138 	nic->mtu = bgx_port_conf.mtu;
139 	nic->bpen = bgx_port_conf.bpen;
140 	nic->fcs_strip = bgx_port_conf.fcs_strip;
141 	nic->bcast_mode = bgx_port_conf.bcast_mode;
142 	nic->mcast_mode = bgx_port_conf.mcast_mode;
143 	nic->speed	= bgx_port_conf.mode;
144 
145 	memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
146 
147 	octeontx_log_dbg("port opened %d", nic->port_id);
148 	return res;
149 }
150 
151 static void
152 octeontx_port_close(struct octeontx_nic *nic)
153 {
154 	PMD_INIT_FUNC_TRACE();
155 
156 	octeontx_bgx_port_close(nic->port_id);
157 	octeontx_log_dbg("port closed %d", nic->port_id);
158 }
159 
160 static int
161 octeontx_port_start(struct octeontx_nic *nic)
162 {
163 	PMD_INIT_FUNC_TRACE();
164 
165 	return octeontx_bgx_port_start(nic->port_id);
166 }
167 
168 static int
169 octeontx_port_stop(struct octeontx_nic *nic)
170 {
171 	PMD_INIT_FUNC_TRACE();
172 
173 	return octeontx_bgx_port_stop(nic->port_id);
174 }
175 
176 static void
177 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
178 {
179 	struct rte_eth_dev *dev;
180 	int res;
181 
182 	res = 0;
183 	PMD_INIT_FUNC_TRACE();
184 	dev = nic->dev;
185 
186 	res = octeontx_bgx_port_promisc_set(nic->port_id, en);
187 	if (res < 0)
188 		octeontx_log_err("failed to set promiscuous mode %d",
189 				nic->port_id);
190 
191 	/* Set proper flag for the mode */
192 	dev->data->promiscuous = (en != 0) ? 1 : 0;
193 
194 	octeontx_log_dbg("port %d : promiscuous mode %s",
195 			nic->port_id, en ? "set" : "unset");
196 }
197 
198 static int
199 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
200 {
201 	octeontx_mbox_bgx_port_stats_t bgx_stats;
202 	int res;
203 
204 	PMD_INIT_FUNC_TRACE();
205 
206 	res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
207 	if (res < 0) {
208 		octeontx_log_err("failed to get port stats %d", nic->port_id);
209 		return res;
210 	}
211 
212 	stats->ipackets = bgx_stats.rx_packets;
213 	stats->ibytes = bgx_stats.rx_bytes;
214 	stats->imissed = bgx_stats.rx_dropped;
215 	stats->ierrors = bgx_stats.rx_errors;
216 	stats->opackets = bgx_stats.tx_packets;
217 	stats->obytes = bgx_stats.tx_bytes;
218 	stats->oerrors = bgx_stats.tx_errors;
219 
220 	octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
221 			nic->port_id, stats->ipackets, stats->opackets);
222 
223 	return 0;
224 }
225 
226 static void
227 octeontx_port_stats_clr(struct octeontx_nic *nic)
228 {
229 	PMD_INIT_FUNC_TRACE();
230 
231 	octeontx_bgx_port_stats_clr(nic->port_id);
232 }
233 
234 static inline void
235 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
236 				struct rte_event_dev_info *info)
237 {
238 	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
239 	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
240 
241 	dev_conf->nb_event_ports = info->max_event_ports;
242 	dev_conf->nb_event_queues = info->max_event_queues;
243 
244 	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
245 	dev_conf->nb_event_port_dequeue_depth =
246 			info->max_event_port_dequeue_depth;
247 	dev_conf->nb_event_port_enqueue_depth =
248 			info->max_event_port_enqueue_depth;
249 	dev_conf->nb_event_port_enqueue_depth =
250 			info->max_event_port_enqueue_depth;
251 	dev_conf->nb_events_limit =
252 			info->max_num_events;
253 }
254 
255 static int
256 octeontx_dev_configure(struct rte_eth_dev *dev)
257 {
258 	struct rte_eth_dev_data *data = dev->data;
259 	struct rte_eth_conf *conf = &data->dev_conf;
260 	struct rte_eth_rxmode *rxmode = &conf->rxmode;
261 	struct rte_eth_txmode *txmode = &conf->txmode;
262 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
263 	int ret;
264 
265 	PMD_INIT_FUNC_TRACE();
266 	RTE_SET_USED(conf);
267 
268 	if (!rte_eal_has_hugepages()) {
269 		octeontx_log_err("huge page is not configured");
270 		return -EINVAL;
271 	}
272 
273 	if (txmode->mq_mode) {
274 		octeontx_log_err("tx mq_mode DCB or VMDq not supported");
275 		return -EINVAL;
276 	}
277 
278 	if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
279 		rxmode->mq_mode != ETH_MQ_RX_RSS) {
280 		octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
281 		return -EINVAL;
282 	}
283 
284 	/* KEEP_CRC offload flag is not supported by PMD
285 	 * can remove the below block when DEV_RX_OFFLOAD_CRC_STRIP removed
286 	 */
287 	if (rte_eth_dev_must_keep_crc(rxmode->offloads)) {
288 		PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
289 		rxmode->offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
290 	}
291 
292 	if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
293 		PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
294 		txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
295 	}
296 
297 	if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
298 		octeontx_log_err("setting link speed/duplex not supported");
299 		return -EINVAL;
300 	}
301 
302 	if (conf->dcb_capability_en) {
303 		octeontx_log_err("DCB enable not supported");
304 		return -EINVAL;
305 	}
306 
307 	if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
308 		octeontx_log_err("flow director not supported");
309 		return -EINVAL;
310 	}
311 
312 	nic->num_tx_queues = dev->data->nb_tx_queues;
313 
314 	ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
315 					nic->num_tx_queues,
316 					nic->base_ochan);
317 	if (ret) {
318 		octeontx_log_err("failed to open channel %d no-of-txq %d",
319 			   nic->base_ochan, nic->num_tx_queues);
320 		return -EFAULT;
321 	}
322 
323 	nic->pki.classifier_enable = false;
324 	nic->pki.hash_enable = true;
325 	nic->pki.initialized = false;
326 
327 	return 0;
328 }
329 
330 static void
331 octeontx_dev_close(struct rte_eth_dev *dev)
332 {
333 	struct octeontx_txq *txq = NULL;
334 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
335 	unsigned int i;
336 	int ret;
337 
338 	PMD_INIT_FUNC_TRACE();
339 
340 	rte_event_dev_close(nic->evdev);
341 
342 	ret = octeontx_pko_channel_close(nic->base_ochan);
343 	if (ret < 0) {
344 		octeontx_log_err("failed to close channel %d VF%d %d %d",
345 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
346 			     ret);
347 	}
348 	/* Free txq resources for this port */
349 	for (i = 0; i < nic->num_tx_queues; i++) {
350 		txq = dev->data->tx_queues[i];
351 		if (!txq)
352 			continue;
353 
354 		rte_free(txq);
355 	}
356 }
357 
358 static int
359 octeontx_dev_start(struct rte_eth_dev *dev)
360 {
361 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
362 	int ret;
363 
364 	ret = 0;
365 
366 	PMD_INIT_FUNC_TRACE();
367 	/*
368 	 * Tx start
369 	 */
370 	dev->tx_pkt_burst = octeontx_xmit_pkts;
371 	ret = octeontx_pko_channel_start(nic->base_ochan);
372 	if (ret < 0) {
373 		octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
374 			   nic->port_id, nic->num_tx_queues, nic->base_ochan,
375 			   ret);
376 		goto error;
377 	}
378 
379 	/*
380 	 * Rx start
381 	 */
382 	dev->rx_pkt_burst = octeontx_recv_pkts;
383 	ret = octeontx_pki_port_start(nic->port_id);
384 	if (ret < 0) {
385 		octeontx_log_err("fail to start Rx on port %d", nic->port_id);
386 		goto channel_stop_error;
387 	}
388 
389 	/*
390 	 * Start port
391 	 */
392 	ret = octeontx_port_start(nic);
393 	if (ret < 0) {
394 		octeontx_log_err("failed start port %d", ret);
395 		goto pki_port_stop_error;
396 	}
397 
398 	PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
399 			nic->base_ochan, nic->num_tx_queues, nic->port_id);
400 
401 	ret = rte_event_dev_start(nic->evdev);
402 	if (ret < 0) {
403 		octeontx_log_err("failed to start evdev: ret (%d)", ret);
404 		goto pki_port_stop_error;
405 	}
406 
407 	/* Success */
408 	return ret;
409 
410 pki_port_stop_error:
411 	octeontx_pki_port_stop(nic->port_id);
412 channel_stop_error:
413 	octeontx_pko_channel_stop(nic->base_ochan);
414 error:
415 	return ret;
416 }
417 
418 static void
419 octeontx_dev_stop(struct rte_eth_dev *dev)
420 {
421 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
422 	int ret;
423 
424 	PMD_INIT_FUNC_TRACE();
425 
426 	rte_event_dev_stop(nic->evdev);
427 
428 	ret = octeontx_port_stop(nic);
429 	if (ret < 0) {
430 		octeontx_log_err("failed to req stop port %d res=%d",
431 					nic->port_id, ret);
432 		return;
433 	}
434 
435 	ret = octeontx_pki_port_stop(nic->port_id);
436 	if (ret < 0) {
437 		octeontx_log_err("failed to stop pki port %d res=%d",
438 					nic->port_id, ret);
439 		return;
440 	}
441 
442 	ret = octeontx_pko_channel_stop(nic->base_ochan);
443 	if (ret < 0) {
444 		octeontx_log_err("failed to stop channel %d VF%d %d %d",
445 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
446 			     ret);
447 		return;
448 	}
449 
450 	dev->tx_pkt_burst = NULL;
451 	dev->rx_pkt_burst = NULL;
452 }
453 
454 static void
455 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
456 {
457 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
458 
459 	PMD_INIT_FUNC_TRACE();
460 	octeontx_port_promisc_set(nic, 1);
461 }
462 
463 static void
464 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
465 {
466 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
467 
468 	PMD_INIT_FUNC_TRACE();
469 	octeontx_port_promisc_set(nic, 0);
470 }
471 
472 static int
473 octeontx_port_link_status(struct octeontx_nic *nic)
474 {
475 	int res;
476 
477 	PMD_INIT_FUNC_TRACE();
478 	res = octeontx_bgx_port_link_status(nic->port_id);
479 	if (res < 0) {
480 		octeontx_log_err("failed to get port %d link status",
481 				nic->port_id);
482 		return res;
483 	}
484 
485 	nic->link_up = (uint8_t)res;
486 	octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
487 
488 	return res;
489 }
490 
491 /*
492  * Return 0 means link status changed, -1 means not changed
493  */
494 static int
495 octeontx_dev_link_update(struct rte_eth_dev *dev,
496 			 int wait_to_complete __rte_unused)
497 {
498 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
499 	struct rte_eth_link link;
500 	int res;
501 
502 	PMD_INIT_FUNC_TRACE();
503 
504 	res = octeontx_port_link_status(nic);
505 	if (res < 0) {
506 		octeontx_log_err("failed to request link status %d", res);
507 		return res;
508 	}
509 
510 	link.link_status = nic->link_up;
511 
512 	switch (nic->speed) {
513 	case OCTEONTX_LINK_SPEED_SGMII:
514 		link.link_speed = ETH_SPEED_NUM_1G;
515 		break;
516 
517 	case OCTEONTX_LINK_SPEED_XAUI:
518 		link.link_speed = ETH_SPEED_NUM_10G;
519 		break;
520 
521 	case OCTEONTX_LINK_SPEED_RXAUI:
522 	case OCTEONTX_LINK_SPEED_10G_R:
523 		link.link_speed = ETH_SPEED_NUM_10G;
524 		break;
525 	case OCTEONTX_LINK_SPEED_QSGMII:
526 		link.link_speed = ETH_SPEED_NUM_5G;
527 		break;
528 	case OCTEONTX_LINK_SPEED_40G_R:
529 		link.link_speed = ETH_SPEED_NUM_40G;
530 		break;
531 
532 	case OCTEONTX_LINK_SPEED_RESERVE1:
533 	case OCTEONTX_LINK_SPEED_RESERVE2:
534 	default:
535 		link.link_speed = ETH_SPEED_NUM_NONE;
536 		octeontx_log_err("incorrect link speed %d", nic->speed);
537 		break;
538 	}
539 
540 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
541 	link.link_autoneg = ETH_LINK_AUTONEG;
542 
543 	return rte_eth_linkstatus_set(dev, &link);
544 }
545 
546 static int
547 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
548 {
549 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
550 
551 	PMD_INIT_FUNC_TRACE();
552 	return octeontx_port_stats(nic, stats);
553 }
554 
555 static void
556 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
557 {
558 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
559 
560 	PMD_INIT_FUNC_TRACE();
561 	octeontx_port_stats_clr(nic);
562 }
563 
564 static int
565 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
566 					struct ether_addr *addr)
567 {
568 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
569 	int ret;
570 
571 	ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
572 	if (ret != 0)
573 		octeontx_log_err("failed to set MAC address on port %d",
574 				nic->port_id);
575 
576 	return ret;
577 }
578 
579 static void
580 octeontx_dev_info(struct rte_eth_dev *dev,
581 		struct rte_eth_dev_info *dev_info)
582 {
583 	RTE_SET_USED(dev);
584 
585 	/* Autonegotiation may be disabled */
586 	dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
587 	dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
588 			ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
589 			ETH_LINK_SPEED_40G;
590 
591 	dev_info->max_mac_addrs = 1;
592 	dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
593 	dev_info->max_rx_queues = 1;
594 	dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
595 	dev_info->min_rx_bufsize = 0;
596 
597 	dev_info->default_rxconf = (struct rte_eth_rxconf) {
598 		.rx_free_thresh = 0,
599 		.rx_drop_en = 0,
600 		.offloads = OCTEONTX_RX_OFFLOADS,
601 	};
602 
603 	dev_info->default_txconf = (struct rte_eth_txconf) {
604 		.tx_free_thresh = 0,
605 		.offloads = OCTEONTX_TX_OFFLOADS,
606 	};
607 
608 	dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
609 	dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
610 }
611 
612 static void
613 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
614 {
615 	((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
616 	((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
617 	((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
618 }
619 
620 static int
621 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
622 				uint16_t qidx)
623 {
624 	struct octeontx_txq *txq;
625 	int res;
626 
627 	PMD_INIT_FUNC_TRACE();
628 
629 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
630 		return 0;
631 
632 	txq = dev->data->tx_queues[qidx];
633 
634 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
635 						&txq->dq,
636 						sizeof(octeontx_dq_t),
637 						txq->queue_id,
638 						octeontx_dq_info_getter);
639 	if (res < 0) {
640 		res = -EFAULT;
641 		goto close_port;
642 	}
643 
644 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
645 	return res;
646 
647 close_port:
648 	(void)octeontx_port_stop(nic);
649 	octeontx_pko_channel_stop(nic->base_ochan);
650 	octeontx_pko_channel_close(nic->base_ochan);
651 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
652 	return res;
653 }
654 
655 static int
656 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
657 {
658 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
659 
660 	PMD_INIT_FUNC_TRACE();
661 	qidx = qidx % PKO_VF_NUM_DQ;
662 	return octeontx_vf_start_tx_queue(dev, nic, qidx);
663 }
664 
665 static inline int
666 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
667 			  uint16_t qidx)
668 {
669 	int ret = 0;
670 
671 	RTE_SET_USED(nic);
672 	PMD_INIT_FUNC_TRACE();
673 
674 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
675 		return 0;
676 
677 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
678 	return ret;
679 }
680 
681 static int
682 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
683 {
684 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
685 
686 	PMD_INIT_FUNC_TRACE();
687 	qidx = qidx % PKO_VF_NUM_DQ;
688 
689 	return octeontx_vf_stop_tx_queue(dev, nic, qidx);
690 }
691 
692 static void
693 octeontx_dev_tx_queue_release(void *tx_queue)
694 {
695 	struct octeontx_txq *txq = tx_queue;
696 	int res;
697 
698 	PMD_INIT_FUNC_TRACE();
699 
700 	if (txq) {
701 		res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
702 		if (res < 0)
703 			octeontx_log_err("failed stop tx_queue(%d)\n",
704 				   txq->queue_id);
705 
706 		rte_free(txq);
707 	}
708 }
709 
710 static int
711 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
712 			    uint16_t nb_desc, unsigned int socket_id,
713 			    const struct rte_eth_txconf *tx_conf __rte_unused)
714 {
715 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
716 	struct octeontx_txq *txq = NULL;
717 	uint16_t dq_num;
718 	int res = 0;
719 
720 	RTE_SET_USED(nb_desc);
721 	RTE_SET_USED(socket_id);
722 
723 	dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
724 
725 	/* Socket id check */
726 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
727 			socket_id != (unsigned int)nic->node)
728 		PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
729 						socket_id, nic->node);
730 
731 	/* Free memory prior to re-allocation if needed. */
732 	if (dev->data->tx_queues[qidx] != NULL) {
733 		PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
734 				qidx);
735 		octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
736 		dev->data->tx_queues[qidx] = NULL;
737 	}
738 
739 	/* Allocating tx queue data structure */
740 	txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
741 				 RTE_CACHE_LINE_SIZE, nic->node);
742 	if (txq == NULL) {
743 		octeontx_log_err("failed to allocate txq=%d", qidx);
744 		res = -ENOMEM;
745 		goto err;
746 	}
747 
748 	txq->eth_dev = dev;
749 	txq->queue_id = dq_num;
750 	dev->data->tx_queues[qidx] = txq;
751 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
752 
753 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
754 						&txq->dq,
755 						sizeof(octeontx_dq_t),
756 						txq->queue_id,
757 						octeontx_dq_info_getter);
758 	if (res < 0) {
759 		res = -EFAULT;
760 		goto err;
761 	}
762 
763 	PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
764 			qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
765 			txq->dq.ioreg_va,
766 			txq->dq.fc_status_va);
767 
768 	return res;
769 
770 err:
771 	if (txq)
772 		rte_free(txq);
773 
774 	return res;
775 }
776 
777 static int
778 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
779 				uint16_t nb_desc, unsigned int socket_id,
780 				const struct rte_eth_rxconf *rx_conf,
781 				struct rte_mempool *mb_pool)
782 {
783 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
784 	struct rte_mempool_ops *mp_ops = NULL;
785 	struct octeontx_rxq *rxq = NULL;
786 	pki_pktbuf_cfg_t pktbuf_conf;
787 	pki_hash_cfg_t pki_hash;
788 	pki_qos_cfg_t pki_qos;
789 	uintptr_t pool;
790 	int ret, port;
791 	uint16_t gaura;
792 	unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
793 	unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
794 
795 	RTE_SET_USED(nb_desc);
796 
797 	memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
798 	memset(&pki_hash, 0, sizeof(pki_hash));
799 	memset(&pki_qos, 0, sizeof(pki_qos));
800 
801 	mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
802 	if (strcmp(mp_ops->name, "octeontx_fpavf")) {
803 		octeontx_log_err("failed to find octeontx_fpavf mempool");
804 		return -ENOTSUP;
805 	}
806 
807 	/* Handle forbidden configurations */
808 	if (nic->pki.classifier_enable) {
809 		octeontx_log_err("cannot setup queue %d. "
810 					"Classifier option unsupported", qidx);
811 		return -EINVAL;
812 	}
813 
814 	port = nic->port_id;
815 
816 	/* Rx deferred start is not supported */
817 	if (rx_conf->rx_deferred_start) {
818 		octeontx_log_err("rx deferred start not supported");
819 		return -EINVAL;
820 	}
821 
822 	/* Verify queue index */
823 	if (qidx >= dev->data->nb_rx_queues) {
824 		octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
825 				qidx, (dev->data->nb_rx_queues - 1));
826 		return -ENOTSUP;
827 	}
828 
829 	/* Socket id check */
830 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
831 			socket_id != (unsigned int)nic->node)
832 		PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
833 						socket_id, nic->node);
834 
835 	/* Allocating rx queue data structure */
836 	rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
837 				 RTE_CACHE_LINE_SIZE, nic->node);
838 	if (rxq == NULL) {
839 		octeontx_log_err("failed to allocate rxq=%d", qidx);
840 		return -ENOMEM;
841 	}
842 
843 	if (!nic->pki.initialized) {
844 		pktbuf_conf.port_type = 0;
845 		pki_hash.port_type = 0;
846 		pki_qos.port_type = 0;
847 
848 		pktbuf_conf.mmask.f_wqe_skip = 1;
849 		pktbuf_conf.mmask.f_first_skip = 1;
850 		pktbuf_conf.mmask.f_later_skip = 1;
851 		pktbuf_conf.mmask.f_mbuff_size = 1;
852 		pktbuf_conf.mmask.f_cache_mode = 1;
853 
854 		pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
855 		pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP;
856 		pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
857 		pktbuf_conf.mbuff_size = (mb_pool->elt_size -
858 					RTE_PKTMBUF_HEADROOM -
859 					sizeof(struct rte_mbuf));
860 
861 		pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
862 
863 		ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
864 		if (ret != 0) {
865 			octeontx_log_err("fail to configure pktbuf for port %d",
866 					port);
867 			rte_free(rxq);
868 			return ret;
869 		}
870 		PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
871 				"\tmbuf_size:\t0x%0x\n"
872 				"\twqe_skip:\t0x%0x\n"
873 				"\tfirst_skip:\t0x%0x\n"
874 				"\tlater_skip:\t0x%0x\n"
875 				"\tcache_mode:\t%s\n",
876 				port,
877 				pktbuf_conf.mbuff_size,
878 				pktbuf_conf.wqe_skip,
879 				pktbuf_conf.first_skip,
880 				pktbuf_conf.later_skip,
881 				(pktbuf_conf.cache_mode ==
882 						PKI_OPC_MODE_STT) ?
883 				"STT" :
884 				(pktbuf_conf.cache_mode ==
885 						PKI_OPC_MODE_STF) ?
886 				"STF" :
887 				(pktbuf_conf.cache_mode ==
888 						PKI_OPC_MODE_STF1_STT) ?
889 				"STF1_STT" : "STF2_STT");
890 
891 		if (nic->pki.hash_enable) {
892 			pki_hash.tag_dlc = 1;
893 			pki_hash.tag_slc = 1;
894 			pki_hash.tag_dlf = 1;
895 			pki_hash.tag_slf = 1;
896 			pki_hash.tag_prt = 1;
897 			octeontx_pki_port_hash_config(port, &pki_hash);
898 		}
899 
900 		pool = (uintptr_t)mb_pool->pool_id;
901 
902 		/* Get the gaura Id */
903 		gaura = octeontx_fpa_bufpool_gaura(pool);
904 
905 		pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
906 		pki_qos.num_entry = 1;
907 		pki_qos.drop_policy = 0;
908 		pki_qos.tag_type = 0L;
909 		pki_qos.qos_entry[0].port_add = 0;
910 		pki_qos.qos_entry[0].gaura = gaura;
911 		pki_qos.qos_entry[0].ggrp_ok = ev_queues;
912 		pki_qos.qos_entry[0].ggrp_bad = ev_queues;
913 		pki_qos.qos_entry[0].grptag_bad = 0;
914 		pki_qos.qos_entry[0].grptag_ok = 0;
915 
916 		ret = octeontx_pki_port_create_qos(port, &pki_qos);
917 		if (ret < 0) {
918 			octeontx_log_err("failed to create QOS port=%d, q=%d",
919 					port, qidx);
920 			rte_free(rxq);
921 			return ret;
922 		}
923 		nic->pki.initialized = true;
924 	}
925 
926 	rxq->port_id = nic->port_id;
927 	rxq->eth_dev = dev;
928 	rxq->queue_id = qidx;
929 	rxq->evdev = nic->evdev;
930 	rxq->ev_queues = ev_queues;
931 	rxq->ev_ports = ev_ports;
932 
933 	dev->data->rx_queues[qidx] = rxq;
934 	dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
935 	return 0;
936 }
937 
938 static void
939 octeontx_dev_rx_queue_release(void *rxq)
940 {
941 	rte_free(rxq);
942 }
943 
944 static const uint32_t *
945 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
946 {
947 	static const uint32_t ptypes[] = {
948 		RTE_PTYPE_L3_IPV4,
949 		RTE_PTYPE_L3_IPV4_EXT,
950 		RTE_PTYPE_L3_IPV6,
951 		RTE_PTYPE_L3_IPV6_EXT,
952 		RTE_PTYPE_L4_TCP,
953 		RTE_PTYPE_L4_UDP,
954 		RTE_PTYPE_L4_FRAG,
955 		RTE_PTYPE_UNKNOWN
956 	};
957 
958 	if (dev->rx_pkt_burst == octeontx_recv_pkts)
959 		return ptypes;
960 
961 	return NULL;
962 }
963 
964 static int
965 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
966 {
967 	RTE_SET_USED(dev);
968 
969 	if (!strcmp(pool, "octeontx_fpavf"))
970 		return 0;
971 
972 	return -ENOTSUP;
973 }
974 
975 /* Initialize and register driver with DPDK Application */
976 static const struct eth_dev_ops octeontx_dev_ops = {
977 	.dev_configure		 = octeontx_dev_configure,
978 	.dev_infos_get		 = octeontx_dev_info,
979 	.dev_close		 = octeontx_dev_close,
980 	.dev_start		 = octeontx_dev_start,
981 	.dev_stop		 = octeontx_dev_stop,
982 	.promiscuous_enable	 = octeontx_dev_promisc_enable,
983 	.promiscuous_disable	 = octeontx_dev_promisc_disable,
984 	.link_update		 = octeontx_dev_link_update,
985 	.stats_get		 = octeontx_dev_stats_get,
986 	.stats_reset		 = octeontx_dev_stats_reset,
987 	.mac_addr_set		 = octeontx_dev_default_mac_addr_set,
988 	.tx_queue_start		 = octeontx_dev_tx_queue_start,
989 	.tx_queue_stop		 = octeontx_dev_tx_queue_stop,
990 	.tx_queue_setup		 = octeontx_dev_tx_queue_setup,
991 	.tx_queue_release	 = octeontx_dev_tx_queue_release,
992 	.rx_queue_setup		 = octeontx_dev_rx_queue_setup,
993 	.rx_queue_release	 = octeontx_dev_rx_queue_release,
994 	.dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
995 	.pool_ops_supported      = octeontx_pool_ops,
996 };
997 
998 /* Create Ethdev interface per BGX LMAC ports */
999 static int
1000 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1001 			int socket_id)
1002 {
1003 	int res;
1004 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1005 	struct octeontx_nic *nic = NULL;
1006 	struct rte_eth_dev *eth_dev = NULL;
1007 	struct rte_eth_dev_data *data;
1008 	const char *name = rte_vdev_device_name(dev);
1009 
1010 	PMD_INIT_FUNC_TRACE();
1011 
1012 	sprintf(octtx_name, "%s_%d", name, port);
1013 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1014 		eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1015 		if (eth_dev == NULL)
1016 			return -ENODEV;
1017 
1018 		eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1019 		eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1020 		rte_eth_dev_probing_finish(eth_dev);
1021 		return 0;
1022 	}
1023 
1024 	nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1025 	if (nic == NULL) {
1026 		octeontx_log_err("failed to allocate nic structure");
1027 		res = -ENOMEM;
1028 		goto err;
1029 	}
1030 
1031 	nic->port_id = port;
1032 	nic->evdev = evdev;
1033 
1034 	res = octeontx_port_open(nic);
1035 	if (res < 0)
1036 		goto err;
1037 
1038 	/* Rx side port configuration */
1039 	res = octeontx_pki_port_open(port);
1040 	if (res != 0) {
1041 		octeontx_log_err("failed to open PKI port %d", port);
1042 		res = -ENODEV;
1043 		goto err;
1044 	}
1045 
1046 	/* Reserve an ethdev entry */
1047 	eth_dev = rte_eth_dev_allocate(octtx_name);
1048 	if (eth_dev == NULL) {
1049 		octeontx_log_err("failed to allocate rte_eth_dev");
1050 		res = -ENOMEM;
1051 		goto err;
1052 	}
1053 
1054 	eth_dev->device = &dev->device;
1055 	eth_dev->intr_handle = NULL;
1056 	eth_dev->data->kdrv = RTE_KDRV_NONE;
1057 	eth_dev->data->numa_node = dev->device.numa_node;
1058 
1059 	data = eth_dev->data;
1060 	data->dev_private = nic;
1061 	data->port_id = eth_dev->data->port_id;
1062 
1063 	nic->ev_queues = 1;
1064 	nic->ev_ports = 1;
1065 
1066 	data->dev_link.link_status = ETH_LINK_DOWN;
1067 	data->dev_started = 0;
1068 	data->promiscuous = 0;
1069 	data->all_multicast = 0;
1070 	data->scattered_rx = 0;
1071 
1072 	data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1073 							socket_id);
1074 	if (data->mac_addrs == NULL) {
1075 		octeontx_log_err("failed to allocate memory for mac_addrs");
1076 		res = -ENOMEM;
1077 		goto err;
1078 	}
1079 
1080 	eth_dev->dev_ops = &octeontx_dev_ops;
1081 
1082 	/* Finally save ethdev pointer to the NIC structure */
1083 	nic->dev = eth_dev;
1084 
1085 	if (nic->port_id != data->port_id) {
1086 		octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1087 				data->port_id, nic->port_id);
1088 		res = -EINVAL;
1089 		goto err;
1090 	}
1091 
1092 	/* Update port_id mac to eth_dev */
1093 	memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1094 
1095 	PMD_INIT_LOG(DEBUG, "ethdev info: ");
1096 	PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1097 				nic->port_id, nic->port_ena,
1098 				nic->base_ochan, nic->num_ochans,
1099 				nic->num_tx_queues);
1100 	PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1101 
1102 	rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1103 		[(nic->base_ochan >> 4) & 0xF] = data->port_id;
1104 
1105 	rte_eth_dev_probing_finish(eth_dev);
1106 	return data->port_id;
1107 
1108 err:
1109 	if (nic)
1110 		octeontx_port_close(nic);
1111 
1112 	if (eth_dev != NULL) {
1113 		rte_free(eth_dev->data->mac_addrs);
1114 		rte_free(data);
1115 		rte_free(nic);
1116 		rte_eth_dev_release_port(eth_dev);
1117 	}
1118 
1119 	return res;
1120 }
1121 
1122 /* Un initialize octeontx device */
1123 static int
1124 octeontx_remove(struct rte_vdev_device *dev)
1125 {
1126 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1127 	struct rte_eth_dev *eth_dev = NULL;
1128 	struct octeontx_nic *nic = NULL;
1129 	int i;
1130 
1131 	if (dev == NULL)
1132 		return -EINVAL;
1133 
1134 	for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1135 		sprintf(octtx_name, "eth_octeontx_%d", i);
1136 
1137 		/* reserve an ethdev entry */
1138 		eth_dev = rte_eth_dev_allocated(octtx_name);
1139 		if (eth_dev == NULL)
1140 			return -ENODEV;
1141 
1142 		nic = octeontx_pmd_priv(eth_dev);
1143 		rte_event_dev_stop(nic->evdev);
1144 		PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1145 
1146 		rte_free(eth_dev->data->mac_addrs);
1147 		rte_free(eth_dev->data->dev_private);
1148 		rte_eth_dev_release_port(eth_dev);
1149 		rte_event_dev_close(nic->evdev);
1150 	}
1151 
1152 	/* Free FC resource */
1153 	octeontx_pko_fc_free();
1154 
1155 	return 0;
1156 }
1157 
1158 /* Initialize octeontx device */
1159 static int
1160 octeontx_probe(struct rte_vdev_device *dev)
1161 {
1162 	const char *dev_name;
1163 	static int probe_once;
1164 	uint8_t socket_id, qlist;
1165 	int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1166 	struct rte_event_dev_config dev_conf;
1167 	const char *eventdev_name = "event_octeontx";
1168 	struct rte_event_dev_info info;
1169 	struct rte_eth_dev *eth_dev;
1170 
1171 	struct octeontx_vdev_init_params init_params = {
1172 		OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1173 	};
1174 
1175 	dev_name = rte_vdev_device_name(dev);
1176 
1177 	if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1178 	    strlen(rte_vdev_device_args(dev)) == 0) {
1179 		eth_dev = rte_eth_dev_attach_secondary(dev_name);
1180 		if (!eth_dev) {
1181 			RTE_LOG(ERR, PMD, "Failed to probe %s\n", dev_name);
1182 			return -1;
1183 		}
1184 		/* TODO: request info from primary to set up Rx and Tx */
1185 		eth_dev->dev_ops = &octeontx_dev_ops;
1186 		rte_eth_dev_probing_finish(eth_dev);
1187 		return 0;
1188 	}
1189 
1190 	res = octeontx_parse_vdev_init_params(&init_params, dev);
1191 	if (res < 0)
1192 		return -EINVAL;
1193 
1194 	if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1195 		octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1196 				OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1197 		return -ENOTSUP;
1198 	}
1199 
1200 	PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1201 
1202 	socket_id = rte_socket_id();
1203 
1204 	tx_vfcnt = octeontx_pko_vf_count();
1205 
1206 	if (tx_vfcnt < init_params.nr_port) {
1207 		octeontx_log_err("not enough PKO (%d) for port number (%d)",
1208 				tx_vfcnt, init_params.nr_port);
1209 		return -EINVAL;
1210 	}
1211 	evdev = rte_event_dev_get_dev_id(eventdev_name);
1212 	if (evdev < 0) {
1213 		octeontx_log_err("eventdev %s not found", eventdev_name);
1214 		return -ENODEV;
1215 	}
1216 
1217 	res = rte_event_dev_info_get(evdev, &info);
1218 	if (res < 0) {
1219 		octeontx_log_err("failed to eventdev info %d", res);
1220 		return -EINVAL;
1221 	}
1222 
1223 	PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1224 			info.max_event_queues, info.max_event_ports);
1225 
1226 	if (octeontx_pko_init_fc(tx_vfcnt))
1227 		return -ENOMEM;
1228 
1229 	devconf_set_default_sane_values(&dev_conf, &info);
1230 	res = rte_event_dev_configure(evdev, &dev_conf);
1231 	if (res < 0)
1232 		goto parse_error;
1233 
1234 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1235 			(uint32_t *)&pnum);
1236 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1237 			(uint32_t *)&qnum);
1238 	if (pnum < qnum) {
1239 		octeontx_log_err("too few event ports (%d) for event_q(%d)",
1240 				pnum, qnum);
1241 		res = -EINVAL;
1242 		goto parse_error;
1243 	}
1244 	if (pnum > qnum) {
1245 		/*
1246 		 * We don't poll on event ports
1247 		 * that do not have any queues assigned.
1248 		 */
1249 		pnum = qnum;
1250 		PMD_INIT_LOG(INFO,
1251 			"reducing number of active event ports to %d", pnum);
1252 	}
1253 	for (i = 0; i < qnum; i++) {
1254 		res = rte_event_queue_setup(evdev, i, NULL);
1255 		if (res < 0) {
1256 			octeontx_log_err("failed to setup event_q(%d): res %d",
1257 					i, res);
1258 			goto parse_error;
1259 		}
1260 	}
1261 
1262 	for (i = 0; i < pnum; i++) {
1263 		res = rte_event_port_setup(evdev, i, NULL);
1264 		if (res < 0) {
1265 			res = -ENODEV;
1266 			octeontx_log_err("failed to setup ev port(%d) res=%d",
1267 						i, res);
1268 			goto parse_error;
1269 		}
1270 		/* Link one queue to one event port */
1271 		qlist = i;
1272 		res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1273 		if (res < 0) {
1274 			res = -ENODEV;
1275 			octeontx_log_err("failed to link port (%d): res=%d",
1276 					i, res);
1277 			goto parse_error;
1278 		}
1279 	}
1280 
1281 	/* Create ethdev interface */
1282 	for (i = 0; i < init_params.nr_port; i++) {
1283 		port_id = octeontx_create(dev, i, evdev, socket_id);
1284 		if (port_id < 0) {
1285 			octeontx_log_err("failed to create device %s",
1286 					dev_name);
1287 			res = -ENODEV;
1288 			goto parse_error;
1289 		}
1290 
1291 		PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1292 					port_id);
1293 	}
1294 
1295 	if (probe_once) {
1296 		octeontx_log_err("interface %s not supported", dev_name);
1297 		octeontx_remove(dev);
1298 		res = -ENOTSUP;
1299 		goto parse_error;
1300 	}
1301 	rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1302 	probe_once = 1;
1303 
1304 	return 0;
1305 
1306 parse_error:
1307 	octeontx_pko_fc_free();
1308 	return res;
1309 }
1310 
1311 static struct rte_vdev_driver octeontx_pmd_drv = {
1312 	.probe = octeontx_probe,
1313 	.remove = octeontx_remove,
1314 };
1315 
1316 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1317 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1318 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");
1319