1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <stdlib.h> 10 #include <string.h> 11 #include <unistd.h> 12 13 #include <eventdev_pmd.h> 14 #include <rte_alarm.h> 15 #include <rte_branch_prediction.h> 16 #include <rte_bus_vdev.h> 17 #include <rte_cycles.h> 18 #include <rte_debug.h> 19 #include <rte_dev.h> 20 #include <rte_devargs.h> 21 #include <rte_kvargs.h> 22 #include <rte_malloc.h> 23 #include <rte_mbuf_pool_ops.h> 24 #include <rte_prefetch.h> 25 26 #include "octeontx_ethdev.h" 27 #include "octeontx_rxtx.h" 28 #include "octeontx_logs.h" 29 #include "octeontx_stats.h" 30 31 /* Useful in stopping/closing event device if no of 32 * eth ports are using it. 33 */ 34 uint16_t evdev_refcnt; 35 36 #define OCTEONTX_QLM_MODE_SGMII 7 37 #define OCTEONTX_QLM_MODE_XFI 12 38 39 struct evdev_priv_data { 40 OFFLOAD_FLAGS; /*Sequence should not be changed */ 41 } __rte_cache_aligned; 42 43 struct octeontx_vdev_init_params { 44 uint8_t nr_port; 45 }; 46 47 uint16_t 48 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 49 50 enum octeontx_link_speed { 51 OCTEONTX_LINK_SPEED_SGMII, 52 OCTEONTX_LINK_SPEED_XAUI, 53 OCTEONTX_LINK_SPEED_RXAUI, 54 OCTEONTX_LINK_SPEED_10G_R, 55 OCTEONTX_LINK_SPEED_40G_R, 56 OCTEONTX_LINK_SPEED_RESERVE1, 57 OCTEONTX_LINK_SPEED_QSGMII, 58 OCTEONTX_LINK_SPEED_RESERVE2, 59 OCTEONTX_LINK_SPEED_UNKNOWN = 255 60 }; 61 62 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE); 63 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE); 64 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE); 65 66 /* Parse integer from integer argument */ 67 static int 68 parse_integer_arg(const char *key __rte_unused, 69 const char *value, void *extra_args) 70 { 71 int *i = (int *)extra_args; 72 73 *i = atoi(value); 74 if (*i < 0) { 75 octeontx_log_err("argument has to be positive."); 76 return -1; 77 } 78 79 return 0; 80 } 81 82 static int 83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 84 struct rte_vdev_device *dev) 85 { 86 struct rte_kvargs *kvlist = NULL; 87 int ret = 0; 88 89 static const char * const octeontx_vdev_valid_params[] = { 90 OCTEONTX_VDEV_NR_PORT_ARG, 91 NULL 92 }; 93 94 const char *input_args = rte_vdev_device_args(dev); 95 if (params == NULL) 96 return -EINVAL; 97 98 99 if (input_args) { 100 kvlist = rte_kvargs_parse(input_args, 101 octeontx_vdev_valid_params); 102 if (kvlist == NULL) 103 return -1; 104 105 ret = rte_kvargs_process(kvlist, 106 OCTEONTX_VDEV_NR_PORT_ARG, 107 &parse_integer_arg, 108 ¶ms->nr_port); 109 if (ret < 0) 110 goto free_kvlist; 111 } 112 113 free_kvlist: 114 rte_kvargs_free(kvlist); 115 return ret; 116 } 117 118 static int 119 octeontx_port_open(struct octeontx_nic *nic) 120 { 121 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 122 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg; 123 int res; 124 125 res = 0; 126 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 127 PMD_INIT_FUNC_TRACE(); 128 129 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 130 if (res < 0) { 131 octeontx_log_err("failed to open port %d", res); 132 return res; 133 } 134 135 nic->node = bgx_port_conf.node; 136 nic->port_ena = bgx_port_conf.enable; 137 nic->base_ichan = bgx_port_conf.base_chan; 138 nic->base_ochan = bgx_port_conf.base_chan; 139 nic->num_ichans = bgx_port_conf.num_chans; 140 nic->num_ochans = bgx_port_conf.num_chans; 141 nic->bgx_mtu = bgx_port_conf.mtu; 142 nic->bpen = bgx_port_conf.bpen; 143 nic->fcs_strip = bgx_port_conf.fcs_strip; 144 nic->bcast_mode = bgx_port_conf.bcast_mode; 145 nic->mcast_mode = bgx_port_conf.mcast_mode; 146 nic->speed = bgx_port_conf.mode; 147 148 nic->duplex = RTE_ETH_LINK_FULL_DUPLEX; 149 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg)); 150 151 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg); 152 if (res < 0) { 153 octeontx_log_err("failed to get port %d fifo cfg", res); 154 return res; 155 } 156 157 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz; 158 159 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 160 RTE_ETHER_ADDR_LEN); 161 162 octeontx_log_dbg("port opened %d", nic->port_id); 163 return res; 164 } 165 166 static void 167 octeontx_link_status_print(struct rte_eth_dev *eth_dev, 168 struct rte_eth_link *link) 169 { 170 if (link && link->link_status) 171 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s", 172 (eth_dev->data->port_id), 173 link->link_speed, 174 link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX ? 175 "full-duplex" : "half-duplex"); 176 else 177 octeontx_log_info("Port %d: Link Down", 178 (int)(eth_dev->data->port_id)); 179 } 180 181 static inline uint32_t 182 octeontx_parse_link_speeds(uint32_t link_speeds) 183 { 184 uint32_t link_speed = OCTEONTX_LINK_SPEED_UNKNOWN; 185 186 if (link_speeds & RTE_ETH_LINK_SPEED_40G) 187 link_speed = OCTEONTX_LINK_SPEED_40G_R; 188 189 if (link_speeds & RTE_ETH_LINK_SPEED_10G) { 190 link_speed = OCTEONTX_LINK_SPEED_XAUI; 191 link_speed |= OCTEONTX_LINK_SPEED_RXAUI; 192 link_speed |= OCTEONTX_LINK_SPEED_10G_R; 193 } 194 195 if (link_speeds & RTE_ETH_LINK_SPEED_5G) 196 link_speed = OCTEONTX_LINK_SPEED_QSGMII; 197 198 if (link_speeds & RTE_ETH_LINK_SPEED_1G) 199 link_speed = OCTEONTX_LINK_SPEED_SGMII; 200 201 return link_speed; 202 } 203 204 static inline uint8_t 205 octeontx_parse_eth_link_duplex(uint32_t link_speeds) 206 { 207 if ((link_speeds & RTE_ETH_LINK_SPEED_10M_HD) || 208 (link_speeds & RTE_ETH_LINK_SPEED_100M_HD)) 209 return RTE_ETH_LINK_HALF_DUPLEX; 210 else 211 return RTE_ETH_LINK_FULL_DUPLEX; 212 } 213 214 static int 215 octeontx_apply_link_speed(struct rte_eth_dev *dev) 216 { 217 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 218 struct rte_eth_conf *conf = &dev->data->dev_conf; 219 octeontx_mbox_bgx_port_change_mode_t cfg; 220 221 if (conf->link_speeds == RTE_ETH_LINK_SPEED_AUTONEG) 222 return 0; 223 224 cfg.speed = octeontx_parse_link_speeds(conf->link_speeds); 225 cfg.autoneg = (conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) ? 1 : 0; 226 cfg.duplex = octeontx_parse_eth_link_duplex(conf->link_speeds); 227 cfg.qlm_mode = ((conf->link_speeds & RTE_ETH_LINK_SPEED_1G) ? 228 OCTEONTX_QLM_MODE_SGMII : 229 (conf->link_speeds & RTE_ETH_LINK_SPEED_10G) ? 230 OCTEONTX_QLM_MODE_XFI : 0); 231 232 if (cfg.speed != OCTEONTX_LINK_SPEED_UNKNOWN && 233 (cfg.speed != nic->speed || cfg.duplex != nic->duplex)) { 234 nic->speed = cfg.speed; 235 nic->duplex = cfg.duplex; 236 return octeontx_bgx_port_change_mode(nic->port_id, &cfg); 237 } else { 238 return 0; 239 } 240 } 241 242 static void 243 octeontx_link_status_update(struct octeontx_nic *nic, 244 struct rte_eth_link *link) 245 { 246 memset(link, 0, sizeof(*link)); 247 248 link->link_status = nic->link_up ? RTE_ETH_LINK_UP : RTE_ETH_LINK_DOWN; 249 250 switch (nic->speed) { 251 case OCTEONTX_LINK_SPEED_SGMII: 252 link->link_speed = RTE_ETH_SPEED_NUM_1G; 253 break; 254 255 case OCTEONTX_LINK_SPEED_XAUI: 256 link->link_speed = RTE_ETH_SPEED_NUM_10G; 257 break; 258 259 case OCTEONTX_LINK_SPEED_RXAUI: 260 case OCTEONTX_LINK_SPEED_10G_R: 261 link->link_speed = RTE_ETH_SPEED_NUM_10G; 262 break; 263 case OCTEONTX_LINK_SPEED_QSGMII: 264 link->link_speed = RTE_ETH_SPEED_NUM_5G; 265 break; 266 case OCTEONTX_LINK_SPEED_40G_R: 267 link->link_speed = RTE_ETH_SPEED_NUM_40G; 268 break; 269 270 case OCTEONTX_LINK_SPEED_RESERVE1: 271 case OCTEONTX_LINK_SPEED_RESERVE2: 272 default: 273 link->link_speed = RTE_ETH_SPEED_NUM_NONE; 274 octeontx_log_err("incorrect link speed %d", nic->speed); 275 break; 276 } 277 278 link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX; 279 link->link_autoneg = RTE_ETH_LINK_AUTONEG; 280 } 281 282 static void 283 octeontx_link_status_poll(void *arg) 284 { 285 struct octeontx_nic *nic = arg; 286 struct rte_eth_link link; 287 struct rte_eth_dev *dev; 288 int res; 289 290 PMD_INIT_FUNC_TRACE(); 291 292 dev = nic->dev; 293 294 res = octeontx_bgx_port_link_status(nic->port_id); 295 if (res < 0) { 296 octeontx_log_err("Failed to get port %d link status", 297 nic->port_id); 298 } else { 299 if (nic->link_up != (uint8_t)res) { 300 nic->link_up = (uint8_t)res; 301 octeontx_link_status_update(nic, &link); 302 octeontx_link_status_print(dev, &link); 303 rte_eth_linkstatus_set(dev, &link); 304 rte_eth_dev_callback_process(dev, 305 RTE_ETH_EVENT_INTR_LSC, 306 NULL); 307 } 308 } 309 310 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 311 octeontx_link_status_poll, nic); 312 if (res < 0) 313 octeontx_log_err("Failed to restart alarm for port %d, err: %d", 314 nic->port_id, res); 315 } 316 317 static void 318 octeontx_port_close(struct octeontx_nic *nic) 319 { 320 PMD_INIT_FUNC_TRACE(); 321 322 rte_eal_alarm_cancel(octeontx_link_status_poll, nic); 323 octeontx_bgx_port_close(nic->port_id); 324 octeontx_log_dbg("port closed %d", nic->port_id); 325 } 326 327 static int 328 octeontx_port_start(struct octeontx_nic *nic) 329 { 330 PMD_INIT_FUNC_TRACE(); 331 332 return octeontx_bgx_port_start(nic->port_id); 333 } 334 335 static int 336 octeontx_port_stop(struct octeontx_nic *nic) 337 { 338 PMD_INIT_FUNC_TRACE(); 339 340 return octeontx_bgx_port_stop(nic->port_id); 341 } 342 343 static int 344 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 345 { 346 struct rte_eth_dev *dev; 347 int res; 348 349 res = 0; 350 PMD_INIT_FUNC_TRACE(); 351 dev = nic->dev; 352 353 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 354 if (res < 0) { 355 octeontx_log_err("failed to set promiscuous mode %d", 356 nic->port_id); 357 return res; 358 } 359 360 /* Set proper flag for the mode */ 361 dev->data->promiscuous = (en != 0) ? 1 : 0; 362 363 octeontx_log_dbg("port %d : promiscuous mode %s", 364 nic->port_id, en ? "set" : "unset"); 365 366 return 0; 367 } 368 369 static int 370 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 371 { 372 octeontx_mbox_bgx_port_stats_t bgx_stats; 373 int res; 374 375 PMD_INIT_FUNC_TRACE(); 376 377 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 378 if (res < 0) { 379 octeontx_log_err("failed to get port stats %d", nic->port_id); 380 return res; 381 } 382 383 stats->ipackets = bgx_stats.rx_packets; 384 stats->ibytes = bgx_stats.rx_bytes; 385 stats->imissed = bgx_stats.rx_dropped; 386 stats->ierrors = bgx_stats.rx_errors; 387 stats->opackets = bgx_stats.tx_packets; 388 stats->obytes = bgx_stats.tx_bytes; 389 stats->oerrors = bgx_stats.tx_errors; 390 391 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 392 nic->port_id, stats->ipackets, stats->opackets); 393 394 return 0; 395 } 396 397 static int 398 octeontx_port_stats_clr(struct octeontx_nic *nic) 399 { 400 PMD_INIT_FUNC_TRACE(); 401 402 return octeontx_bgx_port_stats_clr(nic->port_id); 403 } 404 405 static inline void 406 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 407 struct rte_event_dev_info *info) 408 { 409 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 410 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 411 412 dev_conf->nb_event_ports = info->max_event_ports; 413 dev_conf->nb_event_queues = info->max_event_queues; 414 415 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 416 dev_conf->nb_event_port_dequeue_depth = 417 info->max_event_port_dequeue_depth; 418 dev_conf->nb_event_port_enqueue_depth = 419 info->max_event_port_enqueue_depth; 420 dev_conf->nb_event_port_enqueue_depth = 421 info->max_event_port_enqueue_depth; 422 dev_conf->nb_events_limit = 423 info->max_num_events; 424 } 425 426 static uint16_t 427 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 428 { 429 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 430 uint16_t flags = 0; 431 432 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM || 433 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM) 434 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F; 435 436 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM || 437 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_TCP_CKSUM || 438 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_UDP_CKSUM || 439 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_SCTP_CKSUM) 440 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F; 441 442 if (!(nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE)) 443 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F; 444 445 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS) 446 flags |= OCCTX_TX_MULTI_SEG_F; 447 448 return flags; 449 } 450 451 static uint16_t 452 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 453 { 454 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 455 uint16_t flags = 0; 456 457 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_TCP_CKSUM | 458 RTE_ETH_RX_OFFLOAD_UDP_CKSUM)) 459 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 460 461 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | 462 RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM)) 463 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 464 465 if (nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) { 466 flags |= OCCTX_RX_MULTI_SEG_F; 467 eth_dev->data->scattered_rx = 1; 468 /* If scatter mode is enabled, TX should also be in multi 469 * seg mode, else memory leak will occur 470 */ 471 nic->tx_offloads |= RTE_ETH_TX_OFFLOAD_MULTI_SEGS; 472 } 473 474 return flags; 475 } 476 477 static int 478 octeontx_dev_configure(struct rte_eth_dev *dev) 479 { 480 struct rte_eth_dev_data *data = dev->data; 481 struct rte_eth_conf *conf = &data->dev_conf; 482 struct rte_eth_rxmode *rxmode = &conf->rxmode; 483 struct rte_eth_txmode *txmode = &conf->txmode; 484 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 485 int ret; 486 487 PMD_INIT_FUNC_TRACE(); 488 RTE_SET_USED(conf); 489 490 if (!rte_eal_has_hugepages()) { 491 octeontx_log_err("huge page is not configured"); 492 return -EINVAL; 493 } 494 495 if (txmode->mq_mode) { 496 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 497 return -EINVAL; 498 } 499 500 if (rxmode->mq_mode != RTE_ETH_MQ_RX_NONE && 501 rxmode->mq_mode != RTE_ETH_MQ_RX_RSS) { 502 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 503 return -EINVAL; 504 } 505 506 if (!(txmode->offloads & RTE_ETH_TX_OFFLOAD_MT_LOCKFREE)) { 507 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 508 txmode->offloads |= RTE_ETH_TX_OFFLOAD_MT_LOCKFREE; 509 } 510 511 if (conf->dcb_capability_en) { 512 octeontx_log_err("DCB enable not supported"); 513 return -EINVAL; 514 } 515 516 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 517 octeontx_log_err("flow director not supported"); 518 return -EINVAL; 519 } 520 521 nic->num_tx_queues = dev->data->nb_tx_queues; 522 523 if (!nic->reconfigure) { 524 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 525 nic->num_tx_queues, 526 nic->base_ochan); 527 if (ret) { 528 octeontx_log_err("failed to open channel %d no-of-txq %d", 529 nic->base_ochan, nic->num_tx_queues); 530 return -EFAULT; 531 } 532 533 ret = octeontx_dev_vlan_offload_init(dev); 534 if (ret) { 535 octeontx_log_err("failed to initialize vlan offload"); 536 return -EFAULT; 537 } 538 539 nic->pki.classifier_enable = false; 540 nic->pki.hash_enable = true; 541 nic->pki.initialized = false; 542 } 543 544 nic->rx_offloads |= rxmode->offloads; 545 nic->tx_offloads |= txmode->offloads; 546 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 547 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 548 549 nic->reconfigure = true; 550 551 return 0; 552 } 553 554 static int 555 octeontx_dev_close(struct rte_eth_dev *dev) 556 { 557 struct octeontx_txq *txq = NULL; 558 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 559 unsigned int i; 560 int ret; 561 562 PMD_INIT_FUNC_TRACE(); 563 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 564 return 0; 565 566 /* Stopping/closing event device once all eth ports are closed. */ 567 if (__atomic_sub_fetch(&evdev_refcnt, 1, __ATOMIC_ACQUIRE) == 0) { 568 rte_event_dev_stop(nic->evdev); 569 rte_event_dev_close(nic->evdev); 570 } 571 572 octeontx_dev_flow_ctrl_fini(dev); 573 574 octeontx_dev_vlan_offload_fini(dev); 575 576 ret = octeontx_pko_channel_close(nic->base_ochan); 577 if (ret < 0) { 578 octeontx_log_err("failed to close channel %d VF%d %d %d", 579 nic->base_ochan, nic->port_id, nic->num_tx_queues, 580 ret); 581 } 582 /* Free txq resources for this port */ 583 for (i = 0; i < nic->num_tx_queues; i++) { 584 txq = dev->data->tx_queues[i]; 585 if (!txq) 586 continue; 587 588 rte_free(txq); 589 } 590 591 octeontx_port_close(nic); 592 nic->reconfigure = false; 593 594 return 0; 595 } 596 597 static int 598 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 599 { 600 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD; 601 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 602 struct rte_eth_dev_data *data = eth_dev->data; 603 int rc = 0; 604 605 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; 606 607 /* Refuse MTU that requires the support of scattered packets 608 * when this feature has not been enabled before. 609 */ 610 if (data->dev_started && frame_size > buffsz && 611 !(nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) { 612 octeontx_log_err("Scatter mode is disabled"); 613 return -EINVAL; 614 } 615 616 /* Check <seg size> * <max_seg> >= max_frame */ 617 if ((nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) && 618 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX)) 619 return -EINVAL; 620 621 rc = octeontx_pko_send_mtu(nic->port_id, frame_size); 622 if (rc) 623 return rc; 624 625 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size); 626 if (rc) 627 return rc; 628 629 octeontx_log_info("Received pkt beyond maxlen %d will be dropped", 630 frame_size); 631 632 return rc; 633 } 634 635 static int 636 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 637 { 638 struct rte_eth_dev *eth_dev = rxq->eth_dev; 639 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 640 struct rte_eth_dev_data *data = eth_dev->data; 641 struct rte_pktmbuf_pool_private *mbp_priv; 642 struct evdev_priv_data *evdev_priv; 643 struct rte_eventdev *dev; 644 uint32_t buffsz; 645 646 /* Get rx buffer size */ 647 mbp_priv = rte_mempool_get_priv(rxq->pool); 648 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 649 650 /* Setup scatter mode if needed by jumbo */ 651 if (data->mtu > buffsz) { 652 nic->rx_offloads |= RTE_ETH_RX_OFFLOAD_SCATTER; 653 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 654 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 655 } 656 657 /* Sharing offload flags via eventdev priv region */ 658 dev = &rte_eventdevs[rxq->evdev]; 659 evdev_priv = dev->data->dev_private; 660 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 661 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 662 663 /* Setup MTU */ 664 nic->mtu = data->mtu; 665 666 return 0; 667 } 668 669 static int 670 octeontx_dev_start(struct rte_eth_dev *dev) 671 { 672 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 673 struct octeontx_rxq *rxq; 674 int ret, i; 675 676 PMD_INIT_FUNC_TRACE(); 677 /* Rechecking if any new offload set to update 678 * rx/tx burst function pointer accordingly. 679 */ 680 for (i = 0; i < dev->data->nb_rx_queues; i++) { 681 rxq = dev->data->rx_queues[i]; 682 octeontx_recheck_rx_offloads(rxq); 683 } 684 685 /* Setting up the mtu */ 686 ret = octeontx_dev_mtu_set(dev, nic->mtu); 687 if (ret) { 688 octeontx_log_err("Failed to set default MTU size %d", ret); 689 goto error; 690 } 691 692 /* Apply new link configurations if changed */ 693 ret = octeontx_apply_link_speed(dev); 694 if (ret) { 695 octeontx_log_err("Failed to set link configuration: %d", ret); 696 goto error; 697 } 698 699 /* 700 * Tx start 701 */ 702 octeontx_set_tx_function(dev); 703 ret = octeontx_pko_channel_start(nic->base_ochan); 704 if (ret < 0) { 705 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 706 nic->port_id, nic->num_tx_queues, nic->base_ochan, 707 ret); 708 goto error; 709 } 710 711 /* 712 * Rx start 713 */ 714 dev->rx_pkt_burst = octeontx_recv_pkts; 715 ret = octeontx_pki_port_start(nic->port_id); 716 if (ret < 0) { 717 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 718 goto channel_stop_error; 719 } 720 721 /* 722 * Start port 723 */ 724 ret = octeontx_port_start(nic); 725 if (ret < 0) { 726 octeontx_log_err("failed start port %d", ret); 727 goto pki_port_stop_error; 728 } 729 730 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 731 nic->base_ochan, nic->num_tx_queues, nic->port_id); 732 733 ret = rte_event_dev_start(nic->evdev); 734 if (ret < 0) { 735 octeontx_log_err("failed to start evdev: ret (%d)", ret); 736 goto pki_port_stop_error; 737 } 738 739 /* Success */ 740 return ret; 741 742 pki_port_stop_error: 743 octeontx_pki_port_stop(nic->port_id); 744 channel_stop_error: 745 octeontx_pko_channel_stop(nic->base_ochan); 746 error: 747 return ret; 748 } 749 750 static int 751 octeontx_dev_stop(struct rte_eth_dev *dev) 752 { 753 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 754 int ret; 755 756 PMD_INIT_FUNC_TRACE(); 757 758 ret = octeontx_port_stop(nic); 759 if (ret < 0) { 760 octeontx_log_err("failed to req stop port %d res=%d", 761 nic->port_id, ret); 762 return ret; 763 } 764 765 ret = octeontx_pki_port_stop(nic->port_id); 766 if (ret < 0) { 767 octeontx_log_err("failed to stop pki port %d res=%d", 768 nic->port_id, ret); 769 return ret; 770 } 771 772 ret = octeontx_pko_channel_stop(nic->base_ochan); 773 if (ret < 0) { 774 octeontx_log_err("failed to stop channel %d VF%d %d %d", 775 nic->base_ochan, nic->port_id, nic->num_tx_queues, 776 ret); 777 return ret; 778 } 779 780 return 0; 781 } 782 783 static int 784 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 785 { 786 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 787 788 PMD_INIT_FUNC_TRACE(); 789 return octeontx_port_promisc_set(nic, 1); 790 } 791 792 static int 793 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 794 { 795 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 796 797 PMD_INIT_FUNC_TRACE(); 798 return octeontx_port_promisc_set(nic, 0); 799 } 800 801 static int 802 octeontx_port_link_status(struct octeontx_nic *nic) 803 { 804 int res; 805 806 PMD_INIT_FUNC_TRACE(); 807 res = octeontx_bgx_port_link_status(nic->port_id); 808 if (res < 0) { 809 octeontx_log_err("failed to get port %d link status", 810 nic->port_id); 811 return res; 812 } 813 814 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) { 815 nic->link_up = (uint8_t)res; 816 nic->print_flag = 1; 817 } 818 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 819 820 return res; 821 } 822 823 /* 824 * Return 0 means link status changed, -1 means not changed 825 */ 826 static int 827 octeontx_dev_link_update(struct rte_eth_dev *dev, 828 int wait_to_complete __rte_unused) 829 { 830 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 831 struct rte_eth_link link; 832 int res; 833 834 PMD_INIT_FUNC_TRACE(); 835 836 res = octeontx_port_link_status(nic); 837 if (res < 0) { 838 octeontx_log_err("failed to request link status %d", res); 839 return res; 840 } 841 842 octeontx_link_status_update(nic, &link); 843 if (nic->print_flag) { 844 octeontx_link_status_print(nic->dev, &link); 845 nic->print_flag = 0; 846 } 847 848 return rte_eth_linkstatus_set(dev, &link); 849 } 850 851 static int 852 octeontx_port_mcast_set(struct octeontx_nic *nic, int en) 853 { 854 struct rte_eth_dev *dev; 855 int res; 856 857 res = 0; 858 PMD_INIT_FUNC_TRACE(); 859 dev = nic->dev; 860 861 res = octeontx_bgx_port_multicast_set(nic->port_id, en); 862 if (res < 0) { 863 octeontx_log_err("failed to set multicast mode %d", 864 nic->port_id); 865 return res; 866 } 867 868 /* Set proper flag for the mode */ 869 dev->data->all_multicast = (en != 0) ? 1 : 0; 870 871 octeontx_log_dbg("port %d : multicast mode %s", 872 nic->port_id, en ? "set" : "unset"); 873 874 return 0; 875 } 876 877 static int 878 octeontx_allmulticast_enable(struct rte_eth_dev *dev) 879 { 880 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 881 882 PMD_INIT_FUNC_TRACE(); 883 return octeontx_port_mcast_set(nic, 1); 884 } 885 886 static int 887 octeontx_allmulticast_disable(struct rte_eth_dev *dev) 888 { 889 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 890 891 PMD_INIT_FUNC_TRACE(); 892 return octeontx_port_mcast_set(nic, 0); 893 } 894 895 static inline int octeontx_dev_total_xstat(void) 896 { 897 return NUM_BGX_XSTAT; 898 } 899 900 static int 901 octeontx_port_xstats(struct octeontx_nic *nic, struct rte_eth_xstat *xstats, 902 unsigned int n) 903 { 904 octeontx_mbox_bgx_port_stats_t bgx_stats; 905 int stat_cnt, res, si, i; 906 907 res = octeontx_bgx_port_xstats(nic->port_id, &bgx_stats); 908 if (res < 0) { 909 octeontx_log_err("failed to get port stats %d", nic->port_id); 910 return res; 911 } 912 913 si = 0; 914 /* Fill BGX stats */ 915 stat_cnt = (n > NUM_BGX_XSTAT) ? NUM_BGX_XSTAT : n; 916 n = n - stat_cnt; 917 for (i = 0; i < stat_cnt; i++) { 918 xstats[si].id = si; 919 xstats[si].value = *(uint64_t *)(((char *)&bgx_stats) + 920 octeontx_bgx_xstats[i].soffset); 921 si++; 922 } 923 /*TODO: Similarly fill rest of HW stats */ 924 925 return si; 926 } 927 928 static int 929 octeontx_dev_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 930 uint64_t *stat_val, unsigned int n) 931 { 932 unsigned int i, xstat_cnt = octeontx_dev_total_xstat(); 933 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 934 struct rte_eth_xstat xstats[xstat_cnt]; 935 936 octeontx_port_xstats(nic, xstats, xstat_cnt); 937 for (i = 0; i < n; i++) { 938 if (ids[i] >= xstat_cnt) { 939 PMD_INIT_LOG(ERR, "out of range id value"); 940 return -1; 941 } 942 stat_val[i] = xstats[ids[i]].value; 943 } 944 return n; 945 } 946 947 static int 948 octeontx_dev_xstats_get_names(struct rte_eth_dev *dev __rte_unused, 949 struct rte_eth_xstat_name *xstats_names, 950 unsigned int size) 951 { 952 int stat_cnt, si, i; 953 954 if (xstats_names) { 955 si = 0; 956 /* Fill BGX stats */ 957 stat_cnt = (size > NUM_BGX_XSTAT) ? NUM_BGX_XSTAT : size; 958 size = size - stat_cnt; 959 for (i = 0; i < stat_cnt; i++) { 960 strlcpy(xstats_names[si].name, 961 octeontx_bgx_xstats[i].sname, 962 sizeof(xstats_names[si].name)); 963 si++; 964 } 965 /*TODO: Similarly fill rest of HW stats */ 966 return si; 967 } else { 968 return octeontx_dev_total_xstat(); 969 } 970 } 971 972 static void build_xstat_names(struct rte_eth_xstat_name *xstat_names) 973 { 974 unsigned int i; 975 976 for (i = 0; i < NUM_BGX_XSTAT; i++) { 977 strlcpy(xstat_names[i].name, octeontx_bgx_xstats[i].sname, 978 RTE_ETH_XSTATS_NAME_SIZE); 979 } 980 } 981 982 static int 983 octeontx_dev_xstats_get_names_by_id(struct rte_eth_dev *dev __rte_unused, 984 const uint64_t *ids, 985 struct rte_eth_xstat_name *stat_names, 986 unsigned int n) 987 { 988 unsigned int i, xstat_cnt = octeontx_dev_total_xstat(); 989 struct rte_eth_xstat_name xstat_names[xstat_cnt]; 990 991 build_xstat_names(xstat_names); 992 for (i = 0; i < n; i++) { 993 if (ids[i] >= xstat_cnt) { 994 PMD_INIT_LOG(ERR, "out of range id value"); 995 return -1; 996 } 997 strlcpy(stat_names[i].name, xstat_names[ids[i]].name, 998 sizeof(stat_names[i].name)); 999 } 1000 /*TODO: Similarly fill rest of HW stats */ 1001 1002 return n; 1003 } 1004 1005 static int 1006 octeontx_dev_xstats_get(struct rte_eth_dev *dev, 1007 struct rte_eth_xstat *xstats, 1008 unsigned int n) 1009 { 1010 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1011 1012 PMD_INIT_FUNC_TRACE(); 1013 return octeontx_port_xstats(nic, xstats, n); 1014 } 1015 1016 static int 1017 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1018 { 1019 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1020 1021 PMD_INIT_FUNC_TRACE(); 1022 return octeontx_port_stats(nic, stats); 1023 } 1024 1025 static int 1026 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 1027 { 1028 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1029 1030 PMD_INIT_FUNC_TRACE(); 1031 return octeontx_port_stats_clr(nic); 1032 } 1033 1034 static void 1035 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 1036 { 1037 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1038 int ret; 1039 1040 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 1041 if (ret != 0) 1042 octeontx_log_err("failed to del MAC address filter on port %d", 1043 nic->port_id); 1044 } 1045 1046 static int 1047 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 1048 struct rte_ether_addr *mac_addr, 1049 uint32_t index, 1050 __rte_unused uint32_t vmdq) 1051 { 1052 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1053 int ret; 1054 1055 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 1056 index); 1057 if (ret < 0) { 1058 octeontx_log_err("failed to add MAC address filter on port %d", 1059 nic->port_id); 1060 return ret; 1061 } 1062 1063 return 0; 1064 } 1065 1066 static int 1067 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 1068 struct rte_ether_addr *addr) 1069 { 1070 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1071 int ret; 1072 1073 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 1074 if (ret == 0) { 1075 /* Update same mac address to BGX CAM table */ 1076 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 1077 0); 1078 } 1079 if (ret < 0) { 1080 octeontx_log_err("failed to set MAC address on port %d", 1081 nic->port_id); 1082 } 1083 1084 return ret; 1085 } 1086 1087 static int 1088 octeontx_dev_info(struct rte_eth_dev *dev, 1089 struct rte_eth_dev_info *dev_info) 1090 { 1091 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1092 1093 /* Autonegotiation may be disabled */ 1094 dev_info->speed_capa = RTE_ETH_LINK_SPEED_FIXED; 1095 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_10M | RTE_ETH_LINK_SPEED_100M | 1096 RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_10G | 1097 RTE_ETH_LINK_SPEED_40G; 1098 1099 /* Min/Max MTU supported */ 1100 dev_info->min_rx_bufsize = OCCTX_MIN_FRS; 1101 dev_info->max_rx_pktlen = OCCTX_MAX_FRS; 1102 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD; 1103 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD; 1104 1105 dev_info->max_mac_addrs = 1106 octeontx_bgx_port_mac_entries_get(nic->port_id); 1107 dev_info->max_rx_queues = 1; 1108 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 1109 dev_info->min_rx_bufsize = 0; 1110 1111 dev_info->default_rxconf = (struct rte_eth_rxconf) { 1112 .rx_free_thresh = 0, 1113 .rx_drop_en = 0, 1114 .offloads = OCTEONTX_RX_OFFLOADS, 1115 }; 1116 1117 dev_info->default_txconf = (struct rte_eth_txconf) { 1118 .tx_free_thresh = 0, 1119 .offloads = OCTEONTX_TX_OFFLOADS, 1120 }; 1121 1122 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 1123 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 1124 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 1125 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 1126 1127 return 0; 1128 } 1129 1130 static void 1131 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 1132 { 1133 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 1134 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 1135 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 1136 } 1137 1138 static int 1139 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 1140 uint16_t qidx) 1141 { 1142 struct octeontx_txq *txq; 1143 int res; 1144 1145 PMD_INIT_FUNC_TRACE(); 1146 1147 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 1148 return 0; 1149 1150 txq = dev->data->tx_queues[qidx]; 1151 1152 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1153 &txq->dq, 1154 sizeof(octeontx_dq_t), 1155 txq->queue_id, 1156 octeontx_dq_info_getter); 1157 if (res < 0) { 1158 res = -EFAULT; 1159 goto close_port; 1160 } 1161 1162 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 1163 return res; 1164 1165 close_port: 1166 (void)octeontx_port_stop(nic); 1167 octeontx_pko_channel_stop(nic->base_ochan); 1168 octeontx_pko_channel_close(nic->base_ochan); 1169 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1170 return res; 1171 } 1172 1173 int 1174 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 1175 { 1176 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1177 1178 PMD_INIT_FUNC_TRACE(); 1179 qidx = qidx % PKO_VF_NUM_DQ; 1180 return octeontx_vf_start_tx_queue(dev, nic, qidx); 1181 } 1182 1183 static inline int 1184 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 1185 uint16_t qidx) 1186 { 1187 int ret = 0; 1188 1189 RTE_SET_USED(nic); 1190 PMD_INIT_FUNC_TRACE(); 1191 1192 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 1193 return 0; 1194 1195 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1196 return ret; 1197 } 1198 1199 int 1200 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 1201 { 1202 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1203 1204 PMD_INIT_FUNC_TRACE(); 1205 qidx = qidx % PKO_VF_NUM_DQ; 1206 1207 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 1208 } 1209 1210 static void 1211 octeontx_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 1212 { 1213 int res; 1214 1215 PMD_INIT_FUNC_TRACE(); 1216 1217 if (dev->data->tx_queues[qid]) { 1218 res = octeontx_dev_tx_queue_stop(dev, qid); 1219 if (res < 0) 1220 octeontx_log_err("failed stop tx_queue(%d)\n", qid); 1221 1222 rte_free(dev->data->tx_queues[qid]); 1223 } 1224 } 1225 1226 static int 1227 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1228 uint16_t nb_desc, unsigned int socket_id, 1229 const struct rte_eth_txconf *tx_conf __rte_unused) 1230 { 1231 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1232 struct octeontx_txq *txq = NULL; 1233 uint16_t dq_num; 1234 int res = 0; 1235 1236 RTE_SET_USED(nb_desc); 1237 RTE_SET_USED(socket_id); 1238 1239 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 1240 1241 /* Socket id check */ 1242 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1243 socket_id != (unsigned int)nic->node) 1244 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 1245 socket_id, nic->node); 1246 1247 /* Free memory prior to re-allocation if needed. */ 1248 if (dev->data->tx_queues[qidx] != NULL) { 1249 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 1250 qidx); 1251 octeontx_dev_tx_queue_release(dev, qidx); 1252 dev->data->tx_queues[qidx] = NULL; 1253 } 1254 1255 /* Allocating tx queue data structure */ 1256 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 1257 RTE_CACHE_LINE_SIZE, nic->node); 1258 if (txq == NULL) { 1259 octeontx_log_err("failed to allocate txq=%d", qidx); 1260 res = -ENOMEM; 1261 goto err; 1262 } 1263 1264 txq->eth_dev = dev; 1265 txq->queue_id = dq_num; 1266 dev->data->tx_queues[qidx] = txq; 1267 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1268 1269 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1270 &txq->dq, 1271 sizeof(octeontx_dq_t), 1272 txq->queue_id, 1273 octeontx_dq_info_getter); 1274 if (res < 0) { 1275 res = -EFAULT; 1276 goto err; 1277 } 1278 1279 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 1280 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 1281 txq->dq.ioreg_va, 1282 txq->dq.fc_status_va); 1283 1284 return res; 1285 1286 err: 1287 rte_free(txq); 1288 1289 return res; 1290 } 1291 1292 static int 1293 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1294 uint16_t nb_desc, unsigned int socket_id, 1295 const struct rte_eth_rxconf *rx_conf, 1296 struct rte_mempool *mb_pool) 1297 { 1298 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1299 struct rte_mempool_ops *mp_ops = NULL; 1300 struct octeontx_rxq *rxq = NULL; 1301 pki_pktbuf_cfg_t pktbuf_conf; 1302 pki_hash_cfg_t pki_hash; 1303 pki_qos_cfg_t pki_qos; 1304 uintptr_t pool; 1305 int ret, port; 1306 uint16_t gaura; 1307 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 1308 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 1309 1310 RTE_SET_USED(nb_desc); 1311 1312 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 1313 memset(&pki_hash, 0, sizeof(pki_hash)); 1314 memset(&pki_qos, 0, sizeof(pki_qos)); 1315 1316 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 1317 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 1318 octeontx_log_err("failed to find octeontx_fpavf mempool"); 1319 return -ENOTSUP; 1320 } 1321 1322 /* Handle forbidden configurations */ 1323 if (nic->pki.classifier_enable) { 1324 octeontx_log_err("cannot setup queue %d. " 1325 "Classifier option unsupported", qidx); 1326 return -EINVAL; 1327 } 1328 1329 port = nic->port_id; 1330 1331 /* Rx deferred start is not supported */ 1332 if (rx_conf->rx_deferred_start) { 1333 octeontx_log_err("rx deferred start not supported"); 1334 return -EINVAL; 1335 } 1336 1337 /* Verify queue index */ 1338 if (qidx >= dev->data->nb_rx_queues) { 1339 octeontx_log_err("QID %d not supported (0 - %d available)\n", 1340 qidx, (dev->data->nb_rx_queues - 1)); 1341 return -ENOTSUP; 1342 } 1343 1344 /* Socket id check */ 1345 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1346 socket_id != (unsigned int)nic->node) 1347 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 1348 socket_id, nic->node); 1349 1350 /* Allocating rx queue data structure */ 1351 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 1352 RTE_CACHE_LINE_SIZE, nic->node); 1353 if (rxq == NULL) { 1354 octeontx_log_err("failed to allocate rxq=%d", qidx); 1355 return -ENOMEM; 1356 } 1357 1358 if (!nic->pki.initialized) { 1359 pktbuf_conf.port_type = 0; 1360 pki_hash.port_type = 0; 1361 pki_qos.port_type = 0; 1362 1363 pktbuf_conf.mmask.f_wqe_skip = 1; 1364 pktbuf_conf.mmask.f_first_skip = 1; 1365 pktbuf_conf.mmask.f_later_skip = 1; 1366 pktbuf_conf.mmask.f_mbuff_size = 1; 1367 pktbuf_conf.mmask.f_cache_mode = 1; 1368 1369 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 1370 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 1371 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 1372 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 1373 RTE_PKTMBUF_HEADROOM - 1374 rte_pktmbuf_priv_size(mb_pool) - 1375 sizeof(struct rte_mbuf)); 1376 1377 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 1378 1379 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1380 if (ret != 0) { 1381 octeontx_log_err("fail to configure pktbuf for port %d", 1382 port); 1383 rte_free(rxq); 1384 return ret; 1385 } 1386 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1387 "\tmbuf_size:\t0x%0x\n" 1388 "\twqe_skip:\t0x%0x\n" 1389 "\tfirst_skip:\t0x%0x\n" 1390 "\tlater_skip:\t0x%0x\n" 1391 "\tcache_mode:\t%s\n", 1392 port, 1393 pktbuf_conf.mbuff_size, 1394 pktbuf_conf.wqe_skip, 1395 pktbuf_conf.first_skip, 1396 pktbuf_conf.later_skip, 1397 (pktbuf_conf.cache_mode == 1398 PKI_OPC_MODE_STT) ? 1399 "STT" : 1400 (pktbuf_conf.cache_mode == 1401 PKI_OPC_MODE_STF) ? 1402 "STF" : 1403 (pktbuf_conf.cache_mode == 1404 PKI_OPC_MODE_STF1_STT) ? 1405 "STF1_STT" : "STF2_STT"); 1406 1407 if (nic->pki.hash_enable) { 1408 pki_hash.tag_dlc = 1; 1409 pki_hash.tag_slc = 1; 1410 pki_hash.tag_dlf = 1; 1411 pki_hash.tag_slf = 1; 1412 pki_hash.tag_prt = 1; 1413 octeontx_pki_port_hash_config(port, &pki_hash); 1414 } 1415 1416 pool = (uintptr_t)mb_pool->pool_id; 1417 1418 /* Get the gaura Id */ 1419 gaura = octeontx_fpa_bufpool_gaura(pool); 1420 1421 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1422 pki_qos.num_entry = 1; 1423 pki_qos.drop_policy = 0; 1424 pki_qos.tag_type = 0L; 1425 pki_qos.qos_entry[0].port_add = 0; 1426 pki_qos.qos_entry[0].gaura = gaura; 1427 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1428 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1429 pki_qos.qos_entry[0].grptag_bad = 0; 1430 pki_qos.qos_entry[0].grptag_ok = 0; 1431 1432 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1433 if (ret < 0) { 1434 octeontx_log_err("failed to create QOS port=%d, q=%d", 1435 port, qidx); 1436 rte_free(rxq); 1437 return ret; 1438 } 1439 nic->pki.initialized = true; 1440 } 1441 1442 rxq->port_id = nic->port_id; 1443 rxq->eth_dev = dev; 1444 rxq->queue_id = qidx; 1445 rxq->evdev = nic->evdev; 1446 rxq->ev_queues = ev_queues; 1447 rxq->ev_ports = ev_ports; 1448 rxq->pool = mb_pool; 1449 1450 octeontx_recheck_rx_offloads(rxq); 1451 dev->data->rx_queues[qidx] = rxq; 1452 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1453 1454 return 0; 1455 } 1456 1457 static void 1458 octeontx_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 1459 { 1460 rte_free(dev->data->rx_queues[qid]); 1461 } 1462 1463 static const uint32_t * 1464 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1465 { 1466 static const uint32_t ptypes[] = { 1467 RTE_PTYPE_L3_IPV4, 1468 RTE_PTYPE_L3_IPV4_EXT, 1469 RTE_PTYPE_L3_IPV6, 1470 RTE_PTYPE_L3_IPV6_EXT, 1471 RTE_PTYPE_L4_TCP, 1472 RTE_PTYPE_L4_UDP, 1473 RTE_PTYPE_L4_FRAG, 1474 RTE_PTYPE_UNKNOWN 1475 }; 1476 1477 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1478 return ptypes; 1479 1480 return NULL; 1481 } 1482 1483 static int 1484 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1485 { 1486 RTE_SET_USED(dev); 1487 1488 if (!strcmp(pool, "octeontx_fpavf")) 1489 return 0; 1490 1491 return -ENOTSUP; 1492 } 1493 1494 /* Initialize and register driver with DPDK Application */ 1495 static const struct eth_dev_ops octeontx_dev_ops = { 1496 .dev_configure = octeontx_dev_configure, 1497 .dev_infos_get = octeontx_dev_info, 1498 .dev_close = octeontx_dev_close, 1499 .dev_start = octeontx_dev_start, 1500 .dev_stop = octeontx_dev_stop, 1501 .promiscuous_enable = octeontx_dev_promisc_enable, 1502 .promiscuous_disable = octeontx_dev_promisc_disable, 1503 .link_update = octeontx_dev_link_update, 1504 .stats_get = octeontx_dev_stats_get, 1505 .stats_reset = octeontx_dev_stats_reset, 1506 .mac_addr_remove = octeontx_dev_mac_addr_del, 1507 .mac_addr_add = octeontx_dev_mac_addr_add, 1508 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1509 .vlan_offload_set = octeontx_dev_vlan_offload_set, 1510 .vlan_filter_set = octeontx_dev_vlan_filter_set, 1511 .tx_queue_start = octeontx_dev_tx_queue_start, 1512 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1513 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1514 .tx_queue_release = octeontx_dev_tx_queue_release, 1515 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1516 .rx_queue_release = octeontx_dev_rx_queue_release, 1517 .dev_set_link_up = octeontx_dev_set_link_up, 1518 .dev_set_link_down = octeontx_dev_set_link_down, 1519 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1520 .mtu_set = octeontx_dev_mtu_set, 1521 .pool_ops_supported = octeontx_pool_ops, 1522 .flow_ctrl_get = octeontx_dev_flow_ctrl_get, 1523 .flow_ctrl_set = octeontx_dev_flow_ctrl_set, 1524 .xstats_get = octeontx_dev_xstats_get, 1525 .xstats_get_by_id = octeontx_dev_xstats_get_by_id, 1526 .xstats_get_names = octeontx_dev_xstats_get_names, 1527 .xstats_get_names_by_id = octeontx_dev_xstats_get_names_by_id, 1528 .allmulticast_enable = octeontx_allmulticast_enable, 1529 .allmulticast_disable = octeontx_allmulticast_disable, 1530 }; 1531 1532 /* Create Ethdev interface per BGX LMAC ports */ 1533 static int 1534 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1535 int socket_id) 1536 { 1537 int res; 1538 size_t pko_vfid; 1539 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1540 struct octeontx_nic *nic = NULL; 1541 struct rte_eth_dev *eth_dev = NULL; 1542 struct rte_eth_dev_data *data; 1543 const char *name = rte_vdev_device_name(dev); 1544 int max_entries; 1545 1546 PMD_INIT_FUNC_TRACE(); 1547 1548 sprintf(octtx_name, "%s_%d", name, port); 1549 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1550 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1551 if (eth_dev == NULL) 1552 return -ENODEV; 1553 1554 eth_dev->dev_ops = &octeontx_dev_ops; 1555 eth_dev->device = &dev->device; 1556 octeontx_set_tx_function(eth_dev); 1557 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1558 rte_eth_dev_probing_finish(eth_dev); 1559 return 0; 1560 } 1561 1562 /* Reserve an ethdev entry */ 1563 eth_dev = rte_eth_dev_allocate(octtx_name); 1564 if (eth_dev == NULL) { 1565 octeontx_log_err("failed to allocate rte_eth_dev"); 1566 res = -ENOMEM; 1567 goto err; 1568 } 1569 data = eth_dev->data; 1570 1571 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1572 if (nic == NULL) { 1573 octeontx_log_err("failed to allocate nic structure"); 1574 res = -ENOMEM; 1575 goto err; 1576 } 1577 data->dev_private = nic; 1578 pko_vfid = octeontx_pko_get_vfid(); 1579 1580 if (pko_vfid == SIZE_MAX) { 1581 octeontx_log_err("failed to get pko vfid"); 1582 res = -ENODEV; 1583 goto err; 1584 } 1585 1586 nic->pko_vfid = pko_vfid; 1587 nic->port_id = port; 1588 nic->evdev = evdev; 1589 __atomic_add_fetch(&evdev_refcnt, 1, __ATOMIC_ACQUIRE); 1590 1591 res = octeontx_port_open(nic); 1592 if (res < 0) 1593 goto err; 1594 1595 /* Rx side port configuration */ 1596 res = octeontx_pki_port_open(port); 1597 if (res != 0) { 1598 octeontx_log_err("failed to open PKI port %d", port); 1599 res = -ENODEV; 1600 goto err; 1601 } 1602 1603 eth_dev->device = &dev->device; 1604 eth_dev->intr_handle = NULL; 1605 eth_dev->data->numa_node = dev->device.numa_node; 1606 1607 data->port_id = eth_dev->data->port_id; 1608 1609 nic->ev_queues = 1; 1610 nic->ev_ports = 1; 1611 nic->print_flag = -1; 1612 nic->reconfigure = false; 1613 1614 data->dev_link.link_status = RTE_ETH_LINK_DOWN; 1615 data->dev_started = 0; 1616 data->promiscuous = 0; 1617 data->all_multicast = 0; 1618 data->scattered_rx = 0; 1619 1620 /* Get maximum number of supported MAC entries */ 1621 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1622 if (max_entries < 0) { 1623 octeontx_log_err("Failed to get max entries for mac addr"); 1624 res = -ENOTSUP; 1625 goto err; 1626 } 1627 1628 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1629 RTE_ETHER_ADDR_LEN, 0, 1630 socket_id); 1631 if (data->mac_addrs == NULL) { 1632 octeontx_log_err("failed to allocate memory for mac_addrs"); 1633 res = -ENOMEM; 1634 goto err; 1635 } 1636 1637 eth_dev->dev_ops = &octeontx_dev_ops; 1638 1639 /* Finally save ethdev pointer to the NIC structure */ 1640 nic->dev = eth_dev; 1641 1642 if (nic->port_id != data->port_id) { 1643 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1644 data->port_id, nic->port_id); 1645 res = -EINVAL; 1646 goto free_mac_addrs; 1647 } 1648 1649 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 1650 octeontx_link_status_poll, nic); 1651 if (res) { 1652 octeontx_log_err("Failed to start link polling alarm"); 1653 goto err; 1654 } 1655 1656 /* Update port_id mac to eth_dev */ 1657 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1658 1659 /* Update same mac address to BGX CAM table at index 0 */ 1660 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1661 1662 res = octeontx_dev_flow_ctrl_init(eth_dev); 1663 if (res < 0) 1664 goto err; 1665 1666 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1667 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1668 nic->port_id, nic->port_ena, 1669 nic->base_ochan, nic->num_ochans, 1670 nic->num_tx_queues); 1671 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu); 1672 1673 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1674 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1675 1676 rte_eth_dev_probing_finish(eth_dev); 1677 return data->port_id; 1678 1679 free_mac_addrs: 1680 rte_free(data->mac_addrs); 1681 data->mac_addrs = NULL; 1682 err: 1683 if (nic) 1684 octeontx_port_close(nic); 1685 1686 rte_eth_dev_release_port(eth_dev); 1687 1688 return res; 1689 } 1690 1691 /* Un initialize octeontx device */ 1692 static int 1693 octeontx_remove(struct rte_vdev_device *dev) 1694 { 1695 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1696 struct rte_eth_dev *eth_dev = NULL; 1697 struct octeontx_nic *nic = NULL; 1698 int i; 1699 1700 if (dev == NULL) 1701 return -EINVAL; 1702 1703 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1704 sprintf(octtx_name, "eth_octeontx_%d", i); 1705 1706 eth_dev = rte_eth_dev_allocated(octtx_name); 1707 if (eth_dev == NULL) 1708 continue; /* port already released */ 1709 1710 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1711 rte_eth_dev_release_port(eth_dev); 1712 continue; 1713 } 1714 1715 nic = octeontx_pmd_priv(eth_dev); 1716 rte_event_dev_stop(nic->evdev); 1717 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1718 octeontx_dev_close(eth_dev); 1719 rte_eth_dev_release_port(eth_dev); 1720 } 1721 1722 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1723 return 0; 1724 1725 /* Free FC resource */ 1726 octeontx_pko_fc_free(); 1727 1728 return 0; 1729 } 1730 1731 /* Initialize octeontx device */ 1732 static int 1733 octeontx_probe(struct rte_vdev_device *dev) 1734 { 1735 const char *dev_name; 1736 static int probe_once; 1737 uint8_t socket_id, qlist; 1738 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1739 struct rte_event_dev_config dev_conf; 1740 const char *eventdev_name = "event_octeontx"; 1741 struct rte_event_dev_info info; 1742 struct rte_eth_dev *eth_dev; 1743 1744 struct octeontx_vdev_init_params init_params = { 1745 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1746 }; 1747 1748 dev_name = rte_vdev_device_name(dev); 1749 1750 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1751 strlen(rte_vdev_device_args(dev)) == 0) { 1752 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1753 if (!eth_dev) { 1754 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1755 return -1; 1756 } 1757 /* TODO: request info from primary to set up Rx and Tx */ 1758 eth_dev->dev_ops = &octeontx_dev_ops; 1759 eth_dev->device = &dev->device; 1760 rte_eth_dev_probing_finish(eth_dev); 1761 return 0; 1762 } 1763 1764 res = octeontx_parse_vdev_init_params(&init_params, dev); 1765 if (res < 0) 1766 return -EINVAL; 1767 1768 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1769 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1770 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1771 return -ENOTSUP; 1772 } 1773 1774 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1775 1776 socket_id = rte_socket_id(); 1777 1778 tx_vfcnt = octeontx_pko_vf_count(); 1779 1780 if (tx_vfcnt < init_params.nr_port) { 1781 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1782 tx_vfcnt, init_params.nr_port); 1783 return -EINVAL; 1784 } 1785 evdev = rte_event_dev_get_dev_id(eventdev_name); 1786 if (evdev < 0) { 1787 octeontx_log_err("eventdev %s not found", eventdev_name); 1788 return -ENODEV; 1789 } 1790 1791 res = rte_event_dev_info_get(evdev, &info); 1792 if (res < 0) { 1793 octeontx_log_err("failed to eventdev info %d", res); 1794 return -EINVAL; 1795 } 1796 1797 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1798 info.max_event_queues, info.max_event_ports); 1799 1800 if (octeontx_pko_init_fc(tx_vfcnt)) 1801 return -ENOMEM; 1802 1803 devconf_set_default_sane_values(&dev_conf, &info); 1804 res = rte_event_dev_configure(evdev, &dev_conf); 1805 if (res < 0) 1806 goto parse_error; 1807 1808 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1809 (uint32_t *)&pnum); 1810 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1811 (uint32_t *)&qnum); 1812 if (pnum < qnum) { 1813 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1814 pnum, qnum); 1815 res = -EINVAL; 1816 goto parse_error; 1817 } 1818 1819 /* Enable all queues available */ 1820 for (i = 0; i < qnum; i++) { 1821 res = rte_event_queue_setup(evdev, i, NULL); 1822 if (res < 0) { 1823 octeontx_log_err("failed to setup event_q(%d): res %d", 1824 i, res); 1825 goto parse_error; 1826 } 1827 } 1828 1829 /* Enable all ports available */ 1830 for (i = 0; i < pnum; i++) { 1831 res = rte_event_port_setup(evdev, i, NULL); 1832 if (res < 0) { 1833 res = -ENODEV; 1834 octeontx_log_err("failed to setup ev port(%d) res=%d", 1835 i, res); 1836 goto parse_error; 1837 } 1838 } 1839 1840 __atomic_store_n(&evdev_refcnt, 0, __ATOMIC_RELEASE); 1841 /* 1842 * Do 1:1 links for ports & queues. All queues would be mapped to 1843 * one port. If there are more ports than queues, then some ports 1844 * won't be linked to any queue. 1845 */ 1846 for (i = 0; i < qnum; i++) { 1847 /* Link one queue to one event port */ 1848 qlist = i; 1849 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1850 if (res < 0) { 1851 res = -ENODEV; 1852 octeontx_log_err("failed to link port (%d): res=%d", 1853 i, res); 1854 goto parse_error; 1855 } 1856 } 1857 1858 /* Create ethdev interface */ 1859 for (i = 0; i < init_params.nr_port; i++) { 1860 port_id = octeontx_create(dev, i, evdev, socket_id); 1861 if (port_id < 0) { 1862 octeontx_log_err("failed to create device %s", 1863 dev_name); 1864 res = -ENODEV; 1865 goto parse_error; 1866 } 1867 1868 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1869 port_id); 1870 } 1871 1872 if (probe_once) { 1873 octeontx_log_err("interface %s not supported", dev_name); 1874 octeontx_remove(dev); 1875 res = -ENOTSUP; 1876 goto parse_error; 1877 } 1878 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1879 probe_once = 1; 1880 1881 return 0; 1882 1883 parse_error: 1884 octeontx_pko_fc_free(); 1885 return res; 1886 } 1887 1888 static struct rte_vdev_driver octeontx_pmd_drv = { 1889 .probe = octeontx_probe, 1890 .remove = octeontx_remove, 1891 }; 1892 1893 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1894 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1895 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1896