1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct evdev_priv_data { 28 OFFLOAD_FLAGS; /*Sequence should not be changed */ 29 } __rte_cache_aligned; 30 31 struct octeontx_vdev_init_params { 32 uint8_t nr_port; 33 }; 34 35 uint16_t 36 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 37 38 enum octeontx_link_speed { 39 OCTEONTX_LINK_SPEED_SGMII, 40 OCTEONTX_LINK_SPEED_XAUI, 41 OCTEONTX_LINK_SPEED_RXAUI, 42 OCTEONTX_LINK_SPEED_10G_R, 43 OCTEONTX_LINK_SPEED_40G_R, 44 OCTEONTX_LINK_SPEED_RESERVE1, 45 OCTEONTX_LINK_SPEED_QSGMII, 46 OCTEONTX_LINK_SPEED_RESERVE2 47 }; 48 49 int otx_net_logtype_mbox; 50 int otx_net_logtype_init; 51 int otx_net_logtype_driver; 52 53 RTE_INIT(otx_net_init_log) 54 { 55 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 56 if (otx_net_logtype_mbox >= 0) 57 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 58 59 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 60 if (otx_net_logtype_init >= 0) 61 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 62 63 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 64 if (otx_net_logtype_driver >= 0) 65 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 66 } 67 68 /* Parse integer from integer argument */ 69 static int 70 parse_integer_arg(const char *key __rte_unused, 71 const char *value, void *extra_args) 72 { 73 int *i = (int *)extra_args; 74 75 *i = atoi(value); 76 if (*i < 0) { 77 octeontx_log_err("argument has to be positive."); 78 return -1; 79 } 80 81 return 0; 82 } 83 84 static int 85 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 86 struct rte_vdev_device *dev) 87 { 88 struct rte_kvargs *kvlist = NULL; 89 int ret = 0; 90 91 static const char * const octeontx_vdev_valid_params[] = { 92 OCTEONTX_VDEV_NR_PORT_ARG, 93 NULL 94 }; 95 96 const char *input_args = rte_vdev_device_args(dev); 97 if (params == NULL) 98 return -EINVAL; 99 100 101 if (input_args) { 102 kvlist = rte_kvargs_parse(input_args, 103 octeontx_vdev_valid_params); 104 if (kvlist == NULL) 105 return -1; 106 107 ret = rte_kvargs_process(kvlist, 108 OCTEONTX_VDEV_NR_PORT_ARG, 109 &parse_integer_arg, 110 ¶ms->nr_port); 111 if (ret < 0) 112 goto free_kvlist; 113 } 114 115 free_kvlist: 116 rte_kvargs_free(kvlist); 117 return ret; 118 } 119 120 static int 121 octeontx_port_open(struct octeontx_nic *nic) 122 { 123 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 124 int res; 125 126 res = 0; 127 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 128 PMD_INIT_FUNC_TRACE(); 129 130 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 131 if (res < 0) { 132 octeontx_log_err("failed to open port %d", res); 133 return res; 134 } 135 136 nic->node = bgx_port_conf.node; 137 nic->port_ena = bgx_port_conf.enable; 138 nic->base_ichan = bgx_port_conf.base_chan; 139 nic->base_ochan = bgx_port_conf.base_chan; 140 nic->num_ichans = bgx_port_conf.num_chans; 141 nic->num_ochans = bgx_port_conf.num_chans; 142 nic->mtu = bgx_port_conf.mtu; 143 nic->bpen = bgx_port_conf.bpen; 144 nic->fcs_strip = bgx_port_conf.fcs_strip; 145 nic->bcast_mode = bgx_port_conf.bcast_mode; 146 nic->mcast_mode = bgx_port_conf.mcast_mode; 147 nic->speed = bgx_port_conf.mode; 148 149 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 150 RTE_ETHER_ADDR_LEN); 151 152 octeontx_log_dbg("port opened %d", nic->port_id); 153 return res; 154 } 155 156 static void 157 octeontx_port_close(struct octeontx_nic *nic) 158 { 159 PMD_INIT_FUNC_TRACE(); 160 161 octeontx_bgx_port_close(nic->port_id); 162 octeontx_log_dbg("port closed %d", nic->port_id); 163 } 164 165 static int 166 octeontx_port_start(struct octeontx_nic *nic) 167 { 168 PMD_INIT_FUNC_TRACE(); 169 170 return octeontx_bgx_port_start(nic->port_id); 171 } 172 173 static int 174 octeontx_port_stop(struct octeontx_nic *nic) 175 { 176 PMD_INIT_FUNC_TRACE(); 177 178 return octeontx_bgx_port_stop(nic->port_id); 179 } 180 181 static int 182 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 183 { 184 struct rte_eth_dev *dev; 185 int res; 186 187 res = 0; 188 PMD_INIT_FUNC_TRACE(); 189 dev = nic->dev; 190 191 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 192 if (res < 0) { 193 octeontx_log_err("failed to set promiscuous mode %d", 194 nic->port_id); 195 return res; 196 } 197 198 /* Set proper flag for the mode */ 199 dev->data->promiscuous = (en != 0) ? 1 : 0; 200 201 octeontx_log_dbg("port %d : promiscuous mode %s", 202 nic->port_id, en ? "set" : "unset"); 203 204 return 0; 205 } 206 207 static int 208 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 209 { 210 octeontx_mbox_bgx_port_stats_t bgx_stats; 211 int res; 212 213 PMD_INIT_FUNC_TRACE(); 214 215 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 216 if (res < 0) { 217 octeontx_log_err("failed to get port stats %d", nic->port_id); 218 return res; 219 } 220 221 stats->ipackets = bgx_stats.rx_packets; 222 stats->ibytes = bgx_stats.rx_bytes; 223 stats->imissed = bgx_stats.rx_dropped; 224 stats->ierrors = bgx_stats.rx_errors; 225 stats->opackets = bgx_stats.tx_packets; 226 stats->obytes = bgx_stats.tx_bytes; 227 stats->oerrors = bgx_stats.tx_errors; 228 229 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 230 nic->port_id, stats->ipackets, stats->opackets); 231 232 return 0; 233 } 234 235 static int 236 octeontx_port_stats_clr(struct octeontx_nic *nic) 237 { 238 PMD_INIT_FUNC_TRACE(); 239 240 return octeontx_bgx_port_stats_clr(nic->port_id); 241 } 242 243 static inline void 244 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 245 struct rte_event_dev_info *info) 246 { 247 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 248 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 249 250 dev_conf->nb_event_ports = info->max_event_ports; 251 dev_conf->nb_event_queues = info->max_event_queues; 252 253 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 254 dev_conf->nb_event_port_dequeue_depth = 255 info->max_event_port_dequeue_depth; 256 dev_conf->nb_event_port_enqueue_depth = 257 info->max_event_port_enqueue_depth; 258 dev_conf->nb_event_port_enqueue_depth = 259 info->max_event_port_enqueue_depth; 260 dev_conf->nb_events_limit = 261 info->max_num_events; 262 } 263 264 static uint16_t 265 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 266 { 267 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 268 uint16_t flags = 0; 269 270 /* Created function for supoorting future offloads */ 271 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS) 272 flags |= OCCTX_TX_MULTI_SEG_F; 273 274 return flags; 275 } 276 277 static uint16_t 278 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 279 { 280 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 281 struct rte_eth_dev_data *data = eth_dev->data; 282 struct rte_eth_conf *conf = &data->dev_conf; 283 struct rte_eth_rxmode *rxmode = &conf->rxmode; 284 uint16_t flags = 0; 285 286 if (rxmode->mq_mode == ETH_MQ_RX_RSS) 287 flags |= OCCTX_RX_OFFLOAD_RSS_F; 288 289 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) { 290 flags |= OCCTX_RX_MULTI_SEG_F; 291 eth_dev->data->scattered_rx = 1; 292 /* If scatter mode is enabled, TX should also be in multi 293 * seg mode, else memory leak will occur 294 */ 295 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; 296 } 297 298 return flags; 299 } 300 301 static int 302 octeontx_dev_configure(struct rte_eth_dev *dev) 303 { 304 struct rte_eth_dev_data *data = dev->data; 305 struct rte_eth_conf *conf = &data->dev_conf; 306 struct rte_eth_rxmode *rxmode = &conf->rxmode; 307 struct rte_eth_txmode *txmode = &conf->txmode; 308 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 309 int ret; 310 311 PMD_INIT_FUNC_TRACE(); 312 RTE_SET_USED(conf); 313 314 if (!rte_eal_has_hugepages()) { 315 octeontx_log_err("huge page is not configured"); 316 return -EINVAL; 317 } 318 319 if (txmode->mq_mode) { 320 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 321 return -EINVAL; 322 } 323 324 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 325 rxmode->mq_mode != ETH_MQ_RX_RSS) { 326 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 327 return -EINVAL; 328 } 329 330 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 331 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 332 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 333 } 334 335 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 336 octeontx_log_err("setting link speed/duplex not supported"); 337 return -EINVAL; 338 } 339 340 if (conf->dcb_capability_en) { 341 octeontx_log_err("DCB enable not supported"); 342 return -EINVAL; 343 } 344 345 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 346 octeontx_log_err("flow director not supported"); 347 return -EINVAL; 348 } 349 350 nic->num_tx_queues = dev->data->nb_tx_queues; 351 352 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 353 nic->num_tx_queues, 354 nic->base_ochan); 355 if (ret) { 356 octeontx_log_err("failed to open channel %d no-of-txq %d", 357 nic->base_ochan, nic->num_tx_queues); 358 return -EFAULT; 359 } 360 361 nic->pki.classifier_enable = false; 362 nic->pki.hash_enable = true; 363 nic->pki.initialized = false; 364 365 nic->rx_offloads |= rxmode->offloads; 366 nic->tx_offloads |= txmode->offloads; 367 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 368 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 369 370 return 0; 371 } 372 373 static void 374 octeontx_dev_close(struct rte_eth_dev *dev) 375 { 376 struct octeontx_txq *txq = NULL; 377 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 378 unsigned int i; 379 int ret; 380 381 PMD_INIT_FUNC_TRACE(); 382 383 rte_event_dev_close(nic->evdev); 384 385 ret = octeontx_pko_channel_close(nic->base_ochan); 386 if (ret < 0) { 387 octeontx_log_err("failed to close channel %d VF%d %d %d", 388 nic->base_ochan, nic->port_id, nic->num_tx_queues, 389 ret); 390 } 391 /* Free txq resources for this port */ 392 for (i = 0; i < nic->num_tx_queues; i++) { 393 txq = dev->data->tx_queues[i]; 394 if (!txq) 395 continue; 396 397 rte_free(txq); 398 } 399 400 /* Free MAC address table */ 401 rte_free(dev->data->mac_addrs); 402 dev->data->mac_addrs = NULL; 403 404 dev->tx_pkt_burst = NULL; 405 dev->rx_pkt_burst = NULL; 406 } 407 408 static int 409 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 410 { 411 struct rte_eth_dev *eth_dev = rxq->eth_dev; 412 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 413 struct rte_eth_dev_data *data = eth_dev->data; 414 struct rte_pktmbuf_pool_private *mbp_priv; 415 struct evdev_priv_data *evdev_priv; 416 struct rte_eventdev *dev; 417 uint32_t buffsz; 418 419 /* Get rx buffer size */ 420 mbp_priv = rte_mempool_get_priv(rxq->pool); 421 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 422 423 /* Setup scatter mode if needed by jumbo */ 424 if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) { 425 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 426 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 427 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 428 } 429 430 /* Sharing offload flags via eventdev priv region */ 431 dev = &rte_eventdevs[rxq->evdev]; 432 evdev_priv = dev->data->dev_private; 433 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 434 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 435 436 return 0; 437 } 438 439 static void 440 octeontx_set_tx_function(struct rte_eth_dev *dev) 441 { 442 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 443 444 const eth_tx_burst_t tx_burst_func[2] = { 445 [0] = octeontx_xmit_pkts, 446 [1] = octeontx_xmit_pkts_mseg, 447 }; 448 449 dev->tx_pkt_burst = 450 tx_burst_func[!!(nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)]; 451 } 452 453 static int 454 octeontx_dev_start(struct rte_eth_dev *dev) 455 { 456 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 457 int ret; 458 459 ret = 0; 460 461 PMD_INIT_FUNC_TRACE(); 462 /* 463 * Tx start 464 */ 465 octeontx_set_tx_function(dev); 466 ret = octeontx_pko_channel_start(nic->base_ochan); 467 if (ret < 0) { 468 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 469 nic->port_id, nic->num_tx_queues, nic->base_ochan, 470 ret); 471 goto error; 472 } 473 474 /* 475 * Rx start 476 */ 477 dev->rx_pkt_burst = octeontx_recv_pkts; 478 ret = octeontx_pki_port_start(nic->port_id); 479 if (ret < 0) { 480 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 481 goto channel_stop_error; 482 } 483 484 /* 485 * Start port 486 */ 487 ret = octeontx_port_start(nic); 488 if (ret < 0) { 489 octeontx_log_err("failed start port %d", ret); 490 goto pki_port_stop_error; 491 } 492 493 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 494 nic->base_ochan, nic->num_tx_queues, nic->port_id); 495 496 ret = rte_event_dev_start(nic->evdev); 497 if (ret < 0) { 498 octeontx_log_err("failed to start evdev: ret (%d)", ret); 499 goto pki_port_stop_error; 500 } 501 502 /* Success */ 503 return ret; 504 505 pki_port_stop_error: 506 octeontx_pki_port_stop(nic->port_id); 507 channel_stop_error: 508 octeontx_pko_channel_stop(nic->base_ochan); 509 error: 510 return ret; 511 } 512 513 static void 514 octeontx_dev_stop(struct rte_eth_dev *dev) 515 { 516 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 517 int ret; 518 519 PMD_INIT_FUNC_TRACE(); 520 521 rte_event_dev_stop(nic->evdev); 522 523 ret = octeontx_port_stop(nic); 524 if (ret < 0) { 525 octeontx_log_err("failed to req stop port %d res=%d", 526 nic->port_id, ret); 527 return; 528 } 529 530 ret = octeontx_pki_port_stop(nic->port_id); 531 if (ret < 0) { 532 octeontx_log_err("failed to stop pki port %d res=%d", 533 nic->port_id, ret); 534 return; 535 } 536 537 ret = octeontx_pko_channel_stop(nic->base_ochan); 538 if (ret < 0) { 539 octeontx_log_err("failed to stop channel %d VF%d %d %d", 540 nic->base_ochan, nic->port_id, nic->num_tx_queues, 541 ret); 542 return; 543 } 544 } 545 546 static int 547 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 548 { 549 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 550 551 PMD_INIT_FUNC_TRACE(); 552 return octeontx_port_promisc_set(nic, 1); 553 } 554 555 static int 556 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 557 { 558 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 559 560 PMD_INIT_FUNC_TRACE(); 561 return octeontx_port_promisc_set(nic, 0); 562 } 563 564 static int 565 octeontx_port_link_status(struct octeontx_nic *nic) 566 { 567 int res; 568 569 PMD_INIT_FUNC_TRACE(); 570 res = octeontx_bgx_port_link_status(nic->port_id); 571 if (res < 0) { 572 octeontx_log_err("failed to get port %d link status", 573 nic->port_id); 574 return res; 575 } 576 577 nic->link_up = (uint8_t)res; 578 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 579 580 return res; 581 } 582 583 /* 584 * Return 0 means link status changed, -1 means not changed 585 */ 586 static int 587 octeontx_dev_link_update(struct rte_eth_dev *dev, 588 int wait_to_complete __rte_unused) 589 { 590 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 591 struct rte_eth_link link; 592 int res; 593 594 PMD_INIT_FUNC_TRACE(); 595 596 res = octeontx_port_link_status(nic); 597 if (res < 0) { 598 octeontx_log_err("failed to request link status %d", res); 599 return res; 600 } 601 602 link.link_status = nic->link_up; 603 604 switch (nic->speed) { 605 case OCTEONTX_LINK_SPEED_SGMII: 606 link.link_speed = ETH_SPEED_NUM_1G; 607 break; 608 609 case OCTEONTX_LINK_SPEED_XAUI: 610 link.link_speed = ETH_SPEED_NUM_10G; 611 break; 612 613 case OCTEONTX_LINK_SPEED_RXAUI: 614 case OCTEONTX_LINK_SPEED_10G_R: 615 link.link_speed = ETH_SPEED_NUM_10G; 616 break; 617 case OCTEONTX_LINK_SPEED_QSGMII: 618 link.link_speed = ETH_SPEED_NUM_5G; 619 break; 620 case OCTEONTX_LINK_SPEED_40G_R: 621 link.link_speed = ETH_SPEED_NUM_40G; 622 break; 623 624 case OCTEONTX_LINK_SPEED_RESERVE1: 625 case OCTEONTX_LINK_SPEED_RESERVE2: 626 default: 627 link.link_speed = ETH_SPEED_NUM_NONE; 628 octeontx_log_err("incorrect link speed %d", nic->speed); 629 break; 630 } 631 632 link.link_duplex = ETH_LINK_FULL_DUPLEX; 633 link.link_autoneg = ETH_LINK_AUTONEG; 634 635 return rte_eth_linkstatus_set(dev, &link); 636 } 637 638 static int 639 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 640 { 641 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 642 643 PMD_INIT_FUNC_TRACE(); 644 return octeontx_port_stats(nic, stats); 645 } 646 647 static int 648 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 649 { 650 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 651 652 PMD_INIT_FUNC_TRACE(); 653 return octeontx_port_stats_clr(nic); 654 } 655 656 static void 657 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 658 { 659 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 660 int ret; 661 662 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 663 if (ret != 0) 664 octeontx_log_err("failed to del MAC address filter on port %d", 665 nic->port_id); 666 } 667 668 static int 669 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 670 struct rte_ether_addr *mac_addr, 671 uint32_t index, 672 __rte_unused uint32_t vmdq) 673 { 674 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 675 int ret; 676 677 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 678 index); 679 if (ret < 0) { 680 octeontx_log_err("failed to add MAC address filter on port %d", 681 nic->port_id); 682 return ret; 683 } 684 685 return 0; 686 } 687 688 static int 689 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 690 struct rte_ether_addr *addr) 691 { 692 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 693 int ret; 694 695 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 696 if (ret == 0) { 697 /* Update same mac address to BGX CAM table */ 698 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 699 0); 700 } 701 if (ret < 0) { 702 octeontx_log_err("failed to set MAC address on port %d", 703 nic->port_id); 704 } 705 706 return ret; 707 } 708 709 static int 710 octeontx_dev_info(struct rte_eth_dev *dev, 711 struct rte_eth_dev_info *dev_info) 712 { 713 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 714 715 /* Autonegotiation may be disabled */ 716 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 717 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 718 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 719 ETH_LINK_SPEED_40G; 720 721 dev_info->max_mac_addrs = 722 octeontx_bgx_port_mac_entries_get(nic->port_id); 723 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 724 dev_info->max_rx_queues = 1; 725 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 726 dev_info->min_rx_bufsize = 0; 727 728 dev_info->default_rxconf = (struct rte_eth_rxconf) { 729 .rx_free_thresh = 0, 730 .rx_drop_en = 0, 731 .offloads = OCTEONTX_RX_OFFLOADS, 732 }; 733 734 dev_info->default_txconf = (struct rte_eth_txconf) { 735 .tx_free_thresh = 0, 736 .offloads = OCTEONTX_TX_OFFLOADS, 737 }; 738 739 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 740 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 741 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 742 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 743 744 return 0; 745 } 746 747 static void 748 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 749 { 750 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 751 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 752 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 753 } 754 755 static int 756 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 757 uint16_t qidx) 758 { 759 struct octeontx_txq *txq; 760 int res; 761 762 PMD_INIT_FUNC_TRACE(); 763 764 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 765 return 0; 766 767 txq = dev->data->tx_queues[qidx]; 768 769 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 770 &txq->dq, 771 sizeof(octeontx_dq_t), 772 txq->queue_id, 773 octeontx_dq_info_getter); 774 if (res < 0) { 775 res = -EFAULT; 776 goto close_port; 777 } 778 779 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 780 return res; 781 782 close_port: 783 (void)octeontx_port_stop(nic); 784 octeontx_pko_channel_stop(nic->base_ochan); 785 octeontx_pko_channel_close(nic->base_ochan); 786 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 787 return res; 788 } 789 790 static int 791 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 792 { 793 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 794 795 PMD_INIT_FUNC_TRACE(); 796 qidx = qidx % PKO_VF_NUM_DQ; 797 return octeontx_vf_start_tx_queue(dev, nic, qidx); 798 } 799 800 static inline int 801 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 802 uint16_t qidx) 803 { 804 int ret = 0; 805 806 RTE_SET_USED(nic); 807 PMD_INIT_FUNC_TRACE(); 808 809 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 810 return 0; 811 812 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 813 return ret; 814 } 815 816 static int 817 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 818 { 819 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 820 821 PMD_INIT_FUNC_TRACE(); 822 qidx = qidx % PKO_VF_NUM_DQ; 823 824 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 825 } 826 827 static void 828 octeontx_dev_tx_queue_release(void *tx_queue) 829 { 830 struct octeontx_txq *txq = tx_queue; 831 int res; 832 833 PMD_INIT_FUNC_TRACE(); 834 835 if (txq) { 836 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 837 if (res < 0) 838 octeontx_log_err("failed stop tx_queue(%d)\n", 839 txq->queue_id); 840 841 rte_free(txq); 842 } 843 } 844 845 static int 846 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 847 uint16_t nb_desc, unsigned int socket_id, 848 const struct rte_eth_txconf *tx_conf __rte_unused) 849 { 850 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 851 struct octeontx_txq *txq = NULL; 852 uint16_t dq_num; 853 int res = 0; 854 855 RTE_SET_USED(nb_desc); 856 RTE_SET_USED(socket_id); 857 858 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 859 860 /* Socket id check */ 861 if (socket_id != (unsigned int)SOCKET_ID_ANY && 862 socket_id != (unsigned int)nic->node) 863 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 864 socket_id, nic->node); 865 866 /* Free memory prior to re-allocation if needed. */ 867 if (dev->data->tx_queues[qidx] != NULL) { 868 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 869 qidx); 870 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 871 dev->data->tx_queues[qidx] = NULL; 872 } 873 874 /* Allocating tx queue data structure */ 875 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 876 RTE_CACHE_LINE_SIZE, nic->node); 877 if (txq == NULL) { 878 octeontx_log_err("failed to allocate txq=%d", qidx); 879 res = -ENOMEM; 880 goto err; 881 } 882 883 txq->eth_dev = dev; 884 txq->queue_id = dq_num; 885 dev->data->tx_queues[qidx] = txq; 886 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 887 888 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 889 &txq->dq, 890 sizeof(octeontx_dq_t), 891 txq->queue_id, 892 octeontx_dq_info_getter); 893 if (res < 0) { 894 res = -EFAULT; 895 goto err; 896 } 897 898 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 899 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 900 txq->dq.ioreg_va, 901 txq->dq.fc_status_va); 902 903 return res; 904 905 err: 906 if (txq) 907 rte_free(txq); 908 909 return res; 910 } 911 912 static int 913 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 914 uint16_t nb_desc, unsigned int socket_id, 915 const struct rte_eth_rxconf *rx_conf, 916 struct rte_mempool *mb_pool) 917 { 918 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 919 struct rte_mempool_ops *mp_ops = NULL; 920 struct octeontx_rxq *rxq = NULL; 921 pki_pktbuf_cfg_t pktbuf_conf; 922 pki_hash_cfg_t pki_hash; 923 pki_qos_cfg_t pki_qos; 924 uintptr_t pool; 925 int ret, port; 926 uint16_t gaura; 927 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 928 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 929 930 RTE_SET_USED(nb_desc); 931 932 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 933 memset(&pki_hash, 0, sizeof(pki_hash)); 934 memset(&pki_qos, 0, sizeof(pki_qos)); 935 936 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 937 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 938 octeontx_log_err("failed to find octeontx_fpavf mempool"); 939 return -ENOTSUP; 940 } 941 942 /* Handle forbidden configurations */ 943 if (nic->pki.classifier_enable) { 944 octeontx_log_err("cannot setup queue %d. " 945 "Classifier option unsupported", qidx); 946 return -EINVAL; 947 } 948 949 port = nic->port_id; 950 951 /* Rx deferred start is not supported */ 952 if (rx_conf->rx_deferred_start) { 953 octeontx_log_err("rx deferred start not supported"); 954 return -EINVAL; 955 } 956 957 /* Verify queue index */ 958 if (qidx >= dev->data->nb_rx_queues) { 959 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 960 qidx, (dev->data->nb_rx_queues - 1)); 961 return -ENOTSUP; 962 } 963 964 /* Socket id check */ 965 if (socket_id != (unsigned int)SOCKET_ID_ANY && 966 socket_id != (unsigned int)nic->node) 967 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 968 socket_id, nic->node); 969 970 /* Allocating rx queue data structure */ 971 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 972 RTE_CACHE_LINE_SIZE, nic->node); 973 if (rxq == NULL) { 974 octeontx_log_err("failed to allocate rxq=%d", qidx); 975 return -ENOMEM; 976 } 977 978 if (!nic->pki.initialized) { 979 pktbuf_conf.port_type = 0; 980 pki_hash.port_type = 0; 981 pki_qos.port_type = 0; 982 983 pktbuf_conf.mmask.f_wqe_skip = 1; 984 pktbuf_conf.mmask.f_first_skip = 1; 985 pktbuf_conf.mmask.f_later_skip = 1; 986 pktbuf_conf.mmask.f_mbuff_size = 1; 987 pktbuf_conf.mmask.f_cache_mode = 1; 988 989 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 990 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 991 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 992 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 993 RTE_PKTMBUF_HEADROOM - 994 rte_pktmbuf_priv_size(mb_pool) - 995 sizeof(struct rte_mbuf)); 996 997 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 998 999 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1000 if (ret != 0) { 1001 octeontx_log_err("fail to configure pktbuf for port %d", 1002 port); 1003 rte_free(rxq); 1004 return ret; 1005 } 1006 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1007 "\tmbuf_size:\t0x%0x\n" 1008 "\twqe_skip:\t0x%0x\n" 1009 "\tfirst_skip:\t0x%0x\n" 1010 "\tlater_skip:\t0x%0x\n" 1011 "\tcache_mode:\t%s\n", 1012 port, 1013 pktbuf_conf.mbuff_size, 1014 pktbuf_conf.wqe_skip, 1015 pktbuf_conf.first_skip, 1016 pktbuf_conf.later_skip, 1017 (pktbuf_conf.cache_mode == 1018 PKI_OPC_MODE_STT) ? 1019 "STT" : 1020 (pktbuf_conf.cache_mode == 1021 PKI_OPC_MODE_STF) ? 1022 "STF" : 1023 (pktbuf_conf.cache_mode == 1024 PKI_OPC_MODE_STF1_STT) ? 1025 "STF1_STT" : "STF2_STT"); 1026 1027 if (nic->pki.hash_enable) { 1028 pki_hash.tag_dlc = 1; 1029 pki_hash.tag_slc = 1; 1030 pki_hash.tag_dlf = 1; 1031 pki_hash.tag_slf = 1; 1032 pki_hash.tag_prt = 1; 1033 octeontx_pki_port_hash_config(port, &pki_hash); 1034 } 1035 1036 pool = (uintptr_t)mb_pool->pool_id; 1037 1038 /* Get the gaura Id */ 1039 gaura = octeontx_fpa_bufpool_gaura(pool); 1040 1041 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1042 pki_qos.num_entry = 1; 1043 pki_qos.drop_policy = 0; 1044 pki_qos.tag_type = 0L; 1045 pki_qos.qos_entry[0].port_add = 0; 1046 pki_qos.qos_entry[0].gaura = gaura; 1047 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1048 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1049 pki_qos.qos_entry[0].grptag_bad = 0; 1050 pki_qos.qos_entry[0].grptag_ok = 0; 1051 1052 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1053 if (ret < 0) { 1054 octeontx_log_err("failed to create QOS port=%d, q=%d", 1055 port, qidx); 1056 rte_free(rxq); 1057 return ret; 1058 } 1059 nic->pki.initialized = true; 1060 } 1061 1062 rxq->port_id = nic->port_id; 1063 rxq->eth_dev = dev; 1064 rxq->queue_id = qidx; 1065 rxq->evdev = nic->evdev; 1066 rxq->ev_queues = ev_queues; 1067 rxq->ev_ports = ev_ports; 1068 rxq->pool = mb_pool; 1069 1070 octeontx_recheck_rx_offloads(rxq); 1071 dev->data->rx_queues[qidx] = rxq; 1072 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1073 return 0; 1074 } 1075 1076 static void 1077 octeontx_dev_rx_queue_release(void *rxq) 1078 { 1079 rte_free(rxq); 1080 } 1081 1082 static const uint32_t * 1083 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1084 { 1085 static const uint32_t ptypes[] = { 1086 RTE_PTYPE_L3_IPV4, 1087 RTE_PTYPE_L3_IPV4_EXT, 1088 RTE_PTYPE_L3_IPV6, 1089 RTE_PTYPE_L3_IPV6_EXT, 1090 RTE_PTYPE_L4_TCP, 1091 RTE_PTYPE_L4_UDP, 1092 RTE_PTYPE_L4_FRAG, 1093 RTE_PTYPE_UNKNOWN 1094 }; 1095 1096 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1097 return ptypes; 1098 1099 return NULL; 1100 } 1101 1102 static int 1103 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1104 { 1105 RTE_SET_USED(dev); 1106 1107 if (!strcmp(pool, "octeontx_fpavf")) 1108 return 0; 1109 1110 return -ENOTSUP; 1111 } 1112 1113 /* Initialize and register driver with DPDK Application */ 1114 static const struct eth_dev_ops octeontx_dev_ops = { 1115 .dev_configure = octeontx_dev_configure, 1116 .dev_infos_get = octeontx_dev_info, 1117 .dev_close = octeontx_dev_close, 1118 .dev_start = octeontx_dev_start, 1119 .dev_stop = octeontx_dev_stop, 1120 .promiscuous_enable = octeontx_dev_promisc_enable, 1121 .promiscuous_disable = octeontx_dev_promisc_disable, 1122 .link_update = octeontx_dev_link_update, 1123 .stats_get = octeontx_dev_stats_get, 1124 .stats_reset = octeontx_dev_stats_reset, 1125 .mac_addr_remove = octeontx_dev_mac_addr_del, 1126 .mac_addr_add = octeontx_dev_mac_addr_add, 1127 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1128 .tx_queue_start = octeontx_dev_tx_queue_start, 1129 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1130 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1131 .tx_queue_release = octeontx_dev_tx_queue_release, 1132 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1133 .rx_queue_release = octeontx_dev_rx_queue_release, 1134 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1135 .pool_ops_supported = octeontx_pool_ops, 1136 }; 1137 1138 /* Create Ethdev interface per BGX LMAC ports */ 1139 static int 1140 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1141 int socket_id) 1142 { 1143 int res; 1144 size_t pko_vfid; 1145 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1146 struct octeontx_nic *nic = NULL; 1147 struct rte_eth_dev *eth_dev = NULL; 1148 struct rte_eth_dev_data *data; 1149 const char *name = rte_vdev_device_name(dev); 1150 int max_entries; 1151 1152 PMD_INIT_FUNC_TRACE(); 1153 1154 sprintf(octtx_name, "%s_%d", name, port); 1155 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1156 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1157 if (eth_dev == NULL) 1158 return -ENODEV; 1159 1160 eth_dev->dev_ops = &octeontx_dev_ops; 1161 eth_dev->device = &dev->device; 1162 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1163 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1164 rte_eth_dev_probing_finish(eth_dev); 1165 return 0; 1166 } 1167 1168 /* Reserve an ethdev entry */ 1169 eth_dev = rte_eth_dev_allocate(octtx_name); 1170 if (eth_dev == NULL) { 1171 octeontx_log_err("failed to allocate rte_eth_dev"); 1172 res = -ENOMEM; 1173 goto err; 1174 } 1175 data = eth_dev->data; 1176 1177 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1178 if (nic == NULL) { 1179 octeontx_log_err("failed to allocate nic structure"); 1180 res = -ENOMEM; 1181 goto err; 1182 } 1183 data->dev_private = nic; 1184 pko_vfid = octeontx_pko_get_vfid(); 1185 1186 if (pko_vfid == SIZE_MAX) { 1187 octeontx_log_err("failed to get pko vfid"); 1188 res = -ENODEV; 1189 goto err; 1190 } 1191 1192 nic->pko_vfid = pko_vfid; 1193 nic->port_id = port; 1194 nic->evdev = evdev; 1195 1196 res = octeontx_port_open(nic); 1197 if (res < 0) 1198 goto err; 1199 1200 /* Rx side port configuration */ 1201 res = octeontx_pki_port_open(port); 1202 if (res != 0) { 1203 octeontx_log_err("failed to open PKI port %d", port); 1204 res = -ENODEV; 1205 goto err; 1206 } 1207 1208 eth_dev->device = &dev->device; 1209 eth_dev->intr_handle = NULL; 1210 eth_dev->data->kdrv = RTE_KDRV_NONE; 1211 eth_dev->data->numa_node = dev->device.numa_node; 1212 1213 data->port_id = eth_dev->data->port_id; 1214 1215 nic->ev_queues = 1; 1216 nic->ev_ports = 1; 1217 1218 data->dev_link.link_status = ETH_LINK_DOWN; 1219 data->dev_started = 0; 1220 data->promiscuous = 0; 1221 data->all_multicast = 0; 1222 data->scattered_rx = 0; 1223 1224 /* Get maximum number of supported MAC entries */ 1225 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1226 if (max_entries < 0) { 1227 octeontx_log_err("Failed to get max entries for mac addr"); 1228 res = -ENOTSUP; 1229 goto err; 1230 } 1231 1232 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1233 RTE_ETHER_ADDR_LEN, 0, 1234 socket_id); 1235 if (data->mac_addrs == NULL) { 1236 octeontx_log_err("failed to allocate memory for mac_addrs"); 1237 res = -ENOMEM; 1238 goto err; 1239 } 1240 1241 eth_dev->dev_ops = &octeontx_dev_ops; 1242 1243 /* Finally save ethdev pointer to the NIC structure */ 1244 nic->dev = eth_dev; 1245 1246 if (nic->port_id != data->port_id) { 1247 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1248 data->port_id, nic->port_id); 1249 res = -EINVAL; 1250 goto free_mac_addrs; 1251 } 1252 1253 /* Update port_id mac to eth_dev */ 1254 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1255 1256 /* Update same mac address to BGX CAM table at index 0 */ 1257 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1258 1259 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1260 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1261 nic->port_id, nic->port_ena, 1262 nic->base_ochan, nic->num_ochans, 1263 nic->num_tx_queues); 1264 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1265 1266 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1267 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1268 1269 rte_eth_dev_probing_finish(eth_dev); 1270 return data->port_id; 1271 1272 free_mac_addrs: 1273 rte_free(data->mac_addrs); 1274 err: 1275 if (nic) 1276 octeontx_port_close(nic); 1277 1278 rte_eth_dev_release_port(eth_dev); 1279 1280 return res; 1281 } 1282 1283 /* Un initialize octeontx device */ 1284 static int 1285 octeontx_remove(struct rte_vdev_device *dev) 1286 { 1287 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1288 struct rte_eth_dev *eth_dev = NULL; 1289 struct octeontx_nic *nic = NULL; 1290 int i; 1291 1292 if (dev == NULL) 1293 return -EINVAL; 1294 1295 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1296 sprintf(octtx_name, "eth_octeontx_%d", i); 1297 1298 /* reserve an ethdev entry */ 1299 eth_dev = rte_eth_dev_allocated(octtx_name); 1300 if (eth_dev == NULL) 1301 return -ENODEV; 1302 1303 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1304 rte_eth_dev_release_port(eth_dev); 1305 continue; 1306 } 1307 1308 nic = octeontx_pmd_priv(eth_dev); 1309 rte_event_dev_stop(nic->evdev); 1310 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1311 1312 rte_eth_dev_release_port(eth_dev); 1313 rte_event_dev_close(nic->evdev); 1314 } 1315 1316 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1317 return 0; 1318 1319 /* Free FC resource */ 1320 octeontx_pko_fc_free(); 1321 1322 return 0; 1323 } 1324 1325 /* Initialize octeontx device */ 1326 static int 1327 octeontx_probe(struct rte_vdev_device *dev) 1328 { 1329 const char *dev_name; 1330 static int probe_once; 1331 uint8_t socket_id, qlist; 1332 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1333 struct rte_event_dev_config dev_conf; 1334 const char *eventdev_name = "event_octeontx"; 1335 struct rte_event_dev_info info; 1336 struct rte_eth_dev *eth_dev; 1337 1338 struct octeontx_vdev_init_params init_params = { 1339 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1340 }; 1341 1342 dev_name = rte_vdev_device_name(dev); 1343 1344 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1345 strlen(rte_vdev_device_args(dev)) == 0) { 1346 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1347 if (!eth_dev) { 1348 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1349 return -1; 1350 } 1351 /* TODO: request info from primary to set up Rx and Tx */ 1352 eth_dev->dev_ops = &octeontx_dev_ops; 1353 eth_dev->device = &dev->device; 1354 rte_eth_dev_probing_finish(eth_dev); 1355 return 0; 1356 } 1357 1358 res = octeontx_parse_vdev_init_params(&init_params, dev); 1359 if (res < 0) 1360 return -EINVAL; 1361 1362 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1363 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1364 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1365 return -ENOTSUP; 1366 } 1367 1368 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1369 1370 socket_id = rte_socket_id(); 1371 1372 tx_vfcnt = octeontx_pko_vf_count(); 1373 1374 if (tx_vfcnt < init_params.nr_port) { 1375 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1376 tx_vfcnt, init_params.nr_port); 1377 return -EINVAL; 1378 } 1379 evdev = rte_event_dev_get_dev_id(eventdev_name); 1380 if (evdev < 0) { 1381 octeontx_log_err("eventdev %s not found", eventdev_name); 1382 return -ENODEV; 1383 } 1384 1385 res = rte_event_dev_info_get(evdev, &info); 1386 if (res < 0) { 1387 octeontx_log_err("failed to eventdev info %d", res); 1388 return -EINVAL; 1389 } 1390 1391 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1392 info.max_event_queues, info.max_event_ports); 1393 1394 if (octeontx_pko_init_fc(tx_vfcnt)) 1395 return -ENOMEM; 1396 1397 devconf_set_default_sane_values(&dev_conf, &info); 1398 res = rte_event_dev_configure(evdev, &dev_conf); 1399 if (res < 0) 1400 goto parse_error; 1401 1402 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1403 (uint32_t *)&pnum); 1404 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1405 (uint32_t *)&qnum); 1406 if (pnum < qnum) { 1407 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1408 pnum, qnum); 1409 res = -EINVAL; 1410 goto parse_error; 1411 } 1412 1413 /* Enable all queues available */ 1414 for (i = 0; i < qnum; i++) { 1415 res = rte_event_queue_setup(evdev, i, NULL); 1416 if (res < 0) { 1417 octeontx_log_err("failed to setup event_q(%d): res %d", 1418 i, res); 1419 goto parse_error; 1420 } 1421 } 1422 1423 /* Enable all ports available */ 1424 for (i = 0; i < pnum; i++) { 1425 res = rte_event_port_setup(evdev, i, NULL); 1426 if (res < 0) { 1427 res = -ENODEV; 1428 octeontx_log_err("failed to setup ev port(%d) res=%d", 1429 i, res); 1430 goto parse_error; 1431 } 1432 } 1433 1434 /* 1435 * Do 1:1 links for ports & queues. All queues would be mapped to 1436 * one port. If there are more ports than queues, then some ports 1437 * won't be linked to any queue. 1438 */ 1439 for (i = 0; i < qnum; i++) { 1440 /* Link one queue to one event port */ 1441 qlist = i; 1442 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1443 if (res < 0) { 1444 res = -ENODEV; 1445 octeontx_log_err("failed to link port (%d): res=%d", 1446 i, res); 1447 goto parse_error; 1448 } 1449 } 1450 1451 /* Create ethdev interface */ 1452 for (i = 0; i < init_params.nr_port; i++) { 1453 port_id = octeontx_create(dev, i, evdev, socket_id); 1454 if (port_id < 0) { 1455 octeontx_log_err("failed to create device %s", 1456 dev_name); 1457 res = -ENODEV; 1458 goto parse_error; 1459 } 1460 1461 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1462 port_id); 1463 } 1464 1465 if (probe_once) { 1466 octeontx_log_err("interface %s not supported", dev_name); 1467 octeontx_remove(dev); 1468 res = -ENOTSUP; 1469 goto parse_error; 1470 } 1471 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1472 probe_once = 1; 1473 1474 return 0; 1475 1476 parse_error: 1477 octeontx_pko_fc_free(); 1478 return res; 1479 } 1480 1481 static struct rte_vdev_driver octeontx_pmd_drv = { 1482 .probe = octeontx_probe, 1483 .remove = octeontx_remove, 1484 }; 1485 1486 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1487 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1488 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1489