xref: /dpdk/drivers/net/octeontx/octeontx_ethdev.c (revision 655c901bf7345e2eb7e2bb603a6c30ac6feff3c9)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Cavium, Inc
3  */
4 
5 #include <stdio.h>
6 #include <stdarg.h>
7 #include <stdbool.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
16 #include <rte_dev.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_prefetch.h>
20 #include <rte_bus_vdev.h>
21 
22 #include "octeontx_ethdev.h"
23 #include "octeontx_rxtx.h"
24 #include "octeontx_logs.h"
25 
26 struct octeontx_vdev_init_params {
27 	uint8_t	nr_port;
28 };
29 
30 uint16_t
31 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
32 
33 enum octeontx_link_speed {
34 	OCTEONTX_LINK_SPEED_SGMII,
35 	OCTEONTX_LINK_SPEED_XAUI,
36 	OCTEONTX_LINK_SPEED_RXAUI,
37 	OCTEONTX_LINK_SPEED_10G_R,
38 	OCTEONTX_LINK_SPEED_40G_R,
39 	OCTEONTX_LINK_SPEED_RESERVE1,
40 	OCTEONTX_LINK_SPEED_QSGMII,
41 	OCTEONTX_LINK_SPEED_RESERVE2
42 };
43 
44 int otx_net_logtype_mbox;
45 int otx_net_logtype_init;
46 int otx_net_logtype_driver;
47 
48 RTE_INIT(otx_net_init_log);
49 static void
50 otx_net_init_log(void)
51 {
52 	otx_net_logtype_mbox = rte_log_register("pmd.otx.ethdev.mbox");
53 	if (otx_net_logtype_mbox >= 0)
54 		rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
55 
56 	otx_net_logtype_init = rte_log_register("pmd.otx.ethdev.init");
57 	if (otx_net_logtype_init >= 0)
58 		rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
59 
60 	otx_net_logtype_driver = rte_log_register("pmd.otx.ethdev.driver");
61 	if (otx_net_logtype_driver >= 0)
62 		rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
63 }
64 
65 /* Parse integer from integer argument */
66 static int
67 parse_integer_arg(const char *key __rte_unused,
68 		const char *value, void *extra_args)
69 {
70 	int *i = (int *)extra_args;
71 
72 	*i = atoi(value);
73 	if (*i < 0) {
74 		octeontx_log_err("argument has to be positive.");
75 		return -1;
76 	}
77 
78 	return 0;
79 }
80 
81 static int
82 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
83 				struct rte_vdev_device *dev)
84 {
85 	struct rte_kvargs *kvlist = NULL;
86 	int ret = 0;
87 
88 	static const char * const octeontx_vdev_valid_params[] = {
89 		OCTEONTX_VDEV_NR_PORT_ARG,
90 		NULL
91 	};
92 
93 	const char *input_args = rte_vdev_device_args(dev);
94 	if (params == NULL)
95 		return -EINVAL;
96 
97 
98 	if (input_args) {
99 		kvlist = rte_kvargs_parse(input_args,
100 				octeontx_vdev_valid_params);
101 		if (kvlist == NULL)
102 			return -1;
103 
104 		ret = rte_kvargs_process(kvlist,
105 					OCTEONTX_VDEV_NR_PORT_ARG,
106 					&parse_integer_arg,
107 					&params->nr_port);
108 		if (ret < 0)
109 			goto free_kvlist;
110 	}
111 
112 free_kvlist:
113 	rte_kvargs_free(kvlist);
114 	return ret;
115 }
116 
117 static int
118 octeontx_port_open(struct octeontx_nic *nic)
119 {
120 	octeontx_mbox_bgx_port_conf_t bgx_port_conf;
121 	int res;
122 
123 	res = 0;
124 
125 	PMD_INIT_FUNC_TRACE();
126 
127 	res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
128 	if (res < 0) {
129 		octeontx_log_err("failed to open port %d", res);
130 		return res;
131 	}
132 
133 	nic->node = bgx_port_conf.node;
134 	nic->port_ena = bgx_port_conf.enable;
135 	nic->base_ichan = bgx_port_conf.base_chan;
136 	nic->base_ochan = bgx_port_conf.base_chan;
137 	nic->num_ichans = bgx_port_conf.num_chans;
138 	nic->num_ochans = bgx_port_conf.num_chans;
139 	nic->mtu = bgx_port_conf.mtu;
140 	nic->bpen = bgx_port_conf.bpen;
141 	nic->fcs_strip = bgx_port_conf.fcs_strip;
142 	nic->bcast_mode = bgx_port_conf.bcast_mode;
143 	nic->mcast_mode = bgx_port_conf.mcast_mode;
144 	nic->speed	= bgx_port_conf.mode;
145 
146 	memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
147 
148 	octeontx_log_dbg("port opened %d", nic->port_id);
149 	return res;
150 }
151 
152 static void
153 octeontx_port_close(struct octeontx_nic *nic)
154 {
155 	PMD_INIT_FUNC_TRACE();
156 
157 	octeontx_bgx_port_close(nic->port_id);
158 	octeontx_log_dbg("port closed %d", nic->port_id);
159 }
160 
161 static int
162 octeontx_port_start(struct octeontx_nic *nic)
163 {
164 	PMD_INIT_FUNC_TRACE();
165 
166 	return octeontx_bgx_port_start(nic->port_id);
167 }
168 
169 static int
170 octeontx_port_stop(struct octeontx_nic *nic)
171 {
172 	PMD_INIT_FUNC_TRACE();
173 
174 	return octeontx_bgx_port_stop(nic->port_id);
175 }
176 
177 static void
178 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
179 {
180 	struct rte_eth_dev *dev;
181 	int res;
182 
183 	res = 0;
184 	PMD_INIT_FUNC_TRACE();
185 	dev = nic->dev;
186 
187 	res = octeontx_bgx_port_promisc_set(nic->port_id, en);
188 	if (res < 0)
189 		octeontx_log_err("failed to set promiscuous mode %d",
190 				nic->port_id);
191 
192 	/* Set proper flag for the mode */
193 	dev->data->promiscuous = (en != 0) ? 1 : 0;
194 
195 	octeontx_log_dbg("port %d : promiscuous mode %s",
196 			nic->port_id, en ? "set" : "unset");
197 }
198 
199 static int
200 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
201 {
202 	octeontx_mbox_bgx_port_stats_t bgx_stats;
203 	int res;
204 
205 	PMD_INIT_FUNC_TRACE();
206 
207 	res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
208 	if (res < 0) {
209 		octeontx_log_err("failed to get port stats %d", nic->port_id);
210 		return res;
211 	}
212 
213 	stats->ipackets = bgx_stats.rx_packets;
214 	stats->ibytes = bgx_stats.rx_bytes;
215 	stats->imissed = bgx_stats.rx_dropped;
216 	stats->ierrors = bgx_stats.rx_errors;
217 	stats->opackets = bgx_stats.tx_packets;
218 	stats->obytes = bgx_stats.tx_bytes;
219 	stats->oerrors = bgx_stats.tx_errors;
220 
221 	octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
222 			nic->port_id, stats->ipackets, stats->opackets);
223 
224 	return 0;
225 }
226 
227 static void
228 octeontx_port_stats_clr(struct octeontx_nic *nic)
229 {
230 	PMD_INIT_FUNC_TRACE();
231 
232 	octeontx_bgx_port_stats_clr(nic->port_id);
233 }
234 
235 static inline void
236 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
237 				struct rte_event_dev_info *info)
238 {
239 	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
240 	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
241 
242 	dev_conf->nb_event_ports = info->max_event_ports;
243 	dev_conf->nb_event_queues = info->max_event_queues;
244 
245 	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
246 	dev_conf->nb_event_port_dequeue_depth =
247 			info->max_event_port_dequeue_depth;
248 	dev_conf->nb_event_port_enqueue_depth =
249 			info->max_event_port_enqueue_depth;
250 	dev_conf->nb_event_port_enqueue_depth =
251 			info->max_event_port_enqueue_depth;
252 	dev_conf->nb_events_limit =
253 			info->max_num_events;
254 }
255 
256 static int
257 octeontx_dev_configure(struct rte_eth_dev *dev)
258 {
259 	struct rte_eth_dev_data *data = dev->data;
260 	struct rte_eth_conf *conf = &data->dev_conf;
261 	struct rte_eth_rxmode *rxmode = &conf->rxmode;
262 	struct rte_eth_txmode *txmode = &conf->txmode;
263 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
264 	int ret;
265 
266 	PMD_INIT_FUNC_TRACE();
267 	RTE_SET_USED(conf);
268 
269 	if (!rte_eal_has_hugepages()) {
270 		octeontx_log_err("huge page is not configured");
271 		return -EINVAL;
272 	}
273 
274 	if (txmode->mq_mode) {
275 		octeontx_log_err("tx mq_mode DCB or VMDq not supported");
276 		return -EINVAL;
277 	}
278 
279 	if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
280 		rxmode->mq_mode != ETH_MQ_RX_RSS) {
281 		octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
282 		return -EINVAL;
283 	}
284 
285 	if (!rxmode->hw_strip_crc) {
286 		PMD_INIT_LOG(NOTICE, "can't disable hw crc strip");
287 		rxmode->hw_strip_crc = 1;
288 	}
289 
290 	if (rxmode->hw_ip_checksum) {
291 		PMD_INIT_LOG(NOTICE, "rxcksum not supported");
292 		rxmode->hw_ip_checksum = 0;
293 	}
294 
295 	if (rxmode->split_hdr_size) {
296 		octeontx_log_err("rxmode does not support split header");
297 		return -EINVAL;
298 	}
299 
300 	if (rxmode->hw_vlan_filter) {
301 		octeontx_log_err("VLAN filter not supported");
302 		return -EINVAL;
303 	}
304 
305 	if (rxmode->hw_vlan_extend) {
306 		octeontx_log_err("VLAN extended not supported");
307 		return -EINVAL;
308 	}
309 
310 	if (rxmode->enable_lro) {
311 		octeontx_log_err("LRO not supported");
312 		return -EINVAL;
313 	}
314 
315 	if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
316 		octeontx_log_err("setting link speed/duplex not supported");
317 		return -EINVAL;
318 	}
319 
320 	if (conf->dcb_capability_en) {
321 		octeontx_log_err("DCB enable not supported");
322 		return -EINVAL;
323 	}
324 
325 	if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
326 		octeontx_log_err("flow director not supported");
327 		return -EINVAL;
328 	}
329 
330 	nic->num_tx_queues = dev->data->nb_tx_queues;
331 
332 	ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
333 					nic->num_tx_queues,
334 					nic->base_ochan);
335 	if (ret) {
336 		octeontx_log_err("failed to open channel %d no-of-txq %d",
337 			   nic->base_ochan, nic->num_tx_queues);
338 		return -EFAULT;
339 	}
340 
341 	nic->pki.classifier_enable = false;
342 	nic->pki.hash_enable = true;
343 	nic->pki.initialized = false;
344 
345 	return 0;
346 }
347 
348 static void
349 octeontx_dev_close(struct rte_eth_dev *dev)
350 {
351 	struct octeontx_txq *txq = NULL;
352 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
353 	unsigned int i;
354 	int ret;
355 
356 	PMD_INIT_FUNC_TRACE();
357 
358 	rte_event_dev_close(nic->evdev);
359 
360 	ret = octeontx_pko_channel_close(nic->base_ochan);
361 	if (ret < 0) {
362 		octeontx_log_err("failed to close channel %d VF%d %d %d",
363 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
364 			     ret);
365 	}
366 	/* Free txq resources for this port */
367 	for (i = 0; i < nic->num_tx_queues; i++) {
368 		txq = dev->data->tx_queues[i];
369 		if (!txq)
370 			continue;
371 
372 		rte_free(txq);
373 	}
374 }
375 
376 static int
377 octeontx_dev_start(struct rte_eth_dev *dev)
378 {
379 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
380 	int ret;
381 
382 	ret = 0;
383 
384 	PMD_INIT_FUNC_TRACE();
385 	/*
386 	 * Tx start
387 	 */
388 	dev->tx_pkt_burst = octeontx_xmit_pkts;
389 	ret = octeontx_pko_channel_start(nic->base_ochan);
390 	if (ret < 0) {
391 		octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
392 			   nic->port_id, nic->num_tx_queues, nic->base_ochan,
393 			   ret);
394 		goto error;
395 	}
396 
397 	/*
398 	 * Rx start
399 	 */
400 	dev->rx_pkt_burst = octeontx_recv_pkts;
401 	ret = octeontx_pki_port_start(nic->port_id);
402 	if (ret < 0) {
403 		octeontx_log_err("fail to start Rx on port %d", nic->port_id);
404 		goto channel_stop_error;
405 	}
406 
407 	/*
408 	 * Start port
409 	 */
410 	ret = octeontx_port_start(nic);
411 	if (ret < 0) {
412 		octeontx_log_err("failed start port %d", ret);
413 		goto pki_port_stop_error;
414 	}
415 
416 	PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
417 			nic->base_ochan, nic->num_tx_queues, nic->port_id);
418 
419 	ret = rte_event_dev_start(nic->evdev);
420 	if (ret < 0) {
421 		octeontx_log_err("failed to start evdev: ret (%d)", ret);
422 		goto pki_port_stop_error;
423 	}
424 
425 	/* Success */
426 	return ret;
427 
428 pki_port_stop_error:
429 	octeontx_pki_port_stop(nic->port_id);
430 channel_stop_error:
431 	octeontx_pko_channel_stop(nic->base_ochan);
432 error:
433 	return ret;
434 }
435 
436 static void
437 octeontx_dev_stop(struct rte_eth_dev *dev)
438 {
439 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
440 	int ret;
441 
442 	PMD_INIT_FUNC_TRACE();
443 
444 	rte_event_dev_stop(nic->evdev);
445 
446 	ret = octeontx_port_stop(nic);
447 	if (ret < 0) {
448 		octeontx_log_err("failed to req stop port %d res=%d",
449 					nic->port_id, ret);
450 		return;
451 	}
452 
453 	ret = octeontx_pki_port_stop(nic->port_id);
454 	if (ret < 0) {
455 		octeontx_log_err("failed to stop pki port %d res=%d",
456 					nic->port_id, ret);
457 		return;
458 	}
459 
460 	ret = octeontx_pko_channel_stop(nic->base_ochan);
461 	if (ret < 0) {
462 		octeontx_log_err("failed to stop channel %d VF%d %d %d",
463 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
464 			     ret);
465 		return;
466 	}
467 
468 	dev->tx_pkt_burst = NULL;
469 	dev->rx_pkt_burst = NULL;
470 }
471 
472 static void
473 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
474 {
475 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
476 
477 	PMD_INIT_FUNC_TRACE();
478 	octeontx_port_promisc_set(nic, 1);
479 }
480 
481 static void
482 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
483 {
484 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
485 
486 	PMD_INIT_FUNC_TRACE();
487 	octeontx_port_promisc_set(nic, 0);
488 }
489 
490 static inline int
491 octeontx_atomic_write_link_status(struct rte_eth_dev *dev,
492 				  struct rte_eth_link *link)
493 {
494 	struct rte_eth_link *dst = &dev->data->dev_link;
495 	struct rte_eth_link *src = link;
496 
497 	if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
498 		*(uint64_t *)src) == 0)
499 		return -1;
500 
501 	return 0;
502 }
503 
504 static int
505 octeontx_port_link_status(struct octeontx_nic *nic)
506 {
507 	int res;
508 
509 	PMD_INIT_FUNC_TRACE();
510 	res = octeontx_bgx_port_link_status(nic->port_id);
511 	if (res < 0) {
512 		octeontx_log_err("failed to get port %d link status",
513 				nic->port_id);
514 		return res;
515 	}
516 
517 	nic->link_up = (uint8_t)res;
518 	octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
519 
520 	return res;
521 }
522 
523 /*
524  * Return 0 means link status changed, -1 means not changed
525  */
526 static int
527 octeontx_dev_link_update(struct rte_eth_dev *dev,
528 			 int wait_to_complete __rte_unused)
529 {
530 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
531 	struct rte_eth_link link;
532 	int res;
533 
534 	res = 0;
535 	PMD_INIT_FUNC_TRACE();
536 
537 	res = octeontx_port_link_status(nic);
538 	if (res < 0) {
539 		octeontx_log_err("failed to request link status %d", res);
540 		return res;
541 	}
542 
543 	link.link_status = nic->link_up;
544 
545 	switch (nic->speed) {
546 	case OCTEONTX_LINK_SPEED_SGMII:
547 		link.link_speed = ETH_SPEED_NUM_1G;
548 		break;
549 
550 	case OCTEONTX_LINK_SPEED_XAUI:
551 		link.link_speed = ETH_SPEED_NUM_10G;
552 		break;
553 
554 	case OCTEONTX_LINK_SPEED_RXAUI:
555 	case OCTEONTX_LINK_SPEED_10G_R:
556 		link.link_speed = ETH_SPEED_NUM_10G;
557 		break;
558 	case OCTEONTX_LINK_SPEED_QSGMII:
559 		link.link_speed = ETH_SPEED_NUM_5G;
560 		break;
561 	case OCTEONTX_LINK_SPEED_40G_R:
562 		link.link_speed = ETH_SPEED_NUM_40G;
563 		break;
564 
565 	case OCTEONTX_LINK_SPEED_RESERVE1:
566 	case OCTEONTX_LINK_SPEED_RESERVE2:
567 	default:
568 		octeontx_log_err("incorrect link speed %d", nic->speed);
569 		break;
570 	}
571 
572 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
573 	link.link_autoneg = ETH_LINK_AUTONEG;
574 
575 	return octeontx_atomic_write_link_status(dev, &link);
576 }
577 
578 static int
579 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
580 {
581 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
582 
583 	PMD_INIT_FUNC_TRACE();
584 	return octeontx_port_stats(nic, stats);
585 }
586 
587 static void
588 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
589 {
590 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
591 
592 	PMD_INIT_FUNC_TRACE();
593 	octeontx_port_stats_clr(nic);
594 }
595 
596 static void
597 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
598 					struct ether_addr *addr)
599 {
600 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
601 	int ret;
602 
603 	ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
604 	if (ret != 0)
605 		octeontx_log_err("failed to set MAC address on port %d",
606 				nic->port_id);
607 }
608 
609 static void
610 octeontx_dev_info(struct rte_eth_dev *dev,
611 		struct rte_eth_dev_info *dev_info)
612 {
613 	RTE_SET_USED(dev);
614 
615 	/* Autonegotiation may be disabled */
616 	dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
617 	dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
618 			ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
619 			ETH_LINK_SPEED_40G;
620 
621 	dev_info->driver_name = RTE_STR(rte_octeontx_pmd);
622 	dev_info->max_mac_addrs = 1;
623 	dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
624 	dev_info->max_rx_queues = 1;
625 	dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
626 	dev_info->min_rx_bufsize = 0;
627 	dev_info->pci_dev = NULL;
628 
629 	dev_info->default_rxconf = (struct rte_eth_rxconf) {
630 		.rx_free_thresh = 0,
631 		.rx_drop_en = 0,
632 	};
633 
634 	dev_info->default_txconf = (struct rte_eth_txconf) {
635 		.tx_free_thresh = 0,
636 		.txq_flags =
637 			ETH_TXQ_FLAGS_NOMULTSEGS |
638 			ETH_TXQ_FLAGS_NOOFFLOADS |
639 			ETH_TXQ_FLAGS_NOXSUMS,
640 	};
641 
642 	dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE;
643 }
644 
645 static void
646 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
647 {
648 	((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
649 	((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
650 	((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
651 }
652 
653 static int
654 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
655 				uint16_t qidx)
656 {
657 	struct octeontx_txq *txq;
658 	int res;
659 
660 	PMD_INIT_FUNC_TRACE();
661 
662 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
663 		return 0;
664 
665 	txq = dev->data->tx_queues[qidx];
666 
667 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
668 						&txq->dq,
669 						sizeof(octeontx_dq_t),
670 						txq->queue_id,
671 						octeontx_dq_info_getter);
672 	if (res < 0) {
673 		res = -EFAULT;
674 		goto close_port;
675 	}
676 
677 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
678 	return res;
679 
680 close_port:
681 	(void)octeontx_port_stop(nic);
682 	octeontx_pko_channel_stop(nic->base_ochan);
683 	octeontx_pko_channel_close(nic->base_ochan);
684 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
685 	return res;
686 }
687 
688 static int
689 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
690 {
691 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
692 
693 	PMD_INIT_FUNC_TRACE();
694 	qidx = qidx % PKO_VF_NUM_DQ;
695 	return octeontx_vf_start_tx_queue(dev, nic, qidx);
696 }
697 
698 static inline int
699 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
700 			  uint16_t qidx)
701 {
702 	int ret = 0;
703 
704 	RTE_SET_USED(nic);
705 	PMD_INIT_FUNC_TRACE();
706 
707 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
708 		return 0;
709 
710 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
711 	return ret;
712 }
713 
714 static int
715 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
716 {
717 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
718 
719 	PMD_INIT_FUNC_TRACE();
720 	qidx = qidx % PKO_VF_NUM_DQ;
721 
722 	return octeontx_vf_stop_tx_queue(dev, nic, qidx);
723 }
724 
725 static void
726 octeontx_dev_tx_queue_release(void *tx_queue)
727 {
728 	struct octeontx_txq *txq = tx_queue;
729 	int res;
730 
731 	PMD_INIT_FUNC_TRACE();
732 
733 	if (txq) {
734 		res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
735 		if (res < 0)
736 			octeontx_log_err("failed stop tx_queue(%d)\n",
737 				   txq->queue_id);
738 
739 		rte_free(txq);
740 	}
741 }
742 
743 static int
744 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
745 			    uint16_t nb_desc, unsigned int socket_id,
746 			    const struct rte_eth_txconf *tx_conf)
747 {
748 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
749 	struct octeontx_txq *txq = NULL;
750 	uint16_t dq_num;
751 	int res = 0;
752 
753 	RTE_SET_USED(nb_desc);
754 	RTE_SET_USED(socket_id);
755 	RTE_SET_USED(tx_conf);
756 
757 	dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
758 
759 	/* Socket id check */
760 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
761 			socket_id != (unsigned int)nic->node)
762 		PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
763 						socket_id, nic->node);
764 
765 	/* Free memory prior to re-allocation if needed. */
766 	if (dev->data->tx_queues[qidx] != NULL) {
767 		PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
768 				qidx);
769 		octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
770 		dev->data->tx_queues[qidx] = NULL;
771 	}
772 
773 	/* Allocating tx queue data structure */
774 	txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
775 				 RTE_CACHE_LINE_SIZE, nic->node);
776 	if (txq == NULL) {
777 		octeontx_log_err("failed to allocate txq=%d", qidx);
778 		res = -ENOMEM;
779 		goto err;
780 	}
781 
782 	txq->eth_dev = dev;
783 	txq->queue_id = dq_num;
784 	dev->data->tx_queues[qidx] = txq;
785 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
786 
787 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
788 						&txq->dq,
789 						sizeof(octeontx_dq_t),
790 						txq->queue_id,
791 						octeontx_dq_info_getter);
792 	if (res < 0) {
793 		res = -EFAULT;
794 		goto err;
795 	}
796 
797 	PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
798 			qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
799 			txq->dq.ioreg_va,
800 			txq->dq.fc_status_va);
801 
802 	return res;
803 
804 err:
805 	if (txq)
806 		rte_free(txq);
807 
808 	return res;
809 }
810 
811 static int
812 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
813 				uint16_t nb_desc, unsigned int socket_id,
814 				const struct rte_eth_rxconf *rx_conf,
815 				struct rte_mempool *mb_pool)
816 {
817 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
818 	struct rte_mempool_ops *mp_ops = NULL;
819 	struct octeontx_rxq *rxq = NULL;
820 	pki_pktbuf_cfg_t pktbuf_conf;
821 	pki_hash_cfg_t pki_hash;
822 	pki_qos_cfg_t pki_qos;
823 	uintptr_t pool;
824 	int ret, port;
825 	uint8_t gaura;
826 	unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
827 	unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
828 
829 	RTE_SET_USED(nb_desc);
830 
831 	memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
832 	memset(&pki_hash, 0, sizeof(pki_hash));
833 	memset(&pki_qos, 0, sizeof(pki_qos));
834 
835 	mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
836 	if (strcmp(mp_ops->name, "octeontx_fpavf")) {
837 		octeontx_log_err("failed to find octeontx_fpavf mempool");
838 		return -ENOTSUP;
839 	}
840 
841 	/* Handle forbidden configurations */
842 	if (nic->pki.classifier_enable) {
843 		octeontx_log_err("cannot setup queue %d. "
844 					"Classifier option unsupported", qidx);
845 		return -EINVAL;
846 	}
847 
848 	port = nic->port_id;
849 
850 	/* Rx deferred start is not supported */
851 	if (rx_conf->rx_deferred_start) {
852 		octeontx_log_err("rx deferred start not supported");
853 		return -EINVAL;
854 	}
855 
856 	/* Verify queue index */
857 	if (qidx >= dev->data->nb_rx_queues) {
858 		octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
859 				qidx, (dev->data->nb_rx_queues - 1));
860 		return -ENOTSUP;
861 	}
862 
863 	/* Socket id check */
864 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
865 			socket_id != (unsigned int)nic->node)
866 		PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
867 						socket_id, nic->node);
868 
869 	/* Allocating rx queue data structure */
870 	rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
871 				 RTE_CACHE_LINE_SIZE, nic->node);
872 	if (rxq == NULL) {
873 		octeontx_log_err("failed to allocate rxq=%d", qidx);
874 		return -ENOMEM;
875 	}
876 
877 	if (!nic->pki.initialized) {
878 		pktbuf_conf.port_type = 0;
879 		pki_hash.port_type = 0;
880 		pki_qos.port_type = 0;
881 
882 		pktbuf_conf.mmask.f_wqe_skip = 1;
883 		pktbuf_conf.mmask.f_first_skip = 1;
884 		pktbuf_conf.mmask.f_later_skip = 1;
885 		pktbuf_conf.mmask.f_mbuff_size = 1;
886 		pktbuf_conf.mmask.f_cache_mode = 1;
887 
888 		pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
889 		pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP;
890 		pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
891 		pktbuf_conf.mbuff_size = (mb_pool->elt_size -
892 					RTE_PKTMBUF_HEADROOM -
893 					sizeof(struct rte_mbuf));
894 
895 		pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
896 
897 		ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
898 		if (ret != 0) {
899 			octeontx_log_err("fail to configure pktbuf for port %d",
900 					port);
901 			rte_free(rxq);
902 			return ret;
903 		}
904 		PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
905 				"\tmbuf_size:\t0x%0x\n"
906 				"\twqe_skip:\t0x%0x\n"
907 				"\tfirst_skip:\t0x%0x\n"
908 				"\tlater_skip:\t0x%0x\n"
909 				"\tcache_mode:\t%s\n",
910 				port,
911 				pktbuf_conf.mbuff_size,
912 				pktbuf_conf.wqe_skip,
913 				pktbuf_conf.first_skip,
914 				pktbuf_conf.later_skip,
915 				(pktbuf_conf.cache_mode ==
916 						PKI_OPC_MODE_STT) ?
917 				"STT" :
918 				(pktbuf_conf.cache_mode ==
919 						PKI_OPC_MODE_STF) ?
920 				"STF" :
921 				(pktbuf_conf.cache_mode ==
922 						PKI_OPC_MODE_STF1_STT) ?
923 				"STF1_STT" : "STF2_STT");
924 
925 		if (nic->pki.hash_enable) {
926 			pki_hash.tag_dlc = 1;
927 			pki_hash.tag_slc = 1;
928 			pki_hash.tag_dlf = 1;
929 			pki_hash.tag_slf = 1;
930 			pki_hash.tag_prt = 1;
931 			octeontx_pki_port_hash_config(port, &pki_hash);
932 		}
933 
934 		pool = (uintptr_t)mb_pool->pool_id;
935 
936 		/* Get the gpool Id */
937 		gaura = octeontx_fpa_bufpool_gpool(pool);
938 
939 		pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
940 		pki_qos.num_entry = 1;
941 		pki_qos.drop_policy = 0;
942 		pki_qos.tag_type = 0L;
943 		pki_qos.qos_entry[0].port_add = 0;
944 		pki_qos.qos_entry[0].gaura = gaura;
945 		pki_qos.qos_entry[0].ggrp_ok = ev_queues;
946 		pki_qos.qos_entry[0].ggrp_bad = ev_queues;
947 		pki_qos.qos_entry[0].grptag_bad = 0;
948 		pki_qos.qos_entry[0].grptag_ok = 0;
949 
950 		ret = octeontx_pki_port_create_qos(port, &pki_qos);
951 		if (ret < 0) {
952 			octeontx_log_err("failed to create QOS port=%d, q=%d",
953 					port, qidx);
954 			rte_free(rxq);
955 			return ret;
956 		}
957 		nic->pki.initialized = true;
958 	}
959 
960 	rxq->port_id = nic->port_id;
961 	rxq->eth_dev = dev;
962 	rxq->queue_id = qidx;
963 	rxq->evdev = nic->evdev;
964 	rxq->ev_queues = ev_queues;
965 	rxq->ev_ports = ev_ports;
966 
967 	dev->data->rx_queues[qidx] = rxq;
968 	dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
969 	return 0;
970 }
971 
972 static void
973 octeontx_dev_rx_queue_release(void *rxq)
974 {
975 	rte_free(rxq);
976 }
977 
978 static const uint32_t *
979 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
980 {
981 	static const uint32_t ptypes[] = {
982 		RTE_PTYPE_L3_IPV4,
983 		RTE_PTYPE_L3_IPV4_EXT,
984 		RTE_PTYPE_L3_IPV6,
985 		RTE_PTYPE_L3_IPV6_EXT,
986 		RTE_PTYPE_L4_TCP,
987 		RTE_PTYPE_L4_UDP,
988 		RTE_PTYPE_L4_FRAG,
989 		RTE_PTYPE_UNKNOWN
990 	};
991 
992 	if (dev->rx_pkt_burst == octeontx_recv_pkts)
993 		return ptypes;
994 
995 	return NULL;
996 }
997 
998 static int
999 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1000 {
1001 	RTE_SET_USED(dev);
1002 
1003 	if (!strcmp(pool, "octeontx_fpavf"))
1004 		return 0;
1005 
1006 	return -ENOTSUP;
1007 }
1008 
1009 /* Initialize and register driver with DPDK Application */
1010 static const struct eth_dev_ops octeontx_dev_ops = {
1011 	.dev_configure		 = octeontx_dev_configure,
1012 	.dev_infos_get		 = octeontx_dev_info,
1013 	.dev_close		 = octeontx_dev_close,
1014 	.dev_start		 = octeontx_dev_start,
1015 	.dev_stop		 = octeontx_dev_stop,
1016 	.promiscuous_enable	 = octeontx_dev_promisc_enable,
1017 	.promiscuous_disable	 = octeontx_dev_promisc_disable,
1018 	.link_update		 = octeontx_dev_link_update,
1019 	.stats_get		 = octeontx_dev_stats_get,
1020 	.stats_reset		 = octeontx_dev_stats_reset,
1021 	.mac_addr_set		 = octeontx_dev_default_mac_addr_set,
1022 	.tx_queue_start		 = octeontx_dev_tx_queue_start,
1023 	.tx_queue_stop		 = octeontx_dev_tx_queue_stop,
1024 	.tx_queue_setup		 = octeontx_dev_tx_queue_setup,
1025 	.tx_queue_release	 = octeontx_dev_tx_queue_release,
1026 	.rx_queue_setup		 = octeontx_dev_rx_queue_setup,
1027 	.rx_queue_release	 = octeontx_dev_rx_queue_release,
1028 	.dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1029 	.pool_ops_supported      = octeontx_pool_ops,
1030 };
1031 
1032 /* Create Ethdev interface per BGX LMAC ports */
1033 static int
1034 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1035 			int socket_id)
1036 {
1037 	int res;
1038 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1039 	struct octeontx_nic *nic = NULL;
1040 	struct rte_eth_dev *eth_dev = NULL;
1041 	struct rte_eth_dev_data *data = NULL;
1042 	const char *name = rte_vdev_device_name(dev);
1043 
1044 	PMD_INIT_FUNC_TRACE();
1045 
1046 	sprintf(octtx_name, "%s_%d", name, port);
1047 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1048 		eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1049 		if (eth_dev == NULL)
1050 			return -ENODEV;
1051 
1052 		eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1053 		eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1054 		return 0;
1055 	}
1056 
1057 	data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id);
1058 	if (data == NULL) {
1059 		octeontx_log_err("failed to allocate devdata");
1060 		res = -ENOMEM;
1061 		goto err;
1062 	}
1063 
1064 	nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1065 	if (nic == NULL) {
1066 		octeontx_log_err("failed to allocate nic structure");
1067 		res = -ENOMEM;
1068 		goto err;
1069 	}
1070 
1071 	nic->port_id = port;
1072 	nic->evdev = evdev;
1073 
1074 	res = octeontx_port_open(nic);
1075 	if (res < 0)
1076 		goto err;
1077 
1078 	/* Rx side port configuration */
1079 	res = octeontx_pki_port_open(port);
1080 	if (res != 0) {
1081 		octeontx_log_err("failed to open PKI port %d", port);
1082 		res = -ENODEV;
1083 		goto err;
1084 	}
1085 
1086 	/* Reserve an ethdev entry */
1087 	eth_dev = rte_eth_dev_allocate(octtx_name);
1088 	if (eth_dev == NULL) {
1089 		octeontx_log_err("failed to allocate rte_eth_dev");
1090 		res = -ENOMEM;
1091 		goto err;
1092 	}
1093 
1094 	eth_dev->device = &dev->device;
1095 	eth_dev->intr_handle = NULL;
1096 	eth_dev->data->kdrv = RTE_KDRV_NONE;
1097 	eth_dev->data->numa_node = dev->device.numa_node;
1098 
1099 	rte_memcpy(data, (eth_dev)->data, sizeof(*data));
1100 	data->dev_private = nic;
1101 
1102 	data->port_id = eth_dev->data->port_id;
1103 	snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name);
1104 
1105 	nic->ev_queues = 1;
1106 	nic->ev_ports = 1;
1107 
1108 	data->dev_link.link_status = ETH_LINK_DOWN;
1109 	data->dev_started = 0;
1110 	data->promiscuous = 0;
1111 	data->all_multicast = 0;
1112 	data->scattered_rx = 0;
1113 
1114 	data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1115 							socket_id);
1116 	if (data->mac_addrs == NULL) {
1117 		octeontx_log_err("failed to allocate memory for mac_addrs");
1118 		res = -ENOMEM;
1119 		goto err;
1120 	}
1121 
1122 	eth_dev->data = data;
1123 	eth_dev->dev_ops = &octeontx_dev_ops;
1124 
1125 	/* Finally save ethdev pointer to the NIC structure */
1126 	nic->dev = eth_dev;
1127 
1128 	if (nic->port_id != data->port_id) {
1129 		octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1130 				data->port_id, nic->port_id);
1131 		res = -EINVAL;
1132 		goto err;
1133 	}
1134 
1135 	/* Update port_id mac to eth_dev */
1136 	memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1137 
1138 	PMD_INIT_LOG(DEBUG, "ethdev info: ");
1139 	PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1140 				nic->port_id, nic->port_ena,
1141 				nic->base_ochan, nic->num_ochans,
1142 				nic->num_tx_queues);
1143 	PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1144 
1145 	rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1146 		[(nic->base_ochan >> 4) & 0xF] = data->port_id;
1147 
1148 	return data->port_id;
1149 
1150 err:
1151 	if (port)
1152 		octeontx_port_close(nic);
1153 
1154 	if (eth_dev != NULL) {
1155 		rte_free(eth_dev->data->mac_addrs);
1156 		rte_free(data);
1157 		rte_free(nic);
1158 		rte_eth_dev_release_port(eth_dev);
1159 	}
1160 
1161 	return res;
1162 }
1163 
1164 /* Un initialize octeontx device */
1165 static int
1166 octeontx_remove(struct rte_vdev_device *dev)
1167 {
1168 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1169 	struct rte_eth_dev *eth_dev = NULL;
1170 	struct octeontx_nic *nic = NULL;
1171 	int i;
1172 
1173 	if (dev == NULL)
1174 		return -EINVAL;
1175 
1176 	for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1177 		sprintf(octtx_name, "eth_octeontx_%d", i);
1178 
1179 		/* reserve an ethdev entry */
1180 		eth_dev = rte_eth_dev_allocated(octtx_name);
1181 		if (eth_dev == NULL)
1182 			return -ENODEV;
1183 
1184 		nic = octeontx_pmd_priv(eth_dev);
1185 		rte_event_dev_stop(nic->evdev);
1186 		PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1187 
1188 		rte_free(eth_dev->data->mac_addrs);
1189 		rte_free(eth_dev->data->dev_private);
1190 		rte_free(eth_dev->data);
1191 		rte_eth_dev_release_port(eth_dev);
1192 		rte_event_dev_close(nic->evdev);
1193 	}
1194 
1195 	/* Free FC resource */
1196 	octeontx_pko_fc_free();
1197 
1198 	return 0;
1199 }
1200 
1201 /* Initialize octeontx device */
1202 static int
1203 octeontx_probe(struct rte_vdev_device *dev)
1204 {
1205 	const char *dev_name;
1206 	static int probe_once;
1207 	uint8_t socket_id, qlist;
1208 	int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1209 	struct rte_event_dev_config dev_conf;
1210 	const char *eventdev_name = "event_octeontx";
1211 	struct rte_event_dev_info info;
1212 
1213 	struct octeontx_vdev_init_params init_params = {
1214 		OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1215 	};
1216 
1217 	dev_name = rte_vdev_device_name(dev);
1218 	res = octeontx_parse_vdev_init_params(&init_params, dev);
1219 	if (res < 0)
1220 		return -EINVAL;
1221 
1222 	if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1223 		octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1224 				OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1225 		return -ENOTSUP;
1226 	}
1227 
1228 	PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1229 
1230 	socket_id = rte_socket_id();
1231 
1232 	tx_vfcnt = octeontx_pko_vf_count();
1233 
1234 	if (tx_vfcnt < init_params.nr_port) {
1235 		octeontx_log_err("not enough PKO (%d) for port number (%d)",
1236 				tx_vfcnt, init_params.nr_port);
1237 		return -EINVAL;
1238 	}
1239 	evdev = rte_event_dev_get_dev_id(eventdev_name);
1240 	if (evdev < 0) {
1241 		octeontx_log_err("eventdev %s not found", eventdev_name);
1242 		return -ENODEV;
1243 	}
1244 
1245 	res = rte_event_dev_info_get(evdev, &info);
1246 	if (res < 0) {
1247 		octeontx_log_err("failed to eventdev info %d", res);
1248 		return -EINVAL;
1249 	}
1250 
1251 	PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1252 			info.max_event_queues, info.max_event_ports);
1253 
1254 	if (octeontx_pko_init_fc(tx_vfcnt))
1255 		return -ENOMEM;
1256 
1257 	devconf_set_default_sane_values(&dev_conf, &info);
1258 	res = rte_event_dev_configure(evdev, &dev_conf);
1259 	if (res < 0)
1260 		goto parse_error;
1261 
1262 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1263 			(uint32_t *)&pnum);
1264 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1265 			(uint32_t *)&qnum);
1266 	if (pnum < qnum) {
1267 		octeontx_log_err("too few event ports (%d) for event_q(%d)",
1268 				pnum, qnum);
1269 		res = -EINVAL;
1270 		goto parse_error;
1271 	}
1272 	if (pnum > qnum) {
1273 		/*
1274 		 * We don't poll on event ports
1275 		 * that do not have any queues assigned.
1276 		 */
1277 		pnum = qnum;
1278 		PMD_INIT_LOG(INFO,
1279 			"reducing number of active event ports to %d", pnum);
1280 	}
1281 	for (i = 0; i < qnum; i++) {
1282 		res = rte_event_queue_setup(evdev, i, NULL);
1283 		if (res < 0) {
1284 			octeontx_log_err("failed to setup event_q(%d): res %d",
1285 					i, res);
1286 			goto parse_error;
1287 		}
1288 	}
1289 
1290 	for (i = 0; i < pnum; i++) {
1291 		res = rte_event_port_setup(evdev, i, NULL);
1292 		if (res < 0) {
1293 			res = -ENODEV;
1294 			octeontx_log_err("failed to setup ev port(%d) res=%d",
1295 						i, res);
1296 			goto parse_error;
1297 		}
1298 		/* Link one queue to one event port */
1299 		qlist = i;
1300 		res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1301 		if (res < 0) {
1302 			res = -ENODEV;
1303 			octeontx_log_err("failed to link port (%d): res=%d",
1304 					i, res);
1305 			goto parse_error;
1306 		}
1307 	}
1308 
1309 	/* Create ethdev interface */
1310 	for (i = 0; i < init_params.nr_port; i++) {
1311 		port_id = octeontx_create(dev, i, evdev, socket_id);
1312 		if (port_id < 0) {
1313 			octeontx_log_err("failed to create device %s",
1314 					dev_name);
1315 			res = -ENODEV;
1316 			goto parse_error;
1317 		}
1318 
1319 		PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1320 					port_id);
1321 	}
1322 
1323 	if (probe_once) {
1324 		octeontx_log_err("interface %s not supported", dev_name);
1325 		octeontx_remove(dev);
1326 		res = -ENOTSUP;
1327 		goto parse_error;
1328 	}
1329 	probe_once = 1;
1330 
1331 	return 0;
1332 
1333 parse_error:
1334 	octeontx_pko_fc_free();
1335 	return res;
1336 }
1337 
1338 static struct rte_vdev_driver octeontx_pmd_drv = {
1339 	.probe = octeontx_probe,
1340 	.remove = octeontx_remove,
1341 };
1342 
1343 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1344 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1345 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");
1346