1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_bus_vdev.h> 15 #include <rte_cycles.h> 16 #include <rte_debug.h> 17 #include <rte_devargs.h> 18 #include <rte_dev.h> 19 #include <rte_kvargs.h> 20 #include <rte_malloc.h> 21 #include <rte_mbuf_pool_ops.h> 22 #include <rte_prefetch.h> 23 24 #include "octeontx_ethdev.h" 25 #include "octeontx_rxtx.h" 26 #include "octeontx_logs.h" 27 28 struct evdev_priv_data { 29 OFFLOAD_FLAGS; /*Sequence should not be changed */ 30 } __rte_cache_aligned; 31 32 struct octeontx_vdev_init_params { 33 uint8_t nr_port; 34 }; 35 36 uint16_t 37 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 38 39 enum octeontx_link_speed { 40 OCTEONTX_LINK_SPEED_SGMII, 41 OCTEONTX_LINK_SPEED_XAUI, 42 OCTEONTX_LINK_SPEED_RXAUI, 43 OCTEONTX_LINK_SPEED_10G_R, 44 OCTEONTX_LINK_SPEED_40G_R, 45 OCTEONTX_LINK_SPEED_RESERVE1, 46 OCTEONTX_LINK_SPEED_QSGMII, 47 OCTEONTX_LINK_SPEED_RESERVE2 48 }; 49 50 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE); 51 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE); 52 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE); 53 54 /* Parse integer from integer argument */ 55 static int 56 parse_integer_arg(const char *key __rte_unused, 57 const char *value, void *extra_args) 58 { 59 int *i = (int *)extra_args; 60 61 *i = atoi(value); 62 if (*i < 0) { 63 octeontx_log_err("argument has to be positive."); 64 return -1; 65 } 66 67 return 0; 68 } 69 70 static int 71 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 72 struct rte_vdev_device *dev) 73 { 74 struct rte_kvargs *kvlist = NULL; 75 int ret = 0; 76 77 static const char * const octeontx_vdev_valid_params[] = { 78 OCTEONTX_VDEV_NR_PORT_ARG, 79 NULL 80 }; 81 82 const char *input_args = rte_vdev_device_args(dev); 83 if (params == NULL) 84 return -EINVAL; 85 86 87 if (input_args) { 88 kvlist = rte_kvargs_parse(input_args, 89 octeontx_vdev_valid_params); 90 if (kvlist == NULL) 91 return -1; 92 93 ret = rte_kvargs_process(kvlist, 94 OCTEONTX_VDEV_NR_PORT_ARG, 95 &parse_integer_arg, 96 ¶ms->nr_port); 97 if (ret < 0) 98 goto free_kvlist; 99 } 100 101 free_kvlist: 102 rte_kvargs_free(kvlist); 103 return ret; 104 } 105 106 static int 107 octeontx_port_open(struct octeontx_nic *nic) 108 { 109 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 110 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg; 111 int res; 112 113 res = 0; 114 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 115 PMD_INIT_FUNC_TRACE(); 116 117 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 118 if (res < 0) { 119 octeontx_log_err("failed to open port %d", res); 120 return res; 121 } 122 123 nic->node = bgx_port_conf.node; 124 nic->port_ena = bgx_port_conf.enable; 125 nic->base_ichan = bgx_port_conf.base_chan; 126 nic->base_ochan = bgx_port_conf.base_chan; 127 nic->num_ichans = bgx_port_conf.num_chans; 128 nic->num_ochans = bgx_port_conf.num_chans; 129 nic->bgx_mtu = bgx_port_conf.mtu; 130 nic->bpen = bgx_port_conf.bpen; 131 nic->fcs_strip = bgx_port_conf.fcs_strip; 132 nic->bcast_mode = bgx_port_conf.bcast_mode; 133 nic->mcast_mode = bgx_port_conf.mcast_mode; 134 nic->speed = bgx_port_conf.mode; 135 136 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg)); 137 138 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg); 139 if (res < 0) { 140 octeontx_log_err("failed to get port %d fifo cfg", res); 141 return res; 142 } 143 144 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz; 145 146 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 147 RTE_ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_link_status_print(struct rte_eth_dev *eth_dev, 155 struct rte_eth_link *link) 156 { 157 if (link && link->link_status) 158 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s", 159 (eth_dev->data->port_id), 160 link->link_speed, 161 link->link_duplex == ETH_LINK_FULL_DUPLEX ? 162 "full-duplex" : "half-duplex"); 163 else 164 octeontx_log_info("Port %d: Link Down", 165 (int)(eth_dev->data->port_id)); 166 } 167 168 static void 169 octeontx_link_status_update(struct octeontx_nic *nic, 170 struct rte_eth_link *link) 171 { 172 memset(link, 0, sizeof(*link)); 173 174 link->link_status = nic->link_up ? ETH_LINK_UP : ETH_LINK_DOWN; 175 176 switch (nic->speed) { 177 case OCTEONTX_LINK_SPEED_SGMII: 178 link->link_speed = ETH_SPEED_NUM_1G; 179 break; 180 181 case OCTEONTX_LINK_SPEED_XAUI: 182 link->link_speed = ETH_SPEED_NUM_10G; 183 break; 184 185 case OCTEONTX_LINK_SPEED_RXAUI: 186 case OCTEONTX_LINK_SPEED_10G_R: 187 link->link_speed = ETH_SPEED_NUM_10G; 188 break; 189 case OCTEONTX_LINK_SPEED_QSGMII: 190 link->link_speed = ETH_SPEED_NUM_5G; 191 break; 192 case OCTEONTX_LINK_SPEED_40G_R: 193 link->link_speed = ETH_SPEED_NUM_40G; 194 break; 195 196 case OCTEONTX_LINK_SPEED_RESERVE1: 197 case OCTEONTX_LINK_SPEED_RESERVE2: 198 default: 199 link->link_speed = ETH_SPEED_NUM_NONE; 200 octeontx_log_err("incorrect link speed %d", nic->speed); 201 break; 202 } 203 204 link->link_duplex = ETH_LINK_FULL_DUPLEX; 205 link->link_autoneg = ETH_LINK_AUTONEG; 206 } 207 208 static void 209 octeontx_link_status_poll(void *arg) 210 { 211 struct octeontx_nic *nic = arg; 212 struct rte_eth_link link; 213 struct rte_eth_dev *dev; 214 int res; 215 216 PMD_INIT_FUNC_TRACE(); 217 218 dev = nic->dev; 219 220 res = octeontx_bgx_port_link_status(nic->port_id); 221 if (res < 0) { 222 octeontx_log_err("Failed to get port %d link status", 223 nic->port_id); 224 } else { 225 if (nic->link_up != (uint8_t)res) { 226 nic->link_up = (uint8_t)res; 227 octeontx_link_status_update(nic, &link); 228 octeontx_link_status_print(dev, &link); 229 rte_eth_linkstatus_set(dev, &link); 230 rte_eth_dev_callback_process(dev, 231 RTE_ETH_EVENT_INTR_LSC, 232 NULL); 233 } 234 } 235 236 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 237 octeontx_link_status_poll, nic); 238 if (res < 0) 239 octeontx_log_err("Failed to restart alarm for port %d, err: %d", 240 nic->port_id, res); 241 } 242 243 static void 244 octeontx_port_close(struct octeontx_nic *nic) 245 { 246 PMD_INIT_FUNC_TRACE(); 247 248 rte_eal_alarm_cancel(octeontx_link_status_poll, nic); 249 octeontx_bgx_port_close(nic->port_id); 250 octeontx_log_dbg("port closed %d", nic->port_id); 251 } 252 253 static int 254 octeontx_port_start(struct octeontx_nic *nic) 255 { 256 PMD_INIT_FUNC_TRACE(); 257 258 return octeontx_bgx_port_start(nic->port_id); 259 } 260 261 static int 262 octeontx_port_stop(struct octeontx_nic *nic) 263 { 264 PMD_INIT_FUNC_TRACE(); 265 266 return octeontx_bgx_port_stop(nic->port_id); 267 } 268 269 static int 270 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 271 { 272 struct rte_eth_dev *dev; 273 int res; 274 275 res = 0; 276 PMD_INIT_FUNC_TRACE(); 277 dev = nic->dev; 278 279 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 280 if (res < 0) { 281 octeontx_log_err("failed to set promiscuous mode %d", 282 nic->port_id); 283 return res; 284 } 285 286 /* Set proper flag for the mode */ 287 dev->data->promiscuous = (en != 0) ? 1 : 0; 288 289 octeontx_log_dbg("port %d : promiscuous mode %s", 290 nic->port_id, en ? "set" : "unset"); 291 292 return 0; 293 } 294 295 static int 296 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 297 { 298 octeontx_mbox_bgx_port_stats_t bgx_stats; 299 int res; 300 301 PMD_INIT_FUNC_TRACE(); 302 303 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 304 if (res < 0) { 305 octeontx_log_err("failed to get port stats %d", nic->port_id); 306 return res; 307 } 308 309 stats->ipackets = bgx_stats.rx_packets; 310 stats->ibytes = bgx_stats.rx_bytes; 311 stats->imissed = bgx_stats.rx_dropped; 312 stats->ierrors = bgx_stats.rx_errors; 313 stats->opackets = bgx_stats.tx_packets; 314 stats->obytes = bgx_stats.tx_bytes; 315 stats->oerrors = bgx_stats.tx_errors; 316 317 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 318 nic->port_id, stats->ipackets, stats->opackets); 319 320 return 0; 321 } 322 323 static int 324 octeontx_port_stats_clr(struct octeontx_nic *nic) 325 { 326 PMD_INIT_FUNC_TRACE(); 327 328 return octeontx_bgx_port_stats_clr(nic->port_id); 329 } 330 331 static inline void 332 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 333 struct rte_event_dev_info *info) 334 { 335 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 336 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 337 338 dev_conf->nb_event_ports = info->max_event_ports; 339 dev_conf->nb_event_queues = info->max_event_queues; 340 341 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 342 dev_conf->nb_event_port_dequeue_depth = 343 info->max_event_port_dequeue_depth; 344 dev_conf->nb_event_port_enqueue_depth = 345 info->max_event_port_enqueue_depth; 346 dev_conf->nb_event_port_enqueue_depth = 347 info->max_event_port_enqueue_depth; 348 dev_conf->nb_events_limit = 349 info->max_num_events; 350 } 351 352 static uint16_t 353 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 354 { 355 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 356 uint16_t flags = 0; 357 358 if (nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM || 359 nic->tx_offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM) 360 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F; 361 362 if (nic->tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM || 363 nic->tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM || 364 nic->tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM || 365 nic->tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) 366 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F; 367 368 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)) 369 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F; 370 371 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS) 372 flags |= OCCTX_TX_MULTI_SEG_F; 373 374 return flags; 375 } 376 377 static uint16_t 378 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 379 { 380 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 381 uint16_t flags = 0; 382 383 if (nic->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM | 384 DEV_RX_OFFLOAD_UDP_CKSUM)) 385 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 386 387 if (nic->rx_offloads & (DEV_RX_OFFLOAD_IPV4_CKSUM | 388 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) 389 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 390 391 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) { 392 flags |= OCCTX_RX_MULTI_SEG_F; 393 eth_dev->data->scattered_rx = 1; 394 /* If scatter mode is enabled, TX should also be in multi 395 * seg mode, else memory leak will occur 396 */ 397 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; 398 } 399 400 return flags; 401 } 402 403 static int 404 octeontx_dev_configure(struct rte_eth_dev *dev) 405 { 406 struct rte_eth_dev_data *data = dev->data; 407 struct rte_eth_conf *conf = &data->dev_conf; 408 struct rte_eth_rxmode *rxmode = &conf->rxmode; 409 struct rte_eth_txmode *txmode = &conf->txmode; 410 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 411 int ret; 412 413 PMD_INIT_FUNC_TRACE(); 414 RTE_SET_USED(conf); 415 416 if (!rte_eal_has_hugepages()) { 417 octeontx_log_err("huge page is not configured"); 418 return -EINVAL; 419 } 420 421 if (txmode->mq_mode) { 422 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 423 return -EINVAL; 424 } 425 426 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 427 rxmode->mq_mode != ETH_MQ_RX_RSS) { 428 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 429 return -EINVAL; 430 } 431 432 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 433 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 434 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 435 } 436 437 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 438 octeontx_log_err("setting link speed/duplex not supported"); 439 return -EINVAL; 440 } 441 442 if (conf->dcb_capability_en) { 443 octeontx_log_err("DCB enable not supported"); 444 return -EINVAL; 445 } 446 447 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 448 octeontx_log_err("flow director not supported"); 449 return -EINVAL; 450 } 451 452 nic->num_tx_queues = dev->data->nb_tx_queues; 453 454 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 455 nic->num_tx_queues, 456 nic->base_ochan); 457 if (ret) { 458 octeontx_log_err("failed to open channel %d no-of-txq %d", 459 nic->base_ochan, nic->num_tx_queues); 460 return -EFAULT; 461 } 462 463 ret = octeontx_dev_vlan_offload_init(dev); 464 if (ret) { 465 octeontx_log_err("failed to initialize vlan offload"); 466 return -EFAULT; 467 } 468 469 nic->pki.classifier_enable = false; 470 nic->pki.hash_enable = true; 471 nic->pki.initialized = false; 472 473 nic->rx_offloads |= rxmode->offloads; 474 nic->tx_offloads |= txmode->offloads; 475 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 476 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 477 478 return 0; 479 } 480 481 static int 482 octeontx_dev_close(struct rte_eth_dev *dev) 483 { 484 struct octeontx_txq *txq = NULL; 485 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 486 unsigned int i; 487 int ret; 488 489 PMD_INIT_FUNC_TRACE(); 490 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 491 return 0; 492 493 rte_event_dev_close(nic->evdev); 494 495 octeontx_dev_flow_ctrl_fini(dev); 496 497 octeontx_dev_vlan_offload_fini(dev); 498 499 ret = octeontx_pko_channel_close(nic->base_ochan); 500 if (ret < 0) { 501 octeontx_log_err("failed to close channel %d VF%d %d %d", 502 nic->base_ochan, nic->port_id, nic->num_tx_queues, 503 ret); 504 } 505 /* Free txq resources for this port */ 506 for (i = 0; i < nic->num_tx_queues; i++) { 507 txq = dev->data->tx_queues[i]; 508 if (!txq) 509 continue; 510 511 rte_free(txq); 512 } 513 514 octeontx_port_close(nic); 515 516 return 0; 517 } 518 519 static int 520 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 521 { 522 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD; 523 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 524 struct rte_eth_dev_data *data = eth_dev->data; 525 int rc = 0; 526 527 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; 528 529 /* Refuse MTU that requires the support of scattered packets 530 * when this feature has not been enabled before. 531 */ 532 if (data->dev_started && frame_size > buffsz && 533 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) { 534 octeontx_log_err("Scatter mode is disabled"); 535 return -EINVAL; 536 } 537 538 /* Check <seg size> * <max_seg> >= max_frame */ 539 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) && 540 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX)) 541 return -EINVAL; 542 543 rc = octeontx_pko_send_mtu(nic->port_id, frame_size); 544 if (rc) 545 return rc; 546 547 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size); 548 if (rc) 549 return rc; 550 551 octeontx_log_info("Received pkt beyond maxlen %d will be dropped", 552 frame_size); 553 554 return rc; 555 } 556 557 static int 558 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 559 { 560 struct rte_eth_dev *eth_dev = rxq->eth_dev; 561 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 562 struct rte_eth_dev_data *data = eth_dev->data; 563 struct rte_pktmbuf_pool_private *mbp_priv; 564 struct evdev_priv_data *evdev_priv; 565 struct rte_eventdev *dev; 566 uint32_t buffsz; 567 568 /* Get rx buffer size */ 569 mbp_priv = rte_mempool_get_priv(rxq->pool); 570 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 571 572 /* Setup scatter mode if needed by jumbo */ 573 if (data->mtu > buffsz) { 574 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 575 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 576 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 577 } 578 579 /* Sharing offload flags via eventdev priv region */ 580 dev = &rte_eventdevs[rxq->evdev]; 581 evdev_priv = dev->data->dev_private; 582 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 583 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 584 585 /* Setup MTU */ 586 nic->mtu = data->mtu; 587 588 return 0; 589 } 590 591 static int 592 octeontx_dev_start(struct rte_eth_dev *dev) 593 { 594 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 595 struct octeontx_rxq *rxq; 596 int ret, i; 597 598 PMD_INIT_FUNC_TRACE(); 599 /* Rechecking if any new offload set to update 600 * rx/tx burst function pointer accordingly. 601 */ 602 for (i = 0; i < dev->data->nb_rx_queues; i++) { 603 rxq = dev->data->rx_queues[i]; 604 octeontx_recheck_rx_offloads(rxq); 605 } 606 607 /* Setting up the mtu */ 608 ret = octeontx_dev_mtu_set(dev, nic->mtu); 609 if (ret) { 610 octeontx_log_err("Failed to set default MTU size %d", ret); 611 goto error; 612 } 613 614 /* 615 * Tx start 616 */ 617 octeontx_set_tx_function(dev); 618 ret = octeontx_pko_channel_start(nic->base_ochan); 619 if (ret < 0) { 620 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 621 nic->port_id, nic->num_tx_queues, nic->base_ochan, 622 ret); 623 goto error; 624 } 625 626 /* 627 * Rx start 628 */ 629 dev->rx_pkt_burst = octeontx_recv_pkts; 630 ret = octeontx_pki_port_start(nic->port_id); 631 if (ret < 0) { 632 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 633 goto channel_stop_error; 634 } 635 636 /* 637 * Start port 638 */ 639 ret = octeontx_port_start(nic); 640 if (ret < 0) { 641 octeontx_log_err("failed start port %d", ret); 642 goto pki_port_stop_error; 643 } 644 645 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 646 nic->base_ochan, nic->num_tx_queues, nic->port_id); 647 648 ret = rte_event_dev_start(nic->evdev); 649 if (ret < 0) { 650 octeontx_log_err("failed to start evdev: ret (%d)", ret); 651 goto pki_port_stop_error; 652 } 653 654 /* Success */ 655 return ret; 656 657 pki_port_stop_error: 658 octeontx_pki_port_stop(nic->port_id); 659 channel_stop_error: 660 octeontx_pko_channel_stop(nic->base_ochan); 661 error: 662 return ret; 663 } 664 665 static int 666 octeontx_dev_stop(struct rte_eth_dev *dev) 667 { 668 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 669 int ret; 670 671 PMD_INIT_FUNC_TRACE(); 672 673 rte_event_dev_stop(nic->evdev); 674 675 ret = octeontx_port_stop(nic); 676 if (ret < 0) { 677 octeontx_log_err("failed to req stop port %d res=%d", 678 nic->port_id, ret); 679 return ret; 680 } 681 682 ret = octeontx_pki_port_stop(nic->port_id); 683 if (ret < 0) { 684 octeontx_log_err("failed to stop pki port %d res=%d", 685 nic->port_id, ret); 686 return ret; 687 } 688 689 ret = octeontx_pko_channel_stop(nic->base_ochan); 690 if (ret < 0) { 691 octeontx_log_err("failed to stop channel %d VF%d %d %d", 692 nic->base_ochan, nic->port_id, nic->num_tx_queues, 693 ret); 694 return ret; 695 } 696 697 return 0; 698 } 699 700 static int 701 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 702 { 703 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 704 705 PMD_INIT_FUNC_TRACE(); 706 return octeontx_port_promisc_set(nic, 1); 707 } 708 709 static int 710 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 711 { 712 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 713 714 PMD_INIT_FUNC_TRACE(); 715 return octeontx_port_promisc_set(nic, 0); 716 } 717 718 static int 719 octeontx_port_link_status(struct octeontx_nic *nic) 720 { 721 int res; 722 723 PMD_INIT_FUNC_TRACE(); 724 res = octeontx_bgx_port_link_status(nic->port_id); 725 if (res < 0) { 726 octeontx_log_err("failed to get port %d link status", 727 nic->port_id); 728 return res; 729 } 730 731 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) { 732 nic->link_up = (uint8_t)res; 733 nic->print_flag = 1; 734 } 735 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 736 737 return res; 738 } 739 740 /* 741 * Return 0 means link status changed, -1 means not changed 742 */ 743 static int 744 octeontx_dev_link_update(struct rte_eth_dev *dev, 745 int wait_to_complete __rte_unused) 746 { 747 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 748 struct rte_eth_link link; 749 int res; 750 751 PMD_INIT_FUNC_TRACE(); 752 753 res = octeontx_port_link_status(nic); 754 if (res < 0) { 755 octeontx_log_err("failed to request link status %d", res); 756 return res; 757 } 758 759 octeontx_link_status_update(nic, &link); 760 if (nic->print_flag) { 761 octeontx_link_status_print(nic->dev, &link); 762 nic->print_flag = 0; 763 } 764 765 return rte_eth_linkstatus_set(dev, &link); 766 } 767 768 static int 769 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 770 { 771 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 772 773 PMD_INIT_FUNC_TRACE(); 774 return octeontx_port_stats(nic, stats); 775 } 776 777 static int 778 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 779 { 780 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 781 782 PMD_INIT_FUNC_TRACE(); 783 return octeontx_port_stats_clr(nic); 784 } 785 786 static void 787 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 788 { 789 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 790 int ret; 791 792 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 793 if (ret != 0) 794 octeontx_log_err("failed to del MAC address filter on port %d", 795 nic->port_id); 796 } 797 798 static int 799 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 800 struct rte_ether_addr *mac_addr, 801 uint32_t index, 802 __rte_unused uint32_t vmdq) 803 { 804 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 805 int ret; 806 807 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 808 index); 809 if (ret < 0) { 810 octeontx_log_err("failed to add MAC address filter on port %d", 811 nic->port_id); 812 return ret; 813 } 814 815 return 0; 816 } 817 818 static int 819 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 820 struct rte_ether_addr *addr) 821 { 822 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 823 int ret; 824 825 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 826 if (ret == 0) { 827 /* Update same mac address to BGX CAM table */ 828 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 829 0); 830 } 831 if (ret < 0) { 832 octeontx_log_err("failed to set MAC address on port %d", 833 nic->port_id); 834 } 835 836 return ret; 837 } 838 839 static int 840 octeontx_dev_info(struct rte_eth_dev *dev, 841 struct rte_eth_dev_info *dev_info) 842 { 843 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 844 845 /* Autonegotiation may be disabled */ 846 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 847 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 848 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 849 ETH_LINK_SPEED_40G; 850 851 /* Min/Max MTU supported */ 852 dev_info->min_rx_bufsize = OCCTX_MIN_FRS; 853 dev_info->max_rx_pktlen = OCCTX_MAX_FRS; 854 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD; 855 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD; 856 857 dev_info->max_mac_addrs = 858 octeontx_bgx_port_mac_entries_get(nic->port_id); 859 dev_info->max_rx_queues = 1; 860 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 861 dev_info->min_rx_bufsize = 0; 862 863 dev_info->default_rxconf = (struct rte_eth_rxconf) { 864 .rx_free_thresh = 0, 865 .rx_drop_en = 0, 866 .offloads = OCTEONTX_RX_OFFLOADS, 867 }; 868 869 dev_info->default_txconf = (struct rte_eth_txconf) { 870 .tx_free_thresh = 0, 871 .offloads = OCTEONTX_TX_OFFLOADS, 872 }; 873 874 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 875 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 876 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 877 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 878 879 return 0; 880 } 881 882 static void 883 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 884 { 885 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 886 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 887 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 888 } 889 890 static int 891 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 892 uint16_t qidx) 893 { 894 struct octeontx_txq *txq; 895 int res; 896 897 PMD_INIT_FUNC_TRACE(); 898 899 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 900 return 0; 901 902 txq = dev->data->tx_queues[qidx]; 903 904 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 905 &txq->dq, 906 sizeof(octeontx_dq_t), 907 txq->queue_id, 908 octeontx_dq_info_getter); 909 if (res < 0) { 910 res = -EFAULT; 911 goto close_port; 912 } 913 914 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 915 return res; 916 917 close_port: 918 (void)octeontx_port_stop(nic); 919 octeontx_pko_channel_stop(nic->base_ochan); 920 octeontx_pko_channel_close(nic->base_ochan); 921 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 922 return res; 923 } 924 925 int 926 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 927 { 928 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 929 930 PMD_INIT_FUNC_TRACE(); 931 qidx = qidx % PKO_VF_NUM_DQ; 932 return octeontx_vf_start_tx_queue(dev, nic, qidx); 933 } 934 935 static inline int 936 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 937 uint16_t qidx) 938 { 939 int ret = 0; 940 941 RTE_SET_USED(nic); 942 PMD_INIT_FUNC_TRACE(); 943 944 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 945 return 0; 946 947 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 948 return ret; 949 } 950 951 int 952 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 953 { 954 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 955 956 PMD_INIT_FUNC_TRACE(); 957 qidx = qidx % PKO_VF_NUM_DQ; 958 959 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 960 } 961 962 static void 963 octeontx_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 964 { 965 int res; 966 967 PMD_INIT_FUNC_TRACE(); 968 969 if (dev->data->tx_queues[qid]) { 970 res = octeontx_dev_tx_queue_stop(dev, qid); 971 if (res < 0) 972 octeontx_log_err("failed stop tx_queue(%d)\n", qid); 973 974 rte_free(dev->data->tx_queues[qid]); 975 } 976 } 977 978 static int 979 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 980 uint16_t nb_desc, unsigned int socket_id, 981 const struct rte_eth_txconf *tx_conf __rte_unused) 982 { 983 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 984 struct octeontx_txq *txq = NULL; 985 uint16_t dq_num; 986 int res = 0; 987 988 RTE_SET_USED(nb_desc); 989 RTE_SET_USED(socket_id); 990 991 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 992 993 /* Socket id check */ 994 if (socket_id != (unsigned int)SOCKET_ID_ANY && 995 socket_id != (unsigned int)nic->node) 996 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 997 socket_id, nic->node); 998 999 /* Free memory prior to re-allocation if needed. */ 1000 if (dev->data->tx_queues[qidx] != NULL) { 1001 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 1002 qidx); 1003 octeontx_dev_tx_queue_release(dev, qidx); 1004 dev->data->tx_queues[qidx] = NULL; 1005 } 1006 1007 /* Allocating tx queue data structure */ 1008 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 1009 RTE_CACHE_LINE_SIZE, nic->node); 1010 if (txq == NULL) { 1011 octeontx_log_err("failed to allocate txq=%d", qidx); 1012 res = -ENOMEM; 1013 goto err; 1014 } 1015 1016 txq->eth_dev = dev; 1017 txq->queue_id = dq_num; 1018 dev->data->tx_queues[qidx] = txq; 1019 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1020 1021 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1022 &txq->dq, 1023 sizeof(octeontx_dq_t), 1024 txq->queue_id, 1025 octeontx_dq_info_getter); 1026 if (res < 0) { 1027 res = -EFAULT; 1028 goto err; 1029 } 1030 1031 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 1032 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 1033 txq->dq.ioreg_va, 1034 txq->dq.fc_status_va); 1035 1036 return res; 1037 1038 err: 1039 if (txq) 1040 rte_free(txq); 1041 1042 return res; 1043 } 1044 1045 static int 1046 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1047 uint16_t nb_desc, unsigned int socket_id, 1048 const struct rte_eth_rxconf *rx_conf, 1049 struct rte_mempool *mb_pool) 1050 { 1051 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1052 struct rte_mempool_ops *mp_ops = NULL; 1053 struct octeontx_rxq *rxq = NULL; 1054 pki_pktbuf_cfg_t pktbuf_conf; 1055 pki_hash_cfg_t pki_hash; 1056 pki_qos_cfg_t pki_qos; 1057 uintptr_t pool; 1058 int ret, port; 1059 uint16_t gaura; 1060 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 1061 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 1062 1063 RTE_SET_USED(nb_desc); 1064 1065 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 1066 memset(&pki_hash, 0, sizeof(pki_hash)); 1067 memset(&pki_qos, 0, sizeof(pki_qos)); 1068 1069 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 1070 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 1071 octeontx_log_err("failed to find octeontx_fpavf mempool"); 1072 return -ENOTSUP; 1073 } 1074 1075 /* Handle forbidden configurations */ 1076 if (nic->pki.classifier_enable) { 1077 octeontx_log_err("cannot setup queue %d. " 1078 "Classifier option unsupported", qidx); 1079 return -EINVAL; 1080 } 1081 1082 port = nic->port_id; 1083 1084 /* Rx deferred start is not supported */ 1085 if (rx_conf->rx_deferred_start) { 1086 octeontx_log_err("rx deferred start not supported"); 1087 return -EINVAL; 1088 } 1089 1090 /* Verify queue index */ 1091 if (qidx >= dev->data->nb_rx_queues) { 1092 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 1093 qidx, (dev->data->nb_rx_queues - 1)); 1094 return -ENOTSUP; 1095 } 1096 1097 /* Socket id check */ 1098 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1099 socket_id != (unsigned int)nic->node) 1100 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 1101 socket_id, nic->node); 1102 1103 /* Allocating rx queue data structure */ 1104 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 1105 RTE_CACHE_LINE_SIZE, nic->node); 1106 if (rxq == NULL) { 1107 octeontx_log_err("failed to allocate rxq=%d", qidx); 1108 return -ENOMEM; 1109 } 1110 1111 if (!nic->pki.initialized) { 1112 pktbuf_conf.port_type = 0; 1113 pki_hash.port_type = 0; 1114 pki_qos.port_type = 0; 1115 1116 pktbuf_conf.mmask.f_wqe_skip = 1; 1117 pktbuf_conf.mmask.f_first_skip = 1; 1118 pktbuf_conf.mmask.f_later_skip = 1; 1119 pktbuf_conf.mmask.f_mbuff_size = 1; 1120 pktbuf_conf.mmask.f_cache_mode = 1; 1121 1122 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 1123 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 1124 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 1125 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 1126 RTE_PKTMBUF_HEADROOM - 1127 rte_pktmbuf_priv_size(mb_pool) - 1128 sizeof(struct rte_mbuf)); 1129 1130 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 1131 1132 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1133 if (ret != 0) { 1134 octeontx_log_err("fail to configure pktbuf for port %d", 1135 port); 1136 rte_free(rxq); 1137 return ret; 1138 } 1139 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1140 "\tmbuf_size:\t0x%0x\n" 1141 "\twqe_skip:\t0x%0x\n" 1142 "\tfirst_skip:\t0x%0x\n" 1143 "\tlater_skip:\t0x%0x\n" 1144 "\tcache_mode:\t%s\n", 1145 port, 1146 pktbuf_conf.mbuff_size, 1147 pktbuf_conf.wqe_skip, 1148 pktbuf_conf.first_skip, 1149 pktbuf_conf.later_skip, 1150 (pktbuf_conf.cache_mode == 1151 PKI_OPC_MODE_STT) ? 1152 "STT" : 1153 (pktbuf_conf.cache_mode == 1154 PKI_OPC_MODE_STF) ? 1155 "STF" : 1156 (pktbuf_conf.cache_mode == 1157 PKI_OPC_MODE_STF1_STT) ? 1158 "STF1_STT" : "STF2_STT"); 1159 1160 if (nic->pki.hash_enable) { 1161 pki_hash.tag_dlc = 1; 1162 pki_hash.tag_slc = 1; 1163 pki_hash.tag_dlf = 1; 1164 pki_hash.tag_slf = 1; 1165 pki_hash.tag_prt = 1; 1166 octeontx_pki_port_hash_config(port, &pki_hash); 1167 } 1168 1169 pool = (uintptr_t)mb_pool->pool_id; 1170 1171 /* Get the gaura Id */ 1172 gaura = octeontx_fpa_bufpool_gaura(pool); 1173 1174 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1175 pki_qos.num_entry = 1; 1176 pki_qos.drop_policy = 0; 1177 pki_qos.tag_type = 0L; 1178 pki_qos.qos_entry[0].port_add = 0; 1179 pki_qos.qos_entry[0].gaura = gaura; 1180 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1181 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1182 pki_qos.qos_entry[0].grptag_bad = 0; 1183 pki_qos.qos_entry[0].grptag_ok = 0; 1184 1185 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1186 if (ret < 0) { 1187 octeontx_log_err("failed to create QOS port=%d, q=%d", 1188 port, qidx); 1189 rte_free(rxq); 1190 return ret; 1191 } 1192 nic->pki.initialized = true; 1193 } 1194 1195 rxq->port_id = nic->port_id; 1196 rxq->eth_dev = dev; 1197 rxq->queue_id = qidx; 1198 rxq->evdev = nic->evdev; 1199 rxq->ev_queues = ev_queues; 1200 rxq->ev_ports = ev_ports; 1201 rxq->pool = mb_pool; 1202 1203 octeontx_recheck_rx_offloads(rxq); 1204 dev->data->rx_queues[qidx] = rxq; 1205 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1206 1207 return 0; 1208 } 1209 1210 static void 1211 octeontx_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 1212 { 1213 rte_free(dev->data->rx_queues[qid]); 1214 } 1215 1216 static const uint32_t * 1217 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1218 { 1219 static const uint32_t ptypes[] = { 1220 RTE_PTYPE_L3_IPV4, 1221 RTE_PTYPE_L3_IPV4_EXT, 1222 RTE_PTYPE_L3_IPV6, 1223 RTE_PTYPE_L3_IPV6_EXT, 1224 RTE_PTYPE_L4_TCP, 1225 RTE_PTYPE_L4_UDP, 1226 RTE_PTYPE_L4_FRAG, 1227 RTE_PTYPE_UNKNOWN 1228 }; 1229 1230 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1231 return ptypes; 1232 1233 return NULL; 1234 } 1235 1236 static int 1237 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1238 { 1239 RTE_SET_USED(dev); 1240 1241 if (!strcmp(pool, "octeontx_fpavf")) 1242 return 0; 1243 1244 return -ENOTSUP; 1245 } 1246 1247 /* Initialize and register driver with DPDK Application */ 1248 static const struct eth_dev_ops octeontx_dev_ops = { 1249 .dev_configure = octeontx_dev_configure, 1250 .dev_infos_get = octeontx_dev_info, 1251 .dev_close = octeontx_dev_close, 1252 .dev_start = octeontx_dev_start, 1253 .dev_stop = octeontx_dev_stop, 1254 .promiscuous_enable = octeontx_dev_promisc_enable, 1255 .promiscuous_disable = octeontx_dev_promisc_disable, 1256 .link_update = octeontx_dev_link_update, 1257 .stats_get = octeontx_dev_stats_get, 1258 .stats_reset = octeontx_dev_stats_reset, 1259 .mac_addr_remove = octeontx_dev_mac_addr_del, 1260 .mac_addr_add = octeontx_dev_mac_addr_add, 1261 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1262 .vlan_offload_set = octeontx_dev_vlan_offload_set, 1263 .vlan_filter_set = octeontx_dev_vlan_filter_set, 1264 .tx_queue_start = octeontx_dev_tx_queue_start, 1265 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1266 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1267 .tx_queue_release = octeontx_dev_tx_queue_release, 1268 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1269 .rx_queue_release = octeontx_dev_rx_queue_release, 1270 .dev_set_link_up = octeontx_dev_set_link_up, 1271 .dev_set_link_down = octeontx_dev_set_link_down, 1272 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1273 .mtu_set = octeontx_dev_mtu_set, 1274 .pool_ops_supported = octeontx_pool_ops, 1275 .flow_ctrl_get = octeontx_dev_flow_ctrl_get, 1276 .flow_ctrl_set = octeontx_dev_flow_ctrl_set, 1277 }; 1278 1279 /* Create Ethdev interface per BGX LMAC ports */ 1280 static int 1281 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1282 int socket_id) 1283 { 1284 int res; 1285 size_t pko_vfid; 1286 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1287 struct octeontx_nic *nic = NULL; 1288 struct rte_eth_dev *eth_dev = NULL; 1289 struct rte_eth_dev_data *data; 1290 const char *name = rte_vdev_device_name(dev); 1291 int max_entries; 1292 1293 PMD_INIT_FUNC_TRACE(); 1294 1295 sprintf(octtx_name, "%s_%d", name, port); 1296 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1297 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1298 if (eth_dev == NULL) 1299 return -ENODEV; 1300 1301 eth_dev->dev_ops = &octeontx_dev_ops; 1302 eth_dev->device = &dev->device; 1303 octeontx_set_tx_function(eth_dev); 1304 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1305 rte_eth_dev_probing_finish(eth_dev); 1306 return 0; 1307 } 1308 1309 /* Reserve an ethdev entry */ 1310 eth_dev = rte_eth_dev_allocate(octtx_name); 1311 if (eth_dev == NULL) { 1312 octeontx_log_err("failed to allocate rte_eth_dev"); 1313 res = -ENOMEM; 1314 goto err; 1315 } 1316 data = eth_dev->data; 1317 1318 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1319 if (nic == NULL) { 1320 octeontx_log_err("failed to allocate nic structure"); 1321 res = -ENOMEM; 1322 goto err; 1323 } 1324 data->dev_private = nic; 1325 pko_vfid = octeontx_pko_get_vfid(); 1326 1327 if (pko_vfid == SIZE_MAX) { 1328 octeontx_log_err("failed to get pko vfid"); 1329 res = -ENODEV; 1330 goto err; 1331 } 1332 1333 nic->pko_vfid = pko_vfid; 1334 nic->port_id = port; 1335 nic->evdev = evdev; 1336 1337 res = octeontx_port_open(nic); 1338 if (res < 0) 1339 goto err; 1340 1341 /* Rx side port configuration */ 1342 res = octeontx_pki_port_open(port); 1343 if (res != 0) { 1344 octeontx_log_err("failed to open PKI port %d", port); 1345 res = -ENODEV; 1346 goto err; 1347 } 1348 1349 eth_dev->device = &dev->device; 1350 eth_dev->intr_handle = NULL; 1351 eth_dev->data->numa_node = dev->device.numa_node; 1352 1353 data->port_id = eth_dev->data->port_id; 1354 1355 nic->ev_queues = 1; 1356 nic->ev_ports = 1; 1357 nic->print_flag = -1; 1358 1359 data->dev_link.link_status = ETH_LINK_DOWN; 1360 data->dev_started = 0; 1361 data->promiscuous = 0; 1362 data->all_multicast = 0; 1363 data->scattered_rx = 0; 1364 1365 /* Get maximum number of supported MAC entries */ 1366 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1367 if (max_entries < 0) { 1368 octeontx_log_err("Failed to get max entries for mac addr"); 1369 res = -ENOTSUP; 1370 goto err; 1371 } 1372 1373 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1374 RTE_ETHER_ADDR_LEN, 0, 1375 socket_id); 1376 if (data->mac_addrs == NULL) { 1377 octeontx_log_err("failed to allocate memory for mac_addrs"); 1378 res = -ENOMEM; 1379 goto err; 1380 } 1381 1382 eth_dev->dev_ops = &octeontx_dev_ops; 1383 1384 /* Finally save ethdev pointer to the NIC structure */ 1385 nic->dev = eth_dev; 1386 1387 if (nic->port_id != data->port_id) { 1388 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1389 data->port_id, nic->port_id); 1390 res = -EINVAL; 1391 goto free_mac_addrs; 1392 } 1393 1394 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 1395 octeontx_link_status_poll, nic); 1396 if (res) { 1397 octeontx_log_err("Failed to start link polling alarm"); 1398 goto err; 1399 } 1400 1401 /* Update port_id mac to eth_dev */ 1402 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1403 1404 /* Update same mac address to BGX CAM table at index 0 */ 1405 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1406 1407 res = octeontx_dev_flow_ctrl_init(eth_dev); 1408 if (res < 0) 1409 goto err; 1410 1411 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1412 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1413 nic->port_id, nic->port_ena, 1414 nic->base_ochan, nic->num_ochans, 1415 nic->num_tx_queues); 1416 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu); 1417 1418 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1419 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1420 1421 rte_eth_dev_probing_finish(eth_dev); 1422 return data->port_id; 1423 1424 free_mac_addrs: 1425 rte_free(data->mac_addrs); 1426 data->mac_addrs = NULL; 1427 err: 1428 if (nic) 1429 octeontx_port_close(nic); 1430 1431 rte_eth_dev_release_port(eth_dev); 1432 1433 return res; 1434 } 1435 1436 /* Un initialize octeontx device */ 1437 static int 1438 octeontx_remove(struct rte_vdev_device *dev) 1439 { 1440 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1441 struct rte_eth_dev *eth_dev = NULL; 1442 struct octeontx_nic *nic = NULL; 1443 int i; 1444 1445 if (dev == NULL) 1446 return -EINVAL; 1447 1448 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1449 sprintf(octtx_name, "eth_octeontx_%d", i); 1450 1451 eth_dev = rte_eth_dev_allocated(octtx_name); 1452 if (eth_dev == NULL) 1453 continue; /* port already released */ 1454 1455 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1456 rte_eth_dev_release_port(eth_dev); 1457 continue; 1458 } 1459 1460 nic = octeontx_pmd_priv(eth_dev); 1461 rte_event_dev_stop(nic->evdev); 1462 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1463 octeontx_dev_close(eth_dev); 1464 rte_eth_dev_release_port(eth_dev); 1465 } 1466 1467 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1468 return 0; 1469 1470 /* Free FC resource */ 1471 octeontx_pko_fc_free(); 1472 1473 return 0; 1474 } 1475 1476 /* Initialize octeontx device */ 1477 static int 1478 octeontx_probe(struct rte_vdev_device *dev) 1479 { 1480 const char *dev_name; 1481 static int probe_once; 1482 uint8_t socket_id, qlist; 1483 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1484 struct rte_event_dev_config dev_conf; 1485 const char *eventdev_name = "event_octeontx"; 1486 struct rte_event_dev_info info; 1487 struct rte_eth_dev *eth_dev; 1488 1489 struct octeontx_vdev_init_params init_params = { 1490 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1491 }; 1492 1493 dev_name = rte_vdev_device_name(dev); 1494 1495 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1496 strlen(rte_vdev_device_args(dev)) == 0) { 1497 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1498 if (!eth_dev) { 1499 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1500 return -1; 1501 } 1502 /* TODO: request info from primary to set up Rx and Tx */ 1503 eth_dev->dev_ops = &octeontx_dev_ops; 1504 eth_dev->device = &dev->device; 1505 rte_eth_dev_probing_finish(eth_dev); 1506 return 0; 1507 } 1508 1509 res = octeontx_parse_vdev_init_params(&init_params, dev); 1510 if (res < 0) 1511 return -EINVAL; 1512 1513 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1514 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1515 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1516 return -ENOTSUP; 1517 } 1518 1519 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1520 1521 socket_id = rte_socket_id(); 1522 1523 tx_vfcnt = octeontx_pko_vf_count(); 1524 1525 if (tx_vfcnt < init_params.nr_port) { 1526 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1527 tx_vfcnt, init_params.nr_port); 1528 return -EINVAL; 1529 } 1530 evdev = rte_event_dev_get_dev_id(eventdev_name); 1531 if (evdev < 0) { 1532 octeontx_log_err("eventdev %s not found", eventdev_name); 1533 return -ENODEV; 1534 } 1535 1536 res = rte_event_dev_info_get(evdev, &info); 1537 if (res < 0) { 1538 octeontx_log_err("failed to eventdev info %d", res); 1539 return -EINVAL; 1540 } 1541 1542 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1543 info.max_event_queues, info.max_event_ports); 1544 1545 if (octeontx_pko_init_fc(tx_vfcnt)) 1546 return -ENOMEM; 1547 1548 devconf_set_default_sane_values(&dev_conf, &info); 1549 res = rte_event_dev_configure(evdev, &dev_conf); 1550 if (res < 0) 1551 goto parse_error; 1552 1553 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1554 (uint32_t *)&pnum); 1555 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1556 (uint32_t *)&qnum); 1557 if (pnum < qnum) { 1558 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1559 pnum, qnum); 1560 res = -EINVAL; 1561 goto parse_error; 1562 } 1563 1564 /* Enable all queues available */ 1565 for (i = 0; i < qnum; i++) { 1566 res = rte_event_queue_setup(evdev, i, NULL); 1567 if (res < 0) { 1568 octeontx_log_err("failed to setup event_q(%d): res %d", 1569 i, res); 1570 goto parse_error; 1571 } 1572 } 1573 1574 /* Enable all ports available */ 1575 for (i = 0; i < pnum; i++) { 1576 res = rte_event_port_setup(evdev, i, NULL); 1577 if (res < 0) { 1578 res = -ENODEV; 1579 octeontx_log_err("failed to setup ev port(%d) res=%d", 1580 i, res); 1581 goto parse_error; 1582 } 1583 } 1584 1585 /* 1586 * Do 1:1 links for ports & queues. All queues would be mapped to 1587 * one port. If there are more ports than queues, then some ports 1588 * won't be linked to any queue. 1589 */ 1590 for (i = 0; i < qnum; i++) { 1591 /* Link one queue to one event port */ 1592 qlist = i; 1593 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1594 if (res < 0) { 1595 res = -ENODEV; 1596 octeontx_log_err("failed to link port (%d): res=%d", 1597 i, res); 1598 goto parse_error; 1599 } 1600 } 1601 1602 /* Create ethdev interface */ 1603 for (i = 0; i < init_params.nr_port; i++) { 1604 port_id = octeontx_create(dev, i, evdev, socket_id); 1605 if (port_id < 0) { 1606 octeontx_log_err("failed to create device %s", 1607 dev_name); 1608 res = -ENODEV; 1609 goto parse_error; 1610 } 1611 1612 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1613 port_id); 1614 } 1615 1616 if (probe_once) { 1617 octeontx_log_err("interface %s not supported", dev_name); 1618 octeontx_remove(dev); 1619 res = -ENOTSUP; 1620 goto parse_error; 1621 } 1622 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1623 probe_once = 1; 1624 1625 return 0; 1626 1627 parse_error: 1628 octeontx_pko_fc_free(); 1629 return res; 1630 } 1631 1632 static struct rte_vdev_driver octeontx_pmd_drv = { 1633 .probe = octeontx_probe, 1634 .remove = octeontx_remove, 1635 }; 1636 1637 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1638 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1639 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1640