1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct octeontx_vdev_init_params { 28 uint8_t nr_port; 29 }; 30 31 uint16_t 32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 33 34 enum octeontx_link_speed { 35 OCTEONTX_LINK_SPEED_SGMII, 36 OCTEONTX_LINK_SPEED_XAUI, 37 OCTEONTX_LINK_SPEED_RXAUI, 38 OCTEONTX_LINK_SPEED_10G_R, 39 OCTEONTX_LINK_SPEED_40G_R, 40 OCTEONTX_LINK_SPEED_RESERVE1, 41 OCTEONTX_LINK_SPEED_QSGMII, 42 OCTEONTX_LINK_SPEED_RESERVE2 43 }; 44 45 int otx_net_logtype_mbox; 46 int otx_net_logtype_init; 47 int otx_net_logtype_driver; 48 49 RTE_INIT(otx_net_init_log); 50 static void 51 otx_net_init_log(void) 52 { 53 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 54 if (otx_net_logtype_mbox >= 0) 55 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 56 57 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 58 if (otx_net_logtype_init >= 0) 59 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 60 61 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 62 if (otx_net_logtype_driver >= 0) 63 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 64 } 65 66 /* Parse integer from integer argument */ 67 static int 68 parse_integer_arg(const char *key __rte_unused, 69 const char *value, void *extra_args) 70 { 71 int *i = (int *)extra_args; 72 73 *i = atoi(value); 74 if (*i < 0) { 75 octeontx_log_err("argument has to be positive."); 76 return -1; 77 } 78 79 return 0; 80 } 81 82 static int 83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 84 struct rte_vdev_device *dev) 85 { 86 struct rte_kvargs *kvlist = NULL; 87 int ret = 0; 88 89 static const char * const octeontx_vdev_valid_params[] = { 90 OCTEONTX_VDEV_NR_PORT_ARG, 91 NULL 92 }; 93 94 const char *input_args = rte_vdev_device_args(dev); 95 if (params == NULL) 96 return -EINVAL; 97 98 99 if (input_args) { 100 kvlist = rte_kvargs_parse(input_args, 101 octeontx_vdev_valid_params); 102 if (kvlist == NULL) 103 return -1; 104 105 ret = rte_kvargs_process(kvlist, 106 OCTEONTX_VDEV_NR_PORT_ARG, 107 &parse_integer_arg, 108 ¶ms->nr_port); 109 if (ret < 0) 110 goto free_kvlist; 111 } 112 113 free_kvlist: 114 rte_kvargs_free(kvlist); 115 return ret; 116 } 117 118 static int 119 octeontx_port_open(struct octeontx_nic *nic) 120 { 121 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 122 int res; 123 124 res = 0; 125 126 PMD_INIT_FUNC_TRACE(); 127 128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 129 if (res < 0) { 130 octeontx_log_err("failed to open port %d", res); 131 return res; 132 } 133 134 nic->node = bgx_port_conf.node; 135 nic->port_ena = bgx_port_conf.enable; 136 nic->base_ichan = bgx_port_conf.base_chan; 137 nic->base_ochan = bgx_port_conf.base_chan; 138 nic->num_ichans = bgx_port_conf.num_chans; 139 nic->num_ochans = bgx_port_conf.num_chans; 140 nic->mtu = bgx_port_conf.mtu; 141 nic->bpen = bgx_port_conf.bpen; 142 nic->fcs_strip = bgx_port_conf.fcs_strip; 143 nic->bcast_mode = bgx_port_conf.bcast_mode; 144 nic->mcast_mode = bgx_port_conf.mcast_mode; 145 nic->speed = bgx_port_conf.mode; 146 147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_port_close(struct octeontx_nic *nic) 155 { 156 PMD_INIT_FUNC_TRACE(); 157 158 octeontx_bgx_port_close(nic->port_id); 159 octeontx_log_dbg("port closed %d", nic->port_id); 160 } 161 162 static int 163 octeontx_port_start(struct octeontx_nic *nic) 164 { 165 PMD_INIT_FUNC_TRACE(); 166 167 return octeontx_bgx_port_start(nic->port_id); 168 } 169 170 static int 171 octeontx_port_stop(struct octeontx_nic *nic) 172 { 173 PMD_INIT_FUNC_TRACE(); 174 175 return octeontx_bgx_port_stop(nic->port_id); 176 } 177 178 static void 179 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 180 { 181 struct rte_eth_dev *dev; 182 int res; 183 184 res = 0; 185 PMD_INIT_FUNC_TRACE(); 186 dev = nic->dev; 187 188 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 189 if (res < 0) 190 octeontx_log_err("failed to set promiscuous mode %d", 191 nic->port_id); 192 193 /* Set proper flag for the mode */ 194 dev->data->promiscuous = (en != 0) ? 1 : 0; 195 196 octeontx_log_dbg("port %d : promiscuous mode %s", 197 nic->port_id, en ? "set" : "unset"); 198 } 199 200 static int 201 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 202 { 203 octeontx_mbox_bgx_port_stats_t bgx_stats; 204 int res; 205 206 PMD_INIT_FUNC_TRACE(); 207 208 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 209 if (res < 0) { 210 octeontx_log_err("failed to get port stats %d", nic->port_id); 211 return res; 212 } 213 214 stats->ipackets = bgx_stats.rx_packets; 215 stats->ibytes = bgx_stats.rx_bytes; 216 stats->imissed = bgx_stats.rx_dropped; 217 stats->ierrors = bgx_stats.rx_errors; 218 stats->opackets = bgx_stats.tx_packets; 219 stats->obytes = bgx_stats.tx_bytes; 220 stats->oerrors = bgx_stats.tx_errors; 221 222 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 223 nic->port_id, stats->ipackets, stats->opackets); 224 225 return 0; 226 } 227 228 static void 229 octeontx_port_stats_clr(struct octeontx_nic *nic) 230 { 231 PMD_INIT_FUNC_TRACE(); 232 233 octeontx_bgx_port_stats_clr(nic->port_id); 234 } 235 236 static inline void 237 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 238 struct rte_event_dev_info *info) 239 { 240 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 241 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 242 243 dev_conf->nb_event_ports = info->max_event_ports; 244 dev_conf->nb_event_queues = info->max_event_queues; 245 246 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 247 dev_conf->nb_event_port_dequeue_depth = 248 info->max_event_port_dequeue_depth; 249 dev_conf->nb_event_port_enqueue_depth = 250 info->max_event_port_enqueue_depth; 251 dev_conf->nb_event_port_enqueue_depth = 252 info->max_event_port_enqueue_depth; 253 dev_conf->nb_events_limit = 254 info->max_num_events; 255 } 256 257 static int 258 octeontx_dev_configure(struct rte_eth_dev *dev) 259 { 260 struct rte_eth_dev_data *data = dev->data; 261 struct rte_eth_conf *conf = &data->dev_conf; 262 struct rte_eth_rxmode *rxmode = &conf->rxmode; 263 struct rte_eth_txmode *txmode = &conf->txmode; 264 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 265 int ret; 266 267 PMD_INIT_FUNC_TRACE(); 268 RTE_SET_USED(conf); 269 270 if (!rte_eal_has_hugepages()) { 271 octeontx_log_err("huge page is not configured"); 272 return -EINVAL; 273 } 274 275 if (txmode->mq_mode) { 276 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 277 return -EINVAL; 278 } 279 280 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 281 rxmode->mq_mode != ETH_MQ_RX_RSS) { 282 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 283 return -EINVAL; 284 } 285 286 if (!rxmode->hw_strip_crc) { 287 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); 288 rxmode->hw_strip_crc = 1; 289 } 290 291 if (rxmode->hw_ip_checksum) { 292 PMD_INIT_LOG(NOTICE, "rxcksum not supported"); 293 rxmode->hw_ip_checksum = 0; 294 } 295 296 if (rxmode->split_hdr_size) { 297 octeontx_log_err("rxmode does not support split header"); 298 return -EINVAL; 299 } 300 301 if (rxmode->hw_vlan_filter) { 302 octeontx_log_err("VLAN filter not supported"); 303 return -EINVAL; 304 } 305 306 if (rxmode->hw_vlan_extend) { 307 octeontx_log_err("VLAN extended not supported"); 308 return -EINVAL; 309 } 310 311 if (rxmode->enable_lro) { 312 octeontx_log_err("LRO not supported"); 313 return -EINVAL; 314 } 315 316 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 317 octeontx_log_err("setting link speed/duplex not supported"); 318 return -EINVAL; 319 } 320 321 if (conf->dcb_capability_en) { 322 octeontx_log_err("DCB enable not supported"); 323 return -EINVAL; 324 } 325 326 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 327 octeontx_log_err("flow director not supported"); 328 return -EINVAL; 329 } 330 331 nic->num_tx_queues = dev->data->nb_tx_queues; 332 333 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ, 334 nic->num_tx_queues, 335 nic->base_ochan); 336 if (ret) { 337 octeontx_log_err("failed to open channel %d no-of-txq %d", 338 nic->base_ochan, nic->num_tx_queues); 339 return -EFAULT; 340 } 341 342 nic->pki.classifier_enable = false; 343 nic->pki.hash_enable = true; 344 nic->pki.initialized = false; 345 346 return 0; 347 } 348 349 static void 350 octeontx_dev_close(struct rte_eth_dev *dev) 351 { 352 struct octeontx_txq *txq = NULL; 353 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 354 unsigned int i; 355 int ret; 356 357 PMD_INIT_FUNC_TRACE(); 358 359 rte_event_dev_close(nic->evdev); 360 361 ret = octeontx_pko_channel_close(nic->base_ochan); 362 if (ret < 0) { 363 octeontx_log_err("failed to close channel %d VF%d %d %d", 364 nic->base_ochan, nic->port_id, nic->num_tx_queues, 365 ret); 366 } 367 /* Free txq resources for this port */ 368 for (i = 0; i < nic->num_tx_queues; i++) { 369 txq = dev->data->tx_queues[i]; 370 if (!txq) 371 continue; 372 373 rte_free(txq); 374 } 375 } 376 377 static int 378 octeontx_dev_start(struct rte_eth_dev *dev) 379 { 380 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 381 int ret; 382 383 ret = 0; 384 385 PMD_INIT_FUNC_TRACE(); 386 /* 387 * Tx start 388 */ 389 dev->tx_pkt_burst = octeontx_xmit_pkts; 390 ret = octeontx_pko_channel_start(nic->base_ochan); 391 if (ret < 0) { 392 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 393 nic->port_id, nic->num_tx_queues, nic->base_ochan, 394 ret); 395 goto error; 396 } 397 398 /* 399 * Rx start 400 */ 401 dev->rx_pkt_burst = octeontx_recv_pkts; 402 ret = octeontx_pki_port_start(nic->port_id); 403 if (ret < 0) { 404 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 405 goto channel_stop_error; 406 } 407 408 /* 409 * Start port 410 */ 411 ret = octeontx_port_start(nic); 412 if (ret < 0) { 413 octeontx_log_err("failed start port %d", ret); 414 goto pki_port_stop_error; 415 } 416 417 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 418 nic->base_ochan, nic->num_tx_queues, nic->port_id); 419 420 ret = rte_event_dev_start(nic->evdev); 421 if (ret < 0) { 422 octeontx_log_err("failed to start evdev: ret (%d)", ret); 423 goto pki_port_stop_error; 424 } 425 426 /* Success */ 427 return ret; 428 429 pki_port_stop_error: 430 octeontx_pki_port_stop(nic->port_id); 431 channel_stop_error: 432 octeontx_pko_channel_stop(nic->base_ochan); 433 error: 434 return ret; 435 } 436 437 static void 438 octeontx_dev_stop(struct rte_eth_dev *dev) 439 { 440 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 441 int ret; 442 443 PMD_INIT_FUNC_TRACE(); 444 445 rte_event_dev_stop(nic->evdev); 446 447 ret = octeontx_port_stop(nic); 448 if (ret < 0) { 449 octeontx_log_err("failed to req stop port %d res=%d", 450 nic->port_id, ret); 451 return; 452 } 453 454 ret = octeontx_pki_port_stop(nic->port_id); 455 if (ret < 0) { 456 octeontx_log_err("failed to stop pki port %d res=%d", 457 nic->port_id, ret); 458 return; 459 } 460 461 ret = octeontx_pko_channel_stop(nic->base_ochan); 462 if (ret < 0) { 463 octeontx_log_err("failed to stop channel %d VF%d %d %d", 464 nic->base_ochan, nic->port_id, nic->num_tx_queues, 465 ret); 466 return; 467 } 468 469 dev->tx_pkt_burst = NULL; 470 dev->rx_pkt_burst = NULL; 471 } 472 473 static void 474 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 475 { 476 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 477 478 PMD_INIT_FUNC_TRACE(); 479 octeontx_port_promisc_set(nic, 1); 480 } 481 482 static void 483 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 484 { 485 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 486 487 PMD_INIT_FUNC_TRACE(); 488 octeontx_port_promisc_set(nic, 0); 489 } 490 491 static inline int 492 octeontx_atomic_write_link_status(struct rte_eth_dev *dev, 493 struct rte_eth_link *link) 494 { 495 struct rte_eth_link *dst = &dev->data->dev_link; 496 struct rte_eth_link *src = link; 497 498 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst, 499 *(uint64_t *)src) == 0) 500 return -1; 501 502 return 0; 503 } 504 505 static int 506 octeontx_port_link_status(struct octeontx_nic *nic) 507 { 508 int res; 509 510 PMD_INIT_FUNC_TRACE(); 511 res = octeontx_bgx_port_link_status(nic->port_id); 512 if (res < 0) { 513 octeontx_log_err("failed to get port %d link status", 514 nic->port_id); 515 return res; 516 } 517 518 nic->link_up = (uint8_t)res; 519 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 520 521 return res; 522 } 523 524 /* 525 * Return 0 means link status changed, -1 means not changed 526 */ 527 static int 528 octeontx_dev_link_update(struct rte_eth_dev *dev, 529 int wait_to_complete __rte_unused) 530 { 531 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 532 struct rte_eth_link link; 533 int res; 534 535 res = 0; 536 PMD_INIT_FUNC_TRACE(); 537 538 res = octeontx_port_link_status(nic); 539 if (res < 0) { 540 octeontx_log_err("failed to request link status %d", res); 541 return res; 542 } 543 544 link.link_status = nic->link_up; 545 546 switch (nic->speed) { 547 case OCTEONTX_LINK_SPEED_SGMII: 548 link.link_speed = ETH_SPEED_NUM_1G; 549 break; 550 551 case OCTEONTX_LINK_SPEED_XAUI: 552 link.link_speed = ETH_SPEED_NUM_10G; 553 break; 554 555 case OCTEONTX_LINK_SPEED_RXAUI: 556 case OCTEONTX_LINK_SPEED_10G_R: 557 link.link_speed = ETH_SPEED_NUM_10G; 558 break; 559 case OCTEONTX_LINK_SPEED_QSGMII: 560 link.link_speed = ETH_SPEED_NUM_5G; 561 break; 562 case OCTEONTX_LINK_SPEED_40G_R: 563 link.link_speed = ETH_SPEED_NUM_40G; 564 break; 565 566 case OCTEONTX_LINK_SPEED_RESERVE1: 567 case OCTEONTX_LINK_SPEED_RESERVE2: 568 default: 569 octeontx_log_err("incorrect link speed %d", nic->speed); 570 break; 571 } 572 573 link.link_duplex = ETH_LINK_FULL_DUPLEX; 574 link.link_autoneg = ETH_LINK_AUTONEG; 575 576 return octeontx_atomic_write_link_status(dev, &link); 577 } 578 579 static int 580 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 581 { 582 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 583 584 PMD_INIT_FUNC_TRACE(); 585 return octeontx_port_stats(nic, stats); 586 } 587 588 static void 589 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 590 { 591 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 592 593 PMD_INIT_FUNC_TRACE(); 594 octeontx_port_stats_clr(nic); 595 } 596 597 static void 598 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 599 struct ether_addr *addr) 600 { 601 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 602 int ret; 603 604 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 605 if (ret != 0) 606 octeontx_log_err("failed to set MAC address on port %d", 607 nic->port_id); 608 } 609 610 static void 611 octeontx_dev_info(struct rte_eth_dev *dev, 612 struct rte_eth_dev_info *dev_info) 613 { 614 RTE_SET_USED(dev); 615 616 /* Autonegotiation may be disabled */ 617 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 618 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 619 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 620 ETH_LINK_SPEED_40G; 621 622 dev_info->driver_name = RTE_STR(rte_octeontx_pmd); 623 dev_info->max_mac_addrs = 1; 624 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 625 dev_info->max_rx_queues = 1; 626 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 627 dev_info->min_rx_bufsize = 0; 628 dev_info->pci_dev = NULL; 629 630 dev_info->default_rxconf = (struct rte_eth_rxconf) { 631 .rx_free_thresh = 0, 632 .rx_drop_en = 0, 633 }; 634 635 dev_info->default_txconf = (struct rte_eth_txconf) { 636 .tx_free_thresh = 0, 637 .txq_flags = 638 ETH_TXQ_FLAGS_NOMULTSEGS | 639 ETH_TXQ_FLAGS_NOOFFLOADS | 640 ETH_TXQ_FLAGS_NOXSUMS, 641 }; 642 643 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE; 644 } 645 646 static void 647 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 648 { 649 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 650 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 651 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 652 } 653 654 static int 655 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 656 uint16_t qidx) 657 { 658 struct octeontx_txq *txq; 659 int res; 660 661 PMD_INIT_FUNC_TRACE(); 662 663 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 664 return 0; 665 666 txq = dev->data->tx_queues[qidx]; 667 668 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 669 &txq->dq, 670 sizeof(octeontx_dq_t), 671 txq->queue_id, 672 octeontx_dq_info_getter); 673 if (res < 0) { 674 res = -EFAULT; 675 goto close_port; 676 } 677 678 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 679 return res; 680 681 close_port: 682 (void)octeontx_port_stop(nic); 683 octeontx_pko_channel_stop(nic->base_ochan); 684 octeontx_pko_channel_close(nic->base_ochan); 685 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 686 return res; 687 } 688 689 static int 690 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 691 { 692 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 693 694 PMD_INIT_FUNC_TRACE(); 695 qidx = qidx % PKO_VF_NUM_DQ; 696 return octeontx_vf_start_tx_queue(dev, nic, qidx); 697 } 698 699 static inline int 700 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 701 uint16_t qidx) 702 { 703 int ret = 0; 704 705 RTE_SET_USED(nic); 706 PMD_INIT_FUNC_TRACE(); 707 708 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 709 return 0; 710 711 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 712 return ret; 713 } 714 715 static int 716 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 717 { 718 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 719 720 PMD_INIT_FUNC_TRACE(); 721 qidx = qidx % PKO_VF_NUM_DQ; 722 723 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 724 } 725 726 static void 727 octeontx_dev_tx_queue_release(void *tx_queue) 728 { 729 struct octeontx_txq *txq = tx_queue; 730 int res; 731 732 PMD_INIT_FUNC_TRACE(); 733 734 if (txq) { 735 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 736 if (res < 0) 737 octeontx_log_err("failed stop tx_queue(%d)\n", 738 txq->queue_id); 739 740 rte_free(txq); 741 } 742 } 743 744 static int 745 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 746 uint16_t nb_desc, unsigned int socket_id, 747 const struct rte_eth_txconf *tx_conf) 748 { 749 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 750 struct octeontx_txq *txq = NULL; 751 uint16_t dq_num; 752 int res = 0; 753 754 RTE_SET_USED(nb_desc); 755 RTE_SET_USED(socket_id); 756 RTE_SET_USED(tx_conf); 757 758 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; 759 760 /* Socket id check */ 761 if (socket_id != (unsigned int)SOCKET_ID_ANY && 762 socket_id != (unsigned int)nic->node) 763 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 764 socket_id, nic->node); 765 766 /* Free memory prior to re-allocation if needed. */ 767 if (dev->data->tx_queues[qidx] != NULL) { 768 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 769 qidx); 770 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 771 dev->data->tx_queues[qidx] = NULL; 772 } 773 774 /* Allocating tx queue data structure */ 775 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 776 RTE_CACHE_LINE_SIZE, nic->node); 777 if (txq == NULL) { 778 octeontx_log_err("failed to allocate txq=%d", qidx); 779 res = -ENOMEM; 780 goto err; 781 } 782 783 txq->eth_dev = dev; 784 txq->queue_id = dq_num; 785 dev->data->tx_queues[qidx] = txq; 786 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 787 788 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 789 &txq->dq, 790 sizeof(octeontx_dq_t), 791 txq->queue_id, 792 octeontx_dq_info_getter); 793 if (res < 0) { 794 res = -EFAULT; 795 goto err; 796 } 797 798 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 799 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 800 txq->dq.ioreg_va, 801 txq->dq.fc_status_va); 802 803 return res; 804 805 err: 806 if (txq) 807 rte_free(txq); 808 809 return res; 810 } 811 812 static int 813 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 814 uint16_t nb_desc, unsigned int socket_id, 815 const struct rte_eth_rxconf *rx_conf, 816 struct rte_mempool *mb_pool) 817 { 818 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 819 struct rte_mempool_ops *mp_ops = NULL; 820 struct octeontx_rxq *rxq = NULL; 821 pki_pktbuf_cfg_t pktbuf_conf; 822 pki_hash_cfg_t pki_hash; 823 pki_qos_cfg_t pki_qos; 824 uintptr_t pool; 825 int ret, port; 826 uint8_t gaura; 827 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 828 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 829 830 RTE_SET_USED(nb_desc); 831 832 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 833 memset(&pki_hash, 0, sizeof(pki_hash)); 834 memset(&pki_qos, 0, sizeof(pki_qos)); 835 836 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 837 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 838 octeontx_log_err("failed to find octeontx_fpavf mempool"); 839 return -ENOTSUP; 840 } 841 842 /* Handle forbidden configurations */ 843 if (nic->pki.classifier_enable) { 844 octeontx_log_err("cannot setup queue %d. " 845 "Classifier option unsupported", qidx); 846 return -EINVAL; 847 } 848 849 port = nic->port_id; 850 851 /* Rx deferred start is not supported */ 852 if (rx_conf->rx_deferred_start) { 853 octeontx_log_err("rx deferred start not supported"); 854 return -EINVAL; 855 } 856 857 /* Verify queue index */ 858 if (qidx >= dev->data->nb_rx_queues) { 859 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 860 qidx, (dev->data->nb_rx_queues - 1)); 861 return -ENOTSUP; 862 } 863 864 /* Socket id check */ 865 if (socket_id != (unsigned int)SOCKET_ID_ANY && 866 socket_id != (unsigned int)nic->node) 867 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 868 socket_id, nic->node); 869 870 /* Allocating rx queue data structure */ 871 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 872 RTE_CACHE_LINE_SIZE, nic->node); 873 if (rxq == NULL) { 874 octeontx_log_err("failed to allocate rxq=%d", qidx); 875 return -ENOMEM; 876 } 877 878 if (!nic->pki.initialized) { 879 pktbuf_conf.port_type = 0; 880 pki_hash.port_type = 0; 881 pki_qos.port_type = 0; 882 883 pktbuf_conf.mmask.f_wqe_skip = 1; 884 pktbuf_conf.mmask.f_first_skip = 1; 885 pktbuf_conf.mmask.f_later_skip = 1; 886 pktbuf_conf.mmask.f_mbuff_size = 1; 887 pktbuf_conf.mmask.f_cache_mode = 1; 888 889 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 890 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP; 891 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 892 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 893 RTE_PKTMBUF_HEADROOM - 894 sizeof(struct rte_mbuf)); 895 896 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 897 898 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 899 if (ret != 0) { 900 octeontx_log_err("fail to configure pktbuf for port %d", 901 port); 902 rte_free(rxq); 903 return ret; 904 } 905 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 906 "\tmbuf_size:\t0x%0x\n" 907 "\twqe_skip:\t0x%0x\n" 908 "\tfirst_skip:\t0x%0x\n" 909 "\tlater_skip:\t0x%0x\n" 910 "\tcache_mode:\t%s\n", 911 port, 912 pktbuf_conf.mbuff_size, 913 pktbuf_conf.wqe_skip, 914 pktbuf_conf.first_skip, 915 pktbuf_conf.later_skip, 916 (pktbuf_conf.cache_mode == 917 PKI_OPC_MODE_STT) ? 918 "STT" : 919 (pktbuf_conf.cache_mode == 920 PKI_OPC_MODE_STF) ? 921 "STF" : 922 (pktbuf_conf.cache_mode == 923 PKI_OPC_MODE_STF1_STT) ? 924 "STF1_STT" : "STF2_STT"); 925 926 if (nic->pki.hash_enable) { 927 pki_hash.tag_dlc = 1; 928 pki_hash.tag_slc = 1; 929 pki_hash.tag_dlf = 1; 930 pki_hash.tag_slf = 1; 931 pki_hash.tag_prt = 1; 932 octeontx_pki_port_hash_config(port, &pki_hash); 933 } 934 935 pool = (uintptr_t)mb_pool->pool_id; 936 937 /* Get the gpool Id */ 938 gaura = octeontx_fpa_bufpool_gpool(pool); 939 940 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 941 pki_qos.num_entry = 1; 942 pki_qos.drop_policy = 0; 943 pki_qos.tag_type = 0L; 944 pki_qos.qos_entry[0].port_add = 0; 945 pki_qos.qos_entry[0].gaura = gaura; 946 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 947 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 948 pki_qos.qos_entry[0].grptag_bad = 0; 949 pki_qos.qos_entry[0].grptag_ok = 0; 950 951 ret = octeontx_pki_port_create_qos(port, &pki_qos); 952 if (ret < 0) { 953 octeontx_log_err("failed to create QOS port=%d, q=%d", 954 port, qidx); 955 rte_free(rxq); 956 return ret; 957 } 958 nic->pki.initialized = true; 959 } 960 961 rxq->port_id = nic->port_id; 962 rxq->eth_dev = dev; 963 rxq->queue_id = qidx; 964 rxq->evdev = nic->evdev; 965 rxq->ev_queues = ev_queues; 966 rxq->ev_ports = ev_ports; 967 968 dev->data->rx_queues[qidx] = rxq; 969 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 970 return 0; 971 } 972 973 static void 974 octeontx_dev_rx_queue_release(void *rxq) 975 { 976 rte_free(rxq); 977 } 978 979 static const uint32_t * 980 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 981 { 982 static const uint32_t ptypes[] = { 983 RTE_PTYPE_L3_IPV4, 984 RTE_PTYPE_L3_IPV4_EXT, 985 RTE_PTYPE_L3_IPV6, 986 RTE_PTYPE_L3_IPV6_EXT, 987 RTE_PTYPE_L4_TCP, 988 RTE_PTYPE_L4_UDP, 989 RTE_PTYPE_L4_FRAG, 990 RTE_PTYPE_UNKNOWN 991 }; 992 993 if (dev->rx_pkt_burst == octeontx_recv_pkts) 994 return ptypes; 995 996 return NULL; 997 } 998 999 static int 1000 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1001 { 1002 RTE_SET_USED(dev); 1003 1004 if (!strcmp(pool, "octeontx_fpavf")) 1005 return 0; 1006 1007 return -ENOTSUP; 1008 } 1009 1010 /* Initialize and register driver with DPDK Application */ 1011 static const struct eth_dev_ops octeontx_dev_ops = { 1012 .dev_configure = octeontx_dev_configure, 1013 .dev_infos_get = octeontx_dev_info, 1014 .dev_close = octeontx_dev_close, 1015 .dev_start = octeontx_dev_start, 1016 .dev_stop = octeontx_dev_stop, 1017 .promiscuous_enable = octeontx_dev_promisc_enable, 1018 .promiscuous_disable = octeontx_dev_promisc_disable, 1019 .link_update = octeontx_dev_link_update, 1020 .stats_get = octeontx_dev_stats_get, 1021 .stats_reset = octeontx_dev_stats_reset, 1022 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1023 .tx_queue_start = octeontx_dev_tx_queue_start, 1024 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1025 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1026 .tx_queue_release = octeontx_dev_tx_queue_release, 1027 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1028 .rx_queue_release = octeontx_dev_rx_queue_release, 1029 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1030 .pool_ops_supported = octeontx_pool_ops, 1031 }; 1032 1033 /* Create Ethdev interface per BGX LMAC ports */ 1034 static int 1035 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1036 int socket_id) 1037 { 1038 int res; 1039 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1040 struct octeontx_nic *nic = NULL; 1041 struct rte_eth_dev *eth_dev = NULL; 1042 struct rte_eth_dev_data *data = NULL; 1043 const char *name = rte_vdev_device_name(dev); 1044 1045 PMD_INIT_FUNC_TRACE(); 1046 1047 sprintf(octtx_name, "%s_%d", name, port); 1048 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1049 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1050 if (eth_dev == NULL) 1051 return -ENODEV; 1052 1053 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1054 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1055 return 0; 1056 } 1057 1058 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id); 1059 if (data == NULL) { 1060 octeontx_log_err("failed to allocate devdata"); 1061 res = -ENOMEM; 1062 goto err; 1063 } 1064 1065 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1066 if (nic == NULL) { 1067 octeontx_log_err("failed to allocate nic structure"); 1068 res = -ENOMEM; 1069 goto err; 1070 } 1071 1072 nic->port_id = port; 1073 nic->evdev = evdev; 1074 1075 res = octeontx_port_open(nic); 1076 if (res < 0) 1077 goto err; 1078 1079 /* Rx side port configuration */ 1080 res = octeontx_pki_port_open(port); 1081 if (res != 0) { 1082 octeontx_log_err("failed to open PKI port %d", port); 1083 res = -ENODEV; 1084 goto err; 1085 } 1086 1087 /* Reserve an ethdev entry */ 1088 eth_dev = rte_eth_dev_allocate(octtx_name); 1089 if (eth_dev == NULL) { 1090 octeontx_log_err("failed to allocate rte_eth_dev"); 1091 res = -ENOMEM; 1092 goto err; 1093 } 1094 1095 eth_dev->device = &dev->device; 1096 eth_dev->intr_handle = NULL; 1097 eth_dev->data->kdrv = RTE_KDRV_NONE; 1098 eth_dev->data->numa_node = dev->device.numa_node; 1099 1100 rte_memcpy(data, (eth_dev)->data, sizeof(*data)); 1101 data->dev_private = nic; 1102 1103 data->port_id = eth_dev->data->port_id; 1104 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name); 1105 1106 nic->ev_queues = 1; 1107 nic->ev_ports = 1; 1108 1109 data->dev_link.link_status = ETH_LINK_DOWN; 1110 data->dev_started = 0; 1111 data->promiscuous = 0; 1112 data->all_multicast = 0; 1113 data->scattered_rx = 0; 1114 1115 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0, 1116 socket_id); 1117 if (data->mac_addrs == NULL) { 1118 octeontx_log_err("failed to allocate memory for mac_addrs"); 1119 res = -ENOMEM; 1120 goto err; 1121 } 1122 1123 eth_dev->data = data; 1124 eth_dev->dev_ops = &octeontx_dev_ops; 1125 1126 /* Finally save ethdev pointer to the NIC structure */ 1127 nic->dev = eth_dev; 1128 1129 if (nic->port_id != data->port_id) { 1130 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1131 data->port_id, nic->port_id); 1132 res = -EINVAL; 1133 goto err; 1134 } 1135 1136 /* Update port_id mac to eth_dev */ 1137 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN); 1138 1139 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1140 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1141 nic->port_id, nic->port_ena, 1142 nic->base_ochan, nic->num_ochans, 1143 nic->num_tx_queues); 1144 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1145 1146 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1147 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1148 1149 return data->port_id; 1150 1151 err: 1152 if (port) 1153 octeontx_port_close(nic); 1154 1155 if (eth_dev != NULL) { 1156 rte_free(eth_dev->data->mac_addrs); 1157 rte_free(data); 1158 rte_free(nic); 1159 rte_eth_dev_release_port(eth_dev); 1160 } 1161 1162 return res; 1163 } 1164 1165 /* Un initialize octeontx device */ 1166 static int 1167 octeontx_remove(struct rte_vdev_device *dev) 1168 { 1169 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1170 struct rte_eth_dev *eth_dev = NULL; 1171 struct octeontx_nic *nic = NULL; 1172 int i; 1173 1174 if (dev == NULL) 1175 return -EINVAL; 1176 1177 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1178 sprintf(octtx_name, "eth_octeontx_%d", i); 1179 1180 /* reserve an ethdev entry */ 1181 eth_dev = rte_eth_dev_allocated(octtx_name); 1182 if (eth_dev == NULL) 1183 return -ENODEV; 1184 1185 nic = octeontx_pmd_priv(eth_dev); 1186 rte_event_dev_stop(nic->evdev); 1187 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1188 1189 rte_free(eth_dev->data->mac_addrs); 1190 rte_free(eth_dev->data->dev_private); 1191 rte_free(eth_dev->data); 1192 rte_eth_dev_release_port(eth_dev); 1193 rte_event_dev_close(nic->evdev); 1194 } 1195 1196 /* Free FC resource */ 1197 octeontx_pko_fc_free(); 1198 1199 return 0; 1200 } 1201 1202 /* Initialize octeontx device */ 1203 static int 1204 octeontx_probe(struct rte_vdev_device *dev) 1205 { 1206 const char *dev_name; 1207 static int probe_once; 1208 uint8_t socket_id, qlist; 1209 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1210 struct rte_event_dev_config dev_conf; 1211 const char *eventdev_name = "event_octeontx"; 1212 struct rte_event_dev_info info; 1213 1214 struct octeontx_vdev_init_params init_params = { 1215 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1216 }; 1217 1218 dev_name = rte_vdev_device_name(dev); 1219 res = octeontx_parse_vdev_init_params(&init_params, dev); 1220 if (res < 0) 1221 return -EINVAL; 1222 1223 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1224 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1225 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1226 return -ENOTSUP; 1227 } 1228 1229 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1230 1231 socket_id = rte_socket_id(); 1232 1233 tx_vfcnt = octeontx_pko_vf_count(); 1234 1235 if (tx_vfcnt < init_params.nr_port) { 1236 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1237 tx_vfcnt, init_params.nr_port); 1238 return -EINVAL; 1239 } 1240 evdev = rte_event_dev_get_dev_id(eventdev_name); 1241 if (evdev < 0) { 1242 octeontx_log_err("eventdev %s not found", eventdev_name); 1243 return -ENODEV; 1244 } 1245 1246 res = rte_event_dev_info_get(evdev, &info); 1247 if (res < 0) { 1248 octeontx_log_err("failed to eventdev info %d", res); 1249 return -EINVAL; 1250 } 1251 1252 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1253 info.max_event_queues, info.max_event_ports); 1254 1255 if (octeontx_pko_init_fc(tx_vfcnt)) 1256 return -ENOMEM; 1257 1258 devconf_set_default_sane_values(&dev_conf, &info); 1259 res = rte_event_dev_configure(evdev, &dev_conf); 1260 if (res < 0) 1261 goto parse_error; 1262 1263 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1264 (uint32_t *)&pnum); 1265 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1266 (uint32_t *)&qnum); 1267 if (pnum < qnum) { 1268 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1269 pnum, qnum); 1270 res = -EINVAL; 1271 goto parse_error; 1272 } 1273 if (pnum > qnum) { 1274 /* 1275 * We don't poll on event ports 1276 * that do not have any queues assigned. 1277 */ 1278 pnum = qnum; 1279 PMD_INIT_LOG(INFO, 1280 "reducing number of active event ports to %d", pnum); 1281 } 1282 for (i = 0; i < qnum; i++) { 1283 res = rte_event_queue_setup(evdev, i, NULL); 1284 if (res < 0) { 1285 octeontx_log_err("failed to setup event_q(%d): res %d", 1286 i, res); 1287 goto parse_error; 1288 } 1289 } 1290 1291 for (i = 0; i < pnum; i++) { 1292 res = rte_event_port_setup(evdev, i, NULL); 1293 if (res < 0) { 1294 res = -ENODEV; 1295 octeontx_log_err("failed to setup ev port(%d) res=%d", 1296 i, res); 1297 goto parse_error; 1298 } 1299 /* Link one queue to one event port */ 1300 qlist = i; 1301 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1302 if (res < 0) { 1303 res = -ENODEV; 1304 octeontx_log_err("failed to link port (%d): res=%d", 1305 i, res); 1306 goto parse_error; 1307 } 1308 } 1309 1310 /* Create ethdev interface */ 1311 for (i = 0; i < init_params.nr_port; i++) { 1312 port_id = octeontx_create(dev, i, evdev, socket_id); 1313 if (port_id < 0) { 1314 octeontx_log_err("failed to create device %s", 1315 dev_name); 1316 res = -ENODEV; 1317 goto parse_error; 1318 } 1319 1320 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1321 port_id); 1322 } 1323 1324 if (probe_once) { 1325 octeontx_log_err("interface %s not supported", dev_name); 1326 octeontx_remove(dev); 1327 res = -ENOTSUP; 1328 goto parse_error; 1329 } 1330 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1331 probe_once = 1; 1332 1333 return 0; 1334 1335 parse_error: 1336 octeontx_pko_fc_free(); 1337 return res; 1338 } 1339 1340 static struct rte_vdev_driver octeontx_pmd_drv = { 1341 .probe = octeontx_probe, 1342 .remove = octeontx_remove, 1343 }; 1344 1345 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1346 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1347 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1348