1 /* 2 * BSD LICENSE 3 * 4 * Copyright (C) Cavium Inc. 2017. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * * Neither the name of Cavium networks nor the names of its 17 * contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 #include <stdio.h> 33 #include <stdarg.h> 34 #include <stdbool.h> 35 #include <stdint.h> 36 #include <string.h> 37 #include <unistd.h> 38 39 #include <rte_alarm.h> 40 #include <rte_branch_prediction.h> 41 #include <rte_debug.h> 42 #include <rte_devargs.h> 43 #include <rte_dev.h> 44 #include <rte_kvargs.h> 45 #include <rte_malloc.h> 46 #include <rte_prefetch.h> 47 #include <rte_bus_vdev.h> 48 49 #include "octeontx_ethdev.h" 50 #include "octeontx_rxtx.h" 51 #include "octeontx_logs.h" 52 53 struct octeontx_vdev_init_params { 54 uint8_t nr_port; 55 }; 56 57 enum octeontx_link_speed { 58 OCTEONTX_LINK_SPEED_SGMII, 59 OCTEONTX_LINK_SPEED_XAUI, 60 OCTEONTX_LINK_SPEED_RXAUI, 61 OCTEONTX_LINK_SPEED_10G_R, 62 OCTEONTX_LINK_SPEED_40G_R, 63 OCTEONTX_LINK_SPEED_RESERVE1, 64 OCTEONTX_LINK_SPEED_QSGMII, 65 OCTEONTX_LINK_SPEED_RESERVE2 66 }; 67 68 /* Parse integer from integer argument */ 69 static int 70 parse_integer_arg(const char *key __rte_unused, 71 const char *value, void *extra_args) 72 { 73 int *i = (int *)extra_args; 74 75 *i = atoi(value); 76 if (*i < 0) { 77 octeontx_log_err("argument has to be positive."); 78 return -1; 79 } 80 81 return 0; 82 } 83 84 static int 85 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 86 struct rte_vdev_device *dev) 87 { 88 struct rte_kvargs *kvlist = NULL; 89 int ret = 0; 90 91 static const char * const octeontx_vdev_valid_params[] = { 92 OCTEONTX_VDEV_NR_PORT_ARG, 93 NULL 94 }; 95 96 const char *input_args = rte_vdev_device_args(dev); 97 if (params == NULL) 98 return -EINVAL; 99 100 101 if (input_args) { 102 kvlist = rte_kvargs_parse(input_args, 103 octeontx_vdev_valid_params); 104 if (kvlist == NULL) 105 return -1; 106 107 ret = rte_kvargs_process(kvlist, 108 OCTEONTX_VDEV_NR_PORT_ARG, 109 &parse_integer_arg, 110 ¶ms->nr_port); 111 if (ret < 0) 112 goto free_kvlist; 113 } 114 115 free_kvlist: 116 rte_kvargs_free(kvlist); 117 return ret; 118 } 119 120 static int 121 octeontx_port_open(struct octeontx_nic *nic) 122 { 123 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 124 int res; 125 126 res = 0; 127 128 PMD_INIT_FUNC_TRACE(); 129 130 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 131 if (res < 0) { 132 octeontx_log_err("failed to open port %d", res); 133 return res; 134 } 135 136 nic->node = bgx_port_conf.node; 137 nic->port_ena = bgx_port_conf.enable; 138 nic->base_ichan = bgx_port_conf.base_chan; 139 nic->base_ochan = bgx_port_conf.base_chan; 140 nic->num_ichans = bgx_port_conf.num_chans; 141 nic->num_ochans = bgx_port_conf.num_chans; 142 nic->mtu = bgx_port_conf.mtu; 143 nic->bpen = bgx_port_conf.bpen; 144 nic->fcs_strip = bgx_port_conf.fcs_strip; 145 nic->bcast_mode = bgx_port_conf.bcast_mode; 146 nic->mcast_mode = bgx_port_conf.mcast_mode; 147 nic->speed = bgx_port_conf.mode; 148 149 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN); 150 151 octeontx_log_dbg("port opened %d", nic->port_id); 152 return res; 153 } 154 155 static void 156 octeontx_port_close(struct octeontx_nic *nic) 157 { 158 PMD_INIT_FUNC_TRACE(); 159 160 octeontx_bgx_port_close(nic->port_id); 161 octeontx_log_dbg("port closed %d", nic->port_id); 162 } 163 164 static int 165 octeontx_port_start(struct octeontx_nic *nic) 166 { 167 PMD_INIT_FUNC_TRACE(); 168 169 return octeontx_bgx_port_start(nic->port_id); 170 } 171 172 static int 173 octeontx_port_stop(struct octeontx_nic *nic) 174 { 175 PMD_INIT_FUNC_TRACE(); 176 177 return octeontx_bgx_port_stop(nic->port_id); 178 } 179 180 static void 181 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 182 { 183 struct rte_eth_dev *dev; 184 int res; 185 186 res = 0; 187 PMD_INIT_FUNC_TRACE(); 188 dev = nic->dev; 189 190 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 191 if (res < 0) 192 octeontx_log_err("failed to set promiscuous mode %d", 193 nic->port_id); 194 195 /* Set proper flag for the mode */ 196 dev->data->promiscuous = (en != 0) ? 1 : 0; 197 198 octeontx_log_dbg("port %d : promiscuous mode %s", 199 nic->port_id, en ? "set" : "unset"); 200 } 201 202 static int 203 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 204 { 205 octeontx_mbox_bgx_port_stats_t bgx_stats; 206 int res; 207 208 PMD_INIT_FUNC_TRACE(); 209 210 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 211 if (res < 0) { 212 octeontx_log_err("failed to get port stats %d", nic->port_id); 213 return res; 214 } 215 216 stats->ipackets = bgx_stats.rx_packets; 217 stats->ibytes = bgx_stats.rx_bytes; 218 stats->imissed = bgx_stats.rx_dropped; 219 stats->ierrors = bgx_stats.rx_errors; 220 stats->opackets = bgx_stats.tx_packets; 221 stats->obytes = bgx_stats.tx_bytes; 222 stats->oerrors = bgx_stats.tx_errors; 223 224 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 225 nic->port_id, stats->ipackets, stats->opackets); 226 227 return 0; 228 } 229 230 static void 231 octeontx_port_stats_clr(struct octeontx_nic *nic) 232 { 233 PMD_INIT_FUNC_TRACE(); 234 235 octeontx_bgx_port_stats_clr(nic->port_id); 236 } 237 238 static inline void 239 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 240 struct rte_event_dev_info *info) 241 { 242 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 243 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 244 245 dev_conf->nb_event_ports = info->max_event_ports; 246 dev_conf->nb_event_queues = info->max_event_queues; 247 248 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 249 dev_conf->nb_event_port_dequeue_depth = 250 info->max_event_port_dequeue_depth; 251 dev_conf->nb_event_port_enqueue_depth = 252 info->max_event_port_enqueue_depth; 253 dev_conf->nb_event_port_enqueue_depth = 254 info->max_event_port_enqueue_depth; 255 dev_conf->nb_events_limit = 256 info->max_num_events; 257 } 258 259 static int 260 octeontx_dev_configure(struct rte_eth_dev *dev) 261 { 262 struct rte_eth_dev_data *data = dev->data; 263 struct rte_eth_conf *conf = &data->dev_conf; 264 struct rte_eth_rxmode *rxmode = &conf->rxmode; 265 struct rte_eth_txmode *txmode = &conf->txmode; 266 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 267 int ret; 268 269 PMD_INIT_FUNC_TRACE(); 270 RTE_SET_USED(conf); 271 272 if (!rte_eal_has_hugepages()) { 273 octeontx_log_err("huge page is not configured"); 274 return -EINVAL; 275 } 276 277 if (txmode->mq_mode) { 278 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 279 return -EINVAL; 280 } 281 282 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 283 rxmode->mq_mode != ETH_MQ_RX_RSS) { 284 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 285 return -EINVAL; 286 } 287 288 if (!rxmode->hw_strip_crc) { 289 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); 290 rxmode->hw_strip_crc = 1; 291 } 292 293 if (rxmode->hw_ip_checksum) { 294 PMD_INIT_LOG(NOTICE, "rxcksum not supported"); 295 rxmode->hw_ip_checksum = 0; 296 } 297 298 if (rxmode->split_hdr_size) { 299 octeontx_log_err("rxmode does not support split header"); 300 return -EINVAL; 301 } 302 303 if (rxmode->hw_vlan_filter) { 304 octeontx_log_err("VLAN filter not supported"); 305 return -EINVAL; 306 } 307 308 if (rxmode->hw_vlan_extend) { 309 octeontx_log_err("VLAN extended not supported"); 310 return -EINVAL; 311 } 312 313 if (rxmode->enable_lro) { 314 octeontx_log_err("LRO not supported"); 315 return -EINVAL; 316 } 317 318 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 319 octeontx_log_err("setting link speed/duplex not supported"); 320 return -EINVAL; 321 } 322 323 if (conf->dcb_capability_en) { 324 octeontx_log_err("DCB enable not supported"); 325 return -EINVAL; 326 } 327 328 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 329 octeontx_log_err("flow director not supported"); 330 return -EINVAL; 331 } 332 333 nic->num_tx_queues = dev->data->nb_tx_queues; 334 335 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ, 336 nic->num_tx_queues, 337 nic->base_ochan); 338 if (ret) { 339 octeontx_log_err("failed to open channel %d no-of-txq %d", 340 nic->base_ochan, nic->num_tx_queues); 341 return -EFAULT; 342 } 343 344 nic->pki.classifier_enable = false; 345 nic->pki.hash_enable = true; 346 nic->pki.initialized = false; 347 348 return 0; 349 } 350 351 static void 352 octeontx_dev_close(struct rte_eth_dev *dev) 353 { 354 struct octeontx_txq *txq = NULL; 355 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 356 unsigned int i; 357 int ret; 358 359 PMD_INIT_FUNC_TRACE(); 360 361 rte_event_dev_close(nic->evdev); 362 363 ret = octeontx_pko_channel_close(nic->base_ochan); 364 if (ret < 0) { 365 octeontx_log_err("failed to close channel %d VF%d %d %d", 366 nic->base_ochan, nic->port_id, nic->num_tx_queues, 367 ret); 368 } 369 /* Free txq resources for this port */ 370 for (i = 0; i < nic->num_tx_queues; i++) { 371 txq = dev->data->tx_queues[i]; 372 if (!txq) 373 continue; 374 375 rte_free(txq); 376 } 377 } 378 379 static int 380 octeontx_dev_start(struct rte_eth_dev *dev) 381 { 382 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 383 int ret; 384 385 ret = 0; 386 387 PMD_INIT_FUNC_TRACE(); 388 /* 389 * Tx start 390 */ 391 dev->tx_pkt_burst = octeontx_xmit_pkts; 392 ret = octeontx_pko_channel_start(nic->base_ochan); 393 if (ret < 0) { 394 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 395 nic->port_id, nic->num_tx_queues, nic->base_ochan, 396 ret); 397 goto error; 398 } 399 400 /* 401 * Rx start 402 */ 403 dev->rx_pkt_burst = octeontx_recv_pkts; 404 ret = octeontx_pki_port_start(nic->port_id); 405 if (ret < 0) { 406 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 407 goto channel_stop_error; 408 } 409 410 /* 411 * Start port 412 */ 413 ret = octeontx_port_start(nic); 414 if (ret < 0) { 415 octeontx_log_err("failed start port %d", ret); 416 goto pki_port_stop_error; 417 } 418 419 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 420 nic->base_ochan, nic->num_tx_queues, nic->port_id); 421 422 ret = rte_event_dev_start(nic->evdev); 423 if (ret < 0) { 424 octeontx_log_err("failed to start evdev: ret (%d)", ret); 425 goto pki_port_stop_error; 426 } 427 428 /* Success */ 429 return ret; 430 431 pki_port_stop_error: 432 octeontx_pki_port_stop(nic->port_id); 433 channel_stop_error: 434 octeontx_pko_channel_stop(nic->base_ochan); 435 error: 436 return ret; 437 } 438 439 static void 440 octeontx_dev_stop(struct rte_eth_dev *dev) 441 { 442 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 443 int ret; 444 445 PMD_INIT_FUNC_TRACE(); 446 447 rte_event_dev_stop(nic->evdev); 448 449 ret = octeontx_port_stop(nic); 450 if (ret < 0) { 451 octeontx_log_err("failed to req stop port %d res=%d", 452 nic->port_id, ret); 453 return; 454 } 455 456 ret = octeontx_pki_port_stop(nic->port_id); 457 if (ret < 0) { 458 octeontx_log_err("failed to stop pki port %d res=%d", 459 nic->port_id, ret); 460 return; 461 } 462 463 ret = octeontx_pko_channel_stop(nic->base_ochan); 464 if (ret < 0) { 465 octeontx_log_err("failed to stop channel %d VF%d %d %d", 466 nic->base_ochan, nic->port_id, nic->num_tx_queues, 467 ret); 468 return; 469 } 470 471 dev->tx_pkt_burst = NULL; 472 dev->rx_pkt_burst = NULL; 473 } 474 475 static void 476 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 477 { 478 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 479 480 PMD_INIT_FUNC_TRACE(); 481 octeontx_port_promisc_set(nic, 1); 482 } 483 484 static void 485 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 486 { 487 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 488 489 PMD_INIT_FUNC_TRACE(); 490 octeontx_port_promisc_set(nic, 0); 491 } 492 493 static inline int 494 octeontx_atomic_write_link_status(struct rte_eth_dev *dev, 495 struct rte_eth_link *link) 496 { 497 struct rte_eth_link *dst = &dev->data->dev_link; 498 struct rte_eth_link *src = link; 499 500 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst, 501 *(uint64_t *)src) == 0) 502 return -1; 503 504 return 0; 505 } 506 507 static int 508 octeontx_port_link_status(struct octeontx_nic *nic) 509 { 510 int res; 511 512 PMD_INIT_FUNC_TRACE(); 513 res = octeontx_bgx_port_link_status(nic->port_id); 514 if (res < 0) { 515 octeontx_log_err("failed to get port %d link status", 516 nic->port_id); 517 return res; 518 } 519 520 nic->link_up = (uint8_t)res; 521 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 522 523 return res; 524 } 525 526 /* 527 * Return 0 means link status changed, -1 means not changed 528 */ 529 static int 530 octeontx_dev_link_update(struct rte_eth_dev *dev, 531 int wait_to_complete __rte_unused) 532 { 533 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 534 struct rte_eth_link link; 535 int res; 536 537 res = 0; 538 PMD_INIT_FUNC_TRACE(); 539 540 res = octeontx_port_link_status(nic); 541 if (res < 0) { 542 octeontx_log_err("failed to request link status %d", res); 543 return res; 544 } 545 546 link.link_status = nic->link_up; 547 548 switch (nic->speed) { 549 case OCTEONTX_LINK_SPEED_SGMII: 550 link.link_speed = ETH_SPEED_NUM_1G; 551 break; 552 553 case OCTEONTX_LINK_SPEED_XAUI: 554 link.link_speed = ETH_SPEED_NUM_10G; 555 break; 556 557 case OCTEONTX_LINK_SPEED_RXAUI: 558 case OCTEONTX_LINK_SPEED_10G_R: 559 link.link_speed = ETH_SPEED_NUM_10G; 560 break; 561 case OCTEONTX_LINK_SPEED_QSGMII: 562 link.link_speed = ETH_SPEED_NUM_5G; 563 break; 564 case OCTEONTX_LINK_SPEED_40G_R: 565 link.link_speed = ETH_SPEED_NUM_40G; 566 break; 567 568 case OCTEONTX_LINK_SPEED_RESERVE1: 569 case OCTEONTX_LINK_SPEED_RESERVE2: 570 default: 571 octeontx_log_err("incorrect link speed %d", nic->speed); 572 break; 573 } 574 575 link.link_duplex = ETH_LINK_AUTONEG; 576 link.link_autoneg = ETH_LINK_SPEED_AUTONEG; 577 578 return octeontx_atomic_write_link_status(dev, &link); 579 } 580 581 static int 582 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 583 { 584 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 585 586 PMD_INIT_FUNC_TRACE(); 587 return octeontx_port_stats(nic, stats); 588 } 589 590 static void 591 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 592 { 593 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 594 595 PMD_INIT_FUNC_TRACE(); 596 octeontx_port_stats_clr(nic); 597 } 598 599 static void 600 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 601 struct ether_addr *addr) 602 { 603 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 604 int ret; 605 606 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 607 if (ret != 0) 608 octeontx_log_err("failed to set MAC address on port %d", 609 nic->port_id); 610 } 611 612 static void 613 octeontx_dev_info(struct rte_eth_dev *dev, 614 struct rte_eth_dev_info *dev_info) 615 { 616 RTE_SET_USED(dev); 617 618 /* Autonegotiation may be disabled */ 619 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 620 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 621 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 622 ETH_LINK_SPEED_40G; 623 624 dev_info->driver_name = RTE_STR(rte_octeontx_pmd); 625 dev_info->max_mac_addrs = 1; 626 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 627 dev_info->max_rx_queues = 1; 628 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 629 dev_info->min_rx_bufsize = 0; 630 dev_info->pci_dev = NULL; 631 632 dev_info->default_rxconf = (struct rte_eth_rxconf) { 633 .rx_free_thresh = 0, 634 .rx_drop_en = 0, 635 }; 636 637 dev_info->default_txconf = (struct rte_eth_txconf) { 638 .tx_free_thresh = 0, 639 .txq_flags = 640 ETH_TXQ_FLAGS_NOMULTSEGS | 641 ETH_TXQ_FLAGS_NOOFFLOADS | 642 ETH_TXQ_FLAGS_NOXSUMS, 643 }; 644 645 dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE; 646 } 647 648 static void 649 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 650 { 651 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 652 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 653 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 654 } 655 656 static int 657 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 658 uint16_t qidx) 659 { 660 struct octeontx_txq *txq; 661 int res; 662 663 PMD_INIT_FUNC_TRACE(); 664 665 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 666 return 0; 667 668 txq = dev->data->tx_queues[qidx]; 669 670 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 671 &txq->dq, 672 sizeof(octeontx_dq_t), 673 txq->queue_id, 674 octeontx_dq_info_getter); 675 if (res < 0) { 676 res = -EFAULT; 677 goto close_port; 678 } 679 680 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 681 return res; 682 683 close_port: 684 (void)octeontx_port_stop(nic); 685 octeontx_pko_channel_stop(nic->base_ochan); 686 octeontx_pko_channel_close(nic->base_ochan); 687 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 688 return res; 689 } 690 691 static int 692 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 693 { 694 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 695 696 PMD_INIT_FUNC_TRACE(); 697 qidx = qidx % PKO_VF_NUM_DQ; 698 return octeontx_vf_start_tx_queue(dev, nic, qidx); 699 } 700 701 static inline int 702 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 703 uint16_t qidx) 704 { 705 int ret = 0; 706 707 RTE_SET_USED(nic); 708 PMD_INIT_FUNC_TRACE(); 709 710 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 711 return 0; 712 713 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 714 return ret; 715 } 716 717 static int 718 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 719 { 720 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 721 722 PMD_INIT_FUNC_TRACE(); 723 qidx = qidx % PKO_VF_NUM_DQ; 724 725 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 726 } 727 728 static void 729 octeontx_dev_tx_queue_release(void *tx_queue) 730 { 731 struct octeontx_txq *txq = tx_queue; 732 int res; 733 734 PMD_INIT_FUNC_TRACE(); 735 736 if (txq) { 737 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 738 if (res < 0) 739 octeontx_log_err("failed stop tx_queue(%d)\n", 740 txq->queue_id); 741 742 rte_free(txq); 743 } 744 } 745 746 static int 747 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 748 uint16_t nb_desc, unsigned int socket_id, 749 const struct rte_eth_txconf *tx_conf) 750 { 751 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 752 struct octeontx_txq *txq = NULL; 753 uint16_t dq_num; 754 int res = 0; 755 756 RTE_SET_USED(nb_desc); 757 RTE_SET_USED(socket_id); 758 RTE_SET_USED(tx_conf); 759 760 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; 761 762 /* Socket id check */ 763 if (socket_id != (unsigned int)SOCKET_ID_ANY && 764 socket_id != (unsigned int)nic->node) 765 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 766 socket_id, nic->node); 767 768 /* Free memory prior to re-allocation if needed. */ 769 if (dev->data->tx_queues[qidx] != NULL) { 770 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 771 qidx); 772 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 773 dev->data->tx_queues[qidx] = NULL; 774 } 775 776 /* Allocating tx queue data structure */ 777 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 778 RTE_CACHE_LINE_SIZE, nic->node); 779 if (txq == NULL) { 780 octeontx_log_err("failed to allocate txq=%d", qidx); 781 res = -ENOMEM; 782 goto err; 783 } 784 785 txq->eth_dev = dev; 786 txq->queue_id = dq_num; 787 dev->data->tx_queues[qidx] = txq; 788 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 789 790 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 791 &txq->dq, 792 sizeof(octeontx_dq_t), 793 txq->queue_id, 794 octeontx_dq_info_getter); 795 if (res < 0) { 796 res = -EFAULT; 797 goto err; 798 } 799 800 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 801 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 802 txq->dq.ioreg_va, 803 txq->dq.fc_status_va); 804 805 return res; 806 807 err: 808 if (txq) 809 rte_free(txq); 810 811 return res; 812 } 813 814 static int 815 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 816 uint16_t nb_desc, unsigned int socket_id, 817 const struct rte_eth_rxconf *rx_conf, 818 struct rte_mempool *mb_pool) 819 { 820 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 821 struct rte_mempool_ops *mp_ops = NULL; 822 struct octeontx_rxq *rxq = NULL; 823 pki_pktbuf_cfg_t pktbuf_conf; 824 pki_hash_cfg_t pki_hash; 825 pki_qos_cfg_t pki_qos; 826 uintptr_t pool; 827 int ret, port; 828 uint8_t gaura; 829 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 830 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 831 832 RTE_SET_USED(nb_desc); 833 834 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 835 memset(&pki_hash, 0, sizeof(pki_hash)); 836 memset(&pki_qos, 0, sizeof(pki_qos)); 837 838 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 839 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 840 octeontx_log_err("failed to find octeontx_fpavf mempool"); 841 return -ENOTSUP; 842 } 843 844 /* Handle forbidden configurations */ 845 if (nic->pki.classifier_enable) { 846 octeontx_log_err("cannot setup queue %d. " 847 "Classifier option unsupported", qidx); 848 return -EINVAL; 849 } 850 851 port = nic->port_id; 852 853 /* Rx deferred start is not supported */ 854 if (rx_conf->rx_deferred_start) { 855 octeontx_log_err("rx deferred start not supported"); 856 return -EINVAL; 857 } 858 859 /* Verify queue index */ 860 if (qidx >= dev->data->nb_rx_queues) { 861 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 862 qidx, (dev->data->nb_rx_queues - 1)); 863 return -ENOTSUP; 864 } 865 866 /* Socket id check */ 867 if (socket_id != (unsigned int)SOCKET_ID_ANY && 868 socket_id != (unsigned int)nic->node) 869 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 870 socket_id, nic->node); 871 872 /* Allocating rx queue data structure */ 873 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 874 RTE_CACHE_LINE_SIZE, nic->node); 875 if (rxq == NULL) { 876 octeontx_log_err("failed to allocate rxq=%d", qidx); 877 return -ENOMEM; 878 } 879 880 if (!nic->pki.initialized) { 881 pktbuf_conf.port_type = 0; 882 pki_hash.port_type = 0; 883 pki_qos.port_type = 0; 884 885 pktbuf_conf.mmask.f_wqe_skip = 1; 886 pktbuf_conf.mmask.f_first_skip = 1; 887 pktbuf_conf.mmask.f_later_skip = 1; 888 pktbuf_conf.mmask.f_mbuff_size = 1; 889 pktbuf_conf.mmask.f_cache_mode = 1; 890 891 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 892 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP; 893 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 894 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 895 RTE_PKTMBUF_HEADROOM - 896 sizeof(struct rte_mbuf)); 897 898 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 899 900 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 901 if (ret != 0) { 902 octeontx_log_err("fail to configure pktbuf for port %d", 903 port); 904 rte_free(rxq); 905 return ret; 906 } 907 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 908 "\tmbuf_size:\t0x%0x\n" 909 "\twqe_skip:\t0x%0x\n" 910 "\tfirst_skip:\t0x%0x\n" 911 "\tlater_skip:\t0x%0x\n" 912 "\tcache_mode:\t%s\n", 913 port, 914 pktbuf_conf.mbuff_size, 915 pktbuf_conf.wqe_skip, 916 pktbuf_conf.first_skip, 917 pktbuf_conf.later_skip, 918 (pktbuf_conf.cache_mode == 919 PKI_OPC_MODE_STT) ? 920 "STT" : 921 (pktbuf_conf.cache_mode == 922 PKI_OPC_MODE_STF) ? 923 "STF" : 924 (pktbuf_conf.cache_mode == 925 PKI_OPC_MODE_STF1_STT) ? 926 "STF1_STT" : "STF2_STT"); 927 928 if (nic->pki.hash_enable) { 929 pki_hash.tag_dlc = 1; 930 pki_hash.tag_slc = 1; 931 pki_hash.tag_dlf = 1; 932 pki_hash.tag_slf = 1; 933 pki_hash.tag_prt = 1; 934 octeontx_pki_port_hash_config(port, &pki_hash); 935 } 936 937 pool = (uintptr_t)mb_pool->pool_id; 938 939 /* Get the gpool Id */ 940 gaura = octeontx_fpa_bufpool_gpool(pool); 941 942 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 943 pki_qos.num_entry = 1; 944 pki_qos.drop_policy = 0; 945 pki_qos.tag_type = 0L; 946 pki_qos.qos_entry[0].port_add = 0; 947 pki_qos.qos_entry[0].gaura = gaura; 948 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 949 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 950 pki_qos.qos_entry[0].grptag_bad = 0; 951 pki_qos.qos_entry[0].grptag_ok = 0; 952 953 ret = octeontx_pki_port_create_qos(port, &pki_qos); 954 if (ret < 0) { 955 octeontx_log_err("failed to create QOS port=%d, q=%d", 956 port, qidx); 957 rte_free(rxq); 958 return ret; 959 } 960 nic->pki.initialized = true; 961 } 962 963 rxq->port_id = nic->port_id; 964 rxq->eth_dev = dev; 965 rxq->queue_id = qidx; 966 rxq->evdev = nic->evdev; 967 rxq->ev_queues = ev_queues; 968 rxq->ev_ports = ev_ports; 969 970 dev->data->rx_queues[qidx] = rxq; 971 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 972 return 0; 973 } 974 975 static void 976 octeontx_dev_rx_queue_release(void *rxq) 977 { 978 rte_free(rxq); 979 } 980 981 static const uint32_t * 982 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 983 { 984 static const uint32_t ptypes[] = { 985 RTE_PTYPE_L3_IPV4, 986 RTE_PTYPE_L3_IPV4_EXT, 987 RTE_PTYPE_L3_IPV6, 988 RTE_PTYPE_L3_IPV6_EXT, 989 RTE_PTYPE_L4_TCP, 990 RTE_PTYPE_L4_UDP, 991 RTE_PTYPE_L4_FRAG, 992 RTE_PTYPE_UNKNOWN 993 }; 994 995 if (dev->rx_pkt_burst == octeontx_recv_pkts) 996 return ptypes; 997 998 return NULL; 999 } 1000 1001 /* Initialize and register driver with DPDK Application */ 1002 static const struct eth_dev_ops octeontx_dev_ops = { 1003 .dev_configure = octeontx_dev_configure, 1004 .dev_infos_get = octeontx_dev_info, 1005 .dev_close = octeontx_dev_close, 1006 .dev_start = octeontx_dev_start, 1007 .dev_stop = octeontx_dev_stop, 1008 .promiscuous_enable = octeontx_dev_promisc_enable, 1009 .promiscuous_disable = octeontx_dev_promisc_disable, 1010 .link_update = octeontx_dev_link_update, 1011 .stats_get = octeontx_dev_stats_get, 1012 .stats_reset = octeontx_dev_stats_reset, 1013 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1014 .tx_queue_start = octeontx_dev_tx_queue_start, 1015 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1016 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1017 .tx_queue_release = octeontx_dev_tx_queue_release, 1018 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1019 .rx_queue_release = octeontx_dev_rx_queue_release, 1020 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1021 }; 1022 1023 /* Create Ethdev interface per BGX LMAC ports */ 1024 static int 1025 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1026 int socket_id) 1027 { 1028 int res; 1029 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1030 struct octeontx_nic *nic = NULL; 1031 struct rte_eth_dev *eth_dev = NULL; 1032 struct rte_eth_dev_data *data = NULL; 1033 const char *name = rte_vdev_device_name(dev); 1034 1035 PMD_INIT_FUNC_TRACE(); 1036 1037 sprintf(octtx_name, "%s_%d", name, port); 1038 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1039 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1040 if (eth_dev == NULL) 1041 return -ENODEV; 1042 1043 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1044 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1045 return 0; 1046 } 1047 1048 data = rte_zmalloc_socket(octtx_name, sizeof(*data), 0, socket_id); 1049 if (data == NULL) { 1050 octeontx_log_err("failed to allocate devdata"); 1051 res = -ENOMEM; 1052 goto err; 1053 } 1054 1055 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1056 if (nic == NULL) { 1057 octeontx_log_err("failed to allocate nic structure"); 1058 res = -ENOMEM; 1059 goto err; 1060 } 1061 1062 nic->port_id = port; 1063 nic->evdev = evdev; 1064 1065 res = octeontx_port_open(nic); 1066 if (res < 0) 1067 goto err; 1068 1069 /* Rx side port configuration */ 1070 res = octeontx_pki_port_open(port); 1071 if (res != 0) { 1072 octeontx_log_err("failed to open PKI port %d", port); 1073 res = -ENODEV; 1074 goto err; 1075 } 1076 1077 /* Reserve an ethdev entry */ 1078 eth_dev = rte_eth_dev_allocate(octtx_name); 1079 if (eth_dev == NULL) { 1080 octeontx_log_err("failed to allocate rte_eth_dev"); 1081 res = -ENOMEM; 1082 goto err; 1083 } 1084 1085 eth_dev->device = &dev->device; 1086 eth_dev->intr_handle = NULL; 1087 eth_dev->data->kdrv = RTE_KDRV_NONE; 1088 eth_dev->data->numa_node = dev->device.numa_node; 1089 1090 rte_memcpy(data, (eth_dev)->data, sizeof(*data)); 1091 data->dev_private = nic; 1092 1093 data->port_id = eth_dev->data->port_id; 1094 snprintf(data->name, sizeof(data->name), "%s", eth_dev->data->name); 1095 1096 nic->ev_queues = 1; 1097 nic->ev_ports = 1; 1098 1099 data->dev_link.link_status = ETH_LINK_DOWN; 1100 data->dev_started = 0; 1101 data->promiscuous = 0; 1102 data->all_multicast = 0; 1103 data->scattered_rx = 0; 1104 1105 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0, 1106 socket_id); 1107 if (data->mac_addrs == NULL) { 1108 octeontx_log_err("failed to allocate memory for mac_addrs"); 1109 res = -ENOMEM; 1110 goto err; 1111 } 1112 1113 eth_dev->data = data; 1114 eth_dev->dev_ops = &octeontx_dev_ops; 1115 1116 /* Finally save ethdev pointer to the NIC structure */ 1117 nic->dev = eth_dev; 1118 1119 if (nic->port_id != data->port_id) { 1120 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1121 data->port_id, nic->port_id); 1122 res = -EINVAL; 1123 goto err; 1124 } 1125 1126 /* Update port_id mac to eth_dev */ 1127 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN); 1128 1129 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1130 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1131 nic->port_id, nic->port_ena, 1132 nic->base_ochan, nic->num_ochans, 1133 nic->num_tx_queues); 1134 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1135 1136 return data->port_id; 1137 1138 err: 1139 if (port) 1140 octeontx_port_close(nic); 1141 1142 if (eth_dev != NULL) { 1143 rte_free(eth_dev->data->mac_addrs); 1144 rte_free(data); 1145 rte_free(nic); 1146 rte_eth_dev_release_port(eth_dev); 1147 } 1148 1149 return res; 1150 } 1151 1152 /* Un initialize octeontx device */ 1153 static int 1154 octeontx_remove(struct rte_vdev_device *dev) 1155 { 1156 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1157 struct rte_eth_dev *eth_dev = NULL; 1158 struct octeontx_nic *nic = NULL; 1159 int i; 1160 1161 if (dev == NULL) 1162 return -EINVAL; 1163 1164 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1165 sprintf(octtx_name, "eth_octeontx_%d", i); 1166 1167 /* reserve an ethdev entry */ 1168 eth_dev = rte_eth_dev_allocated(octtx_name); 1169 if (eth_dev == NULL) 1170 return -ENODEV; 1171 1172 nic = octeontx_pmd_priv(eth_dev); 1173 rte_event_dev_stop(nic->evdev); 1174 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1175 1176 rte_free(eth_dev->data->mac_addrs); 1177 rte_free(eth_dev->data->dev_private); 1178 rte_free(eth_dev->data); 1179 rte_eth_dev_release_port(eth_dev); 1180 rte_event_dev_close(nic->evdev); 1181 } 1182 1183 /* Free FC resource */ 1184 octeontx_pko_fc_free(); 1185 1186 return 0; 1187 } 1188 1189 /* Initialize octeontx device */ 1190 static int 1191 octeontx_probe(struct rte_vdev_device *dev) 1192 { 1193 const char *dev_name; 1194 static int probe_once; 1195 uint8_t socket_id, qlist; 1196 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1197 struct rte_event_dev_config dev_conf; 1198 const char *eventdev_name = "event_octeontx"; 1199 struct rte_event_dev_info info; 1200 1201 struct octeontx_vdev_init_params init_params = { 1202 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1203 }; 1204 1205 dev_name = rte_vdev_device_name(dev); 1206 res = octeontx_parse_vdev_init_params(&init_params, dev); 1207 if (res < 0) 1208 return -EINVAL; 1209 1210 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1211 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1212 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1213 return -ENOTSUP; 1214 } 1215 1216 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1217 1218 socket_id = rte_socket_id(); 1219 1220 tx_vfcnt = octeontx_pko_vf_count(); 1221 1222 if (tx_vfcnt < init_params.nr_port) { 1223 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1224 tx_vfcnt, init_params.nr_port); 1225 return -EINVAL; 1226 } 1227 evdev = rte_event_dev_get_dev_id(eventdev_name); 1228 if (evdev < 0) { 1229 octeontx_log_err("eventdev %s not found", eventdev_name); 1230 return -ENODEV; 1231 } 1232 1233 res = rte_event_dev_info_get(evdev, &info); 1234 if (res < 0) { 1235 octeontx_log_err("failed to eventdev info %d", res); 1236 return -EINVAL; 1237 } 1238 1239 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1240 info.max_event_queues, info.max_event_ports); 1241 1242 if (octeontx_pko_init_fc(tx_vfcnt)) 1243 return -ENOMEM; 1244 1245 devconf_set_default_sane_values(&dev_conf, &info); 1246 res = rte_event_dev_configure(evdev, &dev_conf); 1247 if (res < 0) 1248 goto parse_error; 1249 1250 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1251 (uint32_t *)&pnum); 1252 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1253 (uint32_t *)&qnum); 1254 if (pnum < qnum) { 1255 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1256 pnum, qnum); 1257 res = -EINVAL; 1258 goto parse_error; 1259 } 1260 if (pnum > qnum) { 1261 /* 1262 * We don't poll on event ports 1263 * that do not have any queues assigned. 1264 */ 1265 pnum = qnum; 1266 PMD_INIT_LOG(INFO, 1267 "reducing number of active event ports to %d", pnum); 1268 } 1269 for (i = 0; i < qnum; i++) { 1270 res = rte_event_queue_setup(evdev, i, NULL); 1271 if (res < 0) { 1272 octeontx_log_err("failed to setup event_q(%d): res %d", 1273 i, res); 1274 goto parse_error; 1275 } 1276 } 1277 1278 for (i = 0; i < pnum; i++) { 1279 res = rte_event_port_setup(evdev, i, NULL); 1280 if (res < 0) { 1281 res = -ENODEV; 1282 octeontx_log_err("failed to setup ev port(%d) res=%d", 1283 i, res); 1284 goto parse_error; 1285 } 1286 /* Link one queue to one event port */ 1287 qlist = i; 1288 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1289 if (res < 0) { 1290 res = -ENODEV; 1291 octeontx_log_err("failed to link port (%d): res=%d", 1292 i, res); 1293 goto parse_error; 1294 } 1295 } 1296 1297 /* Create ethdev interface */ 1298 for (i = 0; i < init_params.nr_port; i++) { 1299 port_id = octeontx_create(dev, i, evdev, socket_id); 1300 if (port_id < 0) { 1301 octeontx_log_err("failed to create device %s", 1302 dev_name); 1303 res = -ENODEV; 1304 goto parse_error; 1305 } 1306 1307 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1308 port_id); 1309 } 1310 1311 if (probe_once) { 1312 octeontx_log_err("interface %s not supported", dev_name); 1313 octeontx_remove(dev); 1314 res = -ENOTSUP; 1315 goto parse_error; 1316 } 1317 probe_once = 1; 1318 1319 return 0; 1320 1321 parse_error: 1322 octeontx_pko_fc_free(); 1323 return res; 1324 } 1325 1326 static struct rte_vdev_driver octeontx_pmd_drv = { 1327 .probe = octeontx_probe, 1328 .remove = octeontx_remove, 1329 }; 1330 1331 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1332 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1333 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1334