xref: /dpdk/drivers/net/octeontx/octeontx_ethdev.c (revision 3151e6a687a383ccd55a7f7cae6897a82f4d1eab)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Cavium, Inc
3  */
4 
5 #include <stdio.h>
6 #include <stdarg.h>
7 #include <stdbool.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
16 #include <rte_dev.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
22 
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
26 
27 struct evdev_priv_data {
28 	OFFLOAD_FLAGS; /*Sequence should not be changed */
29 } __rte_cache_aligned;
30 
31 struct octeontx_vdev_init_params {
32 	uint8_t	nr_port;
33 };
34 
35 uint16_t
36 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
37 
38 enum octeontx_link_speed {
39 	OCTEONTX_LINK_SPEED_SGMII,
40 	OCTEONTX_LINK_SPEED_XAUI,
41 	OCTEONTX_LINK_SPEED_RXAUI,
42 	OCTEONTX_LINK_SPEED_10G_R,
43 	OCTEONTX_LINK_SPEED_40G_R,
44 	OCTEONTX_LINK_SPEED_RESERVE1,
45 	OCTEONTX_LINK_SPEED_QSGMII,
46 	OCTEONTX_LINK_SPEED_RESERVE2
47 };
48 
49 int otx_net_logtype_mbox;
50 int otx_net_logtype_init;
51 int otx_net_logtype_driver;
52 
53 RTE_INIT(otx_net_init_log)
54 {
55 	otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
56 	if (otx_net_logtype_mbox >= 0)
57 		rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
58 
59 	otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
60 	if (otx_net_logtype_init >= 0)
61 		rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
62 
63 	otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
64 	if (otx_net_logtype_driver >= 0)
65 		rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
66 }
67 
68 /* Parse integer from integer argument */
69 static int
70 parse_integer_arg(const char *key __rte_unused,
71 		const char *value, void *extra_args)
72 {
73 	int *i = (int *)extra_args;
74 
75 	*i = atoi(value);
76 	if (*i < 0) {
77 		octeontx_log_err("argument has to be positive.");
78 		return -1;
79 	}
80 
81 	return 0;
82 }
83 
84 static int
85 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
86 				struct rte_vdev_device *dev)
87 {
88 	struct rte_kvargs *kvlist = NULL;
89 	int ret = 0;
90 
91 	static const char * const octeontx_vdev_valid_params[] = {
92 		OCTEONTX_VDEV_NR_PORT_ARG,
93 		NULL
94 	};
95 
96 	const char *input_args = rte_vdev_device_args(dev);
97 	if (params == NULL)
98 		return -EINVAL;
99 
100 
101 	if (input_args) {
102 		kvlist = rte_kvargs_parse(input_args,
103 				octeontx_vdev_valid_params);
104 		if (kvlist == NULL)
105 			return -1;
106 
107 		ret = rte_kvargs_process(kvlist,
108 					OCTEONTX_VDEV_NR_PORT_ARG,
109 					&parse_integer_arg,
110 					&params->nr_port);
111 		if (ret < 0)
112 			goto free_kvlist;
113 	}
114 
115 free_kvlist:
116 	rte_kvargs_free(kvlist);
117 	return ret;
118 }
119 
120 static int
121 octeontx_port_open(struct octeontx_nic *nic)
122 {
123 	octeontx_mbox_bgx_port_conf_t bgx_port_conf;
124 	int res;
125 
126 	res = 0;
127 	memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
128 	PMD_INIT_FUNC_TRACE();
129 
130 	res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
131 	if (res < 0) {
132 		octeontx_log_err("failed to open port %d", res);
133 		return res;
134 	}
135 
136 	nic->node = bgx_port_conf.node;
137 	nic->port_ena = bgx_port_conf.enable;
138 	nic->base_ichan = bgx_port_conf.base_chan;
139 	nic->base_ochan = bgx_port_conf.base_chan;
140 	nic->num_ichans = bgx_port_conf.num_chans;
141 	nic->num_ochans = bgx_port_conf.num_chans;
142 	nic->bgx_mtu = bgx_port_conf.mtu;
143 	nic->bpen = bgx_port_conf.bpen;
144 	nic->fcs_strip = bgx_port_conf.fcs_strip;
145 	nic->bcast_mode = bgx_port_conf.bcast_mode;
146 	nic->mcast_mode = bgx_port_conf.mcast_mode;
147 	nic->speed	= bgx_port_conf.mode;
148 
149 	memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
150 		RTE_ETHER_ADDR_LEN);
151 
152 	octeontx_log_dbg("port opened %d", nic->port_id);
153 	return res;
154 }
155 
156 static void
157 octeontx_port_close(struct octeontx_nic *nic)
158 {
159 	PMD_INIT_FUNC_TRACE();
160 
161 	octeontx_bgx_port_close(nic->port_id);
162 	octeontx_log_dbg("port closed %d", nic->port_id);
163 }
164 
165 static int
166 octeontx_port_start(struct octeontx_nic *nic)
167 {
168 	PMD_INIT_FUNC_TRACE();
169 
170 	return octeontx_bgx_port_start(nic->port_id);
171 }
172 
173 static int
174 octeontx_port_stop(struct octeontx_nic *nic)
175 {
176 	PMD_INIT_FUNC_TRACE();
177 
178 	return octeontx_bgx_port_stop(nic->port_id);
179 }
180 
181 static int
182 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
183 {
184 	struct rte_eth_dev *dev;
185 	int res;
186 
187 	res = 0;
188 	PMD_INIT_FUNC_TRACE();
189 	dev = nic->dev;
190 
191 	res = octeontx_bgx_port_promisc_set(nic->port_id, en);
192 	if (res < 0) {
193 		octeontx_log_err("failed to set promiscuous mode %d",
194 				nic->port_id);
195 		return res;
196 	}
197 
198 	/* Set proper flag for the mode */
199 	dev->data->promiscuous = (en != 0) ? 1 : 0;
200 
201 	octeontx_log_dbg("port %d : promiscuous mode %s",
202 			nic->port_id, en ? "set" : "unset");
203 
204 	return 0;
205 }
206 
207 static int
208 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
209 {
210 	octeontx_mbox_bgx_port_stats_t bgx_stats;
211 	int res;
212 
213 	PMD_INIT_FUNC_TRACE();
214 
215 	res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
216 	if (res < 0) {
217 		octeontx_log_err("failed to get port stats %d", nic->port_id);
218 		return res;
219 	}
220 
221 	stats->ipackets = bgx_stats.rx_packets;
222 	stats->ibytes = bgx_stats.rx_bytes;
223 	stats->imissed = bgx_stats.rx_dropped;
224 	stats->ierrors = bgx_stats.rx_errors;
225 	stats->opackets = bgx_stats.tx_packets;
226 	stats->obytes = bgx_stats.tx_bytes;
227 	stats->oerrors = bgx_stats.tx_errors;
228 
229 	octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
230 			nic->port_id, stats->ipackets, stats->opackets);
231 
232 	return 0;
233 }
234 
235 static int
236 octeontx_port_stats_clr(struct octeontx_nic *nic)
237 {
238 	PMD_INIT_FUNC_TRACE();
239 
240 	return octeontx_bgx_port_stats_clr(nic->port_id);
241 }
242 
243 static inline void
244 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
245 				struct rte_event_dev_info *info)
246 {
247 	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
248 	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
249 
250 	dev_conf->nb_event_ports = info->max_event_ports;
251 	dev_conf->nb_event_queues = info->max_event_queues;
252 
253 	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
254 	dev_conf->nb_event_port_dequeue_depth =
255 			info->max_event_port_dequeue_depth;
256 	dev_conf->nb_event_port_enqueue_depth =
257 			info->max_event_port_enqueue_depth;
258 	dev_conf->nb_event_port_enqueue_depth =
259 			info->max_event_port_enqueue_depth;
260 	dev_conf->nb_events_limit =
261 			info->max_num_events;
262 }
263 
264 static uint16_t
265 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev)
266 {
267 	struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
268 	uint16_t flags = 0;
269 
270 	if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE))
271 		flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F;
272 
273 	if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
274 		flags |= OCCTX_TX_MULTI_SEG_F;
275 
276 	return flags;
277 }
278 
279 static uint16_t
280 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev)
281 {
282 	struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
283 	struct rte_eth_dev_data *data = eth_dev->data;
284 	struct rte_eth_conf *conf = &data->dev_conf;
285 	struct rte_eth_rxmode *rxmode = &conf->rxmode;
286 	uint16_t flags = 0;
287 
288 	if (rxmode->mq_mode == ETH_MQ_RX_RSS)
289 		flags |= OCCTX_RX_OFFLOAD_RSS_F;
290 
291 	if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) {
292 		flags |= OCCTX_RX_MULTI_SEG_F;
293 		eth_dev->data->scattered_rx = 1;
294 		/* If scatter mode is enabled, TX should also be in multi
295 		 * seg mode, else memory leak will occur
296 		 */
297 		nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
298 	}
299 
300 	return flags;
301 }
302 
303 static int
304 octeontx_dev_configure(struct rte_eth_dev *dev)
305 {
306 	struct rte_eth_dev_data *data = dev->data;
307 	struct rte_eth_conf *conf = &data->dev_conf;
308 	struct rte_eth_rxmode *rxmode = &conf->rxmode;
309 	struct rte_eth_txmode *txmode = &conf->txmode;
310 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
311 	int ret;
312 
313 	PMD_INIT_FUNC_TRACE();
314 	RTE_SET_USED(conf);
315 
316 	if (!rte_eal_has_hugepages()) {
317 		octeontx_log_err("huge page is not configured");
318 		return -EINVAL;
319 	}
320 
321 	if (txmode->mq_mode) {
322 		octeontx_log_err("tx mq_mode DCB or VMDq not supported");
323 		return -EINVAL;
324 	}
325 
326 	if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
327 		rxmode->mq_mode != ETH_MQ_RX_RSS) {
328 		octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
329 		return -EINVAL;
330 	}
331 
332 	if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
333 		PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
334 		txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
335 	}
336 
337 	if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
338 		octeontx_log_err("setting link speed/duplex not supported");
339 		return -EINVAL;
340 	}
341 
342 	if (conf->dcb_capability_en) {
343 		octeontx_log_err("DCB enable not supported");
344 		return -EINVAL;
345 	}
346 
347 	if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
348 		octeontx_log_err("flow director not supported");
349 		return -EINVAL;
350 	}
351 
352 	nic->num_tx_queues = dev->data->nb_tx_queues;
353 
354 	ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
355 					nic->num_tx_queues,
356 					nic->base_ochan);
357 	if (ret) {
358 		octeontx_log_err("failed to open channel %d no-of-txq %d",
359 			   nic->base_ochan, nic->num_tx_queues);
360 		return -EFAULT;
361 	}
362 
363 	nic->pki.classifier_enable = false;
364 	nic->pki.hash_enable = true;
365 	nic->pki.initialized = false;
366 
367 	nic->rx_offloads |= rxmode->offloads;
368 	nic->tx_offloads |= txmode->offloads;
369 	nic->rx_offload_flags |= octeontx_rx_offload_flags(dev);
370 	nic->tx_offload_flags |= octeontx_tx_offload_flags(dev);
371 
372 	return 0;
373 }
374 
375 static void
376 octeontx_dev_close(struct rte_eth_dev *dev)
377 {
378 	struct octeontx_txq *txq = NULL;
379 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
380 	unsigned int i;
381 	int ret;
382 
383 	PMD_INIT_FUNC_TRACE();
384 
385 	rte_event_dev_close(nic->evdev);
386 
387 	ret = octeontx_pko_channel_close(nic->base_ochan);
388 	if (ret < 0) {
389 		octeontx_log_err("failed to close channel %d VF%d %d %d",
390 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
391 			     ret);
392 	}
393 	/* Free txq resources for this port */
394 	for (i = 0; i < nic->num_tx_queues; i++) {
395 		txq = dev->data->tx_queues[i];
396 		if (!txq)
397 			continue;
398 
399 		rte_free(txq);
400 	}
401 
402 	/* Free MAC address table */
403 	rte_free(dev->data->mac_addrs);
404 	dev->data->mac_addrs = NULL;
405 
406 	dev->tx_pkt_burst = NULL;
407 	dev->rx_pkt_burst = NULL;
408 }
409 
410 static int
411 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
412 {
413 	uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD;
414 	struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
415 	struct rte_eth_dev_data *data = eth_dev->data;
416 	int rc = 0;
417 
418 	/* Check if MTU is within the allowed range */
419 	if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS)
420 		return -EINVAL;
421 
422 	buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
423 
424 	/* Refuse MTU that requires the support of scattered packets
425 	 * when this feature has not been enabled before.
426 	 */
427 	if (data->dev_started && frame_size > buffsz &&
428 	    !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) {
429 		octeontx_log_err("Scatter mode is disabled");
430 		return -EINVAL;
431 	}
432 
433 	/* Check <seg size> * <max_seg>  >= max_frame */
434 	if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)	&&
435 	    (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX))
436 		return -EINVAL;
437 
438 	rc = octeontx_pko_send_mtu(nic->port_id, frame_size);
439 	if (rc)
440 		return rc;
441 
442 	rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size);
443 	if (rc)
444 		return rc;
445 
446 	if (frame_size > RTE_ETHER_MAX_LEN)
447 		nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
448 	else
449 		nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
450 
451 	/* Update max_rx_pkt_len */
452 	data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
453 	octeontx_log_info("Received pkt beyond  maxlen %d will be dropped",
454 			  frame_size);
455 
456 	return rc;
457 }
458 
459 static int
460 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq)
461 {
462 	struct rte_eth_dev *eth_dev = rxq->eth_dev;
463 	struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev);
464 	struct rte_eth_dev_data *data = eth_dev->data;
465 	struct rte_pktmbuf_pool_private *mbp_priv;
466 	struct evdev_priv_data *evdev_priv;
467 	struct rte_eventdev *dev;
468 	uint32_t buffsz;
469 
470 	/* Get rx buffer size */
471 	mbp_priv = rte_mempool_get_priv(rxq->pool);
472 	buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
473 
474 	/* Setup scatter mode if needed by jumbo */
475 	if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) {
476 		nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
477 		nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev);
478 		nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev);
479 	}
480 
481 	/* Sharing offload flags via eventdev priv region */
482 	dev = &rte_eventdevs[rxq->evdev];
483 	evdev_priv = dev->data->dev_private;
484 	evdev_priv->rx_offload_flags = nic->rx_offload_flags;
485 	evdev_priv->tx_offload_flags = nic->tx_offload_flags;
486 
487 	/* Setup MTU based on max_rx_pkt_len */
488 	nic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD;
489 
490 	return 0;
491 }
492 
493 static int
494 octeontx_dev_start(struct rte_eth_dev *dev)
495 {
496 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
497 	struct octeontx_rxq *rxq;
498 	int ret = 0, i;
499 
500 	PMD_INIT_FUNC_TRACE();
501 	/* Rechecking if any new offload set to update
502 	 * rx/tx burst function pointer accordingly.
503 	 */
504 	for (i = 0; i < dev->data->nb_rx_queues; i++) {
505 		rxq = dev->data->rx_queues[i];
506 		octeontx_recheck_rx_offloads(rxq);
507 	}
508 
509 	/* Setting up the mtu based on max_rx_pkt_len */
510 	ret = octeontx_dev_mtu_set(dev, nic->mtu);
511 	if (ret) {
512 		octeontx_log_err("Failed to set default MTU size %d", ret);
513 		goto error;
514 	}
515 
516 	/*
517 	 * Tx start
518 	 */
519 	octeontx_set_tx_function(dev);
520 	ret = octeontx_pko_channel_start(nic->base_ochan);
521 	if (ret < 0) {
522 		octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
523 			   nic->port_id, nic->num_tx_queues, nic->base_ochan,
524 			   ret);
525 		goto error;
526 	}
527 
528 	/*
529 	 * Rx start
530 	 */
531 	dev->rx_pkt_burst = octeontx_recv_pkts;
532 	ret = octeontx_pki_port_start(nic->port_id);
533 	if (ret < 0) {
534 		octeontx_log_err("fail to start Rx on port %d", nic->port_id);
535 		goto channel_stop_error;
536 	}
537 
538 	/*
539 	 * Start port
540 	 */
541 	ret = octeontx_port_start(nic);
542 	if (ret < 0) {
543 		octeontx_log_err("failed start port %d", ret);
544 		goto pki_port_stop_error;
545 	}
546 
547 	PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
548 			nic->base_ochan, nic->num_tx_queues, nic->port_id);
549 
550 	ret = rte_event_dev_start(nic->evdev);
551 	if (ret < 0) {
552 		octeontx_log_err("failed to start evdev: ret (%d)", ret);
553 		goto pki_port_stop_error;
554 	}
555 
556 	/* Success */
557 	return ret;
558 
559 pki_port_stop_error:
560 	octeontx_pki_port_stop(nic->port_id);
561 channel_stop_error:
562 	octeontx_pko_channel_stop(nic->base_ochan);
563 error:
564 	return ret;
565 }
566 
567 static void
568 octeontx_dev_stop(struct rte_eth_dev *dev)
569 {
570 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
571 	int ret;
572 
573 	PMD_INIT_FUNC_TRACE();
574 
575 	rte_event_dev_stop(nic->evdev);
576 
577 	ret = octeontx_port_stop(nic);
578 	if (ret < 0) {
579 		octeontx_log_err("failed to req stop port %d res=%d",
580 					nic->port_id, ret);
581 		return;
582 	}
583 
584 	ret = octeontx_pki_port_stop(nic->port_id);
585 	if (ret < 0) {
586 		octeontx_log_err("failed to stop pki port %d res=%d",
587 					nic->port_id, ret);
588 		return;
589 	}
590 
591 	ret = octeontx_pko_channel_stop(nic->base_ochan);
592 	if (ret < 0) {
593 		octeontx_log_err("failed to stop channel %d VF%d %d %d",
594 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
595 			     ret);
596 		return;
597 	}
598 }
599 
600 static int
601 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
602 {
603 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
604 
605 	PMD_INIT_FUNC_TRACE();
606 	return octeontx_port_promisc_set(nic, 1);
607 }
608 
609 static int
610 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
611 {
612 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
613 
614 	PMD_INIT_FUNC_TRACE();
615 	return octeontx_port_promisc_set(nic, 0);
616 }
617 
618 static int
619 octeontx_port_link_status(struct octeontx_nic *nic)
620 {
621 	int res;
622 
623 	PMD_INIT_FUNC_TRACE();
624 	res = octeontx_bgx_port_link_status(nic->port_id);
625 	if (res < 0) {
626 		octeontx_log_err("failed to get port %d link status",
627 				nic->port_id);
628 		return res;
629 	}
630 
631 	nic->link_up = (uint8_t)res;
632 	octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
633 
634 	return res;
635 }
636 
637 /*
638  * Return 0 means link status changed, -1 means not changed
639  */
640 static int
641 octeontx_dev_link_update(struct rte_eth_dev *dev,
642 			 int wait_to_complete __rte_unused)
643 {
644 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
645 	struct rte_eth_link link;
646 	int res;
647 
648 	PMD_INIT_FUNC_TRACE();
649 
650 	res = octeontx_port_link_status(nic);
651 	if (res < 0) {
652 		octeontx_log_err("failed to request link status %d", res);
653 		return res;
654 	}
655 
656 	link.link_status = nic->link_up;
657 
658 	switch (nic->speed) {
659 	case OCTEONTX_LINK_SPEED_SGMII:
660 		link.link_speed = ETH_SPEED_NUM_1G;
661 		break;
662 
663 	case OCTEONTX_LINK_SPEED_XAUI:
664 		link.link_speed = ETH_SPEED_NUM_10G;
665 		break;
666 
667 	case OCTEONTX_LINK_SPEED_RXAUI:
668 	case OCTEONTX_LINK_SPEED_10G_R:
669 		link.link_speed = ETH_SPEED_NUM_10G;
670 		break;
671 	case OCTEONTX_LINK_SPEED_QSGMII:
672 		link.link_speed = ETH_SPEED_NUM_5G;
673 		break;
674 	case OCTEONTX_LINK_SPEED_40G_R:
675 		link.link_speed = ETH_SPEED_NUM_40G;
676 		break;
677 
678 	case OCTEONTX_LINK_SPEED_RESERVE1:
679 	case OCTEONTX_LINK_SPEED_RESERVE2:
680 	default:
681 		link.link_speed = ETH_SPEED_NUM_NONE;
682 		octeontx_log_err("incorrect link speed %d", nic->speed);
683 		break;
684 	}
685 
686 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
687 	link.link_autoneg = ETH_LINK_AUTONEG;
688 
689 	return rte_eth_linkstatus_set(dev, &link);
690 }
691 
692 static int
693 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
694 {
695 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
696 
697 	PMD_INIT_FUNC_TRACE();
698 	return octeontx_port_stats(nic, stats);
699 }
700 
701 static int
702 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
703 {
704 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
705 
706 	PMD_INIT_FUNC_TRACE();
707 	return octeontx_port_stats_clr(nic);
708 }
709 
710 static void
711 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index)
712 {
713 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
714 	int ret;
715 
716 	ret = octeontx_bgx_port_mac_del(nic->port_id, index);
717 	if (ret != 0)
718 		octeontx_log_err("failed to del MAC address filter on port %d",
719 				 nic->port_id);
720 }
721 
722 static int
723 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev,
724 			  struct rte_ether_addr *mac_addr,
725 			  uint32_t index,
726 			  __rte_unused uint32_t vmdq)
727 {
728 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
729 	int ret;
730 
731 	ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes,
732 					index);
733 	if (ret < 0) {
734 		octeontx_log_err("failed to add MAC address filter on port %d",
735 				 nic->port_id);
736 		return ret;
737 	}
738 
739 	return 0;
740 }
741 
742 static int
743 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
744 					struct rte_ether_addr *addr)
745 {
746 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
747 	int ret;
748 
749 	ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
750 	if (ret == 0) {
751 		/* Update same mac address to BGX CAM table */
752 		ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes,
753 						0);
754 	}
755 	if (ret < 0) {
756 		octeontx_log_err("failed to set MAC address on port %d",
757 				 nic->port_id);
758 	}
759 
760 	return ret;
761 }
762 
763 static int
764 octeontx_dev_info(struct rte_eth_dev *dev,
765 		struct rte_eth_dev_info *dev_info)
766 {
767 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
768 
769 	/* Autonegotiation may be disabled */
770 	dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
771 	dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
772 			ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
773 			ETH_LINK_SPEED_40G;
774 
775 	/* Min/Max MTU supported */
776 	dev_info->min_rx_bufsize = OCCTX_MIN_FRS;
777 	dev_info->max_rx_pktlen = OCCTX_MAX_FRS;
778 	dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD;
779 	dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD;
780 
781 	dev_info->max_mac_addrs =
782 				octeontx_bgx_port_mac_entries_get(nic->port_id);
783 	dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
784 	dev_info->max_rx_queues = 1;
785 	dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
786 	dev_info->min_rx_bufsize = 0;
787 
788 	dev_info->default_rxconf = (struct rte_eth_rxconf) {
789 		.rx_free_thresh = 0,
790 		.rx_drop_en = 0,
791 		.offloads = OCTEONTX_RX_OFFLOADS,
792 	};
793 
794 	dev_info->default_txconf = (struct rte_eth_txconf) {
795 		.tx_free_thresh = 0,
796 		.offloads = OCTEONTX_TX_OFFLOADS,
797 	};
798 
799 	dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
800 	dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
801 	dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
802 	dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
803 
804 	return 0;
805 }
806 
807 static void
808 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
809 {
810 	((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
811 	((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
812 	((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
813 }
814 
815 static int
816 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
817 				uint16_t qidx)
818 {
819 	struct octeontx_txq *txq;
820 	int res;
821 
822 	PMD_INIT_FUNC_TRACE();
823 
824 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
825 		return 0;
826 
827 	txq = dev->data->tx_queues[qidx];
828 
829 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
830 						&txq->dq,
831 						sizeof(octeontx_dq_t),
832 						txq->queue_id,
833 						octeontx_dq_info_getter);
834 	if (res < 0) {
835 		res = -EFAULT;
836 		goto close_port;
837 	}
838 
839 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
840 	return res;
841 
842 close_port:
843 	(void)octeontx_port_stop(nic);
844 	octeontx_pko_channel_stop(nic->base_ochan);
845 	octeontx_pko_channel_close(nic->base_ochan);
846 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
847 	return res;
848 }
849 
850 static int
851 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
852 {
853 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
854 
855 	PMD_INIT_FUNC_TRACE();
856 	qidx = qidx % PKO_VF_NUM_DQ;
857 	return octeontx_vf_start_tx_queue(dev, nic, qidx);
858 }
859 
860 static inline int
861 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
862 			  uint16_t qidx)
863 {
864 	int ret = 0;
865 
866 	RTE_SET_USED(nic);
867 	PMD_INIT_FUNC_TRACE();
868 
869 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
870 		return 0;
871 
872 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
873 	return ret;
874 }
875 
876 static int
877 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
878 {
879 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
880 
881 	PMD_INIT_FUNC_TRACE();
882 	qidx = qidx % PKO_VF_NUM_DQ;
883 
884 	return octeontx_vf_stop_tx_queue(dev, nic, qidx);
885 }
886 
887 static void
888 octeontx_dev_tx_queue_release(void *tx_queue)
889 {
890 	struct octeontx_txq *txq = tx_queue;
891 	int res;
892 
893 	PMD_INIT_FUNC_TRACE();
894 
895 	if (txq) {
896 		res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
897 		if (res < 0)
898 			octeontx_log_err("failed stop tx_queue(%d)\n",
899 				   txq->queue_id);
900 
901 		rte_free(txq);
902 	}
903 }
904 
905 static int
906 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
907 			    uint16_t nb_desc, unsigned int socket_id,
908 			    const struct rte_eth_txconf *tx_conf __rte_unused)
909 {
910 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
911 	struct octeontx_txq *txq = NULL;
912 	uint16_t dq_num;
913 	int res = 0;
914 
915 	RTE_SET_USED(nb_desc);
916 	RTE_SET_USED(socket_id);
917 
918 	dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
919 
920 	/* Socket id check */
921 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
922 			socket_id != (unsigned int)nic->node)
923 		PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
924 						socket_id, nic->node);
925 
926 	/* Free memory prior to re-allocation if needed. */
927 	if (dev->data->tx_queues[qidx] != NULL) {
928 		PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
929 				qidx);
930 		octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
931 		dev->data->tx_queues[qidx] = NULL;
932 	}
933 
934 	/* Allocating tx queue data structure */
935 	txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
936 				 RTE_CACHE_LINE_SIZE, nic->node);
937 	if (txq == NULL) {
938 		octeontx_log_err("failed to allocate txq=%d", qidx);
939 		res = -ENOMEM;
940 		goto err;
941 	}
942 
943 	txq->eth_dev = dev;
944 	txq->queue_id = dq_num;
945 	dev->data->tx_queues[qidx] = txq;
946 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
947 
948 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
949 						&txq->dq,
950 						sizeof(octeontx_dq_t),
951 						txq->queue_id,
952 						octeontx_dq_info_getter);
953 	if (res < 0) {
954 		res = -EFAULT;
955 		goto err;
956 	}
957 
958 	PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
959 			qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
960 			txq->dq.ioreg_va,
961 			txq->dq.fc_status_va);
962 
963 	return res;
964 
965 err:
966 	if (txq)
967 		rte_free(txq);
968 
969 	return res;
970 }
971 
972 static int
973 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
974 				uint16_t nb_desc, unsigned int socket_id,
975 				const struct rte_eth_rxconf *rx_conf,
976 				struct rte_mempool *mb_pool)
977 {
978 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
979 	struct rte_mempool_ops *mp_ops = NULL;
980 	struct octeontx_rxq *rxq = NULL;
981 	pki_pktbuf_cfg_t pktbuf_conf;
982 	pki_hash_cfg_t pki_hash;
983 	pki_qos_cfg_t pki_qos;
984 	uintptr_t pool;
985 	int ret, port;
986 	uint16_t gaura;
987 	unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
988 	unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
989 
990 	RTE_SET_USED(nb_desc);
991 
992 	memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
993 	memset(&pki_hash, 0, sizeof(pki_hash));
994 	memset(&pki_qos, 0, sizeof(pki_qos));
995 
996 	mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
997 	if (strcmp(mp_ops->name, "octeontx_fpavf")) {
998 		octeontx_log_err("failed to find octeontx_fpavf mempool");
999 		return -ENOTSUP;
1000 	}
1001 
1002 	/* Handle forbidden configurations */
1003 	if (nic->pki.classifier_enable) {
1004 		octeontx_log_err("cannot setup queue %d. "
1005 					"Classifier option unsupported", qidx);
1006 		return -EINVAL;
1007 	}
1008 
1009 	port = nic->port_id;
1010 
1011 	/* Rx deferred start is not supported */
1012 	if (rx_conf->rx_deferred_start) {
1013 		octeontx_log_err("rx deferred start not supported");
1014 		return -EINVAL;
1015 	}
1016 
1017 	/* Verify queue index */
1018 	if (qidx >= dev->data->nb_rx_queues) {
1019 		octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
1020 				qidx, (dev->data->nb_rx_queues - 1));
1021 		return -ENOTSUP;
1022 	}
1023 
1024 	/* Socket id check */
1025 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
1026 			socket_id != (unsigned int)nic->node)
1027 		PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
1028 						socket_id, nic->node);
1029 
1030 	/* Allocating rx queue data structure */
1031 	rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
1032 				 RTE_CACHE_LINE_SIZE, nic->node);
1033 	if (rxq == NULL) {
1034 		octeontx_log_err("failed to allocate rxq=%d", qidx);
1035 		return -ENOMEM;
1036 	}
1037 
1038 	if (!nic->pki.initialized) {
1039 		pktbuf_conf.port_type = 0;
1040 		pki_hash.port_type = 0;
1041 		pki_qos.port_type = 0;
1042 
1043 		pktbuf_conf.mmask.f_wqe_skip = 1;
1044 		pktbuf_conf.mmask.f_first_skip = 1;
1045 		pktbuf_conf.mmask.f_later_skip = 1;
1046 		pktbuf_conf.mmask.f_mbuff_size = 1;
1047 		pktbuf_conf.mmask.f_cache_mode = 1;
1048 
1049 		pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
1050 		pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
1051 		pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
1052 		pktbuf_conf.mbuff_size = (mb_pool->elt_size -
1053 					RTE_PKTMBUF_HEADROOM -
1054 					rte_pktmbuf_priv_size(mb_pool) -
1055 					sizeof(struct rte_mbuf));
1056 
1057 		pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
1058 
1059 		ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
1060 		if (ret != 0) {
1061 			octeontx_log_err("fail to configure pktbuf for port %d",
1062 					port);
1063 			rte_free(rxq);
1064 			return ret;
1065 		}
1066 		PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
1067 				"\tmbuf_size:\t0x%0x\n"
1068 				"\twqe_skip:\t0x%0x\n"
1069 				"\tfirst_skip:\t0x%0x\n"
1070 				"\tlater_skip:\t0x%0x\n"
1071 				"\tcache_mode:\t%s\n",
1072 				port,
1073 				pktbuf_conf.mbuff_size,
1074 				pktbuf_conf.wqe_skip,
1075 				pktbuf_conf.first_skip,
1076 				pktbuf_conf.later_skip,
1077 				(pktbuf_conf.cache_mode ==
1078 						PKI_OPC_MODE_STT) ?
1079 				"STT" :
1080 				(pktbuf_conf.cache_mode ==
1081 						PKI_OPC_MODE_STF) ?
1082 				"STF" :
1083 				(pktbuf_conf.cache_mode ==
1084 						PKI_OPC_MODE_STF1_STT) ?
1085 				"STF1_STT" : "STF2_STT");
1086 
1087 		if (nic->pki.hash_enable) {
1088 			pki_hash.tag_dlc = 1;
1089 			pki_hash.tag_slc = 1;
1090 			pki_hash.tag_dlf = 1;
1091 			pki_hash.tag_slf = 1;
1092 			pki_hash.tag_prt = 1;
1093 			octeontx_pki_port_hash_config(port, &pki_hash);
1094 		}
1095 
1096 		pool = (uintptr_t)mb_pool->pool_id;
1097 
1098 		/* Get the gaura Id */
1099 		gaura = octeontx_fpa_bufpool_gaura(pool);
1100 
1101 		pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
1102 		pki_qos.num_entry = 1;
1103 		pki_qos.drop_policy = 0;
1104 		pki_qos.tag_type = 0L;
1105 		pki_qos.qos_entry[0].port_add = 0;
1106 		pki_qos.qos_entry[0].gaura = gaura;
1107 		pki_qos.qos_entry[0].ggrp_ok = ev_queues;
1108 		pki_qos.qos_entry[0].ggrp_bad = ev_queues;
1109 		pki_qos.qos_entry[0].grptag_bad = 0;
1110 		pki_qos.qos_entry[0].grptag_ok = 0;
1111 
1112 		ret = octeontx_pki_port_create_qos(port, &pki_qos);
1113 		if (ret < 0) {
1114 			octeontx_log_err("failed to create QOS port=%d, q=%d",
1115 					port, qidx);
1116 			rte_free(rxq);
1117 			return ret;
1118 		}
1119 		nic->pki.initialized = true;
1120 	}
1121 
1122 	rxq->port_id = nic->port_id;
1123 	rxq->eth_dev = dev;
1124 	rxq->queue_id = qidx;
1125 	rxq->evdev = nic->evdev;
1126 	rxq->ev_queues = ev_queues;
1127 	rxq->ev_ports = ev_ports;
1128 	rxq->pool = mb_pool;
1129 
1130 	octeontx_recheck_rx_offloads(rxq);
1131 	dev->data->rx_queues[qidx] = rxq;
1132 	dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
1133 	return 0;
1134 }
1135 
1136 static void
1137 octeontx_dev_rx_queue_release(void *rxq)
1138 {
1139 	rte_free(rxq);
1140 }
1141 
1142 static const uint32_t *
1143 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1144 {
1145 	static const uint32_t ptypes[] = {
1146 		RTE_PTYPE_L3_IPV4,
1147 		RTE_PTYPE_L3_IPV4_EXT,
1148 		RTE_PTYPE_L3_IPV6,
1149 		RTE_PTYPE_L3_IPV6_EXT,
1150 		RTE_PTYPE_L4_TCP,
1151 		RTE_PTYPE_L4_UDP,
1152 		RTE_PTYPE_L4_FRAG,
1153 		RTE_PTYPE_UNKNOWN
1154 	};
1155 
1156 	if (dev->rx_pkt_burst == octeontx_recv_pkts)
1157 		return ptypes;
1158 
1159 	return NULL;
1160 }
1161 
1162 static int
1163 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
1164 {
1165 	RTE_SET_USED(dev);
1166 
1167 	if (!strcmp(pool, "octeontx_fpavf"))
1168 		return 0;
1169 
1170 	return -ENOTSUP;
1171 }
1172 
1173 /* Initialize and register driver with DPDK Application */
1174 static const struct eth_dev_ops octeontx_dev_ops = {
1175 	.dev_configure		 = octeontx_dev_configure,
1176 	.dev_infos_get		 = octeontx_dev_info,
1177 	.dev_close		 = octeontx_dev_close,
1178 	.dev_start		 = octeontx_dev_start,
1179 	.dev_stop		 = octeontx_dev_stop,
1180 	.promiscuous_enable	 = octeontx_dev_promisc_enable,
1181 	.promiscuous_disable	 = octeontx_dev_promisc_disable,
1182 	.link_update		 = octeontx_dev_link_update,
1183 	.stats_get		 = octeontx_dev_stats_get,
1184 	.stats_reset		 = octeontx_dev_stats_reset,
1185 	.mac_addr_remove	 = octeontx_dev_mac_addr_del,
1186 	.mac_addr_add		 = octeontx_dev_mac_addr_add,
1187 	.mac_addr_set		 = octeontx_dev_default_mac_addr_set,
1188 	.tx_queue_start		 = octeontx_dev_tx_queue_start,
1189 	.tx_queue_stop		 = octeontx_dev_tx_queue_stop,
1190 	.tx_queue_setup		 = octeontx_dev_tx_queue_setup,
1191 	.tx_queue_release	 = octeontx_dev_tx_queue_release,
1192 	.rx_queue_setup		 = octeontx_dev_rx_queue_setup,
1193 	.rx_queue_release	 = octeontx_dev_rx_queue_release,
1194 	.dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
1195 	.mtu_set                 = octeontx_dev_mtu_set,
1196 	.pool_ops_supported      = octeontx_pool_ops,
1197 };
1198 
1199 /* Create Ethdev interface per BGX LMAC ports */
1200 static int
1201 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1202 			int socket_id)
1203 {
1204 	int res;
1205 	size_t pko_vfid;
1206 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1207 	struct octeontx_nic *nic = NULL;
1208 	struct rte_eth_dev *eth_dev = NULL;
1209 	struct rte_eth_dev_data *data;
1210 	const char *name = rte_vdev_device_name(dev);
1211 	int max_entries;
1212 
1213 	PMD_INIT_FUNC_TRACE();
1214 
1215 	sprintf(octtx_name, "%s_%d", name, port);
1216 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1217 		eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1218 		if (eth_dev == NULL)
1219 			return -ENODEV;
1220 
1221 		eth_dev->dev_ops = &octeontx_dev_ops;
1222 		eth_dev->device = &dev->device;
1223 		octeontx_set_tx_function(eth_dev);
1224 		eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1225 		rte_eth_dev_probing_finish(eth_dev);
1226 		return 0;
1227 	}
1228 
1229 	/* Reserve an ethdev entry */
1230 	eth_dev = rte_eth_dev_allocate(octtx_name);
1231 	if (eth_dev == NULL) {
1232 		octeontx_log_err("failed to allocate rte_eth_dev");
1233 		res = -ENOMEM;
1234 		goto err;
1235 	}
1236 	data = eth_dev->data;
1237 
1238 	nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1239 	if (nic == NULL) {
1240 		octeontx_log_err("failed to allocate nic structure");
1241 		res = -ENOMEM;
1242 		goto err;
1243 	}
1244 	data->dev_private = nic;
1245 	pko_vfid = octeontx_pko_get_vfid();
1246 
1247 	if (pko_vfid == SIZE_MAX) {
1248 		octeontx_log_err("failed to get pko vfid");
1249 		res = -ENODEV;
1250 		goto err;
1251 	}
1252 
1253 	nic->pko_vfid = pko_vfid;
1254 	nic->port_id = port;
1255 	nic->evdev = evdev;
1256 
1257 	res = octeontx_port_open(nic);
1258 	if (res < 0)
1259 		goto err;
1260 
1261 	/* Rx side port configuration */
1262 	res = octeontx_pki_port_open(port);
1263 	if (res != 0) {
1264 		octeontx_log_err("failed to open PKI port %d", port);
1265 		res = -ENODEV;
1266 		goto err;
1267 	}
1268 
1269 	eth_dev->device = &dev->device;
1270 	eth_dev->intr_handle = NULL;
1271 	eth_dev->data->kdrv = RTE_KDRV_NONE;
1272 	eth_dev->data->numa_node = dev->device.numa_node;
1273 
1274 	data->port_id = eth_dev->data->port_id;
1275 
1276 	nic->ev_queues = 1;
1277 	nic->ev_ports = 1;
1278 
1279 	data->dev_link.link_status = ETH_LINK_DOWN;
1280 	data->dev_started = 0;
1281 	data->promiscuous = 0;
1282 	data->all_multicast = 0;
1283 	data->scattered_rx = 0;
1284 
1285 	/* Get maximum number of supported MAC entries */
1286 	max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id);
1287 	if (max_entries < 0) {
1288 		octeontx_log_err("Failed to get max entries for mac addr");
1289 		res = -ENOTSUP;
1290 		goto err;
1291 	}
1292 
1293 	data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries *
1294 					     RTE_ETHER_ADDR_LEN, 0,
1295 							socket_id);
1296 	if (data->mac_addrs == NULL) {
1297 		octeontx_log_err("failed to allocate memory for mac_addrs");
1298 		res = -ENOMEM;
1299 		goto err;
1300 	}
1301 
1302 	eth_dev->dev_ops = &octeontx_dev_ops;
1303 
1304 	/* Finally save ethdev pointer to the NIC structure */
1305 	nic->dev = eth_dev;
1306 
1307 	if (nic->port_id != data->port_id) {
1308 		octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1309 				data->port_id, nic->port_id);
1310 		res = -EINVAL;
1311 		goto free_mac_addrs;
1312 	}
1313 
1314 	/* Update port_id mac to eth_dev */
1315 	memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1316 
1317 	/* Update same mac address to BGX CAM table at index 0 */
1318 	octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0);
1319 
1320 	PMD_INIT_LOG(DEBUG, "ethdev info: ");
1321 	PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1322 				nic->port_id, nic->port_ena,
1323 				nic->base_ochan, nic->num_ochans,
1324 				nic->num_tx_queues);
1325 	PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu);
1326 
1327 	rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1328 		[(nic->base_ochan >> 4) & 0xF] = data->port_id;
1329 
1330 	rte_eth_dev_probing_finish(eth_dev);
1331 	return data->port_id;
1332 
1333 free_mac_addrs:
1334 	rte_free(data->mac_addrs);
1335 err:
1336 	if (nic)
1337 		octeontx_port_close(nic);
1338 
1339 	rte_eth_dev_release_port(eth_dev);
1340 
1341 	return res;
1342 }
1343 
1344 /* Un initialize octeontx device */
1345 static int
1346 octeontx_remove(struct rte_vdev_device *dev)
1347 {
1348 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1349 	struct rte_eth_dev *eth_dev = NULL;
1350 	struct octeontx_nic *nic = NULL;
1351 	int i;
1352 
1353 	if (dev == NULL)
1354 		return -EINVAL;
1355 
1356 	for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1357 		sprintf(octtx_name, "eth_octeontx_%d", i);
1358 
1359 		/* reserve an ethdev entry */
1360 		eth_dev = rte_eth_dev_allocated(octtx_name);
1361 		if (eth_dev == NULL)
1362 			return -ENODEV;
1363 
1364 		if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1365 			rte_eth_dev_release_port(eth_dev);
1366 			continue;
1367 		}
1368 
1369 		nic = octeontx_pmd_priv(eth_dev);
1370 		rte_event_dev_stop(nic->evdev);
1371 		PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1372 
1373 		rte_eth_dev_release_port(eth_dev);
1374 		rte_event_dev_close(nic->evdev);
1375 	}
1376 
1377 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1378 		return 0;
1379 
1380 	/* Free FC resource */
1381 	octeontx_pko_fc_free();
1382 
1383 	return 0;
1384 }
1385 
1386 /* Initialize octeontx device */
1387 static int
1388 octeontx_probe(struct rte_vdev_device *dev)
1389 {
1390 	const char *dev_name;
1391 	static int probe_once;
1392 	uint8_t socket_id, qlist;
1393 	int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1394 	struct rte_event_dev_config dev_conf;
1395 	const char *eventdev_name = "event_octeontx";
1396 	struct rte_event_dev_info info;
1397 	struct rte_eth_dev *eth_dev;
1398 
1399 	struct octeontx_vdev_init_params init_params = {
1400 		OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1401 	};
1402 
1403 	dev_name = rte_vdev_device_name(dev);
1404 
1405 	if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1406 	    strlen(rte_vdev_device_args(dev)) == 0) {
1407 		eth_dev = rte_eth_dev_attach_secondary(dev_name);
1408 		if (!eth_dev) {
1409 			PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1410 			return -1;
1411 		}
1412 		/* TODO: request info from primary to set up Rx and Tx */
1413 		eth_dev->dev_ops = &octeontx_dev_ops;
1414 		eth_dev->device = &dev->device;
1415 		rte_eth_dev_probing_finish(eth_dev);
1416 		return 0;
1417 	}
1418 
1419 	res = octeontx_parse_vdev_init_params(&init_params, dev);
1420 	if (res < 0)
1421 		return -EINVAL;
1422 
1423 	if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1424 		octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1425 				OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1426 		return -ENOTSUP;
1427 	}
1428 
1429 	PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1430 
1431 	socket_id = rte_socket_id();
1432 
1433 	tx_vfcnt = octeontx_pko_vf_count();
1434 
1435 	if (tx_vfcnt < init_params.nr_port) {
1436 		octeontx_log_err("not enough PKO (%d) for port number (%d)",
1437 				tx_vfcnt, init_params.nr_port);
1438 		return -EINVAL;
1439 	}
1440 	evdev = rte_event_dev_get_dev_id(eventdev_name);
1441 	if (evdev < 0) {
1442 		octeontx_log_err("eventdev %s not found", eventdev_name);
1443 		return -ENODEV;
1444 	}
1445 
1446 	res = rte_event_dev_info_get(evdev, &info);
1447 	if (res < 0) {
1448 		octeontx_log_err("failed to eventdev info %d", res);
1449 		return -EINVAL;
1450 	}
1451 
1452 	PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1453 			info.max_event_queues, info.max_event_ports);
1454 
1455 	if (octeontx_pko_init_fc(tx_vfcnt))
1456 		return -ENOMEM;
1457 
1458 	devconf_set_default_sane_values(&dev_conf, &info);
1459 	res = rte_event_dev_configure(evdev, &dev_conf);
1460 	if (res < 0)
1461 		goto parse_error;
1462 
1463 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1464 			(uint32_t *)&pnum);
1465 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1466 			(uint32_t *)&qnum);
1467 	if (pnum < qnum) {
1468 		octeontx_log_err("too few event ports (%d) for event_q(%d)",
1469 				pnum, qnum);
1470 		res = -EINVAL;
1471 		goto parse_error;
1472 	}
1473 
1474 	/* Enable all queues available */
1475 	for (i = 0; i < qnum; i++) {
1476 		res = rte_event_queue_setup(evdev, i, NULL);
1477 		if (res < 0) {
1478 			octeontx_log_err("failed to setup event_q(%d): res %d",
1479 					i, res);
1480 			goto parse_error;
1481 		}
1482 	}
1483 
1484 	/* Enable all ports available */
1485 	for (i = 0; i < pnum; i++) {
1486 		res = rte_event_port_setup(evdev, i, NULL);
1487 		if (res < 0) {
1488 			res = -ENODEV;
1489 			octeontx_log_err("failed to setup ev port(%d) res=%d",
1490 						i, res);
1491 			goto parse_error;
1492 		}
1493 	}
1494 
1495 	/*
1496 	 * Do 1:1 links for ports & queues. All queues would be mapped to
1497 	 * one port. If there are more ports than queues, then some ports
1498 	 * won't be linked to any queue.
1499 	 */
1500 	for (i = 0; i < qnum; i++) {
1501 		/* Link one queue to one event port */
1502 		qlist = i;
1503 		res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1504 		if (res < 0) {
1505 			res = -ENODEV;
1506 			octeontx_log_err("failed to link port (%d): res=%d",
1507 					i, res);
1508 			goto parse_error;
1509 		}
1510 	}
1511 
1512 	/* Create ethdev interface */
1513 	for (i = 0; i < init_params.nr_port; i++) {
1514 		port_id = octeontx_create(dev, i, evdev, socket_id);
1515 		if (port_id < 0) {
1516 			octeontx_log_err("failed to create device %s",
1517 					dev_name);
1518 			res = -ENODEV;
1519 			goto parse_error;
1520 		}
1521 
1522 		PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1523 					port_id);
1524 	}
1525 
1526 	if (probe_once) {
1527 		octeontx_log_err("interface %s not supported", dev_name);
1528 		octeontx_remove(dev);
1529 		res = -ENOTSUP;
1530 		goto parse_error;
1531 	}
1532 	rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1533 	probe_once = 1;
1534 
1535 	return 0;
1536 
1537 parse_error:
1538 	octeontx_pko_fc_free();
1539 	return res;
1540 }
1541 
1542 static struct rte_vdev_driver octeontx_pmd_drv = {
1543 	.probe = octeontx_probe,
1544 	.remove = octeontx_remove,
1545 };
1546 
1547 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1548 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1549 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");
1550