1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <eventdev_pmd.h> 13 #include <rte_alarm.h> 14 #include <rte_branch_prediction.h> 15 #include <rte_bus_vdev.h> 16 #include <rte_cycles.h> 17 #include <rte_debug.h> 18 #include <rte_dev.h> 19 #include <rte_devargs.h> 20 #include <rte_kvargs.h> 21 #include <rte_malloc.h> 22 #include <rte_mbuf_pool_ops.h> 23 #include <rte_prefetch.h> 24 25 #include "octeontx_ethdev.h" 26 #include "octeontx_rxtx.h" 27 #include "octeontx_logs.h" 28 29 struct evdev_priv_data { 30 OFFLOAD_FLAGS; /*Sequence should not be changed */ 31 } __rte_cache_aligned; 32 33 struct octeontx_vdev_init_params { 34 uint8_t nr_port; 35 }; 36 37 uint16_t 38 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 39 40 enum octeontx_link_speed { 41 OCTEONTX_LINK_SPEED_SGMII, 42 OCTEONTX_LINK_SPEED_XAUI, 43 OCTEONTX_LINK_SPEED_RXAUI, 44 OCTEONTX_LINK_SPEED_10G_R, 45 OCTEONTX_LINK_SPEED_40G_R, 46 OCTEONTX_LINK_SPEED_RESERVE1, 47 OCTEONTX_LINK_SPEED_QSGMII, 48 OCTEONTX_LINK_SPEED_RESERVE2 49 }; 50 51 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_mbox, mbox, NOTICE); 52 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_init, init, NOTICE); 53 RTE_LOG_REGISTER_SUFFIX(otx_net_logtype_driver, driver, NOTICE); 54 55 /* Parse integer from integer argument */ 56 static int 57 parse_integer_arg(const char *key __rte_unused, 58 const char *value, void *extra_args) 59 { 60 int *i = (int *)extra_args; 61 62 *i = atoi(value); 63 if (*i < 0) { 64 octeontx_log_err("argument has to be positive."); 65 return -1; 66 } 67 68 return 0; 69 } 70 71 static int 72 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 73 struct rte_vdev_device *dev) 74 { 75 struct rte_kvargs *kvlist = NULL; 76 int ret = 0; 77 78 static const char * const octeontx_vdev_valid_params[] = { 79 OCTEONTX_VDEV_NR_PORT_ARG, 80 NULL 81 }; 82 83 const char *input_args = rte_vdev_device_args(dev); 84 if (params == NULL) 85 return -EINVAL; 86 87 88 if (input_args) { 89 kvlist = rte_kvargs_parse(input_args, 90 octeontx_vdev_valid_params); 91 if (kvlist == NULL) 92 return -1; 93 94 ret = rte_kvargs_process(kvlist, 95 OCTEONTX_VDEV_NR_PORT_ARG, 96 &parse_integer_arg, 97 ¶ms->nr_port); 98 if (ret < 0) 99 goto free_kvlist; 100 } 101 102 free_kvlist: 103 rte_kvargs_free(kvlist); 104 return ret; 105 } 106 107 static int 108 octeontx_port_open(struct octeontx_nic *nic) 109 { 110 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 111 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg; 112 int res; 113 114 res = 0; 115 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 116 PMD_INIT_FUNC_TRACE(); 117 118 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 119 if (res < 0) { 120 octeontx_log_err("failed to open port %d", res); 121 return res; 122 } 123 124 nic->node = bgx_port_conf.node; 125 nic->port_ena = bgx_port_conf.enable; 126 nic->base_ichan = bgx_port_conf.base_chan; 127 nic->base_ochan = bgx_port_conf.base_chan; 128 nic->num_ichans = bgx_port_conf.num_chans; 129 nic->num_ochans = bgx_port_conf.num_chans; 130 nic->bgx_mtu = bgx_port_conf.mtu; 131 nic->bpen = bgx_port_conf.bpen; 132 nic->fcs_strip = bgx_port_conf.fcs_strip; 133 nic->bcast_mode = bgx_port_conf.bcast_mode; 134 nic->mcast_mode = bgx_port_conf.mcast_mode; 135 nic->speed = bgx_port_conf.mode; 136 137 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg)); 138 139 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg); 140 if (res < 0) { 141 octeontx_log_err("failed to get port %d fifo cfg", res); 142 return res; 143 } 144 145 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz; 146 147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 148 RTE_ETHER_ADDR_LEN); 149 150 octeontx_log_dbg("port opened %d", nic->port_id); 151 return res; 152 } 153 154 static void 155 octeontx_link_status_print(struct rte_eth_dev *eth_dev, 156 struct rte_eth_link *link) 157 { 158 if (link && link->link_status) 159 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s", 160 (eth_dev->data->port_id), 161 link->link_speed, 162 link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX ? 163 "full-duplex" : "half-duplex"); 164 else 165 octeontx_log_info("Port %d: Link Down", 166 (int)(eth_dev->data->port_id)); 167 } 168 169 static void 170 octeontx_link_status_update(struct octeontx_nic *nic, 171 struct rte_eth_link *link) 172 { 173 memset(link, 0, sizeof(*link)); 174 175 link->link_status = nic->link_up ? RTE_ETH_LINK_UP : RTE_ETH_LINK_DOWN; 176 177 switch (nic->speed) { 178 case OCTEONTX_LINK_SPEED_SGMII: 179 link->link_speed = RTE_ETH_SPEED_NUM_1G; 180 break; 181 182 case OCTEONTX_LINK_SPEED_XAUI: 183 link->link_speed = RTE_ETH_SPEED_NUM_10G; 184 break; 185 186 case OCTEONTX_LINK_SPEED_RXAUI: 187 case OCTEONTX_LINK_SPEED_10G_R: 188 link->link_speed = RTE_ETH_SPEED_NUM_10G; 189 break; 190 case OCTEONTX_LINK_SPEED_QSGMII: 191 link->link_speed = RTE_ETH_SPEED_NUM_5G; 192 break; 193 case OCTEONTX_LINK_SPEED_40G_R: 194 link->link_speed = RTE_ETH_SPEED_NUM_40G; 195 break; 196 197 case OCTEONTX_LINK_SPEED_RESERVE1: 198 case OCTEONTX_LINK_SPEED_RESERVE2: 199 default: 200 link->link_speed = RTE_ETH_SPEED_NUM_NONE; 201 octeontx_log_err("incorrect link speed %d", nic->speed); 202 break; 203 } 204 205 link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX; 206 link->link_autoneg = RTE_ETH_LINK_AUTONEG; 207 } 208 209 static void 210 octeontx_link_status_poll(void *arg) 211 { 212 struct octeontx_nic *nic = arg; 213 struct rte_eth_link link; 214 struct rte_eth_dev *dev; 215 int res; 216 217 PMD_INIT_FUNC_TRACE(); 218 219 dev = nic->dev; 220 221 res = octeontx_bgx_port_link_status(nic->port_id); 222 if (res < 0) { 223 octeontx_log_err("Failed to get port %d link status", 224 nic->port_id); 225 } else { 226 if (nic->link_up != (uint8_t)res) { 227 nic->link_up = (uint8_t)res; 228 octeontx_link_status_update(nic, &link); 229 octeontx_link_status_print(dev, &link); 230 rte_eth_linkstatus_set(dev, &link); 231 rte_eth_dev_callback_process(dev, 232 RTE_ETH_EVENT_INTR_LSC, 233 NULL); 234 } 235 } 236 237 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 238 octeontx_link_status_poll, nic); 239 if (res < 0) 240 octeontx_log_err("Failed to restart alarm for port %d, err: %d", 241 nic->port_id, res); 242 } 243 244 static void 245 octeontx_port_close(struct octeontx_nic *nic) 246 { 247 PMD_INIT_FUNC_TRACE(); 248 249 rte_eal_alarm_cancel(octeontx_link_status_poll, nic); 250 octeontx_bgx_port_close(nic->port_id); 251 octeontx_log_dbg("port closed %d", nic->port_id); 252 } 253 254 static int 255 octeontx_port_start(struct octeontx_nic *nic) 256 { 257 PMD_INIT_FUNC_TRACE(); 258 259 return octeontx_bgx_port_start(nic->port_id); 260 } 261 262 static int 263 octeontx_port_stop(struct octeontx_nic *nic) 264 { 265 PMD_INIT_FUNC_TRACE(); 266 267 return octeontx_bgx_port_stop(nic->port_id); 268 } 269 270 static int 271 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 272 { 273 struct rte_eth_dev *dev; 274 int res; 275 276 res = 0; 277 PMD_INIT_FUNC_TRACE(); 278 dev = nic->dev; 279 280 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 281 if (res < 0) { 282 octeontx_log_err("failed to set promiscuous mode %d", 283 nic->port_id); 284 return res; 285 } 286 287 /* Set proper flag for the mode */ 288 dev->data->promiscuous = (en != 0) ? 1 : 0; 289 290 octeontx_log_dbg("port %d : promiscuous mode %s", 291 nic->port_id, en ? "set" : "unset"); 292 293 return 0; 294 } 295 296 static int 297 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 298 { 299 octeontx_mbox_bgx_port_stats_t bgx_stats; 300 int res; 301 302 PMD_INIT_FUNC_TRACE(); 303 304 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 305 if (res < 0) { 306 octeontx_log_err("failed to get port stats %d", nic->port_id); 307 return res; 308 } 309 310 stats->ipackets = bgx_stats.rx_packets; 311 stats->ibytes = bgx_stats.rx_bytes; 312 stats->imissed = bgx_stats.rx_dropped; 313 stats->ierrors = bgx_stats.rx_errors; 314 stats->opackets = bgx_stats.tx_packets; 315 stats->obytes = bgx_stats.tx_bytes; 316 stats->oerrors = bgx_stats.tx_errors; 317 318 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 319 nic->port_id, stats->ipackets, stats->opackets); 320 321 return 0; 322 } 323 324 static int 325 octeontx_port_stats_clr(struct octeontx_nic *nic) 326 { 327 PMD_INIT_FUNC_TRACE(); 328 329 return octeontx_bgx_port_stats_clr(nic->port_id); 330 } 331 332 static inline void 333 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 334 struct rte_event_dev_info *info) 335 { 336 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 337 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 338 339 dev_conf->nb_event_ports = info->max_event_ports; 340 dev_conf->nb_event_queues = info->max_event_queues; 341 342 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 343 dev_conf->nb_event_port_dequeue_depth = 344 info->max_event_port_dequeue_depth; 345 dev_conf->nb_event_port_enqueue_depth = 346 info->max_event_port_enqueue_depth; 347 dev_conf->nb_event_port_enqueue_depth = 348 info->max_event_port_enqueue_depth; 349 dev_conf->nb_events_limit = 350 info->max_num_events; 351 } 352 353 static uint16_t 354 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 355 { 356 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 357 uint16_t flags = 0; 358 359 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM || 360 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM) 361 flags |= OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F; 362 363 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM || 364 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_TCP_CKSUM || 365 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_UDP_CKSUM || 366 nic->tx_offloads & RTE_ETH_TX_OFFLOAD_SCTP_CKSUM) 367 flags |= OCCTX_TX_OFFLOAD_L3_L4_CSUM_F; 368 369 if (!(nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE)) 370 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F; 371 372 if (nic->tx_offloads & RTE_ETH_TX_OFFLOAD_MULTI_SEGS) 373 flags |= OCCTX_TX_MULTI_SEG_F; 374 375 return flags; 376 } 377 378 static uint16_t 379 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 380 { 381 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 382 uint16_t flags = 0; 383 384 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_TCP_CKSUM | 385 RTE_ETH_RX_OFFLOAD_UDP_CKSUM)) 386 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 387 388 if (nic->rx_offloads & (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | 389 RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM)) 390 flags |= OCCTX_RX_OFFLOAD_CSUM_F; 391 392 if (nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) { 393 flags |= OCCTX_RX_MULTI_SEG_F; 394 eth_dev->data->scattered_rx = 1; 395 /* If scatter mode is enabled, TX should also be in multi 396 * seg mode, else memory leak will occur 397 */ 398 nic->tx_offloads |= RTE_ETH_TX_OFFLOAD_MULTI_SEGS; 399 } 400 401 return flags; 402 } 403 404 static int 405 octeontx_dev_configure(struct rte_eth_dev *dev) 406 { 407 struct rte_eth_dev_data *data = dev->data; 408 struct rte_eth_conf *conf = &data->dev_conf; 409 struct rte_eth_rxmode *rxmode = &conf->rxmode; 410 struct rte_eth_txmode *txmode = &conf->txmode; 411 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 412 int ret; 413 414 PMD_INIT_FUNC_TRACE(); 415 RTE_SET_USED(conf); 416 417 if (!rte_eal_has_hugepages()) { 418 octeontx_log_err("huge page is not configured"); 419 return -EINVAL; 420 } 421 422 if (txmode->mq_mode) { 423 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 424 return -EINVAL; 425 } 426 427 if (rxmode->mq_mode != RTE_ETH_MQ_RX_NONE && 428 rxmode->mq_mode != RTE_ETH_MQ_RX_RSS) { 429 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 430 return -EINVAL; 431 } 432 433 if (!(txmode->offloads & RTE_ETH_TX_OFFLOAD_MT_LOCKFREE)) { 434 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 435 txmode->offloads |= RTE_ETH_TX_OFFLOAD_MT_LOCKFREE; 436 } 437 438 if (conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) { 439 octeontx_log_err("setting link speed/duplex not supported"); 440 return -EINVAL; 441 } 442 443 if (conf->dcb_capability_en) { 444 octeontx_log_err("DCB enable not supported"); 445 return -EINVAL; 446 } 447 448 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 449 octeontx_log_err("flow director not supported"); 450 return -EINVAL; 451 } 452 453 nic->num_tx_queues = dev->data->nb_tx_queues; 454 455 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 456 nic->num_tx_queues, 457 nic->base_ochan); 458 if (ret) { 459 octeontx_log_err("failed to open channel %d no-of-txq %d", 460 nic->base_ochan, nic->num_tx_queues); 461 return -EFAULT; 462 } 463 464 ret = octeontx_dev_vlan_offload_init(dev); 465 if (ret) { 466 octeontx_log_err("failed to initialize vlan offload"); 467 return -EFAULT; 468 } 469 470 nic->pki.classifier_enable = false; 471 nic->pki.hash_enable = true; 472 nic->pki.initialized = false; 473 474 nic->rx_offloads |= rxmode->offloads; 475 nic->tx_offloads |= txmode->offloads; 476 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 477 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 478 479 return 0; 480 } 481 482 static int 483 octeontx_dev_close(struct rte_eth_dev *dev) 484 { 485 struct octeontx_txq *txq = NULL; 486 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 487 unsigned int i; 488 int ret; 489 490 PMD_INIT_FUNC_TRACE(); 491 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 492 return 0; 493 494 rte_event_dev_close(nic->evdev); 495 496 octeontx_dev_flow_ctrl_fini(dev); 497 498 octeontx_dev_vlan_offload_fini(dev); 499 500 ret = octeontx_pko_channel_close(nic->base_ochan); 501 if (ret < 0) { 502 octeontx_log_err("failed to close channel %d VF%d %d %d", 503 nic->base_ochan, nic->port_id, nic->num_tx_queues, 504 ret); 505 } 506 /* Free txq resources for this port */ 507 for (i = 0; i < nic->num_tx_queues; i++) { 508 txq = dev->data->tx_queues[i]; 509 if (!txq) 510 continue; 511 512 rte_free(txq); 513 } 514 515 octeontx_port_close(nic); 516 517 return 0; 518 } 519 520 static int 521 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 522 { 523 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD; 524 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 525 struct rte_eth_dev_data *data = eth_dev->data; 526 int rc = 0; 527 528 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; 529 530 /* Refuse MTU that requires the support of scattered packets 531 * when this feature has not been enabled before. 532 */ 533 if (data->dev_started && frame_size > buffsz && 534 !(nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER)) { 535 octeontx_log_err("Scatter mode is disabled"); 536 return -EINVAL; 537 } 538 539 /* Check <seg size> * <max_seg> >= max_frame */ 540 if ((nic->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) && 541 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX)) 542 return -EINVAL; 543 544 rc = octeontx_pko_send_mtu(nic->port_id, frame_size); 545 if (rc) 546 return rc; 547 548 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size); 549 if (rc) 550 return rc; 551 552 octeontx_log_info("Received pkt beyond maxlen %d will be dropped", 553 frame_size); 554 555 return rc; 556 } 557 558 static int 559 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 560 { 561 struct rte_eth_dev *eth_dev = rxq->eth_dev; 562 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 563 struct rte_eth_dev_data *data = eth_dev->data; 564 struct rte_pktmbuf_pool_private *mbp_priv; 565 struct evdev_priv_data *evdev_priv; 566 struct rte_eventdev *dev; 567 uint32_t buffsz; 568 569 /* Get rx buffer size */ 570 mbp_priv = rte_mempool_get_priv(rxq->pool); 571 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 572 573 /* Setup scatter mode if needed by jumbo */ 574 if (data->mtu > buffsz) { 575 nic->rx_offloads |= RTE_ETH_RX_OFFLOAD_SCATTER; 576 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 577 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 578 } 579 580 /* Sharing offload flags via eventdev priv region */ 581 dev = &rte_eventdevs[rxq->evdev]; 582 evdev_priv = dev->data->dev_private; 583 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 584 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 585 586 /* Setup MTU */ 587 nic->mtu = data->mtu; 588 589 return 0; 590 } 591 592 static int 593 octeontx_dev_start(struct rte_eth_dev *dev) 594 { 595 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 596 struct octeontx_rxq *rxq; 597 int ret, i; 598 599 PMD_INIT_FUNC_TRACE(); 600 /* Rechecking if any new offload set to update 601 * rx/tx burst function pointer accordingly. 602 */ 603 for (i = 0; i < dev->data->nb_rx_queues; i++) { 604 rxq = dev->data->rx_queues[i]; 605 octeontx_recheck_rx_offloads(rxq); 606 } 607 608 /* Setting up the mtu */ 609 ret = octeontx_dev_mtu_set(dev, nic->mtu); 610 if (ret) { 611 octeontx_log_err("Failed to set default MTU size %d", ret); 612 goto error; 613 } 614 615 /* 616 * Tx start 617 */ 618 octeontx_set_tx_function(dev); 619 ret = octeontx_pko_channel_start(nic->base_ochan); 620 if (ret < 0) { 621 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 622 nic->port_id, nic->num_tx_queues, nic->base_ochan, 623 ret); 624 goto error; 625 } 626 627 /* 628 * Rx start 629 */ 630 dev->rx_pkt_burst = octeontx_recv_pkts; 631 ret = octeontx_pki_port_start(nic->port_id); 632 if (ret < 0) { 633 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 634 goto channel_stop_error; 635 } 636 637 /* 638 * Start port 639 */ 640 ret = octeontx_port_start(nic); 641 if (ret < 0) { 642 octeontx_log_err("failed start port %d", ret); 643 goto pki_port_stop_error; 644 } 645 646 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 647 nic->base_ochan, nic->num_tx_queues, nic->port_id); 648 649 ret = rte_event_dev_start(nic->evdev); 650 if (ret < 0) { 651 octeontx_log_err("failed to start evdev: ret (%d)", ret); 652 goto pki_port_stop_error; 653 } 654 655 /* Success */ 656 return ret; 657 658 pki_port_stop_error: 659 octeontx_pki_port_stop(nic->port_id); 660 channel_stop_error: 661 octeontx_pko_channel_stop(nic->base_ochan); 662 error: 663 return ret; 664 } 665 666 static int 667 octeontx_dev_stop(struct rte_eth_dev *dev) 668 { 669 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 670 int ret; 671 672 PMD_INIT_FUNC_TRACE(); 673 674 rte_event_dev_stop(nic->evdev); 675 676 ret = octeontx_port_stop(nic); 677 if (ret < 0) { 678 octeontx_log_err("failed to req stop port %d res=%d", 679 nic->port_id, ret); 680 return ret; 681 } 682 683 ret = octeontx_pki_port_stop(nic->port_id); 684 if (ret < 0) { 685 octeontx_log_err("failed to stop pki port %d res=%d", 686 nic->port_id, ret); 687 return ret; 688 } 689 690 ret = octeontx_pko_channel_stop(nic->base_ochan); 691 if (ret < 0) { 692 octeontx_log_err("failed to stop channel %d VF%d %d %d", 693 nic->base_ochan, nic->port_id, nic->num_tx_queues, 694 ret); 695 return ret; 696 } 697 698 return 0; 699 } 700 701 static int 702 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 703 { 704 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 705 706 PMD_INIT_FUNC_TRACE(); 707 return octeontx_port_promisc_set(nic, 1); 708 } 709 710 static int 711 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 712 { 713 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 714 715 PMD_INIT_FUNC_TRACE(); 716 return octeontx_port_promisc_set(nic, 0); 717 } 718 719 static int 720 octeontx_port_link_status(struct octeontx_nic *nic) 721 { 722 int res; 723 724 PMD_INIT_FUNC_TRACE(); 725 res = octeontx_bgx_port_link_status(nic->port_id); 726 if (res < 0) { 727 octeontx_log_err("failed to get port %d link status", 728 nic->port_id); 729 return res; 730 } 731 732 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) { 733 nic->link_up = (uint8_t)res; 734 nic->print_flag = 1; 735 } 736 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 737 738 return res; 739 } 740 741 /* 742 * Return 0 means link status changed, -1 means not changed 743 */ 744 static int 745 octeontx_dev_link_update(struct rte_eth_dev *dev, 746 int wait_to_complete __rte_unused) 747 { 748 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 749 struct rte_eth_link link; 750 int res; 751 752 PMD_INIT_FUNC_TRACE(); 753 754 res = octeontx_port_link_status(nic); 755 if (res < 0) { 756 octeontx_log_err("failed to request link status %d", res); 757 return res; 758 } 759 760 octeontx_link_status_update(nic, &link); 761 if (nic->print_flag) { 762 octeontx_link_status_print(nic->dev, &link); 763 nic->print_flag = 0; 764 } 765 766 return rte_eth_linkstatus_set(dev, &link); 767 } 768 769 static int 770 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 771 { 772 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 773 774 PMD_INIT_FUNC_TRACE(); 775 return octeontx_port_stats(nic, stats); 776 } 777 778 static int 779 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 780 { 781 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 782 783 PMD_INIT_FUNC_TRACE(); 784 return octeontx_port_stats_clr(nic); 785 } 786 787 static void 788 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 789 { 790 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 791 int ret; 792 793 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 794 if (ret != 0) 795 octeontx_log_err("failed to del MAC address filter on port %d", 796 nic->port_id); 797 } 798 799 static int 800 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 801 struct rte_ether_addr *mac_addr, 802 uint32_t index, 803 __rte_unused uint32_t vmdq) 804 { 805 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 806 int ret; 807 808 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 809 index); 810 if (ret < 0) { 811 octeontx_log_err("failed to add MAC address filter on port %d", 812 nic->port_id); 813 return ret; 814 } 815 816 return 0; 817 } 818 819 static int 820 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 821 struct rte_ether_addr *addr) 822 { 823 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 824 int ret; 825 826 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 827 if (ret == 0) { 828 /* Update same mac address to BGX CAM table */ 829 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 830 0); 831 } 832 if (ret < 0) { 833 octeontx_log_err("failed to set MAC address on port %d", 834 nic->port_id); 835 } 836 837 return ret; 838 } 839 840 static int 841 octeontx_dev_info(struct rte_eth_dev *dev, 842 struct rte_eth_dev_info *dev_info) 843 { 844 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 845 846 /* Autonegotiation may be disabled */ 847 dev_info->speed_capa = RTE_ETH_LINK_SPEED_FIXED; 848 dev_info->speed_capa |= RTE_ETH_LINK_SPEED_10M | RTE_ETH_LINK_SPEED_100M | 849 RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_10G | 850 RTE_ETH_LINK_SPEED_40G; 851 852 /* Min/Max MTU supported */ 853 dev_info->min_rx_bufsize = OCCTX_MIN_FRS; 854 dev_info->max_rx_pktlen = OCCTX_MAX_FRS; 855 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD; 856 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD; 857 858 dev_info->max_mac_addrs = 859 octeontx_bgx_port_mac_entries_get(nic->port_id); 860 dev_info->max_rx_queues = 1; 861 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 862 dev_info->min_rx_bufsize = 0; 863 864 dev_info->default_rxconf = (struct rte_eth_rxconf) { 865 .rx_free_thresh = 0, 866 .rx_drop_en = 0, 867 .offloads = OCTEONTX_RX_OFFLOADS, 868 }; 869 870 dev_info->default_txconf = (struct rte_eth_txconf) { 871 .tx_free_thresh = 0, 872 .offloads = OCTEONTX_TX_OFFLOADS, 873 }; 874 875 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 876 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 877 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 878 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 879 880 return 0; 881 } 882 883 static void 884 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 885 { 886 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 887 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 888 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 889 } 890 891 static int 892 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 893 uint16_t qidx) 894 { 895 struct octeontx_txq *txq; 896 int res; 897 898 PMD_INIT_FUNC_TRACE(); 899 900 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 901 return 0; 902 903 txq = dev->data->tx_queues[qidx]; 904 905 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 906 &txq->dq, 907 sizeof(octeontx_dq_t), 908 txq->queue_id, 909 octeontx_dq_info_getter); 910 if (res < 0) { 911 res = -EFAULT; 912 goto close_port; 913 } 914 915 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 916 return res; 917 918 close_port: 919 (void)octeontx_port_stop(nic); 920 octeontx_pko_channel_stop(nic->base_ochan); 921 octeontx_pko_channel_close(nic->base_ochan); 922 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 923 return res; 924 } 925 926 int 927 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 928 { 929 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 930 931 PMD_INIT_FUNC_TRACE(); 932 qidx = qidx % PKO_VF_NUM_DQ; 933 return octeontx_vf_start_tx_queue(dev, nic, qidx); 934 } 935 936 static inline int 937 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 938 uint16_t qidx) 939 { 940 int ret = 0; 941 942 RTE_SET_USED(nic); 943 PMD_INIT_FUNC_TRACE(); 944 945 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 946 return 0; 947 948 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 949 return ret; 950 } 951 952 int 953 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 954 { 955 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 956 957 PMD_INIT_FUNC_TRACE(); 958 qidx = qidx % PKO_VF_NUM_DQ; 959 960 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 961 } 962 963 static void 964 octeontx_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 965 { 966 int res; 967 968 PMD_INIT_FUNC_TRACE(); 969 970 if (dev->data->tx_queues[qid]) { 971 res = octeontx_dev_tx_queue_stop(dev, qid); 972 if (res < 0) 973 octeontx_log_err("failed stop tx_queue(%d)\n", qid); 974 975 rte_free(dev->data->tx_queues[qid]); 976 } 977 } 978 979 static int 980 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 981 uint16_t nb_desc, unsigned int socket_id, 982 const struct rte_eth_txconf *tx_conf __rte_unused) 983 { 984 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 985 struct octeontx_txq *txq = NULL; 986 uint16_t dq_num; 987 int res = 0; 988 989 RTE_SET_USED(nb_desc); 990 RTE_SET_USED(socket_id); 991 992 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 993 994 /* Socket id check */ 995 if (socket_id != (unsigned int)SOCKET_ID_ANY && 996 socket_id != (unsigned int)nic->node) 997 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 998 socket_id, nic->node); 999 1000 /* Free memory prior to re-allocation if needed. */ 1001 if (dev->data->tx_queues[qidx] != NULL) { 1002 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 1003 qidx); 1004 octeontx_dev_tx_queue_release(dev, qidx); 1005 dev->data->tx_queues[qidx] = NULL; 1006 } 1007 1008 /* Allocating tx queue data structure */ 1009 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 1010 RTE_CACHE_LINE_SIZE, nic->node); 1011 if (txq == NULL) { 1012 octeontx_log_err("failed to allocate txq=%d", qidx); 1013 res = -ENOMEM; 1014 goto err; 1015 } 1016 1017 txq->eth_dev = dev; 1018 txq->queue_id = dq_num; 1019 dev->data->tx_queues[qidx] = txq; 1020 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1021 1022 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1023 &txq->dq, 1024 sizeof(octeontx_dq_t), 1025 txq->queue_id, 1026 octeontx_dq_info_getter); 1027 if (res < 0) { 1028 res = -EFAULT; 1029 goto err; 1030 } 1031 1032 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 1033 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 1034 txq->dq.ioreg_va, 1035 txq->dq.fc_status_va); 1036 1037 return res; 1038 1039 err: 1040 rte_free(txq); 1041 1042 return res; 1043 } 1044 1045 static int 1046 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1047 uint16_t nb_desc, unsigned int socket_id, 1048 const struct rte_eth_rxconf *rx_conf, 1049 struct rte_mempool *mb_pool) 1050 { 1051 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1052 struct rte_mempool_ops *mp_ops = NULL; 1053 struct octeontx_rxq *rxq = NULL; 1054 pki_pktbuf_cfg_t pktbuf_conf; 1055 pki_hash_cfg_t pki_hash; 1056 pki_qos_cfg_t pki_qos; 1057 uintptr_t pool; 1058 int ret, port; 1059 uint16_t gaura; 1060 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 1061 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 1062 1063 RTE_SET_USED(nb_desc); 1064 1065 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 1066 memset(&pki_hash, 0, sizeof(pki_hash)); 1067 memset(&pki_qos, 0, sizeof(pki_qos)); 1068 1069 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 1070 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 1071 octeontx_log_err("failed to find octeontx_fpavf mempool"); 1072 return -ENOTSUP; 1073 } 1074 1075 /* Handle forbidden configurations */ 1076 if (nic->pki.classifier_enable) { 1077 octeontx_log_err("cannot setup queue %d. " 1078 "Classifier option unsupported", qidx); 1079 return -EINVAL; 1080 } 1081 1082 port = nic->port_id; 1083 1084 /* Rx deferred start is not supported */ 1085 if (rx_conf->rx_deferred_start) { 1086 octeontx_log_err("rx deferred start not supported"); 1087 return -EINVAL; 1088 } 1089 1090 /* Verify queue index */ 1091 if (qidx >= dev->data->nb_rx_queues) { 1092 octeontx_log_err("QID %d not supported (0 - %d available)\n", 1093 qidx, (dev->data->nb_rx_queues - 1)); 1094 return -ENOTSUP; 1095 } 1096 1097 /* Socket id check */ 1098 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1099 socket_id != (unsigned int)nic->node) 1100 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 1101 socket_id, nic->node); 1102 1103 /* Allocating rx queue data structure */ 1104 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 1105 RTE_CACHE_LINE_SIZE, nic->node); 1106 if (rxq == NULL) { 1107 octeontx_log_err("failed to allocate rxq=%d", qidx); 1108 return -ENOMEM; 1109 } 1110 1111 if (!nic->pki.initialized) { 1112 pktbuf_conf.port_type = 0; 1113 pki_hash.port_type = 0; 1114 pki_qos.port_type = 0; 1115 1116 pktbuf_conf.mmask.f_wqe_skip = 1; 1117 pktbuf_conf.mmask.f_first_skip = 1; 1118 pktbuf_conf.mmask.f_later_skip = 1; 1119 pktbuf_conf.mmask.f_mbuff_size = 1; 1120 pktbuf_conf.mmask.f_cache_mode = 1; 1121 1122 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 1123 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 1124 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 1125 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 1126 RTE_PKTMBUF_HEADROOM - 1127 rte_pktmbuf_priv_size(mb_pool) - 1128 sizeof(struct rte_mbuf)); 1129 1130 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 1131 1132 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1133 if (ret != 0) { 1134 octeontx_log_err("fail to configure pktbuf for port %d", 1135 port); 1136 rte_free(rxq); 1137 return ret; 1138 } 1139 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1140 "\tmbuf_size:\t0x%0x\n" 1141 "\twqe_skip:\t0x%0x\n" 1142 "\tfirst_skip:\t0x%0x\n" 1143 "\tlater_skip:\t0x%0x\n" 1144 "\tcache_mode:\t%s\n", 1145 port, 1146 pktbuf_conf.mbuff_size, 1147 pktbuf_conf.wqe_skip, 1148 pktbuf_conf.first_skip, 1149 pktbuf_conf.later_skip, 1150 (pktbuf_conf.cache_mode == 1151 PKI_OPC_MODE_STT) ? 1152 "STT" : 1153 (pktbuf_conf.cache_mode == 1154 PKI_OPC_MODE_STF) ? 1155 "STF" : 1156 (pktbuf_conf.cache_mode == 1157 PKI_OPC_MODE_STF1_STT) ? 1158 "STF1_STT" : "STF2_STT"); 1159 1160 if (nic->pki.hash_enable) { 1161 pki_hash.tag_dlc = 1; 1162 pki_hash.tag_slc = 1; 1163 pki_hash.tag_dlf = 1; 1164 pki_hash.tag_slf = 1; 1165 pki_hash.tag_prt = 1; 1166 octeontx_pki_port_hash_config(port, &pki_hash); 1167 } 1168 1169 pool = (uintptr_t)mb_pool->pool_id; 1170 1171 /* Get the gaura Id */ 1172 gaura = octeontx_fpa_bufpool_gaura(pool); 1173 1174 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1175 pki_qos.num_entry = 1; 1176 pki_qos.drop_policy = 0; 1177 pki_qos.tag_type = 0L; 1178 pki_qos.qos_entry[0].port_add = 0; 1179 pki_qos.qos_entry[0].gaura = gaura; 1180 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1181 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1182 pki_qos.qos_entry[0].grptag_bad = 0; 1183 pki_qos.qos_entry[0].grptag_ok = 0; 1184 1185 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1186 if (ret < 0) { 1187 octeontx_log_err("failed to create QOS port=%d, q=%d", 1188 port, qidx); 1189 rte_free(rxq); 1190 return ret; 1191 } 1192 nic->pki.initialized = true; 1193 } 1194 1195 rxq->port_id = nic->port_id; 1196 rxq->eth_dev = dev; 1197 rxq->queue_id = qidx; 1198 rxq->evdev = nic->evdev; 1199 rxq->ev_queues = ev_queues; 1200 rxq->ev_ports = ev_ports; 1201 rxq->pool = mb_pool; 1202 1203 octeontx_recheck_rx_offloads(rxq); 1204 dev->data->rx_queues[qidx] = rxq; 1205 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1206 1207 return 0; 1208 } 1209 1210 static void 1211 octeontx_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid) 1212 { 1213 rte_free(dev->data->rx_queues[qid]); 1214 } 1215 1216 static const uint32_t * 1217 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1218 { 1219 static const uint32_t ptypes[] = { 1220 RTE_PTYPE_L3_IPV4, 1221 RTE_PTYPE_L3_IPV4_EXT, 1222 RTE_PTYPE_L3_IPV6, 1223 RTE_PTYPE_L3_IPV6_EXT, 1224 RTE_PTYPE_L4_TCP, 1225 RTE_PTYPE_L4_UDP, 1226 RTE_PTYPE_L4_FRAG, 1227 RTE_PTYPE_UNKNOWN 1228 }; 1229 1230 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1231 return ptypes; 1232 1233 return NULL; 1234 } 1235 1236 static int 1237 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1238 { 1239 RTE_SET_USED(dev); 1240 1241 if (!strcmp(pool, "octeontx_fpavf")) 1242 return 0; 1243 1244 return -ENOTSUP; 1245 } 1246 1247 /* Initialize and register driver with DPDK Application */ 1248 static const struct eth_dev_ops octeontx_dev_ops = { 1249 .dev_configure = octeontx_dev_configure, 1250 .dev_infos_get = octeontx_dev_info, 1251 .dev_close = octeontx_dev_close, 1252 .dev_start = octeontx_dev_start, 1253 .dev_stop = octeontx_dev_stop, 1254 .promiscuous_enable = octeontx_dev_promisc_enable, 1255 .promiscuous_disable = octeontx_dev_promisc_disable, 1256 .link_update = octeontx_dev_link_update, 1257 .stats_get = octeontx_dev_stats_get, 1258 .stats_reset = octeontx_dev_stats_reset, 1259 .mac_addr_remove = octeontx_dev_mac_addr_del, 1260 .mac_addr_add = octeontx_dev_mac_addr_add, 1261 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1262 .vlan_offload_set = octeontx_dev_vlan_offload_set, 1263 .vlan_filter_set = octeontx_dev_vlan_filter_set, 1264 .tx_queue_start = octeontx_dev_tx_queue_start, 1265 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1266 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1267 .tx_queue_release = octeontx_dev_tx_queue_release, 1268 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1269 .rx_queue_release = octeontx_dev_rx_queue_release, 1270 .dev_set_link_up = octeontx_dev_set_link_up, 1271 .dev_set_link_down = octeontx_dev_set_link_down, 1272 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1273 .mtu_set = octeontx_dev_mtu_set, 1274 .pool_ops_supported = octeontx_pool_ops, 1275 .flow_ctrl_get = octeontx_dev_flow_ctrl_get, 1276 .flow_ctrl_set = octeontx_dev_flow_ctrl_set, 1277 }; 1278 1279 /* Create Ethdev interface per BGX LMAC ports */ 1280 static int 1281 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1282 int socket_id) 1283 { 1284 int res; 1285 size_t pko_vfid; 1286 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1287 struct octeontx_nic *nic = NULL; 1288 struct rte_eth_dev *eth_dev = NULL; 1289 struct rte_eth_dev_data *data; 1290 const char *name = rte_vdev_device_name(dev); 1291 int max_entries; 1292 1293 PMD_INIT_FUNC_TRACE(); 1294 1295 sprintf(octtx_name, "%s_%d", name, port); 1296 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1297 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1298 if (eth_dev == NULL) 1299 return -ENODEV; 1300 1301 eth_dev->dev_ops = &octeontx_dev_ops; 1302 eth_dev->device = &dev->device; 1303 octeontx_set_tx_function(eth_dev); 1304 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1305 rte_eth_dev_probing_finish(eth_dev); 1306 return 0; 1307 } 1308 1309 /* Reserve an ethdev entry */ 1310 eth_dev = rte_eth_dev_allocate(octtx_name); 1311 if (eth_dev == NULL) { 1312 octeontx_log_err("failed to allocate rte_eth_dev"); 1313 res = -ENOMEM; 1314 goto err; 1315 } 1316 data = eth_dev->data; 1317 1318 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1319 if (nic == NULL) { 1320 octeontx_log_err("failed to allocate nic structure"); 1321 res = -ENOMEM; 1322 goto err; 1323 } 1324 data->dev_private = nic; 1325 pko_vfid = octeontx_pko_get_vfid(); 1326 1327 if (pko_vfid == SIZE_MAX) { 1328 octeontx_log_err("failed to get pko vfid"); 1329 res = -ENODEV; 1330 goto err; 1331 } 1332 1333 nic->pko_vfid = pko_vfid; 1334 nic->port_id = port; 1335 nic->evdev = evdev; 1336 1337 res = octeontx_port_open(nic); 1338 if (res < 0) 1339 goto err; 1340 1341 /* Rx side port configuration */ 1342 res = octeontx_pki_port_open(port); 1343 if (res != 0) { 1344 octeontx_log_err("failed to open PKI port %d", port); 1345 res = -ENODEV; 1346 goto err; 1347 } 1348 1349 eth_dev->device = &dev->device; 1350 eth_dev->intr_handle = NULL; 1351 eth_dev->data->numa_node = dev->device.numa_node; 1352 1353 data->port_id = eth_dev->data->port_id; 1354 1355 nic->ev_queues = 1; 1356 nic->ev_ports = 1; 1357 nic->print_flag = -1; 1358 1359 data->dev_link.link_status = RTE_ETH_LINK_DOWN; 1360 data->dev_started = 0; 1361 data->promiscuous = 0; 1362 data->all_multicast = 0; 1363 data->scattered_rx = 0; 1364 1365 /* Get maximum number of supported MAC entries */ 1366 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1367 if (max_entries < 0) { 1368 octeontx_log_err("Failed to get max entries for mac addr"); 1369 res = -ENOTSUP; 1370 goto err; 1371 } 1372 1373 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1374 RTE_ETHER_ADDR_LEN, 0, 1375 socket_id); 1376 if (data->mac_addrs == NULL) { 1377 octeontx_log_err("failed to allocate memory for mac_addrs"); 1378 res = -ENOMEM; 1379 goto err; 1380 } 1381 1382 eth_dev->dev_ops = &octeontx_dev_ops; 1383 1384 /* Finally save ethdev pointer to the NIC structure */ 1385 nic->dev = eth_dev; 1386 1387 if (nic->port_id != data->port_id) { 1388 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1389 data->port_id, nic->port_id); 1390 res = -EINVAL; 1391 goto free_mac_addrs; 1392 } 1393 1394 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 1395 octeontx_link_status_poll, nic); 1396 if (res) { 1397 octeontx_log_err("Failed to start link polling alarm"); 1398 goto err; 1399 } 1400 1401 /* Update port_id mac to eth_dev */ 1402 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1403 1404 /* Update same mac address to BGX CAM table at index 0 */ 1405 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1406 1407 res = octeontx_dev_flow_ctrl_init(eth_dev); 1408 if (res < 0) 1409 goto err; 1410 1411 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1412 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1413 nic->port_id, nic->port_ena, 1414 nic->base_ochan, nic->num_ochans, 1415 nic->num_tx_queues); 1416 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu); 1417 1418 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1419 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1420 1421 rte_eth_dev_probing_finish(eth_dev); 1422 return data->port_id; 1423 1424 free_mac_addrs: 1425 rte_free(data->mac_addrs); 1426 data->mac_addrs = NULL; 1427 err: 1428 if (nic) 1429 octeontx_port_close(nic); 1430 1431 rte_eth_dev_release_port(eth_dev); 1432 1433 return res; 1434 } 1435 1436 /* Un initialize octeontx device */ 1437 static int 1438 octeontx_remove(struct rte_vdev_device *dev) 1439 { 1440 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1441 struct rte_eth_dev *eth_dev = NULL; 1442 struct octeontx_nic *nic = NULL; 1443 int i; 1444 1445 if (dev == NULL) 1446 return -EINVAL; 1447 1448 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1449 sprintf(octtx_name, "eth_octeontx_%d", i); 1450 1451 eth_dev = rte_eth_dev_allocated(octtx_name); 1452 if (eth_dev == NULL) 1453 continue; /* port already released */ 1454 1455 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1456 rte_eth_dev_release_port(eth_dev); 1457 continue; 1458 } 1459 1460 nic = octeontx_pmd_priv(eth_dev); 1461 rte_event_dev_stop(nic->evdev); 1462 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1463 octeontx_dev_close(eth_dev); 1464 rte_eth_dev_release_port(eth_dev); 1465 } 1466 1467 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1468 return 0; 1469 1470 /* Free FC resource */ 1471 octeontx_pko_fc_free(); 1472 1473 return 0; 1474 } 1475 1476 /* Initialize octeontx device */ 1477 static int 1478 octeontx_probe(struct rte_vdev_device *dev) 1479 { 1480 const char *dev_name; 1481 static int probe_once; 1482 uint8_t socket_id, qlist; 1483 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1484 struct rte_event_dev_config dev_conf; 1485 const char *eventdev_name = "event_octeontx"; 1486 struct rte_event_dev_info info; 1487 struct rte_eth_dev *eth_dev; 1488 1489 struct octeontx_vdev_init_params init_params = { 1490 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1491 }; 1492 1493 dev_name = rte_vdev_device_name(dev); 1494 1495 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1496 strlen(rte_vdev_device_args(dev)) == 0) { 1497 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1498 if (!eth_dev) { 1499 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1500 return -1; 1501 } 1502 /* TODO: request info from primary to set up Rx and Tx */ 1503 eth_dev->dev_ops = &octeontx_dev_ops; 1504 eth_dev->device = &dev->device; 1505 rte_eth_dev_probing_finish(eth_dev); 1506 return 0; 1507 } 1508 1509 res = octeontx_parse_vdev_init_params(&init_params, dev); 1510 if (res < 0) 1511 return -EINVAL; 1512 1513 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1514 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1515 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1516 return -ENOTSUP; 1517 } 1518 1519 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1520 1521 socket_id = rte_socket_id(); 1522 1523 tx_vfcnt = octeontx_pko_vf_count(); 1524 1525 if (tx_vfcnt < init_params.nr_port) { 1526 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1527 tx_vfcnt, init_params.nr_port); 1528 return -EINVAL; 1529 } 1530 evdev = rte_event_dev_get_dev_id(eventdev_name); 1531 if (evdev < 0) { 1532 octeontx_log_err("eventdev %s not found", eventdev_name); 1533 return -ENODEV; 1534 } 1535 1536 res = rte_event_dev_info_get(evdev, &info); 1537 if (res < 0) { 1538 octeontx_log_err("failed to eventdev info %d", res); 1539 return -EINVAL; 1540 } 1541 1542 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1543 info.max_event_queues, info.max_event_ports); 1544 1545 if (octeontx_pko_init_fc(tx_vfcnt)) 1546 return -ENOMEM; 1547 1548 devconf_set_default_sane_values(&dev_conf, &info); 1549 res = rte_event_dev_configure(evdev, &dev_conf); 1550 if (res < 0) 1551 goto parse_error; 1552 1553 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1554 (uint32_t *)&pnum); 1555 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1556 (uint32_t *)&qnum); 1557 if (pnum < qnum) { 1558 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1559 pnum, qnum); 1560 res = -EINVAL; 1561 goto parse_error; 1562 } 1563 1564 /* Enable all queues available */ 1565 for (i = 0; i < qnum; i++) { 1566 res = rte_event_queue_setup(evdev, i, NULL); 1567 if (res < 0) { 1568 octeontx_log_err("failed to setup event_q(%d): res %d", 1569 i, res); 1570 goto parse_error; 1571 } 1572 } 1573 1574 /* Enable all ports available */ 1575 for (i = 0; i < pnum; i++) { 1576 res = rte_event_port_setup(evdev, i, NULL); 1577 if (res < 0) { 1578 res = -ENODEV; 1579 octeontx_log_err("failed to setup ev port(%d) res=%d", 1580 i, res); 1581 goto parse_error; 1582 } 1583 } 1584 1585 /* 1586 * Do 1:1 links for ports & queues. All queues would be mapped to 1587 * one port. If there are more ports than queues, then some ports 1588 * won't be linked to any queue. 1589 */ 1590 for (i = 0; i < qnum; i++) { 1591 /* Link one queue to one event port */ 1592 qlist = i; 1593 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1594 if (res < 0) { 1595 res = -ENODEV; 1596 octeontx_log_err("failed to link port (%d): res=%d", 1597 i, res); 1598 goto parse_error; 1599 } 1600 } 1601 1602 /* Create ethdev interface */ 1603 for (i = 0; i < init_params.nr_port; i++) { 1604 port_id = octeontx_create(dev, i, evdev, socket_id); 1605 if (port_id < 0) { 1606 octeontx_log_err("failed to create device %s", 1607 dev_name); 1608 res = -ENODEV; 1609 goto parse_error; 1610 } 1611 1612 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1613 port_id); 1614 } 1615 1616 if (probe_once) { 1617 octeontx_log_err("interface %s not supported", dev_name); 1618 octeontx_remove(dev); 1619 res = -ENOTSUP; 1620 goto parse_error; 1621 } 1622 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1623 probe_once = 1; 1624 1625 return 0; 1626 1627 parse_error: 1628 octeontx_pko_fc_free(); 1629 return res; 1630 } 1631 1632 static struct rte_vdev_driver octeontx_pmd_drv = { 1633 .probe = octeontx_probe, 1634 .remove = octeontx_remove, 1635 }; 1636 1637 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1638 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1639 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1640