1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct octeontx_vdev_init_params { 28 uint8_t nr_port; 29 }; 30 31 uint16_t 32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 33 34 enum octeontx_link_speed { 35 OCTEONTX_LINK_SPEED_SGMII, 36 OCTEONTX_LINK_SPEED_XAUI, 37 OCTEONTX_LINK_SPEED_RXAUI, 38 OCTEONTX_LINK_SPEED_10G_R, 39 OCTEONTX_LINK_SPEED_40G_R, 40 OCTEONTX_LINK_SPEED_RESERVE1, 41 OCTEONTX_LINK_SPEED_QSGMII, 42 OCTEONTX_LINK_SPEED_RESERVE2 43 }; 44 45 int otx_net_logtype_mbox; 46 int otx_net_logtype_init; 47 int otx_net_logtype_driver; 48 49 RTE_INIT(otx_net_init_log); 50 static void 51 otx_net_init_log(void) 52 { 53 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 54 if (otx_net_logtype_mbox >= 0) 55 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 56 57 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 58 if (otx_net_logtype_init >= 0) 59 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 60 61 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 62 if (otx_net_logtype_driver >= 0) 63 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 64 } 65 66 /* Parse integer from integer argument */ 67 static int 68 parse_integer_arg(const char *key __rte_unused, 69 const char *value, void *extra_args) 70 { 71 int *i = (int *)extra_args; 72 73 *i = atoi(value); 74 if (*i < 0) { 75 octeontx_log_err("argument has to be positive."); 76 return -1; 77 } 78 79 return 0; 80 } 81 82 static int 83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 84 struct rte_vdev_device *dev) 85 { 86 struct rte_kvargs *kvlist = NULL; 87 int ret = 0; 88 89 static const char * const octeontx_vdev_valid_params[] = { 90 OCTEONTX_VDEV_NR_PORT_ARG, 91 NULL 92 }; 93 94 const char *input_args = rte_vdev_device_args(dev); 95 if (params == NULL) 96 return -EINVAL; 97 98 99 if (input_args) { 100 kvlist = rte_kvargs_parse(input_args, 101 octeontx_vdev_valid_params); 102 if (kvlist == NULL) 103 return -1; 104 105 ret = rte_kvargs_process(kvlist, 106 OCTEONTX_VDEV_NR_PORT_ARG, 107 &parse_integer_arg, 108 ¶ms->nr_port); 109 if (ret < 0) 110 goto free_kvlist; 111 } 112 113 free_kvlist: 114 rte_kvargs_free(kvlist); 115 return ret; 116 } 117 118 static int 119 octeontx_port_open(struct octeontx_nic *nic) 120 { 121 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 122 int res; 123 124 res = 0; 125 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 126 PMD_INIT_FUNC_TRACE(); 127 128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 129 if (res < 0) { 130 octeontx_log_err("failed to open port %d", res); 131 return res; 132 } 133 134 nic->node = bgx_port_conf.node; 135 nic->port_ena = bgx_port_conf.enable; 136 nic->base_ichan = bgx_port_conf.base_chan; 137 nic->base_ochan = bgx_port_conf.base_chan; 138 nic->num_ichans = bgx_port_conf.num_chans; 139 nic->num_ochans = bgx_port_conf.num_chans; 140 nic->mtu = bgx_port_conf.mtu; 141 nic->bpen = bgx_port_conf.bpen; 142 nic->fcs_strip = bgx_port_conf.fcs_strip; 143 nic->bcast_mode = bgx_port_conf.bcast_mode; 144 nic->mcast_mode = bgx_port_conf.mcast_mode; 145 nic->speed = bgx_port_conf.mode; 146 147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_port_close(struct octeontx_nic *nic) 155 { 156 PMD_INIT_FUNC_TRACE(); 157 158 octeontx_bgx_port_close(nic->port_id); 159 octeontx_log_dbg("port closed %d", nic->port_id); 160 } 161 162 static int 163 octeontx_port_start(struct octeontx_nic *nic) 164 { 165 PMD_INIT_FUNC_TRACE(); 166 167 return octeontx_bgx_port_start(nic->port_id); 168 } 169 170 static int 171 octeontx_port_stop(struct octeontx_nic *nic) 172 { 173 PMD_INIT_FUNC_TRACE(); 174 175 return octeontx_bgx_port_stop(nic->port_id); 176 } 177 178 static void 179 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 180 { 181 struct rte_eth_dev *dev; 182 int res; 183 184 res = 0; 185 PMD_INIT_FUNC_TRACE(); 186 dev = nic->dev; 187 188 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 189 if (res < 0) 190 octeontx_log_err("failed to set promiscuous mode %d", 191 nic->port_id); 192 193 /* Set proper flag for the mode */ 194 dev->data->promiscuous = (en != 0) ? 1 : 0; 195 196 octeontx_log_dbg("port %d : promiscuous mode %s", 197 nic->port_id, en ? "set" : "unset"); 198 } 199 200 static int 201 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 202 { 203 octeontx_mbox_bgx_port_stats_t bgx_stats; 204 int res; 205 206 PMD_INIT_FUNC_TRACE(); 207 208 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 209 if (res < 0) { 210 octeontx_log_err("failed to get port stats %d", nic->port_id); 211 return res; 212 } 213 214 stats->ipackets = bgx_stats.rx_packets; 215 stats->ibytes = bgx_stats.rx_bytes; 216 stats->imissed = bgx_stats.rx_dropped; 217 stats->ierrors = bgx_stats.rx_errors; 218 stats->opackets = bgx_stats.tx_packets; 219 stats->obytes = bgx_stats.tx_bytes; 220 stats->oerrors = bgx_stats.tx_errors; 221 222 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 223 nic->port_id, stats->ipackets, stats->opackets); 224 225 return 0; 226 } 227 228 static void 229 octeontx_port_stats_clr(struct octeontx_nic *nic) 230 { 231 PMD_INIT_FUNC_TRACE(); 232 233 octeontx_bgx_port_stats_clr(nic->port_id); 234 } 235 236 static inline void 237 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 238 struct rte_event_dev_info *info) 239 { 240 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 241 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 242 243 dev_conf->nb_event_ports = info->max_event_ports; 244 dev_conf->nb_event_queues = info->max_event_queues; 245 246 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 247 dev_conf->nb_event_port_dequeue_depth = 248 info->max_event_port_dequeue_depth; 249 dev_conf->nb_event_port_enqueue_depth = 250 info->max_event_port_enqueue_depth; 251 dev_conf->nb_event_port_enqueue_depth = 252 info->max_event_port_enqueue_depth; 253 dev_conf->nb_events_limit = 254 info->max_num_events; 255 } 256 257 static int 258 octeontx_dev_configure(struct rte_eth_dev *dev) 259 { 260 struct rte_eth_dev_data *data = dev->data; 261 struct rte_eth_conf *conf = &data->dev_conf; 262 struct rte_eth_rxmode *rxmode = &conf->rxmode; 263 struct rte_eth_txmode *txmode = &conf->txmode; 264 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 265 int ret; 266 267 PMD_INIT_FUNC_TRACE(); 268 RTE_SET_USED(conf); 269 270 if (!rte_eal_has_hugepages()) { 271 octeontx_log_err("huge page is not configured"); 272 return -EINVAL; 273 } 274 275 if (txmode->mq_mode) { 276 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 277 return -EINVAL; 278 } 279 280 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 281 rxmode->mq_mode != ETH_MQ_RX_RSS) { 282 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 283 return -EINVAL; 284 } 285 286 /* KEEP_CRC offload flag is not supported by PMD 287 * can remove the below block when DEV_RX_OFFLOAD_CRC_STRIP removed 288 */ 289 if (rte_eth_dev_must_keep_crc(rxmode->offloads)) { 290 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); 291 rxmode->offloads |= DEV_RX_OFFLOAD_CRC_STRIP; 292 } 293 294 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 295 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 296 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 297 } 298 299 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 300 octeontx_log_err("setting link speed/duplex not supported"); 301 return -EINVAL; 302 } 303 304 if (conf->dcb_capability_en) { 305 octeontx_log_err("DCB enable not supported"); 306 return -EINVAL; 307 } 308 309 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 310 octeontx_log_err("flow director not supported"); 311 return -EINVAL; 312 } 313 314 nic->num_tx_queues = dev->data->nb_tx_queues; 315 316 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ, 317 nic->num_tx_queues, 318 nic->base_ochan); 319 if (ret) { 320 octeontx_log_err("failed to open channel %d no-of-txq %d", 321 nic->base_ochan, nic->num_tx_queues); 322 return -EFAULT; 323 } 324 325 nic->pki.classifier_enable = false; 326 nic->pki.hash_enable = true; 327 nic->pki.initialized = false; 328 329 return 0; 330 } 331 332 static void 333 octeontx_dev_close(struct rte_eth_dev *dev) 334 { 335 struct octeontx_txq *txq = NULL; 336 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 337 unsigned int i; 338 int ret; 339 340 PMD_INIT_FUNC_TRACE(); 341 342 rte_event_dev_close(nic->evdev); 343 344 ret = octeontx_pko_channel_close(nic->base_ochan); 345 if (ret < 0) { 346 octeontx_log_err("failed to close channel %d VF%d %d %d", 347 nic->base_ochan, nic->port_id, nic->num_tx_queues, 348 ret); 349 } 350 /* Free txq resources for this port */ 351 for (i = 0; i < nic->num_tx_queues; i++) { 352 txq = dev->data->tx_queues[i]; 353 if (!txq) 354 continue; 355 356 rte_free(txq); 357 } 358 } 359 360 static int 361 octeontx_dev_start(struct rte_eth_dev *dev) 362 { 363 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 364 int ret; 365 366 ret = 0; 367 368 PMD_INIT_FUNC_TRACE(); 369 /* 370 * Tx start 371 */ 372 dev->tx_pkt_burst = octeontx_xmit_pkts; 373 ret = octeontx_pko_channel_start(nic->base_ochan); 374 if (ret < 0) { 375 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 376 nic->port_id, nic->num_tx_queues, nic->base_ochan, 377 ret); 378 goto error; 379 } 380 381 /* 382 * Rx start 383 */ 384 dev->rx_pkt_burst = octeontx_recv_pkts; 385 ret = octeontx_pki_port_start(nic->port_id); 386 if (ret < 0) { 387 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 388 goto channel_stop_error; 389 } 390 391 /* 392 * Start port 393 */ 394 ret = octeontx_port_start(nic); 395 if (ret < 0) { 396 octeontx_log_err("failed start port %d", ret); 397 goto pki_port_stop_error; 398 } 399 400 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 401 nic->base_ochan, nic->num_tx_queues, nic->port_id); 402 403 ret = rte_event_dev_start(nic->evdev); 404 if (ret < 0) { 405 octeontx_log_err("failed to start evdev: ret (%d)", ret); 406 goto pki_port_stop_error; 407 } 408 409 /* Success */ 410 return ret; 411 412 pki_port_stop_error: 413 octeontx_pki_port_stop(nic->port_id); 414 channel_stop_error: 415 octeontx_pko_channel_stop(nic->base_ochan); 416 error: 417 return ret; 418 } 419 420 static void 421 octeontx_dev_stop(struct rte_eth_dev *dev) 422 { 423 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 424 int ret; 425 426 PMD_INIT_FUNC_TRACE(); 427 428 rte_event_dev_stop(nic->evdev); 429 430 ret = octeontx_port_stop(nic); 431 if (ret < 0) { 432 octeontx_log_err("failed to req stop port %d res=%d", 433 nic->port_id, ret); 434 return; 435 } 436 437 ret = octeontx_pki_port_stop(nic->port_id); 438 if (ret < 0) { 439 octeontx_log_err("failed to stop pki port %d res=%d", 440 nic->port_id, ret); 441 return; 442 } 443 444 ret = octeontx_pko_channel_stop(nic->base_ochan); 445 if (ret < 0) { 446 octeontx_log_err("failed to stop channel %d VF%d %d %d", 447 nic->base_ochan, nic->port_id, nic->num_tx_queues, 448 ret); 449 return; 450 } 451 452 dev->tx_pkt_burst = NULL; 453 dev->rx_pkt_burst = NULL; 454 } 455 456 static void 457 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 458 { 459 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 460 461 PMD_INIT_FUNC_TRACE(); 462 octeontx_port_promisc_set(nic, 1); 463 } 464 465 static void 466 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 467 { 468 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 469 470 PMD_INIT_FUNC_TRACE(); 471 octeontx_port_promisc_set(nic, 0); 472 } 473 474 static int 475 octeontx_port_link_status(struct octeontx_nic *nic) 476 { 477 int res; 478 479 PMD_INIT_FUNC_TRACE(); 480 res = octeontx_bgx_port_link_status(nic->port_id); 481 if (res < 0) { 482 octeontx_log_err("failed to get port %d link status", 483 nic->port_id); 484 return res; 485 } 486 487 nic->link_up = (uint8_t)res; 488 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 489 490 return res; 491 } 492 493 /* 494 * Return 0 means link status changed, -1 means not changed 495 */ 496 static int 497 octeontx_dev_link_update(struct rte_eth_dev *dev, 498 int wait_to_complete __rte_unused) 499 { 500 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 501 struct rte_eth_link link; 502 int res; 503 504 PMD_INIT_FUNC_TRACE(); 505 506 res = octeontx_port_link_status(nic); 507 if (res < 0) { 508 octeontx_log_err("failed to request link status %d", res); 509 return res; 510 } 511 512 link.link_status = nic->link_up; 513 514 switch (nic->speed) { 515 case OCTEONTX_LINK_SPEED_SGMII: 516 link.link_speed = ETH_SPEED_NUM_1G; 517 break; 518 519 case OCTEONTX_LINK_SPEED_XAUI: 520 link.link_speed = ETH_SPEED_NUM_10G; 521 break; 522 523 case OCTEONTX_LINK_SPEED_RXAUI: 524 case OCTEONTX_LINK_SPEED_10G_R: 525 link.link_speed = ETH_SPEED_NUM_10G; 526 break; 527 case OCTEONTX_LINK_SPEED_QSGMII: 528 link.link_speed = ETH_SPEED_NUM_5G; 529 break; 530 case OCTEONTX_LINK_SPEED_40G_R: 531 link.link_speed = ETH_SPEED_NUM_40G; 532 break; 533 534 case OCTEONTX_LINK_SPEED_RESERVE1: 535 case OCTEONTX_LINK_SPEED_RESERVE2: 536 default: 537 link.link_speed = ETH_SPEED_NUM_NONE; 538 octeontx_log_err("incorrect link speed %d", nic->speed); 539 break; 540 } 541 542 link.link_duplex = ETH_LINK_FULL_DUPLEX; 543 link.link_autoneg = ETH_LINK_AUTONEG; 544 545 return rte_eth_linkstatus_set(dev, &link); 546 } 547 548 static int 549 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 550 { 551 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 552 553 PMD_INIT_FUNC_TRACE(); 554 return octeontx_port_stats(nic, stats); 555 } 556 557 static void 558 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 559 { 560 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 561 562 PMD_INIT_FUNC_TRACE(); 563 octeontx_port_stats_clr(nic); 564 } 565 566 static int 567 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 568 struct ether_addr *addr) 569 { 570 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 571 int ret; 572 573 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 574 if (ret != 0) 575 octeontx_log_err("failed to set MAC address on port %d", 576 nic->port_id); 577 578 return ret; 579 } 580 581 static void 582 octeontx_dev_info(struct rte_eth_dev *dev, 583 struct rte_eth_dev_info *dev_info) 584 { 585 RTE_SET_USED(dev); 586 587 /* Autonegotiation may be disabled */ 588 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 589 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 590 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 591 ETH_LINK_SPEED_40G; 592 593 dev_info->max_mac_addrs = 1; 594 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 595 dev_info->max_rx_queues = 1; 596 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 597 dev_info->min_rx_bufsize = 0; 598 599 dev_info->default_rxconf = (struct rte_eth_rxconf) { 600 .rx_free_thresh = 0, 601 .rx_drop_en = 0, 602 .offloads = OCTEONTX_RX_OFFLOADS, 603 }; 604 605 dev_info->default_txconf = (struct rte_eth_txconf) { 606 .tx_free_thresh = 0, 607 .offloads = OCTEONTX_TX_OFFLOADS, 608 }; 609 610 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 611 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 612 } 613 614 static void 615 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 616 { 617 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 618 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 619 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 620 } 621 622 static int 623 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 624 uint16_t qidx) 625 { 626 struct octeontx_txq *txq; 627 int res; 628 629 PMD_INIT_FUNC_TRACE(); 630 631 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 632 return 0; 633 634 txq = dev->data->tx_queues[qidx]; 635 636 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 637 &txq->dq, 638 sizeof(octeontx_dq_t), 639 txq->queue_id, 640 octeontx_dq_info_getter); 641 if (res < 0) { 642 res = -EFAULT; 643 goto close_port; 644 } 645 646 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 647 return res; 648 649 close_port: 650 (void)octeontx_port_stop(nic); 651 octeontx_pko_channel_stop(nic->base_ochan); 652 octeontx_pko_channel_close(nic->base_ochan); 653 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 654 return res; 655 } 656 657 static int 658 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 659 { 660 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 661 662 PMD_INIT_FUNC_TRACE(); 663 qidx = qidx % PKO_VF_NUM_DQ; 664 return octeontx_vf_start_tx_queue(dev, nic, qidx); 665 } 666 667 static inline int 668 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 669 uint16_t qidx) 670 { 671 int ret = 0; 672 673 RTE_SET_USED(nic); 674 PMD_INIT_FUNC_TRACE(); 675 676 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 677 return 0; 678 679 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 680 return ret; 681 } 682 683 static int 684 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 685 { 686 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 687 688 PMD_INIT_FUNC_TRACE(); 689 qidx = qidx % PKO_VF_NUM_DQ; 690 691 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 692 } 693 694 static void 695 octeontx_dev_tx_queue_release(void *tx_queue) 696 { 697 struct octeontx_txq *txq = tx_queue; 698 int res; 699 700 PMD_INIT_FUNC_TRACE(); 701 702 if (txq) { 703 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 704 if (res < 0) 705 octeontx_log_err("failed stop tx_queue(%d)\n", 706 txq->queue_id); 707 708 rte_free(txq); 709 } 710 } 711 712 static int 713 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 714 uint16_t nb_desc, unsigned int socket_id, 715 const struct rte_eth_txconf *tx_conf __rte_unused) 716 { 717 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 718 struct octeontx_txq *txq = NULL; 719 uint16_t dq_num; 720 int res = 0; 721 722 RTE_SET_USED(nb_desc); 723 RTE_SET_USED(socket_id); 724 725 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; 726 727 /* Socket id check */ 728 if (socket_id != (unsigned int)SOCKET_ID_ANY && 729 socket_id != (unsigned int)nic->node) 730 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 731 socket_id, nic->node); 732 733 /* Free memory prior to re-allocation if needed. */ 734 if (dev->data->tx_queues[qidx] != NULL) { 735 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 736 qidx); 737 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 738 dev->data->tx_queues[qidx] = NULL; 739 } 740 741 /* Allocating tx queue data structure */ 742 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 743 RTE_CACHE_LINE_SIZE, nic->node); 744 if (txq == NULL) { 745 octeontx_log_err("failed to allocate txq=%d", qidx); 746 res = -ENOMEM; 747 goto err; 748 } 749 750 txq->eth_dev = dev; 751 txq->queue_id = dq_num; 752 dev->data->tx_queues[qidx] = txq; 753 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 754 755 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 756 &txq->dq, 757 sizeof(octeontx_dq_t), 758 txq->queue_id, 759 octeontx_dq_info_getter); 760 if (res < 0) { 761 res = -EFAULT; 762 goto err; 763 } 764 765 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 766 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 767 txq->dq.ioreg_va, 768 txq->dq.fc_status_va); 769 770 return res; 771 772 err: 773 if (txq) 774 rte_free(txq); 775 776 return res; 777 } 778 779 static int 780 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 781 uint16_t nb_desc, unsigned int socket_id, 782 const struct rte_eth_rxconf *rx_conf, 783 struct rte_mempool *mb_pool) 784 { 785 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 786 struct rte_mempool_ops *mp_ops = NULL; 787 struct octeontx_rxq *rxq = NULL; 788 pki_pktbuf_cfg_t pktbuf_conf; 789 pki_hash_cfg_t pki_hash; 790 pki_qos_cfg_t pki_qos; 791 uintptr_t pool; 792 int ret, port; 793 uint8_t gaura; 794 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 795 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 796 797 RTE_SET_USED(nb_desc); 798 799 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 800 memset(&pki_hash, 0, sizeof(pki_hash)); 801 memset(&pki_qos, 0, sizeof(pki_qos)); 802 803 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 804 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 805 octeontx_log_err("failed to find octeontx_fpavf mempool"); 806 return -ENOTSUP; 807 } 808 809 /* Handle forbidden configurations */ 810 if (nic->pki.classifier_enable) { 811 octeontx_log_err("cannot setup queue %d. " 812 "Classifier option unsupported", qidx); 813 return -EINVAL; 814 } 815 816 port = nic->port_id; 817 818 /* Rx deferred start is not supported */ 819 if (rx_conf->rx_deferred_start) { 820 octeontx_log_err("rx deferred start not supported"); 821 return -EINVAL; 822 } 823 824 /* Verify queue index */ 825 if (qidx >= dev->data->nb_rx_queues) { 826 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 827 qidx, (dev->data->nb_rx_queues - 1)); 828 return -ENOTSUP; 829 } 830 831 /* Socket id check */ 832 if (socket_id != (unsigned int)SOCKET_ID_ANY && 833 socket_id != (unsigned int)nic->node) 834 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 835 socket_id, nic->node); 836 837 /* Allocating rx queue data structure */ 838 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 839 RTE_CACHE_LINE_SIZE, nic->node); 840 if (rxq == NULL) { 841 octeontx_log_err("failed to allocate rxq=%d", qidx); 842 return -ENOMEM; 843 } 844 845 if (!nic->pki.initialized) { 846 pktbuf_conf.port_type = 0; 847 pki_hash.port_type = 0; 848 pki_qos.port_type = 0; 849 850 pktbuf_conf.mmask.f_wqe_skip = 1; 851 pktbuf_conf.mmask.f_first_skip = 1; 852 pktbuf_conf.mmask.f_later_skip = 1; 853 pktbuf_conf.mmask.f_mbuff_size = 1; 854 pktbuf_conf.mmask.f_cache_mode = 1; 855 856 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 857 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP; 858 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 859 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 860 RTE_PKTMBUF_HEADROOM - 861 sizeof(struct rte_mbuf)); 862 863 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 864 865 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 866 if (ret != 0) { 867 octeontx_log_err("fail to configure pktbuf for port %d", 868 port); 869 rte_free(rxq); 870 return ret; 871 } 872 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 873 "\tmbuf_size:\t0x%0x\n" 874 "\twqe_skip:\t0x%0x\n" 875 "\tfirst_skip:\t0x%0x\n" 876 "\tlater_skip:\t0x%0x\n" 877 "\tcache_mode:\t%s\n", 878 port, 879 pktbuf_conf.mbuff_size, 880 pktbuf_conf.wqe_skip, 881 pktbuf_conf.first_skip, 882 pktbuf_conf.later_skip, 883 (pktbuf_conf.cache_mode == 884 PKI_OPC_MODE_STT) ? 885 "STT" : 886 (pktbuf_conf.cache_mode == 887 PKI_OPC_MODE_STF) ? 888 "STF" : 889 (pktbuf_conf.cache_mode == 890 PKI_OPC_MODE_STF1_STT) ? 891 "STF1_STT" : "STF2_STT"); 892 893 if (nic->pki.hash_enable) { 894 pki_hash.tag_dlc = 1; 895 pki_hash.tag_slc = 1; 896 pki_hash.tag_dlf = 1; 897 pki_hash.tag_slf = 1; 898 pki_hash.tag_prt = 1; 899 octeontx_pki_port_hash_config(port, &pki_hash); 900 } 901 902 pool = (uintptr_t)mb_pool->pool_id; 903 904 /* Get the gpool Id */ 905 gaura = octeontx_fpa_bufpool_gpool(pool); 906 907 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 908 pki_qos.num_entry = 1; 909 pki_qos.drop_policy = 0; 910 pki_qos.tag_type = 0L; 911 pki_qos.qos_entry[0].port_add = 0; 912 pki_qos.qos_entry[0].gaura = gaura; 913 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 914 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 915 pki_qos.qos_entry[0].grptag_bad = 0; 916 pki_qos.qos_entry[0].grptag_ok = 0; 917 918 ret = octeontx_pki_port_create_qos(port, &pki_qos); 919 if (ret < 0) { 920 octeontx_log_err("failed to create QOS port=%d, q=%d", 921 port, qidx); 922 rte_free(rxq); 923 return ret; 924 } 925 nic->pki.initialized = true; 926 } 927 928 rxq->port_id = nic->port_id; 929 rxq->eth_dev = dev; 930 rxq->queue_id = qidx; 931 rxq->evdev = nic->evdev; 932 rxq->ev_queues = ev_queues; 933 rxq->ev_ports = ev_ports; 934 935 dev->data->rx_queues[qidx] = rxq; 936 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 937 return 0; 938 } 939 940 static void 941 octeontx_dev_rx_queue_release(void *rxq) 942 { 943 rte_free(rxq); 944 } 945 946 static const uint32_t * 947 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 948 { 949 static const uint32_t ptypes[] = { 950 RTE_PTYPE_L3_IPV4, 951 RTE_PTYPE_L3_IPV4_EXT, 952 RTE_PTYPE_L3_IPV6, 953 RTE_PTYPE_L3_IPV6_EXT, 954 RTE_PTYPE_L4_TCP, 955 RTE_PTYPE_L4_UDP, 956 RTE_PTYPE_L4_FRAG, 957 RTE_PTYPE_UNKNOWN 958 }; 959 960 if (dev->rx_pkt_burst == octeontx_recv_pkts) 961 return ptypes; 962 963 return NULL; 964 } 965 966 static int 967 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 968 { 969 RTE_SET_USED(dev); 970 971 if (!strcmp(pool, "octeontx_fpavf")) 972 return 0; 973 974 return -ENOTSUP; 975 } 976 977 /* Initialize and register driver with DPDK Application */ 978 static const struct eth_dev_ops octeontx_dev_ops = { 979 .dev_configure = octeontx_dev_configure, 980 .dev_infos_get = octeontx_dev_info, 981 .dev_close = octeontx_dev_close, 982 .dev_start = octeontx_dev_start, 983 .dev_stop = octeontx_dev_stop, 984 .promiscuous_enable = octeontx_dev_promisc_enable, 985 .promiscuous_disable = octeontx_dev_promisc_disable, 986 .link_update = octeontx_dev_link_update, 987 .stats_get = octeontx_dev_stats_get, 988 .stats_reset = octeontx_dev_stats_reset, 989 .mac_addr_set = octeontx_dev_default_mac_addr_set, 990 .tx_queue_start = octeontx_dev_tx_queue_start, 991 .tx_queue_stop = octeontx_dev_tx_queue_stop, 992 .tx_queue_setup = octeontx_dev_tx_queue_setup, 993 .tx_queue_release = octeontx_dev_tx_queue_release, 994 .rx_queue_setup = octeontx_dev_rx_queue_setup, 995 .rx_queue_release = octeontx_dev_rx_queue_release, 996 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 997 .pool_ops_supported = octeontx_pool_ops, 998 }; 999 1000 /* Create Ethdev interface per BGX LMAC ports */ 1001 static int 1002 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1003 int socket_id) 1004 { 1005 int res; 1006 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1007 struct octeontx_nic *nic = NULL; 1008 struct rte_eth_dev *eth_dev = NULL; 1009 struct rte_eth_dev_data *data; 1010 const char *name = rte_vdev_device_name(dev); 1011 1012 PMD_INIT_FUNC_TRACE(); 1013 1014 sprintf(octtx_name, "%s_%d", name, port); 1015 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1016 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1017 if (eth_dev == NULL) 1018 return -ENODEV; 1019 1020 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1021 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1022 rte_eth_dev_probing_finish(eth_dev); 1023 return 0; 1024 } 1025 1026 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1027 if (nic == NULL) { 1028 octeontx_log_err("failed to allocate nic structure"); 1029 res = -ENOMEM; 1030 goto err; 1031 } 1032 1033 nic->port_id = port; 1034 nic->evdev = evdev; 1035 1036 res = octeontx_port_open(nic); 1037 if (res < 0) 1038 goto err; 1039 1040 /* Rx side port configuration */ 1041 res = octeontx_pki_port_open(port); 1042 if (res != 0) { 1043 octeontx_log_err("failed to open PKI port %d", port); 1044 res = -ENODEV; 1045 goto err; 1046 } 1047 1048 /* Reserve an ethdev entry */ 1049 eth_dev = rte_eth_dev_allocate(octtx_name); 1050 if (eth_dev == NULL) { 1051 octeontx_log_err("failed to allocate rte_eth_dev"); 1052 res = -ENOMEM; 1053 goto err; 1054 } 1055 1056 eth_dev->device = &dev->device; 1057 eth_dev->intr_handle = NULL; 1058 eth_dev->data->kdrv = RTE_KDRV_NONE; 1059 eth_dev->data->numa_node = dev->device.numa_node; 1060 1061 data = eth_dev->data; 1062 data->dev_private = nic; 1063 data->port_id = eth_dev->data->port_id; 1064 1065 nic->ev_queues = 1; 1066 nic->ev_ports = 1; 1067 1068 data->dev_link.link_status = ETH_LINK_DOWN; 1069 data->dev_started = 0; 1070 data->promiscuous = 0; 1071 data->all_multicast = 0; 1072 data->scattered_rx = 0; 1073 1074 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0, 1075 socket_id); 1076 if (data->mac_addrs == NULL) { 1077 octeontx_log_err("failed to allocate memory for mac_addrs"); 1078 res = -ENOMEM; 1079 goto err; 1080 } 1081 1082 eth_dev->dev_ops = &octeontx_dev_ops; 1083 1084 /* Finally save ethdev pointer to the NIC structure */ 1085 nic->dev = eth_dev; 1086 1087 if (nic->port_id != data->port_id) { 1088 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1089 data->port_id, nic->port_id); 1090 res = -EINVAL; 1091 goto err; 1092 } 1093 1094 /* Update port_id mac to eth_dev */ 1095 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN); 1096 1097 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1098 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1099 nic->port_id, nic->port_ena, 1100 nic->base_ochan, nic->num_ochans, 1101 nic->num_tx_queues); 1102 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1103 1104 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1105 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1106 1107 rte_eth_dev_probing_finish(eth_dev); 1108 return data->port_id; 1109 1110 err: 1111 if (nic) 1112 octeontx_port_close(nic); 1113 1114 if (eth_dev != NULL) { 1115 rte_free(eth_dev->data->mac_addrs); 1116 rte_free(data); 1117 rte_free(nic); 1118 rte_eth_dev_release_port(eth_dev); 1119 } 1120 1121 return res; 1122 } 1123 1124 /* Un initialize octeontx device */ 1125 static int 1126 octeontx_remove(struct rte_vdev_device *dev) 1127 { 1128 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1129 struct rte_eth_dev *eth_dev = NULL; 1130 struct octeontx_nic *nic = NULL; 1131 int i; 1132 1133 if (dev == NULL) 1134 return -EINVAL; 1135 1136 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1137 sprintf(octtx_name, "eth_octeontx_%d", i); 1138 1139 /* reserve an ethdev entry */ 1140 eth_dev = rte_eth_dev_allocated(octtx_name); 1141 if (eth_dev == NULL) 1142 return -ENODEV; 1143 1144 nic = octeontx_pmd_priv(eth_dev); 1145 rte_event_dev_stop(nic->evdev); 1146 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1147 1148 rte_free(eth_dev->data->mac_addrs); 1149 rte_free(eth_dev->data->dev_private); 1150 rte_eth_dev_release_port(eth_dev); 1151 rte_event_dev_close(nic->evdev); 1152 } 1153 1154 /* Free FC resource */ 1155 octeontx_pko_fc_free(); 1156 1157 return 0; 1158 } 1159 1160 /* Initialize octeontx device */ 1161 static int 1162 octeontx_probe(struct rte_vdev_device *dev) 1163 { 1164 const char *dev_name; 1165 static int probe_once; 1166 uint8_t socket_id, qlist; 1167 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1168 struct rte_event_dev_config dev_conf; 1169 const char *eventdev_name = "event_octeontx"; 1170 struct rte_event_dev_info info; 1171 struct rte_eth_dev *eth_dev; 1172 1173 struct octeontx_vdev_init_params init_params = { 1174 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1175 }; 1176 1177 dev_name = rte_vdev_device_name(dev); 1178 1179 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1180 strlen(rte_vdev_device_args(dev)) == 0) { 1181 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1182 if (!eth_dev) { 1183 RTE_LOG(ERR, PMD, "Failed to probe %s\n", dev_name); 1184 return -1; 1185 } 1186 /* TODO: request info from primary to set up Rx and Tx */ 1187 eth_dev->dev_ops = &octeontx_dev_ops; 1188 rte_eth_dev_probing_finish(eth_dev); 1189 return 0; 1190 } 1191 1192 res = octeontx_parse_vdev_init_params(&init_params, dev); 1193 if (res < 0) 1194 return -EINVAL; 1195 1196 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1197 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1198 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1199 return -ENOTSUP; 1200 } 1201 1202 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1203 1204 socket_id = rte_socket_id(); 1205 1206 tx_vfcnt = octeontx_pko_vf_count(); 1207 1208 if (tx_vfcnt < init_params.nr_port) { 1209 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1210 tx_vfcnt, init_params.nr_port); 1211 return -EINVAL; 1212 } 1213 evdev = rte_event_dev_get_dev_id(eventdev_name); 1214 if (evdev < 0) { 1215 octeontx_log_err("eventdev %s not found", eventdev_name); 1216 return -ENODEV; 1217 } 1218 1219 res = rte_event_dev_info_get(evdev, &info); 1220 if (res < 0) { 1221 octeontx_log_err("failed to eventdev info %d", res); 1222 return -EINVAL; 1223 } 1224 1225 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1226 info.max_event_queues, info.max_event_ports); 1227 1228 if (octeontx_pko_init_fc(tx_vfcnt)) 1229 return -ENOMEM; 1230 1231 devconf_set_default_sane_values(&dev_conf, &info); 1232 res = rte_event_dev_configure(evdev, &dev_conf); 1233 if (res < 0) 1234 goto parse_error; 1235 1236 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1237 (uint32_t *)&pnum); 1238 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1239 (uint32_t *)&qnum); 1240 if (pnum < qnum) { 1241 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1242 pnum, qnum); 1243 res = -EINVAL; 1244 goto parse_error; 1245 } 1246 if (pnum > qnum) { 1247 /* 1248 * We don't poll on event ports 1249 * that do not have any queues assigned. 1250 */ 1251 pnum = qnum; 1252 PMD_INIT_LOG(INFO, 1253 "reducing number of active event ports to %d", pnum); 1254 } 1255 for (i = 0; i < qnum; i++) { 1256 res = rte_event_queue_setup(evdev, i, NULL); 1257 if (res < 0) { 1258 octeontx_log_err("failed to setup event_q(%d): res %d", 1259 i, res); 1260 goto parse_error; 1261 } 1262 } 1263 1264 for (i = 0; i < pnum; i++) { 1265 res = rte_event_port_setup(evdev, i, NULL); 1266 if (res < 0) { 1267 res = -ENODEV; 1268 octeontx_log_err("failed to setup ev port(%d) res=%d", 1269 i, res); 1270 goto parse_error; 1271 } 1272 /* Link one queue to one event port */ 1273 qlist = i; 1274 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1275 if (res < 0) { 1276 res = -ENODEV; 1277 octeontx_log_err("failed to link port (%d): res=%d", 1278 i, res); 1279 goto parse_error; 1280 } 1281 } 1282 1283 /* Create ethdev interface */ 1284 for (i = 0; i < init_params.nr_port; i++) { 1285 port_id = octeontx_create(dev, i, evdev, socket_id); 1286 if (port_id < 0) { 1287 octeontx_log_err("failed to create device %s", 1288 dev_name); 1289 res = -ENODEV; 1290 goto parse_error; 1291 } 1292 1293 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1294 port_id); 1295 } 1296 1297 if (probe_once) { 1298 octeontx_log_err("interface %s not supported", dev_name); 1299 octeontx_remove(dev); 1300 res = -ENOTSUP; 1301 goto parse_error; 1302 } 1303 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1304 probe_once = 1; 1305 1306 return 0; 1307 1308 parse_error: 1309 octeontx_pko_fc_free(); 1310 return res; 1311 } 1312 1313 static struct rte_vdev_driver octeontx_pmd_drv = { 1314 .probe = octeontx_probe, 1315 .remove = octeontx_remove, 1316 }; 1317 1318 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1319 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1320 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1321