xref: /dpdk/drivers/net/octeontx/octeontx_ethdev.c (revision 25d11a86c56d50947af33d0b79ede622809bd8b9)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Cavium, Inc
3  */
4 
5 #include <stdio.h>
6 #include <stdarg.h>
7 #include <stdbool.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
16 #include <rte_dev.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
22 
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
26 
27 struct octeontx_vdev_init_params {
28 	uint8_t	nr_port;
29 };
30 
31 uint16_t
32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
33 
34 enum octeontx_link_speed {
35 	OCTEONTX_LINK_SPEED_SGMII,
36 	OCTEONTX_LINK_SPEED_XAUI,
37 	OCTEONTX_LINK_SPEED_RXAUI,
38 	OCTEONTX_LINK_SPEED_10G_R,
39 	OCTEONTX_LINK_SPEED_40G_R,
40 	OCTEONTX_LINK_SPEED_RESERVE1,
41 	OCTEONTX_LINK_SPEED_QSGMII,
42 	OCTEONTX_LINK_SPEED_RESERVE2
43 };
44 
45 int otx_net_logtype_mbox;
46 int otx_net_logtype_init;
47 int otx_net_logtype_driver;
48 
49 RTE_INIT(otx_net_init_log)
50 {
51 	otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
52 	if (otx_net_logtype_mbox >= 0)
53 		rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
54 
55 	otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
56 	if (otx_net_logtype_init >= 0)
57 		rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
58 
59 	otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
60 	if (otx_net_logtype_driver >= 0)
61 		rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
62 }
63 
64 /* Parse integer from integer argument */
65 static int
66 parse_integer_arg(const char *key __rte_unused,
67 		const char *value, void *extra_args)
68 {
69 	int *i = (int *)extra_args;
70 
71 	*i = atoi(value);
72 	if (*i < 0) {
73 		octeontx_log_err("argument has to be positive.");
74 		return -1;
75 	}
76 
77 	return 0;
78 }
79 
80 static int
81 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
82 				struct rte_vdev_device *dev)
83 {
84 	struct rte_kvargs *kvlist = NULL;
85 	int ret = 0;
86 
87 	static const char * const octeontx_vdev_valid_params[] = {
88 		OCTEONTX_VDEV_NR_PORT_ARG,
89 		NULL
90 	};
91 
92 	const char *input_args = rte_vdev_device_args(dev);
93 	if (params == NULL)
94 		return -EINVAL;
95 
96 
97 	if (input_args) {
98 		kvlist = rte_kvargs_parse(input_args,
99 				octeontx_vdev_valid_params);
100 		if (kvlist == NULL)
101 			return -1;
102 
103 		ret = rte_kvargs_process(kvlist,
104 					OCTEONTX_VDEV_NR_PORT_ARG,
105 					&parse_integer_arg,
106 					&params->nr_port);
107 		if (ret < 0)
108 			goto free_kvlist;
109 	}
110 
111 free_kvlist:
112 	rte_kvargs_free(kvlist);
113 	return ret;
114 }
115 
116 static int
117 octeontx_port_open(struct octeontx_nic *nic)
118 {
119 	octeontx_mbox_bgx_port_conf_t bgx_port_conf;
120 	int res;
121 
122 	res = 0;
123 	memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
124 	PMD_INIT_FUNC_TRACE();
125 
126 	res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
127 	if (res < 0) {
128 		octeontx_log_err("failed to open port %d", res);
129 		return res;
130 	}
131 
132 	nic->node = bgx_port_conf.node;
133 	nic->port_ena = bgx_port_conf.enable;
134 	nic->base_ichan = bgx_port_conf.base_chan;
135 	nic->base_ochan = bgx_port_conf.base_chan;
136 	nic->num_ichans = bgx_port_conf.num_chans;
137 	nic->num_ochans = bgx_port_conf.num_chans;
138 	nic->mtu = bgx_port_conf.mtu;
139 	nic->bpen = bgx_port_conf.bpen;
140 	nic->fcs_strip = bgx_port_conf.fcs_strip;
141 	nic->bcast_mode = bgx_port_conf.bcast_mode;
142 	nic->mcast_mode = bgx_port_conf.mcast_mode;
143 	nic->speed	= bgx_port_conf.mode;
144 
145 	memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN);
146 
147 	octeontx_log_dbg("port opened %d", nic->port_id);
148 	return res;
149 }
150 
151 static void
152 octeontx_port_close(struct octeontx_nic *nic)
153 {
154 	PMD_INIT_FUNC_TRACE();
155 
156 	octeontx_bgx_port_close(nic->port_id);
157 	octeontx_log_dbg("port closed %d", nic->port_id);
158 }
159 
160 static int
161 octeontx_port_start(struct octeontx_nic *nic)
162 {
163 	PMD_INIT_FUNC_TRACE();
164 
165 	return octeontx_bgx_port_start(nic->port_id);
166 }
167 
168 static int
169 octeontx_port_stop(struct octeontx_nic *nic)
170 {
171 	PMD_INIT_FUNC_TRACE();
172 
173 	return octeontx_bgx_port_stop(nic->port_id);
174 }
175 
176 static void
177 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
178 {
179 	struct rte_eth_dev *dev;
180 	int res;
181 
182 	res = 0;
183 	PMD_INIT_FUNC_TRACE();
184 	dev = nic->dev;
185 
186 	res = octeontx_bgx_port_promisc_set(nic->port_id, en);
187 	if (res < 0)
188 		octeontx_log_err("failed to set promiscuous mode %d",
189 				nic->port_id);
190 
191 	/* Set proper flag for the mode */
192 	dev->data->promiscuous = (en != 0) ? 1 : 0;
193 
194 	octeontx_log_dbg("port %d : promiscuous mode %s",
195 			nic->port_id, en ? "set" : "unset");
196 }
197 
198 static int
199 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
200 {
201 	octeontx_mbox_bgx_port_stats_t bgx_stats;
202 	int res;
203 
204 	PMD_INIT_FUNC_TRACE();
205 
206 	res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
207 	if (res < 0) {
208 		octeontx_log_err("failed to get port stats %d", nic->port_id);
209 		return res;
210 	}
211 
212 	stats->ipackets = bgx_stats.rx_packets;
213 	stats->ibytes = bgx_stats.rx_bytes;
214 	stats->imissed = bgx_stats.rx_dropped;
215 	stats->ierrors = bgx_stats.rx_errors;
216 	stats->opackets = bgx_stats.tx_packets;
217 	stats->obytes = bgx_stats.tx_bytes;
218 	stats->oerrors = bgx_stats.tx_errors;
219 
220 	octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
221 			nic->port_id, stats->ipackets, stats->opackets);
222 
223 	return 0;
224 }
225 
226 static void
227 octeontx_port_stats_clr(struct octeontx_nic *nic)
228 {
229 	PMD_INIT_FUNC_TRACE();
230 
231 	octeontx_bgx_port_stats_clr(nic->port_id);
232 }
233 
234 static inline void
235 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
236 				struct rte_event_dev_info *info)
237 {
238 	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
239 	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
240 
241 	dev_conf->nb_event_ports = info->max_event_ports;
242 	dev_conf->nb_event_queues = info->max_event_queues;
243 
244 	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
245 	dev_conf->nb_event_port_dequeue_depth =
246 			info->max_event_port_dequeue_depth;
247 	dev_conf->nb_event_port_enqueue_depth =
248 			info->max_event_port_enqueue_depth;
249 	dev_conf->nb_event_port_enqueue_depth =
250 			info->max_event_port_enqueue_depth;
251 	dev_conf->nb_events_limit =
252 			info->max_num_events;
253 }
254 
255 static int
256 octeontx_dev_configure(struct rte_eth_dev *dev)
257 {
258 	struct rte_eth_dev_data *data = dev->data;
259 	struct rte_eth_conf *conf = &data->dev_conf;
260 	struct rte_eth_rxmode *rxmode = &conf->rxmode;
261 	struct rte_eth_txmode *txmode = &conf->txmode;
262 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
263 	int ret;
264 
265 	PMD_INIT_FUNC_TRACE();
266 	RTE_SET_USED(conf);
267 
268 	if (!rte_eal_has_hugepages()) {
269 		octeontx_log_err("huge page is not configured");
270 		return -EINVAL;
271 	}
272 
273 	if (txmode->mq_mode) {
274 		octeontx_log_err("tx mq_mode DCB or VMDq not supported");
275 		return -EINVAL;
276 	}
277 
278 	if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
279 		rxmode->mq_mode != ETH_MQ_RX_RSS) {
280 		octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
281 		return -EINVAL;
282 	}
283 
284 	if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
285 		PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
286 		txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
287 	}
288 
289 	if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
290 		octeontx_log_err("setting link speed/duplex not supported");
291 		return -EINVAL;
292 	}
293 
294 	if (conf->dcb_capability_en) {
295 		octeontx_log_err("DCB enable not supported");
296 		return -EINVAL;
297 	}
298 
299 	if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
300 		octeontx_log_err("flow director not supported");
301 		return -EINVAL;
302 	}
303 
304 	nic->num_tx_queues = dev->data->nb_tx_queues;
305 
306 	ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ,
307 					nic->num_tx_queues,
308 					nic->base_ochan);
309 	if (ret) {
310 		octeontx_log_err("failed to open channel %d no-of-txq %d",
311 			   nic->base_ochan, nic->num_tx_queues);
312 		return -EFAULT;
313 	}
314 
315 	nic->pki.classifier_enable = false;
316 	nic->pki.hash_enable = true;
317 	nic->pki.initialized = false;
318 
319 	return 0;
320 }
321 
322 static void
323 octeontx_dev_close(struct rte_eth_dev *dev)
324 {
325 	struct octeontx_txq *txq = NULL;
326 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
327 	unsigned int i;
328 	int ret;
329 
330 	PMD_INIT_FUNC_TRACE();
331 
332 	rte_event_dev_close(nic->evdev);
333 
334 	ret = octeontx_pko_channel_close(nic->base_ochan);
335 	if (ret < 0) {
336 		octeontx_log_err("failed to close channel %d VF%d %d %d",
337 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
338 			     ret);
339 	}
340 	/* Free txq resources for this port */
341 	for (i = 0; i < nic->num_tx_queues; i++) {
342 		txq = dev->data->tx_queues[i];
343 		if (!txq)
344 			continue;
345 
346 		rte_free(txq);
347 	}
348 
349 	dev->tx_pkt_burst = NULL;
350 	dev->rx_pkt_burst = NULL;
351 }
352 
353 static int
354 octeontx_dev_start(struct rte_eth_dev *dev)
355 {
356 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
357 	int ret;
358 
359 	ret = 0;
360 
361 	PMD_INIT_FUNC_TRACE();
362 	/*
363 	 * Tx start
364 	 */
365 	dev->tx_pkt_burst = octeontx_xmit_pkts;
366 	ret = octeontx_pko_channel_start(nic->base_ochan);
367 	if (ret < 0) {
368 		octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
369 			   nic->port_id, nic->num_tx_queues, nic->base_ochan,
370 			   ret);
371 		goto error;
372 	}
373 
374 	/*
375 	 * Rx start
376 	 */
377 	dev->rx_pkt_burst = octeontx_recv_pkts;
378 	ret = octeontx_pki_port_start(nic->port_id);
379 	if (ret < 0) {
380 		octeontx_log_err("fail to start Rx on port %d", nic->port_id);
381 		goto channel_stop_error;
382 	}
383 
384 	/*
385 	 * Start port
386 	 */
387 	ret = octeontx_port_start(nic);
388 	if (ret < 0) {
389 		octeontx_log_err("failed start port %d", ret);
390 		goto pki_port_stop_error;
391 	}
392 
393 	PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
394 			nic->base_ochan, nic->num_tx_queues, nic->port_id);
395 
396 	ret = rte_event_dev_start(nic->evdev);
397 	if (ret < 0) {
398 		octeontx_log_err("failed to start evdev: ret (%d)", ret);
399 		goto pki_port_stop_error;
400 	}
401 
402 	/* Success */
403 	return ret;
404 
405 pki_port_stop_error:
406 	octeontx_pki_port_stop(nic->port_id);
407 channel_stop_error:
408 	octeontx_pko_channel_stop(nic->base_ochan);
409 error:
410 	return ret;
411 }
412 
413 static void
414 octeontx_dev_stop(struct rte_eth_dev *dev)
415 {
416 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
417 	int ret;
418 
419 	PMD_INIT_FUNC_TRACE();
420 
421 	rte_event_dev_stop(nic->evdev);
422 
423 	ret = octeontx_port_stop(nic);
424 	if (ret < 0) {
425 		octeontx_log_err("failed to req stop port %d res=%d",
426 					nic->port_id, ret);
427 		return;
428 	}
429 
430 	ret = octeontx_pki_port_stop(nic->port_id);
431 	if (ret < 0) {
432 		octeontx_log_err("failed to stop pki port %d res=%d",
433 					nic->port_id, ret);
434 		return;
435 	}
436 
437 	ret = octeontx_pko_channel_stop(nic->base_ochan);
438 	if (ret < 0) {
439 		octeontx_log_err("failed to stop channel %d VF%d %d %d",
440 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
441 			     ret);
442 		return;
443 	}
444 }
445 
446 static void
447 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
448 {
449 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
450 
451 	PMD_INIT_FUNC_TRACE();
452 	octeontx_port_promisc_set(nic, 1);
453 }
454 
455 static void
456 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
457 {
458 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
459 
460 	PMD_INIT_FUNC_TRACE();
461 	octeontx_port_promisc_set(nic, 0);
462 }
463 
464 static int
465 octeontx_port_link_status(struct octeontx_nic *nic)
466 {
467 	int res;
468 
469 	PMD_INIT_FUNC_TRACE();
470 	res = octeontx_bgx_port_link_status(nic->port_id);
471 	if (res < 0) {
472 		octeontx_log_err("failed to get port %d link status",
473 				nic->port_id);
474 		return res;
475 	}
476 
477 	nic->link_up = (uint8_t)res;
478 	octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
479 
480 	return res;
481 }
482 
483 /*
484  * Return 0 means link status changed, -1 means not changed
485  */
486 static int
487 octeontx_dev_link_update(struct rte_eth_dev *dev,
488 			 int wait_to_complete __rte_unused)
489 {
490 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
491 	struct rte_eth_link link;
492 	int res;
493 
494 	PMD_INIT_FUNC_TRACE();
495 
496 	res = octeontx_port_link_status(nic);
497 	if (res < 0) {
498 		octeontx_log_err("failed to request link status %d", res);
499 		return res;
500 	}
501 
502 	link.link_status = nic->link_up;
503 
504 	switch (nic->speed) {
505 	case OCTEONTX_LINK_SPEED_SGMII:
506 		link.link_speed = ETH_SPEED_NUM_1G;
507 		break;
508 
509 	case OCTEONTX_LINK_SPEED_XAUI:
510 		link.link_speed = ETH_SPEED_NUM_10G;
511 		break;
512 
513 	case OCTEONTX_LINK_SPEED_RXAUI:
514 	case OCTEONTX_LINK_SPEED_10G_R:
515 		link.link_speed = ETH_SPEED_NUM_10G;
516 		break;
517 	case OCTEONTX_LINK_SPEED_QSGMII:
518 		link.link_speed = ETH_SPEED_NUM_5G;
519 		break;
520 	case OCTEONTX_LINK_SPEED_40G_R:
521 		link.link_speed = ETH_SPEED_NUM_40G;
522 		break;
523 
524 	case OCTEONTX_LINK_SPEED_RESERVE1:
525 	case OCTEONTX_LINK_SPEED_RESERVE2:
526 	default:
527 		link.link_speed = ETH_SPEED_NUM_NONE;
528 		octeontx_log_err("incorrect link speed %d", nic->speed);
529 		break;
530 	}
531 
532 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
533 	link.link_autoneg = ETH_LINK_AUTONEG;
534 
535 	return rte_eth_linkstatus_set(dev, &link);
536 }
537 
538 static int
539 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
540 {
541 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
542 
543 	PMD_INIT_FUNC_TRACE();
544 	return octeontx_port_stats(nic, stats);
545 }
546 
547 static void
548 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
549 {
550 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
551 
552 	PMD_INIT_FUNC_TRACE();
553 	octeontx_port_stats_clr(nic);
554 }
555 
556 static int
557 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
558 					struct ether_addr *addr)
559 {
560 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
561 	int ret;
562 
563 	ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
564 	if (ret != 0)
565 		octeontx_log_err("failed to set MAC address on port %d",
566 				nic->port_id);
567 
568 	return ret;
569 }
570 
571 static void
572 octeontx_dev_info(struct rte_eth_dev *dev,
573 		struct rte_eth_dev_info *dev_info)
574 {
575 	RTE_SET_USED(dev);
576 
577 	/* Autonegotiation may be disabled */
578 	dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
579 	dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
580 			ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
581 			ETH_LINK_SPEED_40G;
582 
583 	dev_info->max_mac_addrs = 1;
584 	dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
585 	dev_info->max_rx_queues = 1;
586 	dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
587 	dev_info->min_rx_bufsize = 0;
588 
589 	dev_info->default_rxconf = (struct rte_eth_rxconf) {
590 		.rx_free_thresh = 0,
591 		.rx_drop_en = 0,
592 		.offloads = OCTEONTX_RX_OFFLOADS,
593 	};
594 
595 	dev_info->default_txconf = (struct rte_eth_txconf) {
596 		.tx_free_thresh = 0,
597 		.offloads = OCTEONTX_TX_OFFLOADS,
598 	};
599 
600 	dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
601 	dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
602 }
603 
604 static void
605 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
606 {
607 	((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
608 	((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
609 	((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
610 }
611 
612 static int
613 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
614 				uint16_t qidx)
615 {
616 	struct octeontx_txq *txq;
617 	int res;
618 
619 	PMD_INIT_FUNC_TRACE();
620 
621 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
622 		return 0;
623 
624 	txq = dev->data->tx_queues[qidx];
625 
626 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
627 						&txq->dq,
628 						sizeof(octeontx_dq_t),
629 						txq->queue_id,
630 						octeontx_dq_info_getter);
631 	if (res < 0) {
632 		res = -EFAULT;
633 		goto close_port;
634 	}
635 
636 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
637 	return res;
638 
639 close_port:
640 	(void)octeontx_port_stop(nic);
641 	octeontx_pko_channel_stop(nic->base_ochan);
642 	octeontx_pko_channel_close(nic->base_ochan);
643 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
644 	return res;
645 }
646 
647 static int
648 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
649 {
650 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
651 
652 	PMD_INIT_FUNC_TRACE();
653 	qidx = qidx % PKO_VF_NUM_DQ;
654 	return octeontx_vf_start_tx_queue(dev, nic, qidx);
655 }
656 
657 static inline int
658 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
659 			  uint16_t qidx)
660 {
661 	int ret = 0;
662 
663 	RTE_SET_USED(nic);
664 	PMD_INIT_FUNC_TRACE();
665 
666 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
667 		return 0;
668 
669 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
670 	return ret;
671 }
672 
673 static int
674 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
675 {
676 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
677 
678 	PMD_INIT_FUNC_TRACE();
679 	qidx = qidx % PKO_VF_NUM_DQ;
680 
681 	return octeontx_vf_stop_tx_queue(dev, nic, qidx);
682 }
683 
684 static void
685 octeontx_dev_tx_queue_release(void *tx_queue)
686 {
687 	struct octeontx_txq *txq = tx_queue;
688 	int res;
689 
690 	PMD_INIT_FUNC_TRACE();
691 
692 	if (txq) {
693 		res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
694 		if (res < 0)
695 			octeontx_log_err("failed stop tx_queue(%d)\n",
696 				   txq->queue_id);
697 
698 		rte_free(txq);
699 	}
700 }
701 
702 static int
703 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
704 			    uint16_t nb_desc, unsigned int socket_id,
705 			    const struct rte_eth_txconf *tx_conf __rte_unused)
706 {
707 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
708 	struct octeontx_txq *txq = NULL;
709 	uint16_t dq_num;
710 	int res = 0;
711 
712 	RTE_SET_USED(nb_desc);
713 	RTE_SET_USED(socket_id);
714 
715 	dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx;
716 
717 	/* Socket id check */
718 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
719 			socket_id != (unsigned int)nic->node)
720 		PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
721 						socket_id, nic->node);
722 
723 	/* Free memory prior to re-allocation if needed. */
724 	if (dev->data->tx_queues[qidx] != NULL) {
725 		PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
726 				qidx);
727 		octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
728 		dev->data->tx_queues[qidx] = NULL;
729 	}
730 
731 	/* Allocating tx queue data structure */
732 	txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
733 				 RTE_CACHE_LINE_SIZE, nic->node);
734 	if (txq == NULL) {
735 		octeontx_log_err("failed to allocate txq=%d", qidx);
736 		res = -ENOMEM;
737 		goto err;
738 	}
739 
740 	txq->eth_dev = dev;
741 	txq->queue_id = dq_num;
742 	dev->data->tx_queues[qidx] = txq;
743 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
744 
745 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
746 						&txq->dq,
747 						sizeof(octeontx_dq_t),
748 						txq->queue_id,
749 						octeontx_dq_info_getter);
750 	if (res < 0) {
751 		res = -EFAULT;
752 		goto err;
753 	}
754 
755 	PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
756 			qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
757 			txq->dq.ioreg_va,
758 			txq->dq.fc_status_va);
759 
760 	return res;
761 
762 err:
763 	if (txq)
764 		rte_free(txq);
765 
766 	return res;
767 }
768 
769 static int
770 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
771 				uint16_t nb_desc, unsigned int socket_id,
772 				const struct rte_eth_rxconf *rx_conf,
773 				struct rte_mempool *mb_pool)
774 {
775 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
776 	struct rte_mempool_ops *mp_ops = NULL;
777 	struct octeontx_rxq *rxq = NULL;
778 	pki_pktbuf_cfg_t pktbuf_conf;
779 	pki_hash_cfg_t pki_hash;
780 	pki_qos_cfg_t pki_qos;
781 	uintptr_t pool;
782 	int ret, port;
783 	uint16_t gaura;
784 	unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
785 	unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
786 
787 	RTE_SET_USED(nb_desc);
788 
789 	memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
790 	memset(&pki_hash, 0, sizeof(pki_hash));
791 	memset(&pki_qos, 0, sizeof(pki_qos));
792 
793 	mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
794 	if (strcmp(mp_ops->name, "octeontx_fpavf")) {
795 		octeontx_log_err("failed to find octeontx_fpavf mempool");
796 		return -ENOTSUP;
797 	}
798 
799 	/* Handle forbidden configurations */
800 	if (nic->pki.classifier_enable) {
801 		octeontx_log_err("cannot setup queue %d. "
802 					"Classifier option unsupported", qidx);
803 		return -EINVAL;
804 	}
805 
806 	port = nic->port_id;
807 
808 	/* Rx deferred start is not supported */
809 	if (rx_conf->rx_deferred_start) {
810 		octeontx_log_err("rx deferred start not supported");
811 		return -EINVAL;
812 	}
813 
814 	/* Verify queue index */
815 	if (qidx >= dev->data->nb_rx_queues) {
816 		octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
817 				qidx, (dev->data->nb_rx_queues - 1));
818 		return -ENOTSUP;
819 	}
820 
821 	/* Socket id check */
822 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
823 			socket_id != (unsigned int)nic->node)
824 		PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
825 						socket_id, nic->node);
826 
827 	/* Allocating rx queue data structure */
828 	rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
829 				 RTE_CACHE_LINE_SIZE, nic->node);
830 	if (rxq == NULL) {
831 		octeontx_log_err("failed to allocate rxq=%d", qidx);
832 		return -ENOMEM;
833 	}
834 
835 	if (!nic->pki.initialized) {
836 		pktbuf_conf.port_type = 0;
837 		pki_hash.port_type = 0;
838 		pki_qos.port_type = 0;
839 
840 		pktbuf_conf.mmask.f_wqe_skip = 1;
841 		pktbuf_conf.mmask.f_first_skip = 1;
842 		pktbuf_conf.mmask.f_later_skip = 1;
843 		pktbuf_conf.mmask.f_mbuff_size = 1;
844 		pktbuf_conf.mmask.f_cache_mode = 1;
845 
846 		pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
847 		pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
848 		pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
849 		pktbuf_conf.mbuff_size = (mb_pool->elt_size -
850 					RTE_PKTMBUF_HEADROOM -
851 					rte_pktmbuf_priv_size(mb_pool) -
852 					sizeof(struct rte_mbuf));
853 
854 		pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
855 
856 		ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
857 		if (ret != 0) {
858 			octeontx_log_err("fail to configure pktbuf for port %d",
859 					port);
860 			rte_free(rxq);
861 			return ret;
862 		}
863 		PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
864 				"\tmbuf_size:\t0x%0x\n"
865 				"\twqe_skip:\t0x%0x\n"
866 				"\tfirst_skip:\t0x%0x\n"
867 				"\tlater_skip:\t0x%0x\n"
868 				"\tcache_mode:\t%s\n",
869 				port,
870 				pktbuf_conf.mbuff_size,
871 				pktbuf_conf.wqe_skip,
872 				pktbuf_conf.first_skip,
873 				pktbuf_conf.later_skip,
874 				(pktbuf_conf.cache_mode ==
875 						PKI_OPC_MODE_STT) ?
876 				"STT" :
877 				(pktbuf_conf.cache_mode ==
878 						PKI_OPC_MODE_STF) ?
879 				"STF" :
880 				(pktbuf_conf.cache_mode ==
881 						PKI_OPC_MODE_STF1_STT) ?
882 				"STF1_STT" : "STF2_STT");
883 
884 		if (nic->pki.hash_enable) {
885 			pki_hash.tag_dlc = 1;
886 			pki_hash.tag_slc = 1;
887 			pki_hash.tag_dlf = 1;
888 			pki_hash.tag_slf = 1;
889 			pki_hash.tag_prt = 1;
890 			octeontx_pki_port_hash_config(port, &pki_hash);
891 		}
892 
893 		pool = (uintptr_t)mb_pool->pool_id;
894 
895 		/* Get the gaura Id */
896 		gaura = octeontx_fpa_bufpool_gaura(pool);
897 
898 		pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
899 		pki_qos.num_entry = 1;
900 		pki_qos.drop_policy = 0;
901 		pki_qos.tag_type = 0L;
902 		pki_qos.qos_entry[0].port_add = 0;
903 		pki_qos.qos_entry[0].gaura = gaura;
904 		pki_qos.qos_entry[0].ggrp_ok = ev_queues;
905 		pki_qos.qos_entry[0].ggrp_bad = ev_queues;
906 		pki_qos.qos_entry[0].grptag_bad = 0;
907 		pki_qos.qos_entry[0].grptag_ok = 0;
908 
909 		ret = octeontx_pki_port_create_qos(port, &pki_qos);
910 		if (ret < 0) {
911 			octeontx_log_err("failed to create QOS port=%d, q=%d",
912 					port, qidx);
913 			rte_free(rxq);
914 			return ret;
915 		}
916 		nic->pki.initialized = true;
917 	}
918 
919 	rxq->port_id = nic->port_id;
920 	rxq->eth_dev = dev;
921 	rxq->queue_id = qidx;
922 	rxq->evdev = nic->evdev;
923 	rxq->ev_queues = ev_queues;
924 	rxq->ev_ports = ev_ports;
925 
926 	dev->data->rx_queues[qidx] = rxq;
927 	dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
928 	return 0;
929 }
930 
931 static void
932 octeontx_dev_rx_queue_release(void *rxq)
933 {
934 	rte_free(rxq);
935 }
936 
937 static const uint32_t *
938 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
939 {
940 	static const uint32_t ptypes[] = {
941 		RTE_PTYPE_L3_IPV4,
942 		RTE_PTYPE_L3_IPV4_EXT,
943 		RTE_PTYPE_L3_IPV6,
944 		RTE_PTYPE_L3_IPV6_EXT,
945 		RTE_PTYPE_L4_TCP,
946 		RTE_PTYPE_L4_UDP,
947 		RTE_PTYPE_L4_FRAG,
948 		RTE_PTYPE_UNKNOWN
949 	};
950 
951 	if (dev->rx_pkt_burst == octeontx_recv_pkts)
952 		return ptypes;
953 
954 	return NULL;
955 }
956 
957 static int
958 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
959 {
960 	RTE_SET_USED(dev);
961 
962 	if (!strcmp(pool, "octeontx_fpavf"))
963 		return 0;
964 
965 	return -ENOTSUP;
966 }
967 
968 /* Initialize and register driver with DPDK Application */
969 static const struct eth_dev_ops octeontx_dev_ops = {
970 	.dev_configure		 = octeontx_dev_configure,
971 	.dev_infos_get		 = octeontx_dev_info,
972 	.dev_close		 = octeontx_dev_close,
973 	.dev_start		 = octeontx_dev_start,
974 	.dev_stop		 = octeontx_dev_stop,
975 	.promiscuous_enable	 = octeontx_dev_promisc_enable,
976 	.promiscuous_disable	 = octeontx_dev_promisc_disable,
977 	.link_update		 = octeontx_dev_link_update,
978 	.stats_get		 = octeontx_dev_stats_get,
979 	.stats_reset		 = octeontx_dev_stats_reset,
980 	.mac_addr_set		 = octeontx_dev_default_mac_addr_set,
981 	.tx_queue_start		 = octeontx_dev_tx_queue_start,
982 	.tx_queue_stop		 = octeontx_dev_tx_queue_stop,
983 	.tx_queue_setup		 = octeontx_dev_tx_queue_setup,
984 	.tx_queue_release	 = octeontx_dev_tx_queue_release,
985 	.rx_queue_setup		 = octeontx_dev_rx_queue_setup,
986 	.rx_queue_release	 = octeontx_dev_rx_queue_release,
987 	.dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
988 	.pool_ops_supported      = octeontx_pool_ops,
989 };
990 
991 /* Create Ethdev interface per BGX LMAC ports */
992 static int
993 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
994 			int socket_id)
995 {
996 	int res;
997 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
998 	struct octeontx_nic *nic = NULL;
999 	struct rte_eth_dev *eth_dev = NULL;
1000 	struct rte_eth_dev_data *data;
1001 	const char *name = rte_vdev_device_name(dev);
1002 
1003 	PMD_INIT_FUNC_TRACE();
1004 
1005 	sprintf(octtx_name, "%s_%d", name, port);
1006 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1007 		eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1008 		if (eth_dev == NULL)
1009 			return -ENODEV;
1010 
1011 		eth_dev->dev_ops = &octeontx_dev_ops;
1012 		eth_dev->device = &dev->device;
1013 		eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1014 		eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1015 		rte_eth_dev_probing_finish(eth_dev);
1016 		return 0;
1017 	}
1018 
1019 	/* Reserve an ethdev entry */
1020 	eth_dev = rte_eth_dev_allocate(octtx_name);
1021 	if (eth_dev == NULL) {
1022 		octeontx_log_err("failed to allocate rte_eth_dev");
1023 		res = -ENOMEM;
1024 		goto err;
1025 	}
1026 	data = eth_dev->data;
1027 
1028 	nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1029 	if (nic == NULL) {
1030 		octeontx_log_err("failed to allocate nic structure");
1031 		res = -ENOMEM;
1032 		goto err;
1033 	}
1034 	data->dev_private = nic;
1035 
1036 	nic->port_id = port;
1037 	nic->evdev = evdev;
1038 
1039 	res = octeontx_port_open(nic);
1040 	if (res < 0)
1041 		goto err;
1042 
1043 	/* Rx side port configuration */
1044 	res = octeontx_pki_port_open(port);
1045 	if (res != 0) {
1046 		octeontx_log_err("failed to open PKI port %d", port);
1047 		res = -ENODEV;
1048 		goto err;
1049 	}
1050 
1051 	eth_dev->device = &dev->device;
1052 	eth_dev->intr_handle = NULL;
1053 	eth_dev->data->kdrv = RTE_KDRV_NONE;
1054 	eth_dev->data->numa_node = dev->device.numa_node;
1055 
1056 	data->port_id = eth_dev->data->port_id;
1057 
1058 	nic->ev_queues = 1;
1059 	nic->ev_ports = 1;
1060 
1061 	data->dev_link.link_status = ETH_LINK_DOWN;
1062 	data->dev_started = 0;
1063 	data->promiscuous = 0;
1064 	data->all_multicast = 0;
1065 	data->scattered_rx = 0;
1066 
1067 	data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0,
1068 							socket_id);
1069 	if (data->mac_addrs == NULL) {
1070 		octeontx_log_err("failed to allocate memory for mac_addrs");
1071 		res = -ENOMEM;
1072 		goto err;
1073 	}
1074 
1075 	eth_dev->dev_ops = &octeontx_dev_ops;
1076 
1077 	/* Finally save ethdev pointer to the NIC structure */
1078 	nic->dev = eth_dev;
1079 
1080 	if (nic->port_id != data->port_id) {
1081 		octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1082 				data->port_id, nic->port_id);
1083 		res = -EINVAL;
1084 		goto err;
1085 	}
1086 
1087 	/* Update port_id mac to eth_dev */
1088 	memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN);
1089 
1090 	PMD_INIT_LOG(DEBUG, "ethdev info: ");
1091 	PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1092 				nic->port_id, nic->port_ena,
1093 				nic->base_ochan, nic->num_ochans,
1094 				nic->num_tx_queues);
1095 	PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1096 
1097 	rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1098 		[(nic->base_ochan >> 4) & 0xF] = data->port_id;
1099 
1100 	rte_eth_dev_probing_finish(eth_dev);
1101 	return data->port_id;
1102 
1103 err:
1104 	if (nic)
1105 		octeontx_port_close(nic);
1106 
1107 	rte_eth_dev_release_port(eth_dev);
1108 
1109 	return res;
1110 }
1111 
1112 /* Un initialize octeontx device */
1113 static int
1114 octeontx_remove(struct rte_vdev_device *dev)
1115 {
1116 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1117 	struct rte_eth_dev *eth_dev = NULL;
1118 	struct octeontx_nic *nic = NULL;
1119 	int i;
1120 
1121 	if (dev == NULL)
1122 		return -EINVAL;
1123 
1124 	for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1125 		sprintf(octtx_name, "eth_octeontx_%d", i);
1126 
1127 		/* reserve an ethdev entry */
1128 		eth_dev = rte_eth_dev_allocated(octtx_name);
1129 		if (eth_dev == NULL)
1130 			return -ENODEV;
1131 
1132 		if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1133 			rte_eth_dev_release_port(eth_dev);
1134 			continue;
1135 		}
1136 
1137 		nic = octeontx_pmd_priv(eth_dev);
1138 		rte_event_dev_stop(nic->evdev);
1139 		PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1140 
1141 		rte_eth_dev_release_port(eth_dev);
1142 		rte_event_dev_close(nic->evdev);
1143 	}
1144 
1145 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1146 		return 0;
1147 
1148 	/* Free FC resource */
1149 	octeontx_pko_fc_free();
1150 
1151 	return 0;
1152 }
1153 
1154 /* Initialize octeontx device */
1155 static int
1156 octeontx_probe(struct rte_vdev_device *dev)
1157 {
1158 	const char *dev_name;
1159 	static int probe_once;
1160 	uint8_t socket_id, qlist;
1161 	int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1162 	struct rte_event_dev_config dev_conf;
1163 	const char *eventdev_name = "event_octeontx";
1164 	struct rte_event_dev_info info;
1165 	struct rte_eth_dev *eth_dev;
1166 
1167 	struct octeontx_vdev_init_params init_params = {
1168 		OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1169 	};
1170 
1171 	dev_name = rte_vdev_device_name(dev);
1172 
1173 	if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1174 	    strlen(rte_vdev_device_args(dev)) == 0) {
1175 		eth_dev = rte_eth_dev_attach_secondary(dev_name);
1176 		if (!eth_dev) {
1177 			RTE_LOG(ERR, PMD, "Failed to probe %s\n", dev_name);
1178 			return -1;
1179 		}
1180 		/* TODO: request info from primary to set up Rx and Tx */
1181 		eth_dev->dev_ops = &octeontx_dev_ops;
1182 		eth_dev->device = &dev->device;
1183 		rte_eth_dev_probing_finish(eth_dev);
1184 		return 0;
1185 	}
1186 
1187 	res = octeontx_parse_vdev_init_params(&init_params, dev);
1188 	if (res < 0)
1189 		return -EINVAL;
1190 
1191 	if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1192 		octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1193 				OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1194 		return -ENOTSUP;
1195 	}
1196 
1197 	PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1198 
1199 	socket_id = rte_socket_id();
1200 
1201 	tx_vfcnt = octeontx_pko_vf_count();
1202 
1203 	if (tx_vfcnt < init_params.nr_port) {
1204 		octeontx_log_err("not enough PKO (%d) for port number (%d)",
1205 				tx_vfcnt, init_params.nr_port);
1206 		return -EINVAL;
1207 	}
1208 	evdev = rte_event_dev_get_dev_id(eventdev_name);
1209 	if (evdev < 0) {
1210 		octeontx_log_err("eventdev %s not found", eventdev_name);
1211 		return -ENODEV;
1212 	}
1213 
1214 	res = rte_event_dev_info_get(evdev, &info);
1215 	if (res < 0) {
1216 		octeontx_log_err("failed to eventdev info %d", res);
1217 		return -EINVAL;
1218 	}
1219 
1220 	PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1221 			info.max_event_queues, info.max_event_ports);
1222 
1223 	if (octeontx_pko_init_fc(tx_vfcnt))
1224 		return -ENOMEM;
1225 
1226 	devconf_set_default_sane_values(&dev_conf, &info);
1227 	res = rte_event_dev_configure(evdev, &dev_conf);
1228 	if (res < 0)
1229 		goto parse_error;
1230 
1231 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1232 			(uint32_t *)&pnum);
1233 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1234 			(uint32_t *)&qnum);
1235 	if (pnum < qnum) {
1236 		octeontx_log_err("too few event ports (%d) for event_q(%d)",
1237 				pnum, qnum);
1238 		res = -EINVAL;
1239 		goto parse_error;
1240 	}
1241 
1242 	/* Enable all queues available */
1243 	for (i = 0; i < qnum; i++) {
1244 		res = rte_event_queue_setup(evdev, i, NULL);
1245 		if (res < 0) {
1246 			octeontx_log_err("failed to setup event_q(%d): res %d",
1247 					i, res);
1248 			goto parse_error;
1249 		}
1250 	}
1251 
1252 	/* Enable all ports available */
1253 	for (i = 0; i < pnum; i++) {
1254 		res = rte_event_port_setup(evdev, i, NULL);
1255 		if (res < 0) {
1256 			res = -ENODEV;
1257 			octeontx_log_err("failed to setup ev port(%d) res=%d",
1258 						i, res);
1259 			goto parse_error;
1260 		}
1261 	}
1262 
1263 	/*
1264 	 * Do 1:1 links for ports & queues. All queues would be mapped to
1265 	 * one port. If there are more ports than queues, then some ports
1266 	 * won't be linked to any queue.
1267 	 */
1268 	for (i = 0; i < qnum; i++) {
1269 		/* Link one queue to one event port */
1270 		qlist = i;
1271 		res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1272 		if (res < 0) {
1273 			res = -ENODEV;
1274 			octeontx_log_err("failed to link port (%d): res=%d",
1275 					i, res);
1276 			goto parse_error;
1277 		}
1278 	}
1279 
1280 	/* Create ethdev interface */
1281 	for (i = 0; i < init_params.nr_port; i++) {
1282 		port_id = octeontx_create(dev, i, evdev, socket_id);
1283 		if (port_id < 0) {
1284 			octeontx_log_err("failed to create device %s",
1285 					dev_name);
1286 			res = -ENODEV;
1287 			goto parse_error;
1288 		}
1289 
1290 		PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1291 					port_id);
1292 	}
1293 
1294 	if (probe_once) {
1295 		octeontx_log_err("interface %s not supported", dev_name);
1296 		octeontx_remove(dev);
1297 		res = -ENOTSUP;
1298 		goto parse_error;
1299 	}
1300 	rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1301 	probe_once = 1;
1302 
1303 	return 0;
1304 
1305 parse_error:
1306 	octeontx_pko_fc_free();
1307 	return res;
1308 }
1309 
1310 static struct rte_vdev_driver octeontx_pmd_drv = {
1311 	.probe = octeontx_probe,
1312 	.remove = octeontx_remove,
1313 };
1314 
1315 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1316 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1317 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");
1318