1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_bus_vdev.h> 15 #include <rte_cycles.h> 16 #include <rte_debug.h> 17 #include <rte_devargs.h> 18 #include <rte_dev.h> 19 #include <rte_kvargs.h> 20 #include <rte_malloc.h> 21 #include <rte_mbuf_pool_ops.h> 22 #include <rte_prefetch.h> 23 24 #include "octeontx_ethdev.h" 25 #include "octeontx_rxtx.h" 26 #include "octeontx_logs.h" 27 28 struct evdev_priv_data { 29 OFFLOAD_FLAGS; /*Sequence should not be changed */ 30 } __rte_cache_aligned; 31 32 struct octeontx_vdev_init_params { 33 uint8_t nr_port; 34 }; 35 36 uint16_t 37 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 38 39 enum octeontx_link_speed { 40 OCTEONTX_LINK_SPEED_SGMII, 41 OCTEONTX_LINK_SPEED_XAUI, 42 OCTEONTX_LINK_SPEED_RXAUI, 43 OCTEONTX_LINK_SPEED_10G_R, 44 OCTEONTX_LINK_SPEED_40G_R, 45 OCTEONTX_LINK_SPEED_RESERVE1, 46 OCTEONTX_LINK_SPEED_QSGMII, 47 OCTEONTX_LINK_SPEED_RESERVE2 48 }; 49 50 int otx_net_logtype_mbox; 51 int otx_net_logtype_init; 52 int otx_net_logtype_driver; 53 54 RTE_INIT(otx_net_init_log) 55 { 56 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 57 if (otx_net_logtype_mbox >= 0) 58 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 59 60 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 61 if (otx_net_logtype_init >= 0) 62 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 63 64 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 65 if (otx_net_logtype_driver >= 0) 66 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 67 } 68 69 /* Parse integer from integer argument */ 70 static int 71 parse_integer_arg(const char *key __rte_unused, 72 const char *value, void *extra_args) 73 { 74 int *i = (int *)extra_args; 75 76 *i = atoi(value); 77 if (*i < 0) { 78 octeontx_log_err("argument has to be positive."); 79 return -1; 80 } 81 82 return 0; 83 } 84 85 static int 86 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 87 struct rte_vdev_device *dev) 88 { 89 struct rte_kvargs *kvlist = NULL; 90 int ret = 0; 91 92 static const char * const octeontx_vdev_valid_params[] = { 93 OCTEONTX_VDEV_NR_PORT_ARG, 94 NULL 95 }; 96 97 const char *input_args = rte_vdev_device_args(dev); 98 if (params == NULL) 99 return -EINVAL; 100 101 102 if (input_args) { 103 kvlist = rte_kvargs_parse(input_args, 104 octeontx_vdev_valid_params); 105 if (kvlist == NULL) 106 return -1; 107 108 ret = rte_kvargs_process(kvlist, 109 OCTEONTX_VDEV_NR_PORT_ARG, 110 &parse_integer_arg, 111 ¶ms->nr_port); 112 if (ret < 0) 113 goto free_kvlist; 114 } 115 116 free_kvlist: 117 rte_kvargs_free(kvlist); 118 return ret; 119 } 120 121 static int 122 octeontx_port_open(struct octeontx_nic *nic) 123 { 124 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 125 octeontx_mbox_bgx_port_fifo_cfg_t fifo_cfg; 126 int res; 127 128 res = 0; 129 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 130 PMD_INIT_FUNC_TRACE(); 131 132 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 133 if (res < 0) { 134 octeontx_log_err("failed to open port %d", res); 135 return res; 136 } 137 138 nic->node = bgx_port_conf.node; 139 nic->port_ena = bgx_port_conf.enable; 140 nic->base_ichan = bgx_port_conf.base_chan; 141 nic->base_ochan = bgx_port_conf.base_chan; 142 nic->num_ichans = bgx_port_conf.num_chans; 143 nic->num_ochans = bgx_port_conf.num_chans; 144 nic->bgx_mtu = bgx_port_conf.mtu; 145 nic->bpen = bgx_port_conf.bpen; 146 nic->fcs_strip = bgx_port_conf.fcs_strip; 147 nic->bcast_mode = bgx_port_conf.bcast_mode; 148 nic->mcast_mode = bgx_port_conf.mcast_mode; 149 nic->speed = bgx_port_conf.mode; 150 151 memset(&fifo_cfg, 0x0, sizeof(fifo_cfg)); 152 153 res = octeontx_bgx_port_get_fifo_cfg(nic->port_id, &fifo_cfg); 154 if (res < 0) { 155 octeontx_log_err("failed to get port %d fifo cfg", res); 156 return res; 157 } 158 159 nic->fc.rx_fifosz = fifo_cfg.rx_fifosz; 160 161 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 162 RTE_ETHER_ADDR_LEN); 163 164 octeontx_log_dbg("port opened %d", nic->port_id); 165 return res; 166 } 167 168 static void 169 octeontx_link_status_print(struct rte_eth_dev *eth_dev, 170 struct rte_eth_link *link) 171 { 172 if (link && link->link_status) 173 octeontx_log_info("Port %u: Link Up - speed %u Mbps - %s", 174 (eth_dev->data->port_id), 175 link->link_speed, 176 link->link_duplex == ETH_LINK_FULL_DUPLEX ? 177 "full-duplex" : "half-duplex"); 178 else 179 octeontx_log_info("Port %d: Link Down", 180 (int)(eth_dev->data->port_id)); 181 } 182 183 static void 184 octeontx_link_status_update(struct octeontx_nic *nic, 185 struct rte_eth_link *link) 186 { 187 memset(link, 0, sizeof(*link)); 188 189 link->link_status = nic->link_up ? ETH_LINK_UP : ETH_LINK_DOWN; 190 191 switch (nic->speed) { 192 case OCTEONTX_LINK_SPEED_SGMII: 193 link->link_speed = ETH_SPEED_NUM_1G; 194 break; 195 196 case OCTEONTX_LINK_SPEED_XAUI: 197 link->link_speed = ETH_SPEED_NUM_10G; 198 break; 199 200 case OCTEONTX_LINK_SPEED_RXAUI: 201 case OCTEONTX_LINK_SPEED_10G_R: 202 link->link_speed = ETH_SPEED_NUM_10G; 203 break; 204 case OCTEONTX_LINK_SPEED_QSGMII: 205 link->link_speed = ETH_SPEED_NUM_5G; 206 break; 207 case OCTEONTX_LINK_SPEED_40G_R: 208 link->link_speed = ETH_SPEED_NUM_40G; 209 break; 210 211 case OCTEONTX_LINK_SPEED_RESERVE1: 212 case OCTEONTX_LINK_SPEED_RESERVE2: 213 default: 214 link->link_speed = ETH_SPEED_NUM_NONE; 215 octeontx_log_err("incorrect link speed %d", nic->speed); 216 break; 217 } 218 219 link->link_duplex = ETH_LINK_FULL_DUPLEX; 220 link->link_autoneg = ETH_LINK_AUTONEG; 221 } 222 223 static void 224 octeontx_link_status_poll(void *arg) 225 { 226 struct octeontx_nic *nic = arg; 227 struct rte_eth_link link; 228 struct rte_eth_dev *dev; 229 int res; 230 231 PMD_INIT_FUNC_TRACE(); 232 233 dev = nic->dev; 234 235 res = octeontx_bgx_port_link_status(nic->port_id); 236 if (res < 0) { 237 octeontx_log_err("Failed to get port %d link status", 238 nic->port_id); 239 } else { 240 if (nic->link_up != (uint8_t)res) { 241 nic->link_up = (uint8_t)res; 242 octeontx_link_status_update(nic, &link); 243 octeontx_link_status_print(dev, &link); 244 rte_eth_linkstatus_set(dev, &link); 245 _rte_eth_dev_callback_process(dev, 246 RTE_ETH_EVENT_INTR_LSC, 247 NULL); 248 } 249 } 250 251 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 252 octeontx_link_status_poll, nic); 253 if (res < 0) 254 octeontx_log_err("Failed to restart alarm for port %d, err: %d", 255 nic->port_id, res); 256 } 257 258 static void 259 octeontx_port_close(struct octeontx_nic *nic) 260 { 261 PMD_INIT_FUNC_TRACE(); 262 263 rte_eal_alarm_cancel(octeontx_link_status_poll, nic); 264 octeontx_bgx_port_close(nic->port_id); 265 octeontx_log_dbg("port closed %d", nic->port_id); 266 } 267 268 static int 269 octeontx_port_start(struct octeontx_nic *nic) 270 { 271 PMD_INIT_FUNC_TRACE(); 272 273 return octeontx_bgx_port_start(nic->port_id); 274 } 275 276 static int 277 octeontx_port_stop(struct octeontx_nic *nic) 278 { 279 PMD_INIT_FUNC_TRACE(); 280 281 return octeontx_bgx_port_stop(nic->port_id); 282 } 283 284 static int 285 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 286 { 287 struct rte_eth_dev *dev; 288 int res; 289 290 res = 0; 291 PMD_INIT_FUNC_TRACE(); 292 dev = nic->dev; 293 294 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 295 if (res < 0) { 296 octeontx_log_err("failed to set promiscuous mode %d", 297 nic->port_id); 298 return res; 299 } 300 301 /* Set proper flag for the mode */ 302 dev->data->promiscuous = (en != 0) ? 1 : 0; 303 304 octeontx_log_dbg("port %d : promiscuous mode %s", 305 nic->port_id, en ? "set" : "unset"); 306 307 return 0; 308 } 309 310 static int 311 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 312 { 313 octeontx_mbox_bgx_port_stats_t bgx_stats; 314 int res; 315 316 PMD_INIT_FUNC_TRACE(); 317 318 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 319 if (res < 0) { 320 octeontx_log_err("failed to get port stats %d", nic->port_id); 321 return res; 322 } 323 324 stats->ipackets = bgx_stats.rx_packets; 325 stats->ibytes = bgx_stats.rx_bytes; 326 stats->imissed = bgx_stats.rx_dropped; 327 stats->ierrors = bgx_stats.rx_errors; 328 stats->opackets = bgx_stats.tx_packets; 329 stats->obytes = bgx_stats.tx_bytes; 330 stats->oerrors = bgx_stats.tx_errors; 331 332 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 333 nic->port_id, stats->ipackets, stats->opackets); 334 335 return 0; 336 } 337 338 static int 339 octeontx_port_stats_clr(struct octeontx_nic *nic) 340 { 341 PMD_INIT_FUNC_TRACE(); 342 343 return octeontx_bgx_port_stats_clr(nic->port_id); 344 } 345 346 static inline void 347 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 348 struct rte_event_dev_info *info) 349 { 350 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 351 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 352 353 dev_conf->nb_event_ports = info->max_event_ports; 354 dev_conf->nb_event_queues = info->max_event_queues; 355 356 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 357 dev_conf->nb_event_port_dequeue_depth = 358 info->max_event_port_dequeue_depth; 359 dev_conf->nb_event_port_enqueue_depth = 360 info->max_event_port_enqueue_depth; 361 dev_conf->nb_event_port_enqueue_depth = 362 info->max_event_port_enqueue_depth; 363 dev_conf->nb_events_limit = 364 info->max_num_events; 365 } 366 367 static uint16_t 368 octeontx_tx_offload_flags(struct rte_eth_dev *eth_dev) 369 { 370 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 371 uint16_t flags = 0; 372 373 if (!(nic->tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)) 374 flags |= OCCTX_TX_OFFLOAD_MBUF_NOFF_F; 375 376 if (nic->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS) 377 flags |= OCCTX_TX_MULTI_SEG_F; 378 379 return flags; 380 } 381 382 static uint16_t 383 octeontx_rx_offload_flags(struct rte_eth_dev *eth_dev) 384 { 385 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 386 struct rte_eth_dev_data *data = eth_dev->data; 387 struct rte_eth_conf *conf = &data->dev_conf; 388 struct rte_eth_rxmode *rxmode = &conf->rxmode; 389 uint16_t flags = 0; 390 391 if (rxmode->mq_mode == ETH_MQ_RX_RSS) 392 flags |= OCCTX_RX_OFFLOAD_RSS_F; 393 394 if (nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) { 395 flags |= OCCTX_RX_MULTI_SEG_F; 396 eth_dev->data->scattered_rx = 1; 397 /* If scatter mode is enabled, TX should also be in multi 398 * seg mode, else memory leak will occur 399 */ 400 nic->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; 401 } 402 403 return flags; 404 } 405 406 static int 407 octeontx_dev_configure(struct rte_eth_dev *dev) 408 { 409 struct rte_eth_dev_data *data = dev->data; 410 struct rte_eth_conf *conf = &data->dev_conf; 411 struct rte_eth_rxmode *rxmode = &conf->rxmode; 412 struct rte_eth_txmode *txmode = &conf->txmode; 413 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 414 int ret; 415 416 PMD_INIT_FUNC_TRACE(); 417 RTE_SET_USED(conf); 418 419 if (!rte_eal_has_hugepages()) { 420 octeontx_log_err("huge page is not configured"); 421 return -EINVAL; 422 } 423 424 if (txmode->mq_mode) { 425 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 426 return -EINVAL; 427 } 428 429 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 430 rxmode->mq_mode != ETH_MQ_RX_RSS) { 431 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 432 return -EINVAL; 433 } 434 435 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 436 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 437 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 438 } 439 440 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 441 octeontx_log_err("setting link speed/duplex not supported"); 442 return -EINVAL; 443 } 444 445 if (conf->dcb_capability_en) { 446 octeontx_log_err("DCB enable not supported"); 447 return -EINVAL; 448 } 449 450 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 451 octeontx_log_err("flow director not supported"); 452 return -EINVAL; 453 } 454 455 nic->num_tx_queues = dev->data->nb_tx_queues; 456 457 ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ, 458 nic->num_tx_queues, 459 nic->base_ochan); 460 if (ret) { 461 octeontx_log_err("failed to open channel %d no-of-txq %d", 462 nic->base_ochan, nic->num_tx_queues); 463 return -EFAULT; 464 } 465 466 ret = octeontx_dev_vlan_offload_init(dev); 467 if (ret) { 468 octeontx_log_err("failed to initialize vlan offload"); 469 return -EFAULT; 470 } 471 472 nic->pki.classifier_enable = false; 473 nic->pki.hash_enable = true; 474 nic->pki.initialized = false; 475 476 nic->rx_offloads |= rxmode->offloads; 477 nic->tx_offloads |= txmode->offloads; 478 nic->rx_offload_flags |= octeontx_rx_offload_flags(dev); 479 nic->tx_offload_flags |= octeontx_tx_offload_flags(dev); 480 481 return 0; 482 } 483 484 static void 485 octeontx_dev_close(struct rte_eth_dev *dev) 486 { 487 struct octeontx_txq *txq = NULL; 488 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 489 unsigned int i; 490 int ret; 491 492 PMD_INIT_FUNC_TRACE(); 493 494 rte_event_dev_close(nic->evdev); 495 496 octeontx_dev_flow_ctrl_fini(dev); 497 498 octeontx_dev_vlan_offload_fini(dev); 499 500 ret = octeontx_pko_channel_close(nic->base_ochan); 501 if (ret < 0) { 502 octeontx_log_err("failed to close channel %d VF%d %d %d", 503 nic->base_ochan, nic->port_id, nic->num_tx_queues, 504 ret); 505 } 506 /* Free txq resources for this port */ 507 for (i = 0; i < nic->num_tx_queues; i++) { 508 txq = dev->data->tx_queues[i]; 509 if (!txq) 510 continue; 511 512 rte_free(txq); 513 } 514 515 /* Free MAC address table */ 516 rte_free(dev->data->mac_addrs); 517 dev->data->mac_addrs = NULL; 518 519 octeontx_port_close(nic); 520 521 dev->tx_pkt_burst = NULL; 522 dev->rx_pkt_burst = NULL; 523 } 524 525 static int 526 octeontx_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 527 { 528 uint32_t buffsz, frame_size = mtu + OCCTX_L2_OVERHEAD; 529 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 530 struct rte_eth_dev_data *data = eth_dev->data; 531 int rc = 0; 532 533 /* Check if MTU is within the allowed range */ 534 if (frame_size < OCCTX_MIN_FRS || frame_size > OCCTX_MAX_FRS) 535 return -EINVAL; 536 537 buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; 538 539 /* Refuse MTU that requires the support of scattered packets 540 * when this feature has not been enabled before. 541 */ 542 if (data->dev_started && frame_size > buffsz && 543 !(nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) { 544 octeontx_log_err("Scatter mode is disabled"); 545 return -EINVAL; 546 } 547 548 /* Check <seg size> * <max_seg> >= max_frame */ 549 if ((nic->rx_offloads & DEV_RX_OFFLOAD_SCATTER) && 550 (frame_size > buffsz * OCCTX_RX_NB_SEG_MAX)) 551 return -EINVAL; 552 553 rc = octeontx_pko_send_mtu(nic->port_id, frame_size); 554 if (rc) 555 return rc; 556 557 rc = octeontx_bgx_port_mtu_set(nic->port_id, frame_size); 558 if (rc) 559 return rc; 560 561 if (frame_size > RTE_ETHER_MAX_LEN) 562 nic->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; 563 else 564 nic->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME; 565 566 /* Update max_rx_pkt_len */ 567 data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 568 octeontx_log_info("Received pkt beyond maxlen %d will be dropped", 569 frame_size); 570 571 return rc; 572 } 573 574 static int 575 octeontx_recheck_rx_offloads(struct octeontx_rxq *rxq) 576 { 577 struct rte_eth_dev *eth_dev = rxq->eth_dev; 578 struct octeontx_nic *nic = octeontx_pmd_priv(eth_dev); 579 struct rte_eth_dev_data *data = eth_dev->data; 580 struct rte_pktmbuf_pool_private *mbp_priv; 581 struct evdev_priv_data *evdev_priv; 582 struct rte_eventdev *dev; 583 uint32_t buffsz; 584 585 /* Get rx buffer size */ 586 mbp_priv = rte_mempool_get_priv(rxq->pool); 587 buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM; 588 589 /* Setup scatter mode if needed by jumbo */ 590 if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz) { 591 nic->rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 592 nic->rx_offload_flags |= octeontx_rx_offload_flags(eth_dev); 593 nic->tx_offload_flags |= octeontx_tx_offload_flags(eth_dev); 594 } 595 596 /* Sharing offload flags via eventdev priv region */ 597 dev = &rte_eventdevs[rxq->evdev]; 598 evdev_priv = dev->data->dev_private; 599 evdev_priv->rx_offload_flags = nic->rx_offload_flags; 600 evdev_priv->tx_offload_flags = nic->tx_offload_flags; 601 602 /* Setup MTU based on max_rx_pkt_len */ 603 nic->mtu = data->dev_conf.rxmode.max_rx_pkt_len - OCCTX_L2_OVERHEAD; 604 605 return 0; 606 } 607 608 static int 609 octeontx_dev_start(struct rte_eth_dev *dev) 610 { 611 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 612 struct octeontx_rxq *rxq; 613 int ret, i; 614 615 PMD_INIT_FUNC_TRACE(); 616 /* Rechecking if any new offload set to update 617 * rx/tx burst function pointer accordingly. 618 */ 619 for (i = 0; i < dev->data->nb_rx_queues; i++) { 620 rxq = dev->data->rx_queues[i]; 621 octeontx_recheck_rx_offloads(rxq); 622 } 623 624 /* Setting up the mtu based on max_rx_pkt_len */ 625 ret = octeontx_dev_mtu_set(dev, nic->mtu); 626 if (ret) { 627 octeontx_log_err("Failed to set default MTU size %d", ret); 628 goto error; 629 } 630 631 /* 632 * Tx start 633 */ 634 octeontx_set_tx_function(dev); 635 ret = octeontx_pko_channel_start(nic->base_ochan); 636 if (ret < 0) { 637 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 638 nic->port_id, nic->num_tx_queues, nic->base_ochan, 639 ret); 640 goto error; 641 } 642 643 /* 644 * Rx start 645 */ 646 dev->rx_pkt_burst = octeontx_recv_pkts; 647 ret = octeontx_pki_port_start(nic->port_id); 648 if (ret < 0) { 649 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 650 goto channel_stop_error; 651 } 652 653 /* 654 * Start port 655 */ 656 ret = octeontx_port_start(nic); 657 if (ret < 0) { 658 octeontx_log_err("failed start port %d", ret); 659 goto pki_port_stop_error; 660 } 661 662 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 663 nic->base_ochan, nic->num_tx_queues, nic->port_id); 664 665 ret = rte_event_dev_start(nic->evdev); 666 if (ret < 0) { 667 octeontx_log_err("failed to start evdev: ret (%d)", ret); 668 goto pki_port_stop_error; 669 } 670 671 /* Success */ 672 return ret; 673 674 pki_port_stop_error: 675 octeontx_pki_port_stop(nic->port_id); 676 channel_stop_error: 677 octeontx_pko_channel_stop(nic->base_ochan); 678 error: 679 return ret; 680 } 681 682 static void 683 octeontx_dev_stop(struct rte_eth_dev *dev) 684 { 685 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 686 int ret; 687 688 PMD_INIT_FUNC_TRACE(); 689 690 rte_event_dev_stop(nic->evdev); 691 692 ret = octeontx_port_stop(nic); 693 if (ret < 0) { 694 octeontx_log_err("failed to req stop port %d res=%d", 695 nic->port_id, ret); 696 return; 697 } 698 699 ret = octeontx_pki_port_stop(nic->port_id); 700 if (ret < 0) { 701 octeontx_log_err("failed to stop pki port %d res=%d", 702 nic->port_id, ret); 703 return; 704 } 705 706 ret = octeontx_pko_channel_stop(nic->base_ochan); 707 if (ret < 0) { 708 octeontx_log_err("failed to stop channel %d VF%d %d %d", 709 nic->base_ochan, nic->port_id, nic->num_tx_queues, 710 ret); 711 return; 712 } 713 } 714 715 static int 716 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 717 { 718 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 719 720 PMD_INIT_FUNC_TRACE(); 721 return octeontx_port_promisc_set(nic, 1); 722 } 723 724 static int 725 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 726 { 727 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 728 729 PMD_INIT_FUNC_TRACE(); 730 return octeontx_port_promisc_set(nic, 0); 731 } 732 733 static int 734 octeontx_port_link_status(struct octeontx_nic *nic) 735 { 736 int res; 737 738 PMD_INIT_FUNC_TRACE(); 739 res = octeontx_bgx_port_link_status(nic->port_id); 740 if (res < 0) { 741 octeontx_log_err("failed to get port %d link status", 742 nic->port_id); 743 return res; 744 } 745 746 if (nic->link_up != (uint8_t)res || nic->print_flag == -1) { 747 nic->link_up = (uint8_t)res; 748 nic->print_flag = 1; 749 } 750 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 751 752 return res; 753 } 754 755 /* 756 * Return 0 means link status changed, -1 means not changed 757 */ 758 static int 759 octeontx_dev_link_update(struct rte_eth_dev *dev, 760 int wait_to_complete __rte_unused) 761 { 762 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 763 struct rte_eth_link link; 764 int res; 765 766 PMD_INIT_FUNC_TRACE(); 767 768 res = octeontx_port_link_status(nic); 769 if (res < 0) { 770 octeontx_log_err("failed to request link status %d", res); 771 return res; 772 } 773 774 octeontx_link_status_update(nic, &link); 775 if (nic->print_flag) { 776 octeontx_link_status_print(nic->dev, &link); 777 nic->print_flag = 0; 778 } 779 780 return rte_eth_linkstatus_set(dev, &link); 781 } 782 783 static int 784 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 785 { 786 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 787 788 PMD_INIT_FUNC_TRACE(); 789 return octeontx_port_stats(nic, stats); 790 } 791 792 static int 793 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 794 { 795 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 796 797 PMD_INIT_FUNC_TRACE(); 798 return octeontx_port_stats_clr(nic); 799 } 800 801 static void 802 octeontx_dev_mac_addr_del(struct rte_eth_dev *dev, uint32_t index) 803 { 804 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 805 int ret; 806 807 ret = octeontx_bgx_port_mac_del(nic->port_id, index); 808 if (ret != 0) 809 octeontx_log_err("failed to del MAC address filter on port %d", 810 nic->port_id); 811 } 812 813 static int 814 octeontx_dev_mac_addr_add(struct rte_eth_dev *dev, 815 struct rte_ether_addr *mac_addr, 816 uint32_t index, 817 __rte_unused uint32_t vmdq) 818 { 819 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 820 int ret; 821 822 ret = octeontx_bgx_port_mac_add(nic->port_id, mac_addr->addr_bytes, 823 index); 824 if (ret < 0) { 825 octeontx_log_err("failed to add MAC address filter on port %d", 826 nic->port_id); 827 return ret; 828 } 829 830 return 0; 831 } 832 833 static int 834 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 835 struct rte_ether_addr *addr) 836 { 837 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 838 int ret; 839 840 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 841 if (ret == 0) { 842 /* Update same mac address to BGX CAM table */ 843 ret = octeontx_bgx_port_mac_add(nic->port_id, addr->addr_bytes, 844 0); 845 } 846 if (ret < 0) { 847 octeontx_log_err("failed to set MAC address on port %d", 848 nic->port_id); 849 } 850 851 return ret; 852 } 853 854 static int 855 octeontx_dev_info(struct rte_eth_dev *dev, 856 struct rte_eth_dev_info *dev_info) 857 { 858 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 859 860 /* Autonegotiation may be disabled */ 861 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 862 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 863 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 864 ETH_LINK_SPEED_40G; 865 866 /* Min/Max MTU supported */ 867 dev_info->min_rx_bufsize = OCCTX_MIN_FRS; 868 dev_info->max_rx_pktlen = OCCTX_MAX_FRS; 869 dev_info->max_mtu = dev_info->max_rx_pktlen - OCCTX_L2_OVERHEAD; 870 dev_info->min_mtu = dev_info->min_rx_bufsize - OCCTX_L2_OVERHEAD; 871 872 dev_info->max_mac_addrs = 873 octeontx_bgx_port_mac_entries_get(nic->port_id); 874 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 875 dev_info->max_rx_queues = 1; 876 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 877 dev_info->min_rx_bufsize = 0; 878 879 dev_info->default_rxconf = (struct rte_eth_rxconf) { 880 .rx_free_thresh = 0, 881 .rx_drop_en = 0, 882 .offloads = OCTEONTX_RX_OFFLOADS, 883 }; 884 885 dev_info->default_txconf = (struct rte_eth_txconf) { 886 .tx_free_thresh = 0, 887 .offloads = OCTEONTX_TX_OFFLOADS, 888 }; 889 890 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 891 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 892 dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS; 893 dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS; 894 895 return 0; 896 } 897 898 static void 899 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 900 { 901 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 902 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 903 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 904 } 905 906 static int 907 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 908 uint16_t qidx) 909 { 910 struct octeontx_txq *txq; 911 int res; 912 913 PMD_INIT_FUNC_TRACE(); 914 915 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 916 return 0; 917 918 txq = dev->data->tx_queues[qidx]; 919 920 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 921 &txq->dq, 922 sizeof(octeontx_dq_t), 923 txq->queue_id, 924 octeontx_dq_info_getter); 925 if (res < 0) { 926 res = -EFAULT; 927 goto close_port; 928 } 929 930 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 931 return res; 932 933 close_port: 934 (void)octeontx_port_stop(nic); 935 octeontx_pko_channel_stop(nic->base_ochan); 936 octeontx_pko_channel_close(nic->base_ochan); 937 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 938 return res; 939 } 940 941 int 942 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 943 { 944 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 945 946 PMD_INIT_FUNC_TRACE(); 947 qidx = qidx % PKO_VF_NUM_DQ; 948 return octeontx_vf_start_tx_queue(dev, nic, qidx); 949 } 950 951 static inline int 952 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 953 uint16_t qidx) 954 { 955 int ret = 0; 956 957 RTE_SET_USED(nic); 958 PMD_INIT_FUNC_TRACE(); 959 960 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 961 return 0; 962 963 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 964 return ret; 965 } 966 967 int 968 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 969 { 970 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 971 972 PMD_INIT_FUNC_TRACE(); 973 qidx = qidx % PKO_VF_NUM_DQ; 974 975 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 976 } 977 978 static void 979 octeontx_dev_tx_queue_release(void *tx_queue) 980 { 981 struct octeontx_txq *txq = tx_queue; 982 int res; 983 984 PMD_INIT_FUNC_TRACE(); 985 986 if (txq) { 987 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 988 if (res < 0) 989 octeontx_log_err("failed stop tx_queue(%d)\n", 990 txq->queue_id); 991 992 rte_free(txq); 993 } 994 } 995 996 static int 997 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 998 uint16_t nb_desc, unsigned int socket_id, 999 const struct rte_eth_txconf *tx_conf __rte_unused) 1000 { 1001 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1002 struct octeontx_txq *txq = NULL; 1003 uint16_t dq_num; 1004 int res = 0; 1005 1006 RTE_SET_USED(nb_desc); 1007 RTE_SET_USED(socket_id); 1008 1009 dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx; 1010 1011 /* Socket id check */ 1012 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1013 socket_id != (unsigned int)nic->node) 1014 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 1015 socket_id, nic->node); 1016 1017 /* Free memory prior to re-allocation if needed. */ 1018 if (dev->data->tx_queues[qidx] != NULL) { 1019 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 1020 qidx); 1021 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 1022 dev->data->tx_queues[qidx] = NULL; 1023 } 1024 1025 /* Allocating tx queue data structure */ 1026 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 1027 RTE_CACHE_LINE_SIZE, nic->node); 1028 if (txq == NULL) { 1029 octeontx_log_err("failed to allocate txq=%d", qidx); 1030 res = -ENOMEM; 1031 goto err; 1032 } 1033 1034 txq->eth_dev = dev; 1035 txq->queue_id = dq_num; 1036 dev->data->tx_queues[qidx] = txq; 1037 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1038 1039 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 1040 &txq->dq, 1041 sizeof(octeontx_dq_t), 1042 txq->queue_id, 1043 octeontx_dq_info_getter); 1044 if (res < 0) { 1045 res = -EFAULT; 1046 goto err; 1047 } 1048 1049 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 1050 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 1051 txq->dq.ioreg_va, 1052 txq->dq.fc_status_va); 1053 1054 return res; 1055 1056 err: 1057 if (txq) 1058 rte_free(txq); 1059 1060 return res; 1061 } 1062 1063 static int 1064 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 1065 uint16_t nb_desc, unsigned int socket_id, 1066 const struct rte_eth_rxconf *rx_conf, 1067 struct rte_mempool *mb_pool) 1068 { 1069 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 1070 struct rte_mempool_ops *mp_ops = NULL; 1071 struct octeontx_rxq *rxq = NULL; 1072 pki_pktbuf_cfg_t pktbuf_conf; 1073 pki_hash_cfg_t pki_hash; 1074 pki_qos_cfg_t pki_qos; 1075 uintptr_t pool; 1076 int ret, port; 1077 uint16_t gaura; 1078 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 1079 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 1080 1081 RTE_SET_USED(nb_desc); 1082 1083 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 1084 memset(&pki_hash, 0, sizeof(pki_hash)); 1085 memset(&pki_qos, 0, sizeof(pki_qos)); 1086 1087 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 1088 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 1089 octeontx_log_err("failed to find octeontx_fpavf mempool"); 1090 return -ENOTSUP; 1091 } 1092 1093 /* Handle forbidden configurations */ 1094 if (nic->pki.classifier_enable) { 1095 octeontx_log_err("cannot setup queue %d. " 1096 "Classifier option unsupported", qidx); 1097 return -EINVAL; 1098 } 1099 1100 port = nic->port_id; 1101 1102 /* Rx deferred start is not supported */ 1103 if (rx_conf->rx_deferred_start) { 1104 octeontx_log_err("rx deferred start not supported"); 1105 return -EINVAL; 1106 } 1107 1108 /* Verify queue index */ 1109 if (qidx >= dev->data->nb_rx_queues) { 1110 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 1111 qidx, (dev->data->nb_rx_queues - 1)); 1112 return -ENOTSUP; 1113 } 1114 1115 /* Socket id check */ 1116 if (socket_id != (unsigned int)SOCKET_ID_ANY && 1117 socket_id != (unsigned int)nic->node) 1118 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 1119 socket_id, nic->node); 1120 1121 /* Allocating rx queue data structure */ 1122 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 1123 RTE_CACHE_LINE_SIZE, nic->node); 1124 if (rxq == NULL) { 1125 octeontx_log_err("failed to allocate rxq=%d", qidx); 1126 return -ENOMEM; 1127 } 1128 1129 if (!nic->pki.initialized) { 1130 pktbuf_conf.port_type = 0; 1131 pki_hash.port_type = 0; 1132 pki_qos.port_type = 0; 1133 1134 pktbuf_conf.mmask.f_wqe_skip = 1; 1135 pktbuf_conf.mmask.f_first_skip = 1; 1136 pktbuf_conf.mmask.f_later_skip = 1; 1137 pktbuf_conf.mmask.f_mbuff_size = 1; 1138 pktbuf_conf.mmask.f_cache_mode = 1; 1139 1140 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 1141 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 1142 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 1143 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 1144 RTE_PKTMBUF_HEADROOM - 1145 rte_pktmbuf_priv_size(mb_pool) - 1146 sizeof(struct rte_mbuf)); 1147 1148 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 1149 1150 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 1151 if (ret != 0) { 1152 octeontx_log_err("fail to configure pktbuf for port %d", 1153 port); 1154 rte_free(rxq); 1155 return ret; 1156 } 1157 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 1158 "\tmbuf_size:\t0x%0x\n" 1159 "\twqe_skip:\t0x%0x\n" 1160 "\tfirst_skip:\t0x%0x\n" 1161 "\tlater_skip:\t0x%0x\n" 1162 "\tcache_mode:\t%s\n", 1163 port, 1164 pktbuf_conf.mbuff_size, 1165 pktbuf_conf.wqe_skip, 1166 pktbuf_conf.first_skip, 1167 pktbuf_conf.later_skip, 1168 (pktbuf_conf.cache_mode == 1169 PKI_OPC_MODE_STT) ? 1170 "STT" : 1171 (pktbuf_conf.cache_mode == 1172 PKI_OPC_MODE_STF) ? 1173 "STF" : 1174 (pktbuf_conf.cache_mode == 1175 PKI_OPC_MODE_STF1_STT) ? 1176 "STF1_STT" : "STF2_STT"); 1177 1178 if (nic->pki.hash_enable) { 1179 pki_hash.tag_dlc = 1; 1180 pki_hash.tag_slc = 1; 1181 pki_hash.tag_dlf = 1; 1182 pki_hash.tag_slf = 1; 1183 pki_hash.tag_prt = 1; 1184 octeontx_pki_port_hash_config(port, &pki_hash); 1185 } 1186 1187 pool = (uintptr_t)mb_pool->pool_id; 1188 1189 /* Get the gaura Id */ 1190 gaura = octeontx_fpa_bufpool_gaura(pool); 1191 1192 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 1193 pki_qos.num_entry = 1; 1194 pki_qos.drop_policy = 0; 1195 pki_qos.tag_type = 0L; 1196 pki_qos.qos_entry[0].port_add = 0; 1197 pki_qos.qos_entry[0].gaura = gaura; 1198 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 1199 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 1200 pki_qos.qos_entry[0].grptag_bad = 0; 1201 pki_qos.qos_entry[0].grptag_ok = 0; 1202 1203 ret = octeontx_pki_port_create_qos(port, &pki_qos); 1204 if (ret < 0) { 1205 octeontx_log_err("failed to create QOS port=%d, q=%d", 1206 port, qidx); 1207 rte_free(rxq); 1208 return ret; 1209 } 1210 nic->pki.initialized = true; 1211 } 1212 1213 rxq->port_id = nic->port_id; 1214 rxq->eth_dev = dev; 1215 rxq->queue_id = qidx; 1216 rxq->evdev = nic->evdev; 1217 rxq->ev_queues = ev_queues; 1218 rxq->ev_ports = ev_ports; 1219 rxq->pool = mb_pool; 1220 1221 octeontx_recheck_rx_offloads(rxq); 1222 dev->data->rx_queues[qidx] = rxq; 1223 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 1224 1225 return 0; 1226 } 1227 1228 static void 1229 octeontx_dev_rx_queue_release(void *rxq) 1230 { 1231 rte_free(rxq); 1232 } 1233 1234 static const uint32_t * 1235 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1236 { 1237 static const uint32_t ptypes[] = { 1238 RTE_PTYPE_L3_IPV4, 1239 RTE_PTYPE_L3_IPV4_EXT, 1240 RTE_PTYPE_L3_IPV6, 1241 RTE_PTYPE_L3_IPV6_EXT, 1242 RTE_PTYPE_L4_TCP, 1243 RTE_PTYPE_L4_UDP, 1244 RTE_PTYPE_L4_FRAG, 1245 RTE_PTYPE_UNKNOWN 1246 }; 1247 1248 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1249 return ptypes; 1250 1251 return NULL; 1252 } 1253 1254 static int 1255 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1256 { 1257 RTE_SET_USED(dev); 1258 1259 if (!strcmp(pool, "octeontx_fpavf")) 1260 return 0; 1261 1262 return -ENOTSUP; 1263 } 1264 1265 /* Initialize and register driver with DPDK Application */ 1266 static const struct eth_dev_ops octeontx_dev_ops = { 1267 .dev_configure = octeontx_dev_configure, 1268 .dev_infos_get = octeontx_dev_info, 1269 .dev_close = octeontx_dev_close, 1270 .dev_start = octeontx_dev_start, 1271 .dev_stop = octeontx_dev_stop, 1272 .promiscuous_enable = octeontx_dev_promisc_enable, 1273 .promiscuous_disable = octeontx_dev_promisc_disable, 1274 .link_update = octeontx_dev_link_update, 1275 .stats_get = octeontx_dev_stats_get, 1276 .stats_reset = octeontx_dev_stats_reset, 1277 .mac_addr_remove = octeontx_dev_mac_addr_del, 1278 .mac_addr_add = octeontx_dev_mac_addr_add, 1279 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1280 .vlan_offload_set = octeontx_dev_vlan_offload_set, 1281 .vlan_filter_set = octeontx_dev_vlan_filter_set, 1282 .tx_queue_start = octeontx_dev_tx_queue_start, 1283 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1284 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1285 .tx_queue_release = octeontx_dev_tx_queue_release, 1286 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1287 .rx_queue_release = octeontx_dev_rx_queue_release, 1288 .dev_set_link_up = octeontx_dev_set_link_up, 1289 .dev_set_link_down = octeontx_dev_set_link_down, 1290 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1291 .mtu_set = octeontx_dev_mtu_set, 1292 .pool_ops_supported = octeontx_pool_ops, 1293 .flow_ctrl_get = octeontx_dev_flow_ctrl_get, 1294 .flow_ctrl_set = octeontx_dev_flow_ctrl_set, 1295 }; 1296 1297 /* Create Ethdev interface per BGX LMAC ports */ 1298 static int 1299 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1300 int socket_id) 1301 { 1302 int res; 1303 size_t pko_vfid; 1304 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1305 struct octeontx_nic *nic = NULL; 1306 struct rte_eth_dev *eth_dev = NULL; 1307 struct rte_eth_dev_data *data; 1308 const char *name = rte_vdev_device_name(dev); 1309 int max_entries; 1310 1311 PMD_INIT_FUNC_TRACE(); 1312 1313 sprintf(octtx_name, "%s_%d", name, port); 1314 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1315 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1316 if (eth_dev == NULL) 1317 return -ENODEV; 1318 1319 eth_dev->dev_ops = &octeontx_dev_ops; 1320 eth_dev->device = &dev->device; 1321 octeontx_set_tx_function(eth_dev); 1322 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1323 rte_eth_dev_probing_finish(eth_dev); 1324 return 0; 1325 } 1326 1327 /* Reserve an ethdev entry */ 1328 eth_dev = rte_eth_dev_allocate(octtx_name); 1329 if (eth_dev == NULL) { 1330 octeontx_log_err("failed to allocate rte_eth_dev"); 1331 res = -ENOMEM; 1332 goto err; 1333 } 1334 data = eth_dev->data; 1335 1336 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1337 if (nic == NULL) { 1338 octeontx_log_err("failed to allocate nic structure"); 1339 res = -ENOMEM; 1340 goto err; 1341 } 1342 data->dev_private = nic; 1343 pko_vfid = octeontx_pko_get_vfid(); 1344 1345 if (pko_vfid == SIZE_MAX) { 1346 octeontx_log_err("failed to get pko vfid"); 1347 res = -ENODEV; 1348 goto err; 1349 } 1350 1351 nic->pko_vfid = pko_vfid; 1352 nic->port_id = port; 1353 nic->evdev = evdev; 1354 1355 res = octeontx_port_open(nic); 1356 if (res < 0) 1357 goto err; 1358 1359 /* Rx side port configuration */ 1360 res = octeontx_pki_port_open(port); 1361 if (res != 0) { 1362 octeontx_log_err("failed to open PKI port %d", port); 1363 res = -ENODEV; 1364 goto err; 1365 } 1366 1367 eth_dev->device = &dev->device; 1368 eth_dev->intr_handle = NULL; 1369 eth_dev->data->kdrv = RTE_KDRV_NONE; 1370 eth_dev->data->numa_node = dev->device.numa_node; 1371 1372 data->port_id = eth_dev->data->port_id; 1373 1374 nic->ev_queues = 1; 1375 nic->ev_ports = 1; 1376 nic->print_flag = -1; 1377 1378 data->dev_link.link_status = ETH_LINK_DOWN; 1379 data->dev_started = 0; 1380 data->promiscuous = 0; 1381 data->all_multicast = 0; 1382 data->scattered_rx = 0; 1383 1384 /* Get maximum number of supported MAC entries */ 1385 max_entries = octeontx_bgx_port_mac_entries_get(nic->port_id); 1386 if (max_entries < 0) { 1387 octeontx_log_err("Failed to get max entries for mac addr"); 1388 res = -ENOTSUP; 1389 goto err; 1390 } 1391 1392 data->mac_addrs = rte_zmalloc_socket(octtx_name, max_entries * 1393 RTE_ETHER_ADDR_LEN, 0, 1394 socket_id); 1395 if (data->mac_addrs == NULL) { 1396 octeontx_log_err("failed to allocate memory for mac_addrs"); 1397 res = -ENOMEM; 1398 goto err; 1399 } 1400 1401 eth_dev->dev_ops = &octeontx_dev_ops; 1402 1403 /* Finally save ethdev pointer to the NIC structure */ 1404 nic->dev = eth_dev; 1405 1406 if (nic->port_id != data->port_id) { 1407 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1408 data->port_id, nic->port_id); 1409 res = -EINVAL; 1410 goto free_mac_addrs; 1411 } 1412 1413 res = rte_eal_alarm_set(OCCTX_INTR_POLL_INTERVAL_MS * 1000, 1414 octeontx_link_status_poll, nic); 1415 if (res) { 1416 octeontx_log_err("Failed to start link polling alarm"); 1417 goto err; 1418 } 1419 1420 /* Update port_id mac to eth_dev */ 1421 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1422 1423 /* Update same mac address to BGX CAM table at index 0 */ 1424 octeontx_bgx_port_mac_add(nic->port_id, nic->mac_addr, 0); 1425 1426 res = octeontx_dev_flow_ctrl_init(eth_dev); 1427 if (res < 0) 1428 goto err; 1429 1430 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1431 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1432 nic->port_id, nic->port_ena, 1433 nic->base_ochan, nic->num_ochans, 1434 nic->num_tx_queues); 1435 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->bgx_mtu); 1436 1437 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1438 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1439 1440 rte_eth_dev_probing_finish(eth_dev); 1441 return data->port_id; 1442 1443 free_mac_addrs: 1444 rte_free(data->mac_addrs); 1445 err: 1446 if (nic) 1447 octeontx_port_close(nic); 1448 1449 rte_eth_dev_release_port(eth_dev); 1450 1451 return res; 1452 } 1453 1454 /* Un initialize octeontx device */ 1455 static int 1456 octeontx_remove(struct rte_vdev_device *dev) 1457 { 1458 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1459 struct rte_eth_dev *eth_dev = NULL; 1460 struct octeontx_nic *nic = NULL; 1461 int i; 1462 1463 if (dev == NULL) 1464 return -EINVAL; 1465 1466 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1467 sprintf(octtx_name, "eth_octeontx_%d", i); 1468 1469 /* reserve an ethdev entry */ 1470 eth_dev = rte_eth_dev_allocated(octtx_name); 1471 if (eth_dev == NULL) 1472 return -ENODEV; 1473 1474 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1475 rte_eth_dev_release_port(eth_dev); 1476 continue; 1477 } 1478 1479 nic = octeontx_pmd_priv(eth_dev); 1480 rte_event_dev_stop(nic->evdev); 1481 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1482 1483 rte_eth_dev_release_port(eth_dev); 1484 rte_event_dev_close(nic->evdev); 1485 } 1486 1487 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1488 return 0; 1489 1490 /* Free FC resource */ 1491 octeontx_pko_fc_free(); 1492 1493 return 0; 1494 } 1495 1496 /* Initialize octeontx device */ 1497 static int 1498 octeontx_probe(struct rte_vdev_device *dev) 1499 { 1500 const char *dev_name; 1501 static int probe_once; 1502 uint8_t socket_id, qlist; 1503 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1504 struct rte_event_dev_config dev_conf; 1505 const char *eventdev_name = "event_octeontx"; 1506 struct rte_event_dev_info info; 1507 struct rte_eth_dev *eth_dev; 1508 1509 struct octeontx_vdev_init_params init_params = { 1510 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1511 }; 1512 1513 dev_name = rte_vdev_device_name(dev); 1514 1515 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1516 strlen(rte_vdev_device_args(dev)) == 0) { 1517 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1518 if (!eth_dev) { 1519 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1520 return -1; 1521 } 1522 /* TODO: request info from primary to set up Rx and Tx */ 1523 eth_dev->dev_ops = &octeontx_dev_ops; 1524 eth_dev->device = &dev->device; 1525 rte_eth_dev_probing_finish(eth_dev); 1526 return 0; 1527 } 1528 1529 res = octeontx_parse_vdev_init_params(&init_params, dev); 1530 if (res < 0) 1531 return -EINVAL; 1532 1533 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1534 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1535 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1536 return -ENOTSUP; 1537 } 1538 1539 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1540 1541 socket_id = rte_socket_id(); 1542 1543 tx_vfcnt = octeontx_pko_vf_count(); 1544 1545 if (tx_vfcnt < init_params.nr_port) { 1546 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1547 tx_vfcnt, init_params.nr_port); 1548 return -EINVAL; 1549 } 1550 evdev = rte_event_dev_get_dev_id(eventdev_name); 1551 if (evdev < 0) { 1552 octeontx_log_err("eventdev %s not found", eventdev_name); 1553 return -ENODEV; 1554 } 1555 1556 res = rte_event_dev_info_get(evdev, &info); 1557 if (res < 0) { 1558 octeontx_log_err("failed to eventdev info %d", res); 1559 return -EINVAL; 1560 } 1561 1562 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1563 info.max_event_queues, info.max_event_ports); 1564 1565 if (octeontx_pko_init_fc(tx_vfcnt)) 1566 return -ENOMEM; 1567 1568 devconf_set_default_sane_values(&dev_conf, &info); 1569 res = rte_event_dev_configure(evdev, &dev_conf); 1570 if (res < 0) 1571 goto parse_error; 1572 1573 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1574 (uint32_t *)&pnum); 1575 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1576 (uint32_t *)&qnum); 1577 if (pnum < qnum) { 1578 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1579 pnum, qnum); 1580 res = -EINVAL; 1581 goto parse_error; 1582 } 1583 1584 /* Enable all queues available */ 1585 for (i = 0; i < qnum; i++) { 1586 res = rte_event_queue_setup(evdev, i, NULL); 1587 if (res < 0) { 1588 octeontx_log_err("failed to setup event_q(%d): res %d", 1589 i, res); 1590 goto parse_error; 1591 } 1592 } 1593 1594 /* Enable all ports available */ 1595 for (i = 0; i < pnum; i++) { 1596 res = rte_event_port_setup(evdev, i, NULL); 1597 if (res < 0) { 1598 res = -ENODEV; 1599 octeontx_log_err("failed to setup ev port(%d) res=%d", 1600 i, res); 1601 goto parse_error; 1602 } 1603 } 1604 1605 /* 1606 * Do 1:1 links for ports & queues. All queues would be mapped to 1607 * one port. If there are more ports than queues, then some ports 1608 * won't be linked to any queue. 1609 */ 1610 for (i = 0; i < qnum; i++) { 1611 /* Link one queue to one event port */ 1612 qlist = i; 1613 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1614 if (res < 0) { 1615 res = -ENODEV; 1616 octeontx_log_err("failed to link port (%d): res=%d", 1617 i, res); 1618 goto parse_error; 1619 } 1620 } 1621 1622 /* Create ethdev interface */ 1623 for (i = 0; i < init_params.nr_port; i++) { 1624 port_id = octeontx_create(dev, i, evdev, socket_id); 1625 if (port_id < 0) { 1626 octeontx_log_err("failed to create device %s", 1627 dev_name); 1628 res = -ENODEV; 1629 goto parse_error; 1630 } 1631 1632 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1633 port_id); 1634 } 1635 1636 if (probe_once) { 1637 octeontx_log_err("interface %s not supported", dev_name); 1638 octeontx_remove(dev); 1639 res = -ENOTSUP; 1640 goto parse_error; 1641 } 1642 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1643 probe_once = 1; 1644 1645 return 0; 1646 1647 parse_error: 1648 octeontx_pko_fc_free(); 1649 return res; 1650 } 1651 1652 static struct rte_vdev_driver octeontx_pmd_drv = { 1653 .probe = octeontx_probe, 1654 .remove = octeontx_remove, 1655 }; 1656 1657 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1658 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1659 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1660