1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct octeontx_vdev_init_params { 28 uint8_t nr_port; 29 }; 30 31 uint16_t 32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 33 34 enum octeontx_link_speed { 35 OCTEONTX_LINK_SPEED_SGMII, 36 OCTEONTX_LINK_SPEED_XAUI, 37 OCTEONTX_LINK_SPEED_RXAUI, 38 OCTEONTX_LINK_SPEED_10G_R, 39 OCTEONTX_LINK_SPEED_40G_R, 40 OCTEONTX_LINK_SPEED_RESERVE1, 41 OCTEONTX_LINK_SPEED_QSGMII, 42 OCTEONTX_LINK_SPEED_RESERVE2 43 }; 44 45 int otx_net_logtype_mbox; 46 int otx_net_logtype_init; 47 int otx_net_logtype_driver; 48 49 RTE_INIT(otx_net_init_log); 50 static void 51 otx_net_init_log(void) 52 { 53 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 54 if (otx_net_logtype_mbox >= 0) 55 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 56 57 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 58 if (otx_net_logtype_init >= 0) 59 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 60 61 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 62 if (otx_net_logtype_driver >= 0) 63 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 64 } 65 66 /* Parse integer from integer argument */ 67 static int 68 parse_integer_arg(const char *key __rte_unused, 69 const char *value, void *extra_args) 70 { 71 int *i = (int *)extra_args; 72 73 *i = atoi(value); 74 if (*i < 0) { 75 octeontx_log_err("argument has to be positive."); 76 return -1; 77 } 78 79 return 0; 80 } 81 82 static int 83 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 84 struct rte_vdev_device *dev) 85 { 86 struct rte_kvargs *kvlist = NULL; 87 int ret = 0; 88 89 static const char * const octeontx_vdev_valid_params[] = { 90 OCTEONTX_VDEV_NR_PORT_ARG, 91 NULL 92 }; 93 94 const char *input_args = rte_vdev_device_args(dev); 95 if (params == NULL) 96 return -EINVAL; 97 98 99 if (input_args) { 100 kvlist = rte_kvargs_parse(input_args, 101 octeontx_vdev_valid_params); 102 if (kvlist == NULL) 103 return -1; 104 105 ret = rte_kvargs_process(kvlist, 106 OCTEONTX_VDEV_NR_PORT_ARG, 107 &parse_integer_arg, 108 ¶ms->nr_port); 109 if (ret < 0) 110 goto free_kvlist; 111 } 112 113 free_kvlist: 114 rte_kvargs_free(kvlist); 115 return ret; 116 } 117 118 static int 119 octeontx_port_open(struct octeontx_nic *nic) 120 { 121 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 122 int res; 123 124 res = 0; 125 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 126 PMD_INIT_FUNC_TRACE(); 127 128 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 129 if (res < 0) { 130 octeontx_log_err("failed to open port %d", res); 131 return res; 132 } 133 134 nic->node = bgx_port_conf.node; 135 nic->port_ena = bgx_port_conf.enable; 136 nic->base_ichan = bgx_port_conf.base_chan; 137 nic->base_ochan = bgx_port_conf.base_chan; 138 nic->num_ichans = bgx_port_conf.num_chans; 139 nic->num_ochans = bgx_port_conf.num_chans; 140 nic->mtu = bgx_port_conf.mtu; 141 nic->bpen = bgx_port_conf.bpen; 142 nic->fcs_strip = bgx_port_conf.fcs_strip; 143 nic->bcast_mode = bgx_port_conf.bcast_mode; 144 nic->mcast_mode = bgx_port_conf.mcast_mode; 145 nic->speed = bgx_port_conf.mode; 146 147 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], ETHER_ADDR_LEN); 148 149 octeontx_log_dbg("port opened %d", nic->port_id); 150 return res; 151 } 152 153 static void 154 octeontx_port_close(struct octeontx_nic *nic) 155 { 156 PMD_INIT_FUNC_TRACE(); 157 158 octeontx_bgx_port_close(nic->port_id); 159 octeontx_log_dbg("port closed %d", nic->port_id); 160 } 161 162 static int 163 octeontx_port_start(struct octeontx_nic *nic) 164 { 165 PMD_INIT_FUNC_TRACE(); 166 167 return octeontx_bgx_port_start(nic->port_id); 168 } 169 170 static int 171 octeontx_port_stop(struct octeontx_nic *nic) 172 { 173 PMD_INIT_FUNC_TRACE(); 174 175 return octeontx_bgx_port_stop(nic->port_id); 176 } 177 178 static void 179 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 180 { 181 struct rte_eth_dev *dev; 182 int res; 183 184 res = 0; 185 PMD_INIT_FUNC_TRACE(); 186 dev = nic->dev; 187 188 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 189 if (res < 0) 190 octeontx_log_err("failed to set promiscuous mode %d", 191 nic->port_id); 192 193 /* Set proper flag for the mode */ 194 dev->data->promiscuous = (en != 0) ? 1 : 0; 195 196 octeontx_log_dbg("port %d : promiscuous mode %s", 197 nic->port_id, en ? "set" : "unset"); 198 } 199 200 static int 201 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 202 { 203 octeontx_mbox_bgx_port_stats_t bgx_stats; 204 int res; 205 206 PMD_INIT_FUNC_TRACE(); 207 208 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 209 if (res < 0) { 210 octeontx_log_err("failed to get port stats %d", nic->port_id); 211 return res; 212 } 213 214 stats->ipackets = bgx_stats.rx_packets; 215 stats->ibytes = bgx_stats.rx_bytes; 216 stats->imissed = bgx_stats.rx_dropped; 217 stats->ierrors = bgx_stats.rx_errors; 218 stats->opackets = bgx_stats.tx_packets; 219 stats->obytes = bgx_stats.tx_bytes; 220 stats->oerrors = bgx_stats.tx_errors; 221 222 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 223 nic->port_id, stats->ipackets, stats->opackets); 224 225 return 0; 226 } 227 228 static void 229 octeontx_port_stats_clr(struct octeontx_nic *nic) 230 { 231 PMD_INIT_FUNC_TRACE(); 232 233 octeontx_bgx_port_stats_clr(nic->port_id); 234 } 235 236 static inline void 237 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 238 struct rte_event_dev_info *info) 239 { 240 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 241 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 242 243 dev_conf->nb_event_ports = info->max_event_ports; 244 dev_conf->nb_event_queues = info->max_event_queues; 245 246 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 247 dev_conf->nb_event_port_dequeue_depth = 248 info->max_event_port_dequeue_depth; 249 dev_conf->nb_event_port_enqueue_depth = 250 info->max_event_port_enqueue_depth; 251 dev_conf->nb_event_port_enqueue_depth = 252 info->max_event_port_enqueue_depth; 253 dev_conf->nb_events_limit = 254 info->max_num_events; 255 } 256 257 static int 258 octeontx_dev_configure(struct rte_eth_dev *dev) 259 { 260 struct rte_eth_dev_data *data = dev->data; 261 struct rte_eth_conf *conf = &data->dev_conf; 262 struct rte_eth_rxmode *rxmode = &conf->rxmode; 263 struct rte_eth_txmode *txmode = &conf->txmode; 264 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 265 uint64_t configured_offloads; 266 uint64_t unsupported_offloads; 267 int ret; 268 269 PMD_INIT_FUNC_TRACE(); 270 RTE_SET_USED(conf); 271 272 if (!rte_eal_has_hugepages()) { 273 octeontx_log_err("huge page is not configured"); 274 return -EINVAL; 275 } 276 277 if (txmode->mq_mode) { 278 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 279 return -EINVAL; 280 } 281 282 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 283 rxmode->mq_mode != ETH_MQ_RX_RSS) { 284 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 285 return -EINVAL; 286 } 287 288 configured_offloads = rxmode->offloads; 289 290 if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) { 291 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); 292 configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP; 293 } 294 295 unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS; 296 297 if (unsupported_offloads) { 298 PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. " 299 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n", 300 unsupported_offloads, configured_offloads, 301 (uint64_t)OCTEONTX_RX_OFFLOADS); 302 return -ENOTSUP; 303 } 304 305 configured_offloads = txmode->offloads; 306 307 if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 308 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 309 configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 310 } 311 312 unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS; 313 314 if (unsupported_offloads) { 315 PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported." 316 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n", 317 unsupported_offloads, configured_offloads, 318 (uint64_t)OCTEONTX_TX_OFFLOADS); 319 return -ENOTSUP; 320 } 321 322 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 323 octeontx_log_err("setting link speed/duplex not supported"); 324 return -EINVAL; 325 } 326 327 if (conf->dcb_capability_en) { 328 octeontx_log_err("DCB enable not supported"); 329 return -EINVAL; 330 } 331 332 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 333 octeontx_log_err("flow director not supported"); 334 return -EINVAL; 335 } 336 337 nic->num_tx_queues = dev->data->nb_tx_queues; 338 339 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ, 340 nic->num_tx_queues, 341 nic->base_ochan); 342 if (ret) { 343 octeontx_log_err("failed to open channel %d no-of-txq %d", 344 nic->base_ochan, nic->num_tx_queues); 345 return -EFAULT; 346 } 347 348 nic->pki.classifier_enable = false; 349 nic->pki.hash_enable = true; 350 nic->pki.initialized = false; 351 352 return 0; 353 } 354 355 static void 356 octeontx_dev_close(struct rte_eth_dev *dev) 357 { 358 struct octeontx_txq *txq = NULL; 359 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 360 unsigned int i; 361 int ret; 362 363 PMD_INIT_FUNC_TRACE(); 364 365 rte_event_dev_close(nic->evdev); 366 367 ret = octeontx_pko_channel_close(nic->base_ochan); 368 if (ret < 0) { 369 octeontx_log_err("failed to close channel %d VF%d %d %d", 370 nic->base_ochan, nic->port_id, nic->num_tx_queues, 371 ret); 372 } 373 /* Free txq resources for this port */ 374 for (i = 0; i < nic->num_tx_queues; i++) { 375 txq = dev->data->tx_queues[i]; 376 if (!txq) 377 continue; 378 379 rte_free(txq); 380 } 381 } 382 383 static int 384 octeontx_dev_start(struct rte_eth_dev *dev) 385 { 386 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 387 int ret; 388 389 ret = 0; 390 391 PMD_INIT_FUNC_TRACE(); 392 /* 393 * Tx start 394 */ 395 dev->tx_pkt_burst = octeontx_xmit_pkts; 396 ret = octeontx_pko_channel_start(nic->base_ochan); 397 if (ret < 0) { 398 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 399 nic->port_id, nic->num_tx_queues, nic->base_ochan, 400 ret); 401 goto error; 402 } 403 404 /* 405 * Rx start 406 */ 407 dev->rx_pkt_burst = octeontx_recv_pkts; 408 ret = octeontx_pki_port_start(nic->port_id); 409 if (ret < 0) { 410 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 411 goto channel_stop_error; 412 } 413 414 /* 415 * Start port 416 */ 417 ret = octeontx_port_start(nic); 418 if (ret < 0) { 419 octeontx_log_err("failed start port %d", ret); 420 goto pki_port_stop_error; 421 } 422 423 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 424 nic->base_ochan, nic->num_tx_queues, nic->port_id); 425 426 ret = rte_event_dev_start(nic->evdev); 427 if (ret < 0) { 428 octeontx_log_err("failed to start evdev: ret (%d)", ret); 429 goto pki_port_stop_error; 430 } 431 432 /* Success */ 433 return ret; 434 435 pki_port_stop_error: 436 octeontx_pki_port_stop(nic->port_id); 437 channel_stop_error: 438 octeontx_pko_channel_stop(nic->base_ochan); 439 error: 440 return ret; 441 } 442 443 static void 444 octeontx_dev_stop(struct rte_eth_dev *dev) 445 { 446 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 447 int ret; 448 449 PMD_INIT_FUNC_TRACE(); 450 451 rte_event_dev_stop(nic->evdev); 452 453 ret = octeontx_port_stop(nic); 454 if (ret < 0) { 455 octeontx_log_err("failed to req stop port %d res=%d", 456 nic->port_id, ret); 457 return; 458 } 459 460 ret = octeontx_pki_port_stop(nic->port_id); 461 if (ret < 0) { 462 octeontx_log_err("failed to stop pki port %d res=%d", 463 nic->port_id, ret); 464 return; 465 } 466 467 ret = octeontx_pko_channel_stop(nic->base_ochan); 468 if (ret < 0) { 469 octeontx_log_err("failed to stop channel %d VF%d %d %d", 470 nic->base_ochan, nic->port_id, nic->num_tx_queues, 471 ret); 472 return; 473 } 474 475 dev->tx_pkt_burst = NULL; 476 dev->rx_pkt_burst = NULL; 477 } 478 479 static void 480 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 481 { 482 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 483 484 PMD_INIT_FUNC_TRACE(); 485 octeontx_port_promisc_set(nic, 1); 486 } 487 488 static void 489 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 490 { 491 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 492 493 PMD_INIT_FUNC_TRACE(); 494 octeontx_port_promisc_set(nic, 0); 495 } 496 497 static int 498 octeontx_port_link_status(struct octeontx_nic *nic) 499 { 500 int res; 501 502 PMD_INIT_FUNC_TRACE(); 503 res = octeontx_bgx_port_link_status(nic->port_id); 504 if (res < 0) { 505 octeontx_log_err("failed to get port %d link status", 506 nic->port_id); 507 return res; 508 } 509 510 nic->link_up = (uint8_t)res; 511 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 512 513 return res; 514 } 515 516 /* 517 * Return 0 means link status changed, -1 means not changed 518 */ 519 static int 520 octeontx_dev_link_update(struct rte_eth_dev *dev, 521 int wait_to_complete __rte_unused) 522 { 523 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 524 struct rte_eth_link link; 525 int res; 526 527 PMD_INIT_FUNC_TRACE(); 528 529 res = octeontx_port_link_status(nic); 530 if (res < 0) { 531 octeontx_log_err("failed to request link status %d", res); 532 return res; 533 } 534 535 link.link_status = nic->link_up; 536 537 switch (nic->speed) { 538 case OCTEONTX_LINK_SPEED_SGMII: 539 link.link_speed = ETH_SPEED_NUM_1G; 540 break; 541 542 case OCTEONTX_LINK_SPEED_XAUI: 543 link.link_speed = ETH_SPEED_NUM_10G; 544 break; 545 546 case OCTEONTX_LINK_SPEED_RXAUI: 547 case OCTEONTX_LINK_SPEED_10G_R: 548 link.link_speed = ETH_SPEED_NUM_10G; 549 break; 550 case OCTEONTX_LINK_SPEED_QSGMII: 551 link.link_speed = ETH_SPEED_NUM_5G; 552 break; 553 case OCTEONTX_LINK_SPEED_40G_R: 554 link.link_speed = ETH_SPEED_NUM_40G; 555 break; 556 557 case OCTEONTX_LINK_SPEED_RESERVE1: 558 case OCTEONTX_LINK_SPEED_RESERVE2: 559 default: 560 link.link_speed = ETH_SPEED_NUM_NONE; 561 octeontx_log_err("incorrect link speed %d", nic->speed); 562 break; 563 } 564 565 link.link_duplex = ETH_LINK_FULL_DUPLEX; 566 link.link_autoneg = ETH_LINK_AUTONEG; 567 568 return rte_eth_linkstatus_set(dev, &link); 569 } 570 571 static int 572 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 573 { 574 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 575 576 PMD_INIT_FUNC_TRACE(); 577 return octeontx_port_stats(nic, stats); 578 } 579 580 static void 581 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 582 { 583 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 584 585 PMD_INIT_FUNC_TRACE(); 586 octeontx_port_stats_clr(nic); 587 } 588 589 static int 590 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 591 struct ether_addr *addr) 592 { 593 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 594 int ret; 595 596 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 597 if (ret != 0) 598 octeontx_log_err("failed to set MAC address on port %d", 599 nic->port_id); 600 601 return ret; 602 } 603 604 static void 605 octeontx_dev_info(struct rte_eth_dev *dev, 606 struct rte_eth_dev_info *dev_info) 607 { 608 RTE_SET_USED(dev); 609 610 /* Autonegotiation may be disabled */ 611 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 612 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 613 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 614 ETH_LINK_SPEED_40G; 615 616 dev_info->max_mac_addrs = 1; 617 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 618 dev_info->max_rx_queues = 1; 619 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 620 dev_info->min_rx_bufsize = 0; 621 622 dev_info->default_rxconf = (struct rte_eth_rxconf) { 623 .rx_free_thresh = 0, 624 .rx_drop_en = 0, 625 .offloads = OCTEONTX_RX_OFFLOADS, 626 }; 627 628 dev_info->default_txconf = (struct rte_eth_txconf) { 629 .tx_free_thresh = 0, 630 .offloads = OCTEONTX_TX_OFFLOADS, 631 }; 632 633 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 634 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 635 } 636 637 static void 638 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 639 { 640 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 641 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 642 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 643 } 644 645 static int 646 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 647 uint16_t qidx) 648 { 649 struct octeontx_txq *txq; 650 int res; 651 652 PMD_INIT_FUNC_TRACE(); 653 654 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 655 return 0; 656 657 txq = dev->data->tx_queues[qidx]; 658 659 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 660 &txq->dq, 661 sizeof(octeontx_dq_t), 662 txq->queue_id, 663 octeontx_dq_info_getter); 664 if (res < 0) { 665 res = -EFAULT; 666 goto close_port; 667 } 668 669 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 670 return res; 671 672 close_port: 673 (void)octeontx_port_stop(nic); 674 octeontx_pko_channel_stop(nic->base_ochan); 675 octeontx_pko_channel_close(nic->base_ochan); 676 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 677 return res; 678 } 679 680 static int 681 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 682 { 683 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 684 685 PMD_INIT_FUNC_TRACE(); 686 qidx = qidx % PKO_VF_NUM_DQ; 687 return octeontx_vf_start_tx_queue(dev, nic, qidx); 688 } 689 690 static inline int 691 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 692 uint16_t qidx) 693 { 694 int ret = 0; 695 696 RTE_SET_USED(nic); 697 PMD_INIT_FUNC_TRACE(); 698 699 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 700 return 0; 701 702 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 703 return ret; 704 } 705 706 static int 707 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 708 { 709 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 710 711 PMD_INIT_FUNC_TRACE(); 712 qidx = qidx % PKO_VF_NUM_DQ; 713 714 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 715 } 716 717 static void 718 octeontx_dev_tx_queue_release(void *tx_queue) 719 { 720 struct octeontx_txq *txq = tx_queue; 721 int res; 722 723 PMD_INIT_FUNC_TRACE(); 724 725 if (txq) { 726 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 727 if (res < 0) 728 octeontx_log_err("failed stop tx_queue(%d)\n", 729 txq->queue_id); 730 731 rte_free(txq); 732 } 733 } 734 735 static int 736 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 737 uint16_t nb_desc, unsigned int socket_id, 738 const struct rte_eth_txconf *tx_conf) 739 { 740 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 741 struct octeontx_txq *txq = NULL; 742 uint16_t dq_num; 743 int res = 0; 744 uint64_t configured_offloads; 745 uint64_t unsupported_offloads; 746 747 RTE_SET_USED(nb_desc); 748 RTE_SET_USED(socket_id); 749 750 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; 751 752 /* Socket id check */ 753 if (socket_id != (unsigned int)SOCKET_ID_ANY && 754 socket_id != (unsigned int)nic->node) 755 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 756 socket_id, nic->node); 757 758 /* Free memory prior to re-allocation if needed. */ 759 if (dev->data->tx_queues[qidx] != NULL) { 760 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 761 qidx); 762 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 763 dev->data->tx_queues[qidx] = NULL; 764 } 765 766 configured_offloads = tx_conf->offloads; 767 768 if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 769 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 770 configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 771 } 772 773 unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS; 774 if (unsupported_offloads) { 775 PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported." 776 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n", 777 unsupported_offloads, configured_offloads, 778 (uint64_t)OCTEONTX_TX_OFFLOADS); 779 return -ENOTSUP; 780 } 781 782 /* Allocating tx queue data structure */ 783 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 784 RTE_CACHE_LINE_SIZE, nic->node); 785 if (txq == NULL) { 786 octeontx_log_err("failed to allocate txq=%d", qidx); 787 res = -ENOMEM; 788 goto err; 789 } 790 791 txq->eth_dev = dev; 792 txq->queue_id = dq_num; 793 dev->data->tx_queues[qidx] = txq; 794 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 795 796 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 797 &txq->dq, 798 sizeof(octeontx_dq_t), 799 txq->queue_id, 800 octeontx_dq_info_getter); 801 if (res < 0) { 802 res = -EFAULT; 803 goto err; 804 } 805 806 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 807 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 808 txq->dq.ioreg_va, 809 txq->dq.fc_status_va); 810 811 return res; 812 813 err: 814 if (txq) 815 rte_free(txq); 816 817 return res; 818 } 819 820 static int 821 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 822 uint16_t nb_desc, unsigned int socket_id, 823 const struct rte_eth_rxconf *rx_conf, 824 struct rte_mempool *mb_pool) 825 { 826 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 827 struct rte_mempool_ops *mp_ops = NULL; 828 struct octeontx_rxq *rxq = NULL; 829 pki_pktbuf_cfg_t pktbuf_conf; 830 pki_hash_cfg_t pki_hash; 831 pki_qos_cfg_t pki_qos; 832 uintptr_t pool; 833 int ret, port; 834 uint8_t gaura; 835 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 836 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 837 uint64_t configured_offloads; 838 uint64_t unsupported_offloads; 839 840 RTE_SET_USED(nb_desc); 841 842 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 843 memset(&pki_hash, 0, sizeof(pki_hash)); 844 memset(&pki_qos, 0, sizeof(pki_qos)); 845 846 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 847 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 848 octeontx_log_err("failed to find octeontx_fpavf mempool"); 849 return -ENOTSUP; 850 } 851 852 /* Handle forbidden configurations */ 853 if (nic->pki.classifier_enable) { 854 octeontx_log_err("cannot setup queue %d. " 855 "Classifier option unsupported", qidx); 856 return -EINVAL; 857 } 858 859 port = nic->port_id; 860 861 configured_offloads = rx_conf->offloads; 862 863 if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) { 864 PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); 865 configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP; 866 } 867 868 unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS; 869 870 if (unsupported_offloads) { 871 PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. " 872 "Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n", 873 unsupported_offloads, configured_offloads, 874 (uint64_t)OCTEONTX_RX_OFFLOADS); 875 return -ENOTSUP; 876 } 877 /* Rx deferred start is not supported */ 878 if (rx_conf->rx_deferred_start) { 879 octeontx_log_err("rx deferred start not supported"); 880 return -EINVAL; 881 } 882 883 /* Verify queue index */ 884 if (qidx >= dev->data->nb_rx_queues) { 885 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 886 qidx, (dev->data->nb_rx_queues - 1)); 887 return -ENOTSUP; 888 } 889 890 /* Socket id check */ 891 if (socket_id != (unsigned int)SOCKET_ID_ANY && 892 socket_id != (unsigned int)nic->node) 893 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 894 socket_id, nic->node); 895 896 /* Allocating rx queue data structure */ 897 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 898 RTE_CACHE_LINE_SIZE, nic->node); 899 if (rxq == NULL) { 900 octeontx_log_err("failed to allocate rxq=%d", qidx); 901 return -ENOMEM; 902 } 903 904 if (!nic->pki.initialized) { 905 pktbuf_conf.port_type = 0; 906 pki_hash.port_type = 0; 907 pki_qos.port_type = 0; 908 909 pktbuf_conf.mmask.f_wqe_skip = 1; 910 pktbuf_conf.mmask.f_first_skip = 1; 911 pktbuf_conf.mmask.f_later_skip = 1; 912 pktbuf_conf.mmask.f_mbuff_size = 1; 913 pktbuf_conf.mmask.f_cache_mode = 1; 914 915 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 916 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP; 917 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 918 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 919 RTE_PKTMBUF_HEADROOM - 920 sizeof(struct rte_mbuf)); 921 922 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 923 924 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 925 if (ret != 0) { 926 octeontx_log_err("fail to configure pktbuf for port %d", 927 port); 928 rte_free(rxq); 929 return ret; 930 } 931 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 932 "\tmbuf_size:\t0x%0x\n" 933 "\twqe_skip:\t0x%0x\n" 934 "\tfirst_skip:\t0x%0x\n" 935 "\tlater_skip:\t0x%0x\n" 936 "\tcache_mode:\t%s\n", 937 port, 938 pktbuf_conf.mbuff_size, 939 pktbuf_conf.wqe_skip, 940 pktbuf_conf.first_skip, 941 pktbuf_conf.later_skip, 942 (pktbuf_conf.cache_mode == 943 PKI_OPC_MODE_STT) ? 944 "STT" : 945 (pktbuf_conf.cache_mode == 946 PKI_OPC_MODE_STF) ? 947 "STF" : 948 (pktbuf_conf.cache_mode == 949 PKI_OPC_MODE_STF1_STT) ? 950 "STF1_STT" : "STF2_STT"); 951 952 if (nic->pki.hash_enable) { 953 pki_hash.tag_dlc = 1; 954 pki_hash.tag_slc = 1; 955 pki_hash.tag_dlf = 1; 956 pki_hash.tag_slf = 1; 957 pki_hash.tag_prt = 1; 958 octeontx_pki_port_hash_config(port, &pki_hash); 959 } 960 961 pool = (uintptr_t)mb_pool->pool_id; 962 963 /* Get the gpool Id */ 964 gaura = octeontx_fpa_bufpool_gpool(pool); 965 966 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 967 pki_qos.num_entry = 1; 968 pki_qos.drop_policy = 0; 969 pki_qos.tag_type = 0L; 970 pki_qos.qos_entry[0].port_add = 0; 971 pki_qos.qos_entry[0].gaura = gaura; 972 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 973 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 974 pki_qos.qos_entry[0].grptag_bad = 0; 975 pki_qos.qos_entry[0].grptag_ok = 0; 976 977 ret = octeontx_pki_port_create_qos(port, &pki_qos); 978 if (ret < 0) { 979 octeontx_log_err("failed to create QOS port=%d, q=%d", 980 port, qidx); 981 rte_free(rxq); 982 return ret; 983 } 984 nic->pki.initialized = true; 985 } 986 987 rxq->port_id = nic->port_id; 988 rxq->eth_dev = dev; 989 rxq->queue_id = qidx; 990 rxq->evdev = nic->evdev; 991 rxq->ev_queues = ev_queues; 992 rxq->ev_ports = ev_ports; 993 994 dev->data->rx_queues[qidx] = rxq; 995 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 996 return 0; 997 } 998 999 static void 1000 octeontx_dev_rx_queue_release(void *rxq) 1001 { 1002 rte_free(rxq); 1003 } 1004 1005 static const uint32_t * 1006 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 1007 { 1008 static const uint32_t ptypes[] = { 1009 RTE_PTYPE_L3_IPV4, 1010 RTE_PTYPE_L3_IPV4_EXT, 1011 RTE_PTYPE_L3_IPV6, 1012 RTE_PTYPE_L3_IPV6_EXT, 1013 RTE_PTYPE_L4_TCP, 1014 RTE_PTYPE_L4_UDP, 1015 RTE_PTYPE_L4_FRAG, 1016 RTE_PTYPE_UNKNOWN 1017 }; 1018 1019 if (dev->rx_pkt_burst == octeontx_recv_pkts) 1020 return ptypes; 1021 1022 return NULL; 1023 } 1024 1025 static int 1026 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 1027 { 1028 RTE_SET_USED(dev); 1029 1030 if (!strcmp(pool, "octeontx_fpavf")) 1031 return 0; 1032 1033 return -ENOTSUP; 1034 } 1035 1036 /* Initialize and register driver with DPDK Application */ 1037 static const struct eth_dev_ops octeontx_dev_ops = { 1038 .dev_configure = octeontx_dev_configure, 1039 .dev_infos_get = octeontx_dev_info, 1040 .dev_close = octeontx_dev_close, 1041 .dev_start = octeontx_dev_start, 1042 .dev_stop = octeontx_dev_stop, 1043 .promiscuous_enable = octeontx_dev_promisc_enable, 1044 .promiscuous_disable = octeontx_dev_promisc_disable, 1045 .link_update = octeontx_dev_link_update, 1046 .stats_get = octeontx_dev_stats_get, 1047 .stats_reset = octeontx_dev_stats_reset, 1048 .mac_addr_set = octeontx_dev_default_mac_addr_set, 1049 .tx_queue_start = octeontx_dev_tx_queue_start, 1050 .tx_queue_stop = octeontx_dev_tx_queue_stop, 1051 .tx_queue_setup = octeontx_dev_tx_queue_setup, 1052 .tx_queue_release = octeontx_dev_tx_queue_release, 1053 .rx_queue_setup = octeontx_dev_rx_queue_setup, 1054 .rx_queue_release = octeontx_dev_rx_queue_release, 1055 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 1056 .pool_ops_supported = octeontx_pool_ops, 1057 }; 1058 1059 /* Create Ethdev interface per BGX LMAC ports */ 1060 static int 1061 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 1062 int socket_id) 1063 { 1064 int res; 1065 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1066 struct octeontx_nic *nic = NULL; 1067 struct rte_eth_dev *eth_dev = NULL; 1068 struct rte_eth_dev_data *data; 1069 const char *name = rte_vdev_device_name(dev); 1070 1071 PMD_INIT_FUNC_TRACE(); 1072 1073 sprintf(octtx_name, "%s_%d", name, port); 1074 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1075 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1076 if (eth_dev == NULL) 1077 return -ENODEV; 1078 1079 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1080 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1081 return 0; 1082 } 1083 1084 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1085 if (nic == NULL) { 1086 octeontx_log_err("failed to allocate nic structure"); 1087 res = -ENOMEM; 1088 goto err; 1089 } 1090 1091 nic->port_id = port; 1092 nic->evdev = evdev; 1093 1094 res = octeontx_port_open(nic); 1095 if (res < 0) 1096 goto err; 1097 1098 /* Rx side port configuration */ 1099 res = octeontx_pki_port_open(port); 1100 if (res != 0) { 1101 octeontx_log_err("failed to open PKI port %d", port); 1102 res = -ENODEV; 1103 goto err; 1104 } 1105 1106 /* Reserve an ethdev entry */ 1107 eth_dev = rte_eth_dev_allocate(octtx_name); 1108 if (eth_dev == NULL) { 1109 octeontx_log_err("failed to allocate rte_eth_dev"); 1110 res = -ENOMEM; 1111 goto err; 1112 } 1113 1114 eth_dev->device = &dev->device; 1115 eth_dev->intr_handle = NULL; 1116 eth_dev->data->kdrv = RTE_KDRV_NONE; 1117 eth_dev->data->numa_node = dev->device.numa_node; 1118 1119 data = eth_dev->data; 1120 data->dev_private = nic; 1121 data->port_id = eth_dev->data->port_id; 1122 1123 nic->ev_queues = 1; 1124 nic->ev_ports = 1; 1125 1126 data->dev_link.link_status = ETH_LINK_DOWN; 1127 data->dev_started = 0; 1128 data->promiscuous = 0; 1129 data->all_multicast = 0; 1130 data->scattered_rx = 0; 1131 1132 data->mac_addrs = rte_zmalloc_socket(octtx_name, ETHER_ADDR_LEN, 0, 1133 socket_id); 1134 if (data->mac_addrs == NULL) { 1135 octeontx_log_err("failed to allocate memory for mac_addrs"); 1136 res = -ENOMEM; 1137 goto err; 1138 } 1139 1140 eth_dev->dev_ops = &octeontx_dev_ops; 1141 1142 /* Finally save ethdev pointer to the NIC structure */ 1143 nic->dev = eth_dev; 1144 1145 if (nic->port_id != data->port_id) { 1146 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1147 data->port_id, nic->port_id); 1148 res = -EINVAL; 1149 goto err; 1150 } 1151 1152 /* Update port_id mac to eth_dev */ 1153 memcpy(data->mac_addrs, nic->mac_addr, ETHER_ADDR_LEN); 1154 1155 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1156 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1157 nic->port_id, nic->port_ena, 1158 nic->base_ochan, nic->num_ochans, 1159 nic->num_tx_queues); 1160 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1161 1162 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1163 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1164 1165 return data->port_id; 1166 1167 err: 1168 if (nic) 1169 octeontx_port_close(nic); 1170 1171 if (eth_dev != NULL) { 1172 rte_free(eth_dev->data->mac_addrs); 1173 rte_free(data); 1174 rte_free(nic); 1175 rte_eth_dev_release_port(eth_dev); 1176 } 1177 1178 return res; 1179 } 1180 1181 /* Un initialize octeontx device */ 1182 static int 1183 octeontx_remove(struct rte_vdev_device *dev) 1184 { 1185 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1186 struct rte_eth_dev *eth_dev = NULL; 1187 struct octeontx_nic *nic = NULL; 1188 int i; 1189 1190 if (dev == NULL) 1191 return -EINVAL; 1192 1193 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1194 sprintf(octtx_name, "eth_octeontx_%d", i); 1195 1196 /* reserve an ethdev entry */ 1197 eth_dev = rte_eth_dev_allocated(octtx_name); 1198 if (eth_dev == NULL) 1199 return -ENODEV; 1200 1201 nic = octeontx_pmd_priv(eth_dev); 1202 rte_event_dev_stop(nic->evdev); 1203 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1204 1205 rte_free(eth_dev->data->mac_addrs); 1206 rte_free(eth_dev->data->dev_private); 1207 rte_eth_dev_release_port(eth_dev); 1208 rte_event_dev_close(nic->evdev); 1209 } 1210 1211 /* Free FC resource */ 1212 octeontx_pko_fc_free(); 1213 1214 return 0; 1215 } 1216 1217 /* Initialize octeontx device */ 1218 static int 1219 octeontx_probe(struct rte_vdev_device *dev) 1220 { 1221 const char *dev_name; 1222 static int probe_once; 1223 uint8_t socket_id, qlist; 1224 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1225 struct rte_event_dev_config dev_conf; 1226 const char *eventdev_name = "event_octeontx"; 1227 struct rte_event_dev_info info; 1228 struct rte_eth_dev *eth_dev; 1229 1230 struct octeontx_vdev_init_params init_params = { 1231 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1232 }; 1233 1234 dev_name = rte_vdev_device_name(dev); 1235 1236 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1237 strlen(rte_vdev_device_args(dev)) == 0) { 1238 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1239 if (!eth_dev) { 1240 RTE_LOG(ERR, PMD, "Failed to probe %s\n", dev_name); 1241 return -1; 1242 } 1243 /* TODO: request info from primary to set up Rx and Tx */ 1244 eth_dev->dev_ops = &octeontx_dev_ops; 1245 return 0; 1246 } 1247 1248 res = octeontx_parse_vdev_init_params(&init_params, dev); 1249 if (res < 0) 1250 return -EINVAL; 1251 1252 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1253 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1254 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1255 return -ENOTSUP; 1256 } 1257 1258 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1259 1260 socket_id = rte_socket_id(); 1261 1262 tx_vfcnt = octeontx_pko_vf_count(); 1263 1264 if (tx_vfcnt < init_params.nr_port) { 1265 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1266 tx_vfcnt, init_params.nr_port); 1267 return -EINVAL; 1268 } 1269 evdev = rte_event_dev_get_dev_id(eventdev_name); 1270 if (evdev < 0) { 1271 octeontx_log_err("eventdev %s not found", eventdev_name); 1272 return -ENODEV; 1273 } 1274 1275 res = rte_event_dev_info_get(evdev, &info); 1276 if (res < 0) { 1277 octeontx_log_err("failed to eventdev info %d", res); 1278 return -EINVAL; 1279 } 1280 1281 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1282 info.max_event_queues, info.max_event_ports); 1283 1284 if (octeontx_pko_init_fc(tx_vfcnt)) 1285 return -ENOMEM; 1286 1287 devconf_set_default_sane_values(&dev_conf, &info); 1288 res = rte_event_dev_configure(evdev, &dev_conf); 1289 if (res < 0) 1290 goto parse_error; 1291 1292 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1293 (uint32_t *)&pnum); 1294 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1295 (uint32_t *)&qnum); 1296 if (pnum < qnum) { 1297 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1298 pnum, qnum); 1299 res = -EINVAL; 1300 goto parse_error; 1301 } 1302 if (pnum > qnum) { 1303 /* 1304 * We don't poll on event ports 1305 * that do not have any queues assigned. 1306 */ 1307 pnum = qnum; 1308 PMD_INIT_LOG(INFO, 1309 "reducing number of active event ports to %d", pnum); 1310 } 1311 for (i = 0; i < qnum; i++) { 1312 res = rte_event_queue_setup(evdev, i, NULL); 1313 if (res < 0) { 1314 octeontx_log_err("failed to setup event_q(%d): res %d", 1315 i, res); 1316 goto parse_error; 1317 } 1318 } 1319 1320 for (i = 0; i < pnum; i++) { 1321 res = rte_event_port_setup(evdev, i, NULL); 1322 if (res < 0) { 1323 res = -ENODEV; 1324 octeontx_log_err("failed to setup ev port(%d) res=%d", 1325 i, res); 1326 goto parse_error; 1327 } 1328 /* Link one queue to one event port */ 1329 qlist = i; 1330 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1331 if (res < 0) { 1332 res = -ENODEV; 1333 octeontx_log_err("failed to link port (%d): res=%d", 1334 i, res); 1335 goto parse_error; 1336 } 1337 } 1338 1339 /* Create ethdev interface */ 1340 for (i = 0; i < init_params.nr_port; i++) { 1341 port_id = octeontx_create(dev, i, evdev, socket_id); 1342 if (port_id < 0) { 1343 octeontx_log_err("failed to create device %s", 1344 dev_name); 1345 res = -ENODEV; 1346 goto parse_error; 1347 } 1348 1349 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1350 port_id); 1351 } 1352 1353 if (probe_once) { 1354 octeontx_log_err("interface %s not supported", dev_name); 1355 octeontx_remove(dev); 1356 res = -ENOTSUP; 1357 goto parse_error; 1358 } 1359 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1360 probe_once = 1; 1361 1362 return 0; 1363 1364 parse_error: 1365 octeontx_pko_fc_free(); 1366 return res; 1367 } 1368 1369 static struct rte_vdev_driver octeontx_pmd_drv = { 1370 .probe = octeontx_probe, 1371 .remove = octeontx_remove, 1372 }; 1373 1374 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1375 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1376 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1377