xref: /dpdk/drivers/net/octeontx/octeontx_ethdev.c (revision 1151b4ae2d02cd5a1177a748ee7e5945b2416f34)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Cavium, Inc
3  */
4 
5 #include <stdio.h>
6 #include <stdarg.h>
7 #include <stdbool.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 
12 #include <rte_alarm.h>
13 #include <rte_branch_prediction.h>
14 #include <rte_debug.h>
15 #include <rte_devargs.h>
16 #include <rte_dev.h>
17 #include <rte_kvargs.h>
18 #include <rte_malloc.h>
19 #include <rte_mbuf_pool_ops.h>
20 #include <rte_prefetch.h>
21 #include <rte_bus_vdev.h>
22 
23 #include "octeontx_ethdev.h"
24 #include "octeontx_rxtx.h"
25 #include "octeontx_logs.h"
26 
27 struct octeontx_vdev_init_params {
28 	uint8_t	nr_port;
29 };
30 
31 uint16_t
32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
33 
34 enum octeontx_link_speed {
35 	OCTEONTX_LINK_SPEED_SGMII,
36 	OCTEONTX_LINK_SPEED_XAUI,
37 	OCTEONTX_LINK_SPEED_RXAUI,
38 	OCTEONTX_LINK_SPEED_10G_R,
39 	OCTEONTX_LINK_SPEED_40G_R,
40 	OCTEONTX_LINK_SPEED_RESERVE1,
41 	OCTEONTX_LINK_SPEED_QSGMII,
42 	OCTEONTX_LINK_SPEED_RESERVE2
43 };
44 
45 int otx_net_logtype_mbox;
46 int otx_net_logtype_init;
47 int otx_net_logtype_driver;
48 
49 RTE_INIT(otx_net_init_log)
50 {
51 	otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox");
52 	if (otx_net_logtype_mbox >= 0)
53 		rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE);
54 
55 	otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init");
56 	if (otx_net_logtype_init >= 0)
57 		rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE);
58 
59 	otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver");
60 	if (otx_net_logtype_driver >= 0)
61 		rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE);
62 }
63 
64 /* Parse integer from integer argument */
65 static int
66 parse_integer_arg(const char *key __rte_unused,
67 		const char *value, void *extra_args)
68 {
69 	int *i = (int *)extra_args;
70 
71 	*i = atoi(value);
72 	if (*i < 0) {
73 		octeontx_log_err("argument has to be positive.");
74 		return -1;
75 	}
76 
77 	return 0;
78 }
79 
80 static int
81 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params,
82 				struct rte_vdev_device *dev)
83 {
84 	struct rte_kvargs *kvlist = NULL;
85 	int ret = 0;
86 
87 	static const char * const octeontx_vdev_valid_params[] = {
88 		OCTEONTX_VDEV_NR_PORT_ARG,
89 		NULL
90 	};
91 
92 	const char *input_args = rte_vdev_device_args(dev);
93 	if (params == NULL)
94 		return -EINVAL;
95 
96 
97 	if (input_args) {
98 		kvlist = rte_kvargs_parse(input_args,
99 				octeontx_vdev_valid_params);
100 		if (kvlist == NULL)
101 			return -1;
102 
103 		ret = rte_kvargs_process(kvlist,
104 					OCTEONTX_VDEV_NR_PORT_ARG,
105 					&parse_integer_arg,
106 					&params->nr_port);
107 		if (ret < 0)
108 			goto free_kvlist;
109 	}
110 
111 free_kvlist:
112 	rte_kvargs_free(kvlist);
113 	return ret;
114 }
115 
116 static int
117 octeontx_port_open(struct octeontx_nic *nic)
118 {
119 	octeontx_mbox_bgx_port_conf_t bgx_port_conf;
120 	int res;
121 
122 	res = 0;
123 	memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf));
124 	PMD_INIT_FUNC_TRACE();
125 
126 	res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf);
127 	if (res < 0) {
128 		octeontx_log_err("failed to open port %d", res);
129 		return res;
130 	}
131 
132 	nic->node = bgx_port_conf.node;
133 	nic->port_ena = bgx_port_conf.enable;
134 	nic->base_ichan = bgx_port_conf.base_chan;
135 	nic->base_ochan = bgx_port_conf.base_chan;
136 	nic->num_ichans = bgx_port_conf.num_chans;
137 	nic->num_ochans = bgx_port_conf.num_chans;
138 	nic->mtu = bgx_port_conf.mtu;
139 	nic->bpen = bgx_port_conf.bpen;
140 	nic->fcs_strip = bgx_port_conf.fcs_strip;
141 	nic->bcast_mode = bgx_port_conf.bcast_mode;
142 	nic->mcast_mode = bgx_port_conf.mcast_mode;
143 	nic->speed	= bgx_port_conf.mode;
144 
145 	memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0],
146 		RTE_ETHER_ADDR_LEN);
147 
148 	octeontx_log_dbg("port opened %d", nic->port_id);
149 	return res;
150 }
151 
152 static void
153 octeontx_port_close(struct octeontx_nic *nic)
154 {
155 	PMD_INIT_FUNC_TRACE();
156 
157 	octeontx_bgx_port_close(nic->port_id);
158 	octeontx_log_dbg("port closed %d", nic->port_id);
159 }
160 
161 static int
162 octeontx_port_start(struct octeontx_nic *nic)
163 {
164 	PMD_INIT_FUNC_TRACE();
165 
166 	return octeontx_bgx_port_start(nic->port_id);
167 }
168 
169 static int
170 octeontx_port_stop(struct octeontx_nic *nic)
171 {
172 	PMD_INIT_FUNC_TRACE();
173 
174 	return octeontx_bgx_port_stop(nic->port_id);
175 }
176 
177 static int
178 octeontx_port_promisc_set(struct octeontx_nic *nic, int en)
179 {
180 	struct rte_eth_dev *dev;
181 	int res;
182 
183 	res = 0;
184 	PMD_INIT_FUNC_TRACE();
185 	dev = nic->dev;
186 
187 	res = octeontx_bgx_port_promisc_set(nic->port_id, en);
188 	if (res < 0) {
189 		octeontx_log_err("failed to set promiscuous mode %d",
190 				nic->port_id);
191 		return res;
192 	}
193 
194 	/* Set proper flag for the mode */
195 	dev->data->promiscuous = (en != 0) ? 1 : 0;
196 
197 	octeontx_log_dbg("port %d : promiscuous mode %s",
198 			nic->port_id, en ? "set" : "unset");
199 
200 	return 0;
201 }
202 
203 static int
204 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats)
205 {
206 	octeontx_mbox_bgx_port_stats_t bgx_stats;
207 	int res;
208 
209 	PMD_INIT_FUNC_TRACE();
210 
211 	res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats);
212 	if (res < 0) {
213 		octeontx_log_err("failed to get port stats %d", nic->port_id);
214 		return res;
215 	}
216 
217 	stats->ipackets = bgx_stats.rx_packets;
218 	stats->ibytes = bgx_stats.rx_bytes;
219 	stats->imissed = bgx_stats.rx_dropped;
220 	stats->ierrors = bgx_stats.rx_errors;
221 	stats->opackets = bgx_stats.tx_packets;
222 	stats->obytes = bgx_stats.tx_bytes;
223 	stats->oerrors = bgx_stats.tx_errors;
224 
225 	octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "",
226 			nic->port_id, stats->ipackets, stats->opackets);
227 
228 	return 0;
229 }
230 
231 static int
232 octeontx_port_stats_clr(struct octeontx_nic *nic)
233 {
234 	PMD_INIT_FUNC_TRACE();
235 
236 	return octeontx_bgx_port_stats_clr(nic->port_id);
237 }
238 
239 static inline void
240 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf,
241 				struct rte_event_dev_info *info)
242 {
243 	memset(dev_conf, 0, sizeof(struct rte_event_dev_config));
244 	dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns;
245 
246 	dev_conf->nb_event_ports = info->max_event_ports;
247 	dev_conf->nb_event_queues = info->max_event_queues;
248 
249 	dev_conf->nb_event_queue_flows = info->max_event_queue_flows;
250 	dev_conf->nb_event_port_dequeue_depth =
251 			info->max_event_port_dequeue_depth;
252 	dev_conf->nb_event_port_enqueue_depth =
253 			info->max_event_port_enqueue_depth;
254 	dev_conf->nb_event_port_enqueue_depth =
255 			info->max_event_port_enqueue_depth;
256 	dev_conf->nb_events_limit =
257 			info->max_num_events;
258 }
259 
260 static int
261 octeontx_dev_configure(struct rte_eth_dev *dev)
262 {
263 	struct rte_eth_dev_data *data = dev->data;
264 	struct rte_eth_conf *conf = &data->dev_conf;
265 	struct rte_eth_rxmode *rxmode = &conf->rxmode;
266 	struct rte_eth_txmode *txmode = &conf->txmode;
267 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
268 	int ret;
269 
270 	PMD_INIT_FUNC_TRACE();
271 	RTE_SET_USED(conf);
272 
273 	if (!rte_eal_has_hugepages()) {
274 		octeontx_log_err("huge page is not configured");
275 		return -EINVAL;
276 	}
277 
278 	if (txmode->mq_mode) {
279 		octeontx_log_err("tx mq_mode DCB or VMDq not supported");
280 		return -EINVAL;
281 	}
282 
283 	if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
284 		rxmode->mq_mode != ETH_MQ_RX_RSS) {
285 		octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode);
286 		return -EINVAL;
287 	}
288 
289 	if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) {
290 		PMD_INIT_LOG(NOTICE, "cant disable lockfree tx");
291 		txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE;
292 	}
293 
294 	if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
295 		octeontx_log_err("setting link speed/duplex not supported");
296 		return -EINVAL;
297 	}
298 
299 	if (conf->dcb_capability_en) {
300 		octeontx_log_err("DCB enable not supported");
301 		return -EINVAL;
302 	}
303 
304 	if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
305 		octeontx_log_err("flow director not supported");
306 		return -EINVAL;
307 	}
308 
309 	nic->num_tx_queues = dev->data->nb_tx_queues;
310 
311 	ret = octeontx_pko_channel_open(nic->pko_vfid * PKO_VF_NUM_DQ,
312 					nic->num_tx_queues,
313 					nic->base_ochan);
314 	if (ret) {
315 		octeontx_log_err("failed to open channel %d no-of-txq %d",
316 			   nic->base_ochan, nic->num_tx_queues);
317 		return -EFAULT;
318 	}
319 
320 	nic->pki.classifier_enable = false;
321 	nic->pki.hash_enable = true;
322 	nic->pki.initialized = false;
323 
324 	return 0;
325 }
326 
327 static void
328 octeontx_dev_close(struct rte_eth_dev *dev)
329 {
330 	struct octeontx_txq *txq = NULL;
331 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
332 	unsigned int i;
333 	int ret;
334 
335 	PMD_INIT_FUNC_TRACE();
336 
337 	rte_event_dev_close(nic->evdev);
338 
339 	ret = octeontx_pko_channel_close(nic->base_ochan);
340 	if (ret < 0) {
341 		octeontx_log_err("failed to close channel %d VF%d %d %d",
342 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
343 			     ret);
344 	}
345 	/* Free txq resources for this port */
346 	for (i = 0; i < nic->num_tx_queues; i++) {
347 		txq = dev->data->tx_queues[i];
348 		if (!txq)
349 			continue;
350 
351 		rte_free(txq);
352 	}
353 
354 	dev->tx_pkt_burst = NULL;
355 	dev->rx_pkt_burst = NULL;
356 }
357 
358 static int
359 octeontx_dev_start(struct rte_eth_dev *dev)
360 {
361 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
362 	int ret;
363 
364 	ret = 0;
365 
366 	PMD_INIT_FUNC_TRACE();
367 	/*
368 	 * Tx start
369 	 */
370 	dev->tx_pkt_burst = octeontx_xmit_pkts;
371 	ret = octeontx_pko_channel_start(nic->base_ochan);
372 	if (ret < 0) {
373 		octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d",
374 			   nic->port_id, nic->num_tx_queues, nic->base_ochan,
375 			   ret);
376 		goto error;
377 	}
378 
379 	/*
380 	 * Rx start
381 	 */
382 	dev->rx_pkt_burst = octeontx_recv_pkts;
383 	ret = octeontx_pki_port_start(nic->port_id);
384 	if (ret < 0) {
385 		octeontx_log_err("fail to start Rx on port %d", nic->port_id);
386 		goto channel_stop_error;
387 	}
388 
389 	/*
390 	 * Start port
391 	 */
392 	ret = octeontx_port_start(nic);
393 	if (ret < 0) {
394 		octeontx_log_err("failed start port %d", ret);
395 		goto pki_port_stop_error;
396 	}
397 
398 	PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d",
399 			nic->base_ochan, nic->num_tx_queues, nic->port_id);
400 
401 	ret = rte_event_dev_start(nic->evdev);
402 	if (ret < 0) {
403 		octeontx_log_err("failed to start evdev: ret (%d)", ret);
404 		goto pki_port_stop_error;
405 	}
406 
407 	/* Success */
408 	return ret;
409 
410 pki_port_stop_error:
411 	octeontx_pki_port_stop(nic->port_id);
412 channel_stop_error:
413 	octeontx_pko_channel_stop(nic->base_ochan);
414 error:
415 	return ret;
416 }
417 
418 static void
419 octeontx_dev_stop(struct rte_eth_dev *dev)
420 {
421 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
422 	int ret;
423 
424 	PMD_INIT_FUNC_TRACE();
425 
426 	rte_event_dev_stop(nic->evdev);
427 
428 	ret = octeontx_port_stop(nic);
429 	if (ret < 0) {
430 		octeontx_log_err("failed to req stop port %d res=%d",
431 					nic->port_id, ret);
432 		return;
433 	}
434 
435 	ret = octeontx_pki_port_stop(nic->port_id);
436 	if (ret < 0) {
437 		octeontx_log_err("failed to stop pki port %d res=%d",
438 					nic->port_id, ret);
439 		return;
440 	}
441 
442 	ret = octeontx_pko_channel_stop(nic->base_ochan);
443 	if (ret < 0) {
444 		octeontx_log_err("failed to stop channel %d VF%d %d %d",
445 			     nic->base_ochan, nic->port_id, nic->num_tx_queues,
446 			     ret);
447 		return;
448 	}
449 }
450 
451 static int
452 octeontx_dev_promisc_enable(struct rte_eth_dev *dev)
453 {
454 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
455 
456 	PMD_INIT_FUNC_TRACE();
457 	return octeontx_port_promisc_set(nic, 1);
458 }
459 
460 static int
461 octeontx_dev_promisc_disable(struct rte_eth_dev *dev)
462 {
463 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
464 
465 	PMD_INIT_FUNC_TRACE();
466 	return octeontx_port_promisc_set(nic, 0);
467 }
468 
469 static int
470 octeontx_port_link_status(struct octeontx_nic *nic)
471 {
472 	int res;
473 
474 	PMD_INIT_FUNC_TRACE();
475 	res = octeontx_bgx_port_link_status(nic->port_id);
476 	if (res < 0) {
477 		octeontx_log_err("failed to get port %d link status",
478 				nic->port_id);
479 		return res;
480 	}
481 
482 	nic->link_up = (uint8_t)res;
483 	octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up);
484 
485 	return res;
486 }
487 
488 /*
489  * Return 0 means link status changed, -1 means not changed
490  */
491 static int
492 octeontx_dev_link_update(struct rte_eth_dev *dev,
493 			 int wait_to_complete __rte_unused)
494 {
495 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
496 	struct rte_eth_link link;
497 	int res;
498 
499 	PMD_INIT_FUNC_TRACE();
500 
501 	res = octeontx_port_link_status(nic);
502 	if (res < 0) {
503 		octeontx_log_err("failed to request link status %d", res);
504 		return res;
505 	}
506 
507 	link.link_status = nic->link_up;
508 
509 	switch (nic->speed) {
510 	case OCTEONTX_LINK_SPEED_SGMII:
511 		link.link_speed = ETH_SPEED_NUM_1G;
512 		break;
513 
514 	case OCTEONTX_LINK_SPEED_XAUI:
515 		link.link_speed = ETH_SPEED_NUM_10G;
516 		break;
517 
518 	case OCTEONTX_LINK_SPEED_RXAUI:
519 	case OCTEONTX_LINK_SPEED_10G_R:
520 		link.link_speed = ETH_SPEED_NUM_10G;
521 		break;
522 	case OCTEONTX_LINK_SPEED_QSGMII:
523 		link.link_speed = ETH_SPEED_NUM_5G;
524 		break;
525 	case OCTEONTX_LINK_SPEED_40G_R:
526 		link.link_speed = ETH_SPEED_NUM_40G;
527 		break;
528 
529 	case OCTEONTX_LINK_SPEED_RESERVE1:
530 	case OCTEONTX_LINK_SPEED_RESERVE2:
531 	default:
532 		link.link_speed = ETH_SPEED_NUM_NONE;
533 		octeontx_log_err("incorrect link speed %d", nic->speed);
534 		break;
535 	}
536 
537 	link.link_duplex = ETH_LINK_FULL_DUPLEX;
538 	link.link_autoneg = ETH_LINK_AUTONEG;
539 
540 	return rte_eth_linkstatus_set(dev, &link);
541 }
542 
543 static int
544 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
545 {
546 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
547 
548 	PMD_INIT_FUNC_TRACE();
549 	return octeontx_port_stats(nic, stats);
550 }
551 
552 static int
553 octeontx_dev_stats_reset(struct rte_eth_dev *dev)
554 {
555 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
556 
557 	PMD_INIT_FUNC_TRACE();
558 	return octeontx_port_stats_clr(nic);
559 }
560 
561 static int
562 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev,
563 					struct rte_ether_addr *addr)
564 {
565 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
566 	int ret;
567 
568 	ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes);
569 	if (ret != 0)
570 		octeontx_log_err("failed to set MAC address on port %d",
571 				nic->port_id);
572 
573 	return ret;
574 }
575 
576 static int
577 octeontx_dev_info(struct rte_eth_dev *dev,
578 		struct rte_eth_dev_info *dev_info)
579 {
580 	RTE_SET_USED(dev);
581 
582 	/* Autonegotiation may be disabled */
583 	dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
584 	dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M |
585 			ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G |
586 			ETH_LINK_SPEED_40G;
587 
588 	dev_info->max_mac_addrs = 1;
589 	dev_info->max_rx_pktlen = PKI_MAX_PKTLEN;
590 	dev_info->max_rx_queues = 1;
591 	dev_info->max_tx_queues = PKO_MAX_NUM_DQ;
592 	dev_info->min_rx_bufsize = 0;
593 
594 	dev_info->default_rxconf = (struct rte_eth_rxconf) {
595 		.rx_free_thresh = 0,
596 		.rx_drop_en = 0,
597 		.offloads = OCTEONTX_RX_OFFLOADS,
598 	};
599 
600 	dev_info->default_txconf = (struct rte_eth_txconf) {
601 		.tx_free_thresh = 0,
602 		.offloads = OCTEONTX_TX_OFFLOADS,
603 	};
604 
605 	dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS;
606 	dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS;
607 	dev_info->rx_queue_offload_capa = OCTEONTX_RX_OFFLOADS;
608 	dev_info->tx_queue_offload_capa = OCTEONTX_TX_OFFLOADS;
609 
610 	return 0;
611 }
612 
613 static void
614 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out)
615 {
616 	((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va;
617 	((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va;
618 	((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va;
619 }
620 
621 static int
622 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
623 				uint16_t qidx)
624 {
625 	struct octeontx_txq *txq;
626 	int res;
627 
628 	PMD_INIT_FUNC_TRACE();
629 
630 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
631 		return 0;
632 
633 	txq = dev->data->tx_queues[qidx];
634 
635 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
636 						&txq->dq,
637 						sizeof(octeontx_dq_t),
638 						txq->queue_id,
639 						octeontx_dq_info_getter);
640 	if (res < 0) {
641 		res = -EFAULT;
642 		goto close_port;
643 	}
644 
645 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
646 	return res;
647 
648 close_port:
649 	(void)octeontx_port_stop(nic);
650 	octeontx_pko_channel_stop(nic->base_ochan);
651 	octeontx_pko_channel_close(nic->base_ochan);
652 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
653 	return res;
654 }
655 
656 static int
657 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
658 {
659 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
660 
661 	PMD_INIT_FUNC_TRACE();
662 	qidx = qidx % PKO_VF_NUM_DQ;
663 	return octeontx_vf_start_tx_queue(dev, nic, qidx);
664 }
665 
666 static inline int
667 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic,
668 			  uint16_t qidx)
669 {
670 	int ret = 0;
671 
672 	RTE_SET_USED(nic);
673 	PMD_INIT_FUNC_TRACE();
674 
675 	if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
676 		return 0;
677 
678 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
679 	return ret;
680 }
681 
682 static int
683 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
684 {
685 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
686 
687 	PMD_INIT_FUNC_TRACE();
688 	qidx = qidx % PKO_VF_NUM_DQ;
689 
690 	return octeontx_vf_stop_tx_queue(dev, nic, qidx);
691 }
692 
693 static void
694 octeontx_dev_tx_queue_release(void *tx_queue)
695 {
696 	struct octeontx_txq *txq = tx_queue;
697 	int res;
698 
699 	PMD_INIT_FUNC_TRACE();
700 
701 	if (txq) {
702 		res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id);
703 		if (res < 0)
704 			octeontx_log_err("failed stop tx_queue(%d)\n",
705 				   txq->queue_id);
706 
707 		rte_free(txq);
708 	}
709 }
710 
711 static int
712 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
713 			    uint16_t nb_desc, unsigned int socket_id,
714 			    const struct rte_eth_txconf *tx_conf __rte_unused)
715 {
716 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
717 	struct octeontx_txq *txq = NULL;
718 	uint16_t dq_num;
719 	int res = 0;
720 
721 	RTE_SET_USED(nb_desc);
722 	RTE_SET_USED(socket_id);
723 
724 	dq_num = (nic->pko_vfid * PKO_VF_NUM_DQ) + qidx;
725 
726 	/* Socket id check */
727 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
728 			socket_id != (unsigned int)nic->node)
729 		PMD_TX_LOG(INFO, "socket_id expected %d, configured %d",
730 						socket_id, nic->node);
731 
732 	/* Free memory prior to re-allocation if needed. */
733 	if (dev->data->tx_queues[qidx] != NULL) {
734 		PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d",
735 				qidx);
736 		octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]);
737 		dev->data->tx_queues[qidx] = NULL;
738 	}
739 
740 	/* Allocating tx queue data structure */
741 	txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq),
742 				 RTE_CACHE_LINE_SIZE, nic->node);
743 	if (txq == NULL) {
744 		octeontx_log_err("failed to allocate txq=%d", qidx);
745 		res = -ENOMEM;
746 		goto err;
747 	}
748 
749 	txq->eth_dev = dev;
750 	txq->queue_id = dq_num;
751 	dev->data->tx_queues[qidx] = txq;
752 	dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
753 
754 	res = octeontx_pko_channel_query_dqs(nic->base_ochan,
755 						&txq->dq,
756 						sizeof(octeontx_dq_t),
757 						txq->queue_id,
758 						octeontx_dq_info_getter);
759 	if (res < 0) {
760 		res = -EFAULT;
761 		goto err;
762 	}
763 
764 	PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p",
765 			qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va,
766 			txq->dq.ioreg_va,
767 			txq->dq.fc_status_va);
768 
769 	return res;
770 
771 err:
772 	if (txq)
773 		rte_free(txq);
774 
775 	return res;
776 }
777 
778 static int
779 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx,
780 				uint16_t nb_desc, unsigned int socket_id,
781 				const struct rte_eth_rxconf *rx_conf,
782 				struct rte_mempool *mb_pool)
783 {
784 	struct octeontx_nic *nic = octeontx_pmd_priv(dev);
785 	struct rte_mempool_ops *mp_ops = NULL;
786 	struct octeontx_rxq *rxq = NULL;
787 	pki_pktbuf_cfg_t pktbuf_conf;
788 	pki_hash_cfg_t pki_hash;
789 	pki_qos_cfg_t pki_qos;
790 	uintptr_t pool;
791 	int ret, port;
792 	uint16_t gaura;
793 	unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx;
794 	unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx;
795 
796 	RTE_SET_USED(nb_desc);
797 
798 	memset(&pktbuf_conf, 0, sizeof(pktbuf_conf));
799 	memset(&pki_hash, 0, sizeof(pki_hash));
800 	memset(&pki_qos, 0, sizeof(pki_qos));
801 
802 	mp_ops = rte_mempool_get_ops(mb_pool->ops_index);
803 	if (strcmp(mp_ops->name, "octeontx_fpavf")) {
804 		octeontx_log_err("failed to find octeontx_fpavf mempool");
805 		return -ENOTSUP;
806 	}
807 
808 	/* Handle forbidden configurations */
809 	if (nic->pki.classifier_enable) {
810 		octeontx_log_err("cannot setup queue %d. "
811 					"Classifier option unsupported", qidx);
812 		return -EINVAL;
813 	}
814 
815 	port = nic->port_id;
816 
817 	/* Rx deferred start is not supported */
818 	if (rx_conf->rx_deferred_start) {
819 		octeontx_log_err("rx deferred start not supported");
820 		return -EINVAL;
821 	}
822 
823 	/* Verify queue index */
824 	if (qidx >= dev->data->nb_rx_queues) {
825 		octeontx_log_err("QID %d not supporteded (0 - %d available)\n",
826 				qidx, (dev->data->nb_rx_queues - 1));
827 		return -ENOTSUP;
828 	}
829 
830 	/* Socket id check */
831 	if (socket_id != (unsigned int)SOCKET_ID_ANY &&
832 			socket_id != (unsigned int)nic->node)
833 		PMD_RX_LOG(INFO, "socket_id expected %d, configured %d",
834 						socket_id, nic->node);
835 
836 	/* Allocating rx queue data structure */
837 	rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq),
838 				 RTE_CACHE_LINE_SIZE, nic->node);
839 	if (rxq == NULL) {
840 		octeontx_log_err("failed to allocate rxq=%d", qidx);
841 		return -ENOMEM;
842 	}
843 
844 	if (!nic->pki.initialized) {
845 		pktbuf_conf.port_type = 0;
846 		pki_hash.port_type = 0;
847 		pki_qos.port_type = 0;
848 
849 		pktbuf_conf.mmask.f_wqe_skip = 1;
850 		pktbuf_conf.mmask.f_first_skip = 1;
851 		pktbuf_conf.mmask.f_later_skip = 1;
852 		pktbuf_conf.mmask.f_mbuff_size = 1;
853 		pktbuf_conf.mmask.f_cache_mode = 1;
854 
855 		pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP;
856 		pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool);
857 		pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP;
858 		pktbuf_conf.mbuff_size = (mb_pool->elt_size -
859 					RTE_PKTMBUF_HEADROOM -
860 					rte_pktmbuf_priv_size(mb_pool) -
861 					sizeof(struct rte_mbuf));
862 
863 		pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT;
864 
865 		ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf);
866 		if (ret != 0) {
867 			octeontx_log_err("fail to configure pktbuf for port %d",
868 					port);
869 			rte_free(rxq);
870 			return ret;
871 		}
872 		PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n"
873 				"\tmbuf_size:\t0x%0x\n"
874 				"\twqe_skip:\t0x%0x\n"
875 				"\tfirst_skip:\t0x%0x\n"
876 				"\tlater_skip:\t0x%0x\n"
877 				"\tcache_mode:\t%s\n",
878 				port,
879 				pktbuf_conf.mbuff_size,
880 				pktbuf_conf.wqe_skip,
881 				pktbuf_conf.first_skip,
882 				pktbuf_conf.later_skip,
883 				(pktbuf_conf.cache_mode ==
884 						PKI_OPC_MODE_STT) ?
885 				"STT" :
886 				(pktbuf_conf.cache_mode ==
887 						PKI_OPC_MODE_STF) ?
888 				"STF" :
889 				(pktbuf_conf.cache_mode ==
890 						PKI_OPC_MODE_STF1_STT) ?
891 				"STF1_STT" : "STF2_STT");
892 
893 		if (nic->pki.hash_enable) {
894 			pki_hash.tag_dlc = 1;
895 			pki_hash.tag_slc = 1;
896 			pki_hash.tag_dlf = 1;
897 			pki_hash.tag_slf = 1;
898 			pki_hash.tag_prt = 1;
899 			octeontx_pki_port_hash_config(port, &pki_hash);
900 		}
901 
902 		pool = (uintptr_t)mb_pool->pool_id;
903 
904 		/* Get the gaura Id */
905 		gaura = octeontx_fpa_bufpool_gaura(pool);
906 
907 		pki_qos.qpg_qos = PKI_QPG_QOS_NONE;
908 		pki_qos.num_entry = 1;
909 		pki_qos.drop_policy = 0;
910 		pki_qos.tag_type = 0L;
911 		pki_qos.qos_entry[0].port_add = 0;
912 		pki_qos.qos_entry[0].gaura = gaura;
913 		pki_qos.qos_entry[0].ggrp_ok = ev_queues;
914 		pki_qos.qos_entry[0].ggrp_bad = ev_queues;
915 		pki_qos.qos_entry[0].grptag_bad = 0;
916 		pki_qos.qos_entry[0].grptag_ok = 0;
917 
918 		ret = octeontx_pki_port_create_qos(port, &pki_qos);
919 		if (ret < 0) {
920 			octeontx_log_err("failed to create QOS port=%d, q=%d",
921 					port, qidx);
922 			rte_free(rxq);
923 			return ret;
924 		}
925 		nic->pki.initialized = true;
926 	}
927 
928 	rxq->port_id = nic->port_id;
929 	rxq->eth_dev = dev;
930 	rxq->queue_id = qidx;
931 	rxq->evdev = nic->evdev;
932 	rxq->ev_queues = ev_queues;
933 	rxq->ev_ports = ev_ports;
934 
935 	dev->data->rx_queues[qidx] = rxq;
936 	dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
937 	return 0;
938 }
939 
940 static void
941 octeontx_dev_rx_queue_release(void *rxq)
942 {
943 	rte_free(rxq);
944 }
945 
946 static const uint32_t *
947 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev)
948 {
949 	static const uint32_t ptypes[] = {
950 		RTE_PTYPE_L3_IPV4,
951 		RTE_PTYPE_L3_IPV4_EXT,
952 		RTE_PTYPE_L3_IPV6,
953 		RTE_PTYPE_L3_IPV6_EXT,
954 		RTE_PTYPE_L4_TCP,
955 		RTE_PTYPE_L4_UDP,
956 		RTE_PTYPE_L4_FRAG,
957 		RTE_PTYPE_UNKNOWN
958 	};
959 
960 	if (dev->rx_pkt_burst == octeontx_recv_pkts)
961 		return ptypes;
962 
963 	return NULL;
964 }
965 
966 static int
967 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool)
968 {
969 	RTE_SET_USED(dev);
970 
971 	if (!strcmp(pool, "octeontx_fpavf"))
972 		return 0;
973 
974 	return -ENOTSUP;
975 }
976 
977 /* Initialize and register driver with DPDK Application */
978 static const struct eth_dev_ops octeontx_dev_ops = {
979 	.dev_configure		 = octeontx_dev_configure,
980 	.dev_infos_get		 = octeontx_dev_info,
981 	.dev_close		 = octeontx_dev_close,
982 	.dev_start		 = octeontx_dev_start,
983 	.dev_stop		 = octeontx_dev_stop,
984 	.promiscuous_enable	 = octeontx_dev_promisc_enable,
985 	.promiscuous_disable	 = octeontx_dev_promisc_disable,
986 	.link_update		 = octeontx_dev_link_update,
987 	.stats_get		 = octeontx_dev_stats_get,
988 	.stats_reset		 = octeontx_dev_stats_reset,
989 	.mac_addr_set		 = octeontx_dev_default_mac_addr_set,
990 	.tx_queue_start		 = octeontx_dev_tx_queue_start,
991 	.tx_queue_stop		 = octeontx_dev_tx_queue_stop,
992 	.tx_queue_setup		 = octeontx_dev_tx_queue_setup,
993 	.tx_queue_release	 = octeontx_dev_tx_queue_release,
994 	.rx_queue_setup		 = octeontx_dev_rx_queue_setup,
995 	.rx_queue_release	 = octeontx_dev_rx_queue_release,
996 	.dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get,
997 	.pool_ops_supported      = octeontx_pool_ops,
998 };
999 
1000 /* Create Ethdev interface per BGX LMAC ports */
1001 static int
1002 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev,
1003 			int socket_id)
1004 {
1005 	int res;
1006 	size_t pko_vfid;
1007 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1008 	struct octeontx_nic *nic = NULL;
1009 	struct rte_eth_dev *eth_dev = NULL;
1010 	struct rte_eth_dev_data *data;
1011 	const char *name = rte_vdev_device_name(dev);
1012 
1013 	PMD_INIT_FUNC_TRACE();
1014 
1015 	sprintf(octtx_name, "%s_%d", name, port);
1016 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1017 		eth_dev = rte_eth_dev_attach_secondary(octtx_name);
1018 		if (eth_dev == NULL)
1019 			return -ENODEV;
1020 
1021 		eth_dev->dev_ops = &octeontx_dev_ops;
1022 		eth_dev->device = &dev->device;
1023 		eth_dev->tx_pkt_burst = octeontx_xmit_pkts;
1024 		eth_dev->rx_pkt_burst = octeontx_recv_pkts;
1025 		rte_eth_dev_probing_finish(eth_dev);
1026 		return 0;
1027 	}
1028 
1029 	/* Reserve an ethdev entry */
1030 	eth_dev = rte_eth_dev_allocate(octtx_name);
1031 	if (eth_dev == NULL) {
1032 		octeontx_log_err("failed to allocate rte_eth_dev");
1033 		res = -ENOMEM;
1034 		goto err;
1035 	}
1036 	data = eth_dev->data;
1037 
1038 	nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id);
1039 	if (nic == NULL) {
1040 		octeontx_log_err("failed to allocate nic structure");
1041 		res = -ENOMEM;
1042 		goto err;
1043 	}
1044 	data->dev_private = nic;
1045 	pko_vfid = octeontx_pko_get_vfid();
1046 
1047 	if (pko_vfid == SIZE_MAX) {
1048 		octeontx_log_err("failed to get pko vfid");
1049 		res = -ENODEV;
1050 		goto err;
1051 	}
1052 
1053 	nic->pko_vfid = pko_vfid;
1054 	nic->port_id = port;
1055 	nic->evdev = evdev;
1056 
1057 	res = octeontx_port_open(nic);
1058 	if (res < 0)
1059 		goto err;
1060 
1061 	/* Rx side port configuration */
1062 	res = octeontx_pki_port_open(port);
1063 	if (res != 0) {
1064 		octeontx_log_err("failed to open PKI port %d", port);
1065 		res = -ENODEV;
1066 		goto err;
1067 	}
1068 
1069 	eth_dev->device = &dev->device;
1070 	eth_dev->intr_handle = NULL;
1071 	eth_dev->data->kdrv = RTE_KDRV_NONE;
1072 	eth_dev->data->numa_node = dev->device.numa_node;
1073 
1074 	data->port_id = eth_dev->data->port_id;
1075 
1076 	nic->ev_queues = 1;
1077 	nic->ev_ports = 1;
1078 
1079 	data->dev_link.link_status = ETH_LINK_DOWN;
1080 	data->dev_started = 0;
1081 	data->promiscuous = 0;
1082 	data->all_multicast = 0;
1083 	data->scattered_rx = 0;
1084 
1085 	data->mac_addrs = rte_zmalloc_socket(octtx_name, RTE_ETHER_ADDR_LEN, 0,
1086 							socket_id);
1087 	if (data->mac_addrs == NULL) {
1088 		octeontx_log_err("failed to allocate memory for mac_addrs");
1089 		res = -ENOMEM;
1090 		goto err;
1091 	}
1092 
1093 	eth_dev->dev_ops = &octeontx_dev_ops;
1094 
1095 	/* Finally save ethdev pointer to the NIC structure */
1096 	nic->dev = eth_dev;
1097 
1098 	if (nic->port_id != data->port_id) {
1099 		octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)",
1100 				data->port_id, nic->port_id);
1101 		res = -EINVAL;
1102 		goto err;
1103 	}
1104 
1105 	/* Update port_id mac to eth_dev */
1106 	memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN);
1107 
1108 	PMD_INIT_LOG(DEBUG, "ethdev info: ");
1109 	PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d",
1110 				nic->port_id, nic->port_ena,
1111 				nic->base_ochan, nic->num_ochans,
1112 				nic->num_tx_queues);
1113 	PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu);
1114 
1115 	rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7]
1116 		[(nic->base_ochan >> 4) & 0xF] = data->port_id;
1117 
1118 	rte_eth_dev_probing_finish(eth_dev);
1119 	return data->port_id;
1120 
1121 err:
1122 	if (nic)
1123 		octeontx_port_close(nic);
1124 
1125 	rte_eth_dev_release_port(eth_dev);
1126 
1127 	return res;
1128 }
1129 
1130 /* Un initialize octeontx device */
1131 static int
1132 octeontx_remove(struct rte_vdev_device *dev)
1133 {
1134 	char octtx_name[OCTEONTX_MAX_NAME_LEN];
1135 	struct rte_eth_dev *eth_dev = NULL;
1136 	struct octeontx_nic *nic = NULL;
1137 	int i;
1138 
1139 	if (dev == NULL)
1140 		return -EINVAL;
1141 
1142 	for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) {
1143 		sprintf(octtx_name, "eth_octeontx_%d", i);
1144 
1145 		/* reserve an ethdev entry */
1146 		eth_dev = rte_eth_dev_allocated(octtx_name);
1147 		if (eth_dev == NULL)
1148 			return -ENODEV;
1149 
1150 		if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1151 			rte_eth_dev_release_port(eth_dev);
1152 			continue;
1153 		}
1154 
1155 		nic = octeontx_pmd_priv(eth_dev);
1156 		rte_event_dev_stop(nic->evdev);
1157 		PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name);
1158 
1159 		rte_eth_dev_release_port(eth_dev);
1160 		rte_event_dev_close(nic->evdev);
1161 	}
1162 
1163 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1164 		return 0;
1165 
1166 	/* Free FC resource */
1167 	octeontx_pko_fc_free();
1168 
1169 	return 0;
1170 }
1171 
1172 /* Initialize octeontx device */
1173 static int
1174 octeontx_probe(struct rte_vdev_device *dev)
1175 {
1176 	const char *dev_name;
1177 	static int probe_once;
1178 	uint8_t socket_id, qlist;
1179 	int tx_vfcnt, port_id, evdev, qnum, pnum, res, i;
1180 	struct rte_event_dev_config dev_conf;
1181 	const char *eventdev_name = "event_octeontx";
1182 	struct rte_event_dev_info info;
1183 	struct rte_eth_dev *eth_dev;
1184 
1185 	struct octeontx_vdev_init_params init_params = {
1186 		OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT
1187 	};
1188 
1189 	dev_name = rte_vdev_device_name(dev);
1190 
1191 	if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
1192 	    strlen(rte_vdev_device_args(dev)) == 0) {
1193 		eth_dev = rte_eth_dev_attach_secondary(dev_name);
1194 		if (!eth_dev) {
1195 			PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name);
1196 			return -1;
1197 		}
1198 		/* TODO: request info from primary to set up Rx and Tx */
1199 		eth_dev->dev_ops = &octeontx_dev_ops;
1200 		eth_dev->device = &dev->device;
1201 		rte_eth_dev_probing_finish(eth_dev);
1202 		return 0;
1203 	}
1204 
1205 	res = octeontx_parse_vdev_init_params(&init_params, dev);
1206 	if (res < 0)
1207 		return -EINVAL;
1208 
1209 	if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) {
1210 		octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port,
1211 				OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT);
1212 		return -ENOTSUP;
1213 	}
1214 
1215 	PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name);
1216 
1217 	socket_id = rte_socket_id();
1218 
1219 	tx_vfcnt = octeontx_pko_vf_count();
1220 
1221 	if (tx_vfcnt < init_params.nr_port) {
1222 		octeontx_log_err("not enough PKO (%d) for port number (%d)",
1223 				tx_vfcnt, init_params.nr_port);
1224 		return -EINVAL;
1225 	}
1226 	evdev = rte_event_dev_get_dev_id(eventdev_name);
1227 	if (evdev < 0) {
1228 		octeontx_log_err("eventdev %s not found", eventdev_name);
1229 		return -ENODEV;
1230 	}
1231 
1232 	res = rte_event_dev_info_get(evdev, &info);
1233 	if (res < 0) {
1234 		octeontx_log_err("failed to eventdev info %d", res);
1235 		return -EINVAL;
1236 	}
1237 
1238 	PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d",
1239 			info.max_event_queues, info.max_event_ports);
1240 
1241 	if (octeontx_pko_init_fc(tx_vfcnt))
1242 		return -ENOMEM;
1243 
1244 	devconf_set_default_sane_values(&dev_conf, &info);
1245 	res = rte_event_dev_configure(evdev, &dev_conf);
1246 	if (res < 0)
1247 		goto parse_error;
1248 
1249 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT,
1250 			(uint32_t *)&pnum);
1251 	rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT,
1252 			(uint32_t *)&qnum);
1253 	if (pnum < qnum) {
1254 		octeontx_log_err("too few event ports (%d) for event_q(%d)",
1255 				pnum, qnum);
1256 		res = -EINVAL;
1257 		goto parse_error;
1258 	}
1259 
1260 	/* Enable all queues available */
1261 	for (i = 0; i < qnum; i++) {
1262 		res = rte_event_queue_setup(evdev, i, NULL);
1263 		if (res < 0) {
1264 			octeontx_log_err("failed to setup event_q(%d): res %d",
1265 					i, res);
1266 			goto parse_error;
1267 		}
1268 	}
1269 
1270 	/* Enable all ports available */
1271 	for (i = 0; i < pnum; i++) {
1272 		res = rte_event_port_setup(evdev, i, NULL);
1273 		if (res < 0) {
1274 			res = -ENODEV;
1275 			octeontx_log_err("failed to setup ev port(%d) res=%d",
1276 						i, res);
1277 			goto parse_error;
1278 		}
1279 	}
1280 
1281 	/*
1282 	 * Do 1:1 links for ports & queues. All queues would be mapped to
1283 	 * one port. If there are more ports than queues, then some ports
1284 	 * won't be linked to any queue.
1285 	 */
1286 	for (i = 0; i < qnum; i++) {
1287 		/* Link one queue to one event port */
1288 		qlist = i;
1289 		res = rte_event_port_link(evdev, i, &qlist, NULL, 1);
1290 		if (res < 0) {
1291 			res = -ENODEV;
1292 			octeontx_log_err("failed to link port (%d): res=%d",
1293 					i, res);
1294 			goto parse_error;
1295 		}
1296 	}
1297 
1298 	/* Create ethdev interface */
1299 	for (i = 0; i < init_params.nr_port; i++) {
1300 		port_id = octeontx_create(dev, i, evdev, socket_id);
1301 		if (port_id < 0) {
1302 			octeontx_log_err("failed to create device %s",
1303 					dev_name);
1304 			res = -ENODEV;
1305 			goto parse_error;
1306 		}
1307 
1308 		PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name,
1309 					port_id);
1310 	}
1311 
1312 	if (probe_once) {
1313 		octeontx_log_err("interface %s not supported", dev_name);
1314 		octeontx_remove(dev);
1315 		res = -ENOTSUP;
1316 		goto parse_error;
1317 	}
1318 	rte_mbuf_set_platform_mempool_ops("octeontx_fpavf");
1319 	probe_once = 1;
1320 
1321 	return 0;
1322 
1323 parse_error:
1324 	octeontx_pko_fc_free();
1325 	return res;
1326 }
1327 
1328 static struct rte_vdev_driver octeontx_pmd_drv = {
1329 	.probe = octeontx_probe,
1330 	.remove = octeontx_remove,
1331 };
1332 
1333 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv);
1334 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx);
1335 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> ");
1336