1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdio.h> 6 #include <stdarg.h> 7 #include <stdbool.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 12 #include <rte_alarm.h> 13 #include <rte_branch_prediction.h> 14 #include <rte_debug.h> 15 #include <rte_devargs.h> 16 #include <rte_dev.h> 17 #include <rte_kvargs.h> 18 #include <rte_malloc.h> 19 #include <rte_mbuf_pool_ops.h> 20 #include <rte_prefetch.h> 21 #include <rte_bus_vdev.h> 22 23 #include "octeontx_ethdev.h" 24 #include "octeontx_rxtx.h" 25 #include "octeontx_logs.h" 26 27 struct octeontx_vdev_init_params { 28 uint8_t nr_port; 29 }; 30 31 uint16_t 32 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; 33 34 enum octeontx_link_speed { 35 OCTEONTX_LINK_SPEED_SGMII, 36 OCTEONTX_LINK_SPEED_XAUI, 37 OCTEONTX_LINK_SPEED_RXAUI, 38 OCTEONTX_LINK_SPEED_10G_R, 39 OCTEONTX_LINK_SPEED_40G_R, 40 OCTEONTX_LINK_SPEED_RESERVE1, 41 OCTEONTX_LINK_SPEED_QSGMII, 42 OCTEONTX_LINK_SPEED_RESERVE2 43 }; 44 45 int otx_net_logtype_mbox; 46 int otx_net_logtype_init; 47 int otx_net_logtype_driver; 48 49 RTE_INIT(otx_net_init_log) 50 { 51 otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); 52 if (otx_net_logtype_mbox >= 0) 53 rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); 54 55 otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); 56 if (otx_net_logtype_init >= 0) 57 rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); 58 59 otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); 60 if (otx_net_logtype_driver >= 0) 61 rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); 62 } 63 64 /* Parse integer from integer argument */ 65 static int 66 parse_integer_arg(const char *key __rte_unused, 67 const char *value, void *extra_args) 68 { 69 int *i = (int *)extra_args; 70 71 *i = atoi(value); 72 if (*i < 0) { 73 octeontx_log_err("argument has to be positive."); 74 return -1; 75 } 76 77 return 0; 78 } 79 80 static int 81 octeontx_parse_vdev_init_params(struct octeontx_vdev_init_params *params, 82 struct rte_vdev_device *dev) 83 { 84 struct rte_kvargs *kvlist = NULL; 85 int ret = 0; 86 87 static const char * const octeontx_vdev_valid_params[] = { 88 OCTEONTX_VDEV_NR_PORT_ARG, 89 NULL 90 }; 91 92 const char *input_args = rte_vdev_device_args(dev); 93 if (params == NULL) 94 return -EINVAL; 95 96 97 if (input_args) { 98 kvlist = rte_kvargs_parse(input_args, 99 octeontx_vdev_valid_params); 100 if (kvlist == NULL) 101 return -1; 102 103 ret = rte_kvargs_process(kvlist, 104 OCTEONTX_VDEV_NR_PORT_ARG, 105 &parse_integer_arg, 106 ¶ms->nr_port); 107 if (ret < 0) 108 goto free_kvlist; 109 } 110 111 free_kvlist: 112 rte_kvargs_free(kvlist); 113 return ret; 114 } 115 116 static int 117 octeontx_port_open(struct octeontx_nic *nic) 118 { 119 octeontx_mbox_bgx_port_conf_t bgx_port_conf; 120 int res; 121 122 res = 0; 123 memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); 124 PMD_INIT_FUNC_TRACE(); 125 126 res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); 127 if (res < 0) { 128 octeontx_log_err("failed to open port %d", res); 129 return res; 130 } 131 132 nic->node = bgx_port_conf.node; 133 nic->port_ena = bgx_port_conf.enable; 134 nic->base_ichan = bgx_port_conf.base_chan; 135 nic->base_ochan = bgx_port_conf.base_chan; 136 nic->num_ichans = bgx_port_conf.num_chans; 137 nic->num_ochans = bgx_port_conf.num_chans; 138 nic->mtu = bgx_port_conf.mtu; 139 nic->bpen = bgx_port_conf.bpen; 140 nic->fcs_strip = bgx_port_conf.fcs_strip; 141 nic->bcast_mode = bgx_port_conf.bcast_mode; 142 nic->mcast_mode = bgx_port_conf.mcast_mode; 143 nic->speed = bgx_port_conf.mode; 144 145 memcpy(&nic->mac_addr[0], &bgx_port_conf.macaddr[0], 146 RTE_ETHER_ADDR_LEN); 147 148 octeontx_log_dbg("port opened %d", nic->port_id); 149 return res; 150 } 151 152 static void 153 octeontx_port_close(struct octeontx_nic *nic) 154 { 155 PMD_INIT_FUNC_TRACE(); 156 157 octeontx_bgx_port_close(nic->port_id); 158 octeontx_log_dbg("port closed %d", nic->port_id); 159 } 160 161 static int 162 octeontx_port_start(struct octeontx_nic *nic) 163 { 164 PMD_INIT_FUNC_TRACE(); 165 166 return octeontx_bgx_port_start(nic->port_id); 167 } 168 169 static int 170 octeontx_port_stop(struct octeontx_nic *nic) 171 { 172 PMD_INIT_FUNC_TRACE(); 173 174 return octeontx_bgx_port_stop(nic->port_id); 175 } 176 177 static void 178 octeontx_port_promisc_set(struct octeontx_nic *nic, int en) 179 { 180 struct rte_eth_dev *dev; 181 int res; 182 183 res = 0; 184 PMD_INIT_FUNC_TRACE(); 185 dev = nic->dev; 186 187 res = octeontx_bgx_port_promisc_set(nic->port_id, en); 188 if (res < 0) 189 octeontx_log_err("failed to set promiscuous mode %d", 190 nic->port_id); 191 192 /* Set proper flag for the mode */ 193 dev->data->promiscuous = (en != 0) ? 1 : 0; 194 195 octeontx_log_dbg("port %d : promiscuous mode %s", 196 nic->port_id, en ? "set" : "unset"); 197 } 198 199 static int 200 octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) 201 { 202 octeontx_mbox_bgx_port_stats_t bgx_stats; 203 int res; 204 205 PMD_INIT_FUNC_TRACE(); 206 207 res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); 208 if (res < 0) { 209 octeontx_log_err("failed to get port stats %d", nic->port_id); 210 return res; 211 } 212 213 stats->ipackets = bgx_stats.rx_packets; 214 stats->ibytes = bgx_stats.rx_bytes; 215 stats->imissed = bgx_stats.rx_dropped; 216 stats->ierrors = bgx_stats.rx_errors; 217 stats->opackets = bgx_stats.tx_packets; 218 stats->obytes = bgx_stats.tx_bytes; 219 stats->oerrors = bgx_stats.tx_errors; 220 221 octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", 222 nic->port_id, stats->ipackets, stats->opackets); 223 224 return 0; 225 } 226 227 static void 228 octeontx_port_stats_clr(struct octeontx_nic *nic) 229 { 230 PMD_INIT_FUNC_TRACE(); 231 232 octeontx_bgx_port_stats_clr(nic->port_id); 233 } 234 235 static inline void 236 devconf_set_default_sane_values(struct rte_event_dev_config *dev_conf, 237 struct rte_event_dev_info *info) 238 { 239 memset(dev_conf, 0, sizeof(struct rte_event_dev_config)); 240 dev_conf->dequeue_timeout_ns = info->min_dequeue_timeout_ns; 241 242 dev_conf->nb_event_ports = info->max_event_ports; 243 dev_conf->nb_event_queues = info->max_event_queues; 244 245 dev_conf->nb_event_queue_flows = info->max_event_queue_flows; 246 dev_conf->nb_event_port_dequeue_depth = 247 info->max_event_port_dequeue_depth; 248 dev_conf->nb_event_port_enqueue_depth = 249 info->max_event_port_enqueue_depth; 250 dev_conf->nb_event_port_enqueue_depth = 251 info->max_event_port_enqueue_depth; 252 dev_conf->nb_events_limit = 253 info->max_num_events; 254 } 255 256 static int 257 octeontx_dev_configure(struct rte_eth_dev *dev) 258 { 259 struct rte_eth_dev_data *data = dev->data; 260 struct rte_eth_conf *conf = &data->dev_conf; 261 struct rte_eth_rxmode *rxmode = &conf->rxmode; 262 struct rte_eth_txmode *txmode = &conf->txmode; 263 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 264 int ret; 265 266 PMD_INIT_FUNC_TRACE(); 267 RTE_SET_USED(conf); 268 269 if (!rte_eal_has_hugepages()) { 270 octeontx_log_err("huge page is not configured"); 271 return -EINVAL; 272 } 273 274 if (txmode->mq_mode) { 275 octeontx_log_err("tx mq_mode DCB or VMDq not supported"); 276 return -EINVAL; 277 } 278 279 if (rxmode->mq_mode != ETH_MQ_RX_NONE && 280 rxmode->mq_mode != ETH_MQ_RX_RSS) { 281 octeontx_log_err("unsupported rx qmode %d", rxmode->mq_mode); 282 return -EINVAL; 283 } 284 285 if (!(txmode->offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { 286 PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); 287 txmode->offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; 288 } 289 290 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { 291 octeontx_log_err("setting link speed/duplex not supported"); 292 return -EINVAL; 293 } 294 295 if (conf->dcb_capability_en) { 296 octeontx_log_err("DCB enable not supported"); 297 return -EINVAL; 298 } 299 300 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 301 octeontx_log_err("flow director not supported"); 302 return -EINVAL; 303 } 304 305 nic->num_tx_queues = dev->data->nb_tx_queues; 306 307 ret = octeontx_pko_channel_open(nic->port_id * PKO_VF_NUM_DQ, 308 nic->num_tx_queues, 309 nic->base_ochan); 310 if (ret) { 311 octeontx_log_err("failed to open channel %d no-of-txq %d", 312 nic->base_ochan, nic->num_tx_queues); 313 return -EFAULT; 314 } 315 316 nic->pki.classifier_enable = false; 317 nic->pki.hash_enable = true; 318 nic->pki.initialized = false; 319 320 return 0; 321 } 322 323 static void 324 octeontx_dev_close(struct rte_eth_dev *dev) 325 { 326 struct octeontx_txq *txq = NULL; 327 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 328 unsigned int i; 329 int ret; 330 331 PMD_INIT_FUNC_TRACE(); 332 333 rte_event_dev_close(nic->evdev); 334 335 ret = octeontx_pko_channel_close(nic->base_ochan); 336 if (ret < 0) { 337 octeontx_log_err("failed to close channel %d VF%d %d %d", 338 nic->base_ochan, nic->port_id, nic->num_tx_queues, 339 ret); 340 } 341 /* Free txq resources for this port */ 342 for (i = 0; i < nic->num_tx_queues; i++) { 343 txq = dev->data->tx_queues[i]; 344 if (!txq) 345 continue; 346 347 rte_free(txq); 348 } 349 350 dev->tx_pkt_burst = NULL; 351 dev->rx_pkt_burst = NULL; 352 } 353 354 static int 355 octeontx_dev_start(struct rte_eth_dev *dev) 356 { 357 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 358 int ret; 359 360 ret = 0; 361 362 PMD_INIT_FUNC_TRACE(); 363 /* 364 * Tx start 365 */ 366 dev->tx_pkt_burst = octeontx_xmit_pkts; 367 ret = octeontx_pko_channel_start(nic->base_ochan); 368 if (ret < 0) { 369 octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", 370 nic->port_id, nic->num_tx_queues, nic->base_ochan, 371 ret); 372 goto error; 373 } 374 375 /* 376 * Rx start 377 */ 378 dev->rx_pkt_burst = octeontx_recv_pkts; 379 ret = octeontx_pki_port_start(nic->port_id); 380 if (ret < 0) { 381 octeontx_log_err("fail to start Rx on port %d", nic->port_id); 382 goto channel_stop_error; 383 } 384 385 /* 386 * Start port 387 */ 388 ret = octeontx_port_start(nic); 389 if (ret < 0) { 390 octeontx_log_err("failed start port %d", ret); 391 goto pki_port_stop_error; 392 } 393 394 PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", 395 nic->base_ochan, nic->num_tx_queues, nic->port_id); 396 397 ret = rte_event_dev_start(nic->evdev); 398 if (ret < 0) { 399 octeontx_log_err("failed to start evdev: ret (%d)", ret); 400 goto pki_port_stop_error; 401 } 402 403 /* Success */ 404 return ret; 405 406 pki_port_stop_error: 407 octeontx_pki_port_stop(nic->port_id); 408 channel_stop_error: 409 octeontx_pko_channel_stop(nic->base_ochan); 410 error: 411 return ret; 412 } 413 414 static void 415 octeontx_dev_stop(struct rte_eth_dev *dev) 416 { 417 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 418 int ret; 419 420 PMD_INIT_FUNC_TRACE(); 421 422 rte_event_dev_stop(nic->evdev); 423 424 ret = octeontx_port_stop(nic); 425 if (ret < 0) { 426 octeontx_log_err("failed to req stop port %d res=%d", 427 nic->port_id, ret); 428 return; 429 } 430 431 ret = octeontx_pki_port_stop(nic->port_id); 432 if (ret < 0) { 433 octeontx_log_err("failed to stop pki port %d res=%d", 434 nic->port_id, ret); 435 return; 436 } 437 438 ret = octeontx_pko_channel_stop(nic->base_ochan); 439 if (ret < 0) { 440 octeontx_log_err("failed to stop channel %d VF%d %d %d", 441 nic->base_ochan, nic->port_id, nic->num_tx_queues, 442 ret); 443 return; 444 } 445 } 446 447 static void 448 octeontx_dev_promisc_enable(struct rte_eth_dev *dev) 449 { 450 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 451 452 PMD_INIT_FUNC_TRACE(); 453 octeontx_port_promisc_set(nic, 1); 454 } 455 456 static void 457 octeontx_dev_promisc_disable(struct rte_eth_dev *dev) 458 { 459 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 460 461 PMD_INIT_FUNC_TRACE(); 462 octeontx_port_promisc_set(nic, 0); 463 } 464 465 static int 466 octeontx_port_link_status(struct octeontx_nic *nic) 467 { 468 int res; 469 470 PMD_INIT_FUNC_TRACE(); 471 res = octeontx_bgx_port_link_status(nic->port_id); 472 if (res < 0) { 473 octeontx_log_err("failed to get port %d link status", 474 nic->port_id); 475 return res; 476 } 477 478 nic->link_up = (uint8_t)res; 479 octeontx_log_dbg("port %d link status %d", nic->port_id, nic->link_up); 480 481 return res; 482 } 483 484 /* 485 * Return 0 means link status changed, -1 means not changed 486 */ 487 static int 488 octeontx_dev_link_update(struct rte_eth_dev *dev, 489 int wait_to_complete __rte_unused) 490 { 491 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 492 struct rte_eth_link link; 493 int res; 494 495 PMD_INIT_FUNC_TRACE(); 496 497 res = octeontx_port_link_status(nic); 498 if (res < 0) { 499 octeontx_log_err("failed to request link status %d", res); 500 return res; 501 } 502 503 link.link_status = nic->link_up; 504 505 switch (nic->speed) { 506 case OCTEONTX_LINK_SPEED_SGMII: 507 link.link_speed = ETH_SPEED_NUM_1G; 508 break; 509 510 case OCTEONTX_LINK_SPEED_XAUI: 511 link.link_speed = ETH_SPEED_NUM_10G; 512 break; 513 514 case OCTEONTX_LINK_SPEED_RXAUI: 515 case OCTEONTX_LINK_SPEED_10G_R: 516 link.link_speed = ETH_SPEED_NUM_10G; 517 break; 518 case OCTEONTX_LINK_SPEED_QSGMII: 519 link.link_speed = ETH_SPEED_NUM_5G; 520 break; 521 case OCTEONTX_LINK_SPEED_40G_R: 522 link.link_speed = ETH_SPEED_NUM_40G; 523 break; 524 525 case OCTEONTX_LINK_SPEED_RESERVE1: 526 case OCTEONTX_LINK_SPEED_RESERVE2: 527 default: 528 link.link_speed = ETH_SPEED_NUM_NONE; 529 octeontx_log_err("incorrect link speed %d", nic->speed); 530 break; 531 } 532 533 link.link_duplex = ETH_LINK_FULL_DUPLEX; 534 link.link_autoneg = ETH_LINK_AUTONEG; 535 536 return rte_eth_linkstatus_set(dev, &link); 537 } 538 539 static int 540 octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 541 { 542 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 543 544 PMD_INIT_FUNC_TRACE(); 545 return octeontx_port_stats(nic, stats); 546 } 547 548 static void 549 octeontx_dev_stats_reset(struct rte_eth_dev *dev) 550 { 551 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 552 553 PMD_INIT_FUNC_TRACE(); 554 octeontx_port_stats_clr(nic); 555 } 556 557 static int 558 octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, 559 struct rte_ether_addr *addr) 560 { 561 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 562 int ret; 563 564 ret = octeontx_bgx_port_mac_set(nic->port_id, addr->addr_bytes); 565 if (ret != 0) 566 octeontx_log_err("failed to set MAC address on port %d", 567 nic->port_id); 568 569 return ret; 570 } 571 572 static int 573 octeontx_dev_info(struct rte_eth_dev *dev, 574 struct rte_eth_dev_info *dev_info) 575 { 576 RTE_SET_USED(dev); 577 578 /* Autonegotiation may be disabled */ 579 dev_info->speed_capa = ETH_LINK_SPEED_FIXED; 580 dev_info->speed_capa |= ETH_LINK_SPEED_10M | ETH_LINK_SPEED_100M | 581 ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | 582 ETH_LINK_SPEED_40G; 583 584 dev_info->max_mac_addrs = 1; 585 dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; 586 dev_info->max_rx_queues = 1; 587 dev_info->max_tx_queues = PKO_MAX_NUM_DQ; 588 dev_info->min_rx_bufsize = 0; 589 590 dev_info->default_rxconf = (struct rte_eth_rxconf) { 591 .rx_free_thresh = 0, 592 .rx_drop_en = 0, 593 .offloads = OCTEONTX_RX_OFFLOADS, 594 }; 595 596 dev_info->default_txconf = (struct rte_eth_txconf) { 597 .tx_free_thresh = 0, 598 .offloads = OCTEONTX_TX_OFFLOADS, 599 }; 600 601 dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; 602 dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; 603 604 return 0; 605 } 606 607 static void 608 octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) 609 { 610 ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; 611 ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; 612 ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; 613 } 614 615 static int 616 octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 617 uint16_t qidx) 618 { 619 struct octeontx_txq *txq; 620 int res; 621 622 PMD_INIT_FUNC_TRACE(); 623 624 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) 625 return 0; 626 627 txq = dev->data->tx_queues[qidx]; 628 629 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 630 &txq->dq, 631 sizeof(octeontx_dq_t), 632 txq->queue_id, 633 octeontx_dq_info_getter); 634 if (res < 0) { 635 res = -EFAULT; 636 goto close_port; 637 } 638 639 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; 640 return res; 641 642 close_port: 643 (void)octeontx_port_stop(nic); 644 octeontx_pko_channel_stop(nic->base_ochan); 645 octeontx_pko_channel_close(nic->base_ochan); 646 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 647 return res; 648 } 649 650 static int 651 octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) 652 { 653 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 654 655 PMD_INIT_FUNC_TRACE(); 656 qidx = qidx % PKO_VF_NUM_DQ; 657 return octeontx_vf_start_tx_queue(dev, nic, qidx); 658 } 659 660 static inline int 661 octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, 662 uint16_t qidx) 663 { 664 int ret = 0; 665 666 RTE_SET_USED(nic); 667 PMD_INIT_FUNC_TRACE(); 668 669 if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) 670 return 0; 671 672 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 673 return ret; 674 } 675 676 static int 677 octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) 678 { 679 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 680 681 PMD_INIT_FUNC_TRACE(); 682 qidx = qidx % PKO_VF_NUM_DQ; 683 684 return octeontx_vf_stop_tx_queue(dev, nic, qidx); 685 } 686 687 static void 688 octeontx_dev_tx_queue_release(void *tx_queue) 689 { 690 struct octeontx_txq *txq = tx_queue; 691 int res; 692 693 PMD_INIT_FUNC_TRACE(); 694 695 if (txq) { 696 res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); 697 if (res < 0) 698 octeontx_log_err("failed stop tx_queue(%d)\n", 699 txq->queue_id); 700 701 rte_free(txq); 702 } 703 } 704 705 static int 706 octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 707 uint16_t nb_desc, unsigned int socket_id, 708 const struct rte_eth_txconf *tx_conf __rte_unused) 709 { 710 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 711 struct octeontx_txq *txq = NULL; 712 uint16_t dq_num; 713 int res = 0; 714 715 RTE_SET_USED(nb_desc); 716 RTE_SET_USED(socket_id); 717 718 dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; 719 720 /* Socket id check */ 721 if (socket_id != (unsigned int)SOCKET_ID_ANY && 722 socket_id != (unsigned int)nic->node) 723 PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", 724 socket_id, nic->node); 725 726 /* Free memory prior to re-allocation if needed. */ 727 if (dev->data->tx_queues[qidx] != NULL) { 728 PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", 729 qidx); 730 octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); 731 dev->data->tx_queues[qidx] = NULL; 732 } 733 734 /* Allocating tx queue data structure */ 735 txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), 736 RTE_CACHE_LINE_SIZE, nic->node); 737 if (txq == NULL) { 738 octeontx_log_err("failed to allocate txq=%d", qidx); 739 res = -ENOMEM; 740 goto err; 741 } 742 743 txq->eth_dev = dev; 744 txq->queue_id = dq_num; 745 dev->data->tx_queues[qidx] = txq; 746 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 747 748 res = octeontx_pko_channel_query_dqs(nic->base_ochan, 749 &txq->dq, 750 sizeof(octeontx_dq_t), 751 txq->queue_id, 752 octeontx_dq_info_getter); 753 if (res < 0) { 754 res = -EFAULT; 755 goto err; 756 } 757 758 PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", 759 qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, 760 txq->dq.ioreg_va, 761 txq->dq.fc_status_va); 762 763 return res; 764 765 err: 766 if (txq) 767 rte_free(txq); 768 769 return res; 770 } 771 772 static int 773 octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, 774 uint16_t nb_desc, unsigned int socket_id, 775 const struct rte_eth_rxconf *rx_conf, 776 struct rte_mempool *mb_pool) 777 { 778 struct octeontx_nic *nic = octeontx_pmd_priv(dev); 779 struct rte_mempool_ops *mp_ops = NULL; 780 struct octeontx_rxq *rxq = NULL; 781 pki_pktbuf_cfg_t pktbuf_conf; 782 pki_hash_cfg_t pki_hash; 783 pki_qos_cfg_t pki_qos; 784 uintptr_t pool; 785 int ret, port; 786 uint16_t gaura; 787 unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; 788 unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; 789 790 RTE_SET_USED(nb_desc); 791 792 memset(&pktbuf_conf, 0, sizeof(pktbuf_conf)); 793 memset(&pki_hash, 0, sizeof(pki_hash)); 794 memset(&pki_qos, 0, sizeof(pki_qos)); 795 796 mp_ops = rte_mempool_get_ops(mb_pool->ops_index); 797 if (strcmp(mp_ops->name, "octeontx_fpavf")) { 798 octeontx_log_err("failed to find octeontx_fpavf mempool"); 799 return -ENOTSUP; 800 } 801 802 /* Handle forbidden configurations */ 803 if (nic->pki.classifier_enable) { 804 octeontx_log_err("cannot setup queue %d. " 805 "Classifier option unsupported", qidx); 806 return -EINVAL; 807 } 808 809 port = nic->port_id; 810 811 /* Rx deferred start is not supported */ 812 if (rx_conf->rx_deferred_start) { 813 octeontx_log_err("rx deferred start not supported"); 814 return -EINVAL; 815 } 816 817 /* Verify queue index */ 818 if (qidx >= dev->data->nb_rx_queues) { 819 octeontx_log_err("QID %d not supporteded (0 - %d available)\n", 820 qidx, (dev->data->nb_rx_queues - 1)); 821 return -ENOTSUP; 822 } 823 824 /* Socket id check */ 825 if (socket_id != (unsigned int)SOCKET_ID_ANY && 826 socket_id != (unsigned int)nic->node) 827 PMD_RX_LOG(INFO, "socket_id expected %d, configured %d", 828 socket_id, nic->node); 829 830 /* Allocating rx queue data structure */ 831 rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct octeontx_rxq), 832 RTE_CACHE_LINE_SIZE, nic->node); 833 if (rxq == NULL) { 834 octeontx_log_err("failed to allocate rxq=%d", qidx); 835 return -ENOMEM; 836 } 837 838 if (!nic->pki.initialized) { 839 pktbuf_conf.port_type = 0; 840 pki_hash.port_type = 0; 841 pki_qos.port_type = 0; 842 843 pktbuf_conf.mmask.f_wqe_skip = 1; 844 pktbuf_conf.mmask.f_first_skip = 1; 845 pktbuf_conf.mmask.f_later_skip = 1; 846 pktbuf_conf.mmask.f_mbuff_size = 1; 847 pktbuf_conf.mmask.f_cache_mode = 1; 848 849 pktbuf_conf.wqe_skip = OCTTX_PACKET_WQE_SKIP; 850 pktbuf_conf.first_skip = OCTTX_PACKET_FIRST_SKIP(mb_pool); 851 pktbuf_conf.later_skip = OCTTX_PACKET_LATER_SKIP; 852 pktbuf_conf.mbuff_size = (mb_pool->elt_size - 853 RTE_PKTMBUF_HEADROOM - 854 rte_pktmbuf_priv_size(mb_pool) - 855 sizeof(struct rte_mbuf)); 856 857 pktbuf_conf.cache_mode = PKI_OPC_MODE_STF2_STT; 858 859 ret = octeontx_pki_port_pktbuf_config(port, &pktbuf_conf); 860 if (ret != 0) { 861 octeontx_log_err("fail to configure pktbuf for port %d", 862 port); 863 rte_free(rxq); 864 return ret; 865 } 866 PMD_RX_LOG(DEBUG, "Port %d Rx pktbuf configured:\n" 867 "\tmbuf_size:\t0x%0x\n" 868 "\twqe_skip:\t0x%0x\n" 869 "\tfirst_skip:\t0x%0x\n" 870 "\tlater_skip:\t0x%0x\n" 871 "\tcache_mode:\t%s\n", 872 port, 873 pktbuf_conf.mbuff_size, 874 pktbuf_conf.wqe_skip, 875 pktbuf_conf.first_skip, 876 pktbuf_conf.later_skip, 877 (pktbuf_conf.cache_mode == 878 PKI_OPC_MODE_STT) ? 879 "STT" : 880 (pktbuf_conf.cache_mode == 881 PKI_OPC_MODE_STF) ? 882 "STF" : 883 (pktbuf_conf.cache_mode == 884 PKI_OPC_MODE_STF1_STT) ? 885 "STF1_STT" : "STF2_STT"); 886 887 if (nic->pki.hash_enable) { 888 pki_hash.tag_dlc = 1; 889 pki_hash.tag_slc = 1; 890 pki_hash.tag_dlf = 1; 891 pki_hash.tag_slf = 1; 892 pki_hash.tag_prt = 1; 893 octeontx_pki_port_hash_config(port, &pki_hash); 894 } 895 896 pool = (uintptr_t)mb_pool->pool_id; 897 898 /* Get the gaura Id */ 899 gaura = octeontx_fpa_bufpool_gaura(pool); 900 901 pki_qos.qpg_qos = PKI_QPG_QOS_NONE; 902 pki_qos.num_entry = 1; 903 pki_qos.drop_policy = 0; 904 pki_qos.tag_type = 0L; 905 pki_qos.qos_entry[0].port_add = 0; 906 pki_qos.qos_entry[0].gaura = gaura; 907 pki_qos.qos_entry[0].ggrp_ok = ev_queues; 908 pki_qos.qos_entry[0].ggrp_bad = ev_queues; 909 pki_qos.qos_entry[0].grptag_bad = 0; 910 pki_qos.qos_entry[0].grptag_ok = 0; 911 912 ret = octeontx_pki_port_create_qos(port, &pki_qos); 913 if (ret < 0) { 914 octeontx_log_err("failed to create QOS port=%d, q=%d", 915 port, qidx); 916 rte_free(rxq); 917 return ret; 918 } 919 nic->pki.initialized = true; 920 } 921 922 rxq->port_id = nic->port_id; 923 rxq->eth_dev = dev; 924 rxq->queue_id = qidx; 925 rxq->evdev = nic->evdev; 926 rxq->ev_queues = ev_queues; 927 rxq->ev_ports = ev_ports; 928 929 dev->data->rx_queues[qidx] = rxq; 930 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; 931 return 0; 932 } 933 934 static void 935 octeontx_dev_rx_queue_release(void *rxq) 936 { 937 rte_free(rxq); 938 } 939 940 static const uint32_t * 941 octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) 942 { 943 static const uint32_t ptypes[] = { 944 RTE_PTYPE_L3_IPV4, 945 RTE_PTYPE_L3_IPV4_EXT, 946 RTE_PTYPE_L3_IPV6, 947 RTE_PTYPE_L3_IPV6_EXT, 948 RTE_PTYPE_L4_TCP, 949 RTE_PTYPE_L4_UDP, 950 RTE_PTYPE_L4_FRAG, 951 RTE_PTYPE_UNKNOWN 952 }; 953 954 if (dev->rx_pkt_burst == octeontx_recv_pkts) 955 return ptypes; 956 957 return NULL; 958 } 959 960 static int 961 octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) 962 { 963 RTE_SET_USED(dev); 964 965 if (!strcmp(pool, "octeontx_fpavf")) 966 return 0; 967 968 return -ENOTSUP; 969 } 970 971 /* Initialize and register driver with DPDK Application */ 972 static const struct eth_dev_ops octeontx_dev_ops = { 973 .dev_configure = octeontx_dev_configure, 974 .dev_infos_get = octeontx_dev_info, 975 .dev_close = octeontx_dev_close, 976 .dev_start = octeontx_dev_start, 977 .dev_stop = octeontx_dev_stop, 978 .promiscuous_enable = octeontx_dev_promisc_enable, 979 .promiscuous_disable = octeontx_dev_promisc_disable, 980 .link_update = octeontx_dev_link_update, 981 .stats_get = octeontx_dev_stats_get, 982 .stats_reset = octeontx_dev_stats_reset, 983 .mac_addr_set = octeontx_dev_default_mac_addr_set, 984 .tx_queue_start = octeontx_dev_tx_queue_start, 985 .tx_queue_stop = octeontx_dev_tx_queue_stop, 986 .tx_queue_setup = octeontx_dev_tx_queue_setup, 987 .tx_queue_release = octeontx_dev_tx_queue_release, 988 .rx_queue_setup = octeontx_dev_rx_queue_setup, 989 .rx_queue_release = octeontx_dev_rx_queue_release, 990 .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, 991 .pool_ops_supported = octeontx_pool_ops, 992 }; 993 994 /* Create Ethdev interface per BGX LMAC ports */ 995 static int 996 octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, 997 int socket_id) 998 { 999 int res; 1000 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1001 struct octeontx_nic *nic = NULL; 1002 struct rte_eth_dev *eth_dev = NULL; 1003 struct rte_eth_dev_data *data; 1004 const char *name = rte_vdev_device_name(dev); 1005 1006 PMD_INIT_FUNC_TRACE(); 1007 1008 sprintf(octtx_name, "%s_%d", name, port); 1009 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1010 eth_dev = rte_eth_dev_attach_secondary(octtx_name); 1011 if (eth_dev == NULL) 1012 return -ENODEV; 1013 1014 eth_dev->dev_ops = &octeontx_dev_ops; 1015 eth_dev->device = &dev->device; 1016 eth_dev->tx_pkt_burst = octeontx_xmit_pkts; 1017 eth_dev->rx_pkt_burst = octeontx_recv_pkts; 1018 rte_eth_dev_probing_finish(eth_dev); 1019 return 0; 1020 } 1021 1022 /* Reserve an ethdev entry */ 1023 eth_dev = rte_eth_dev_allocate(octtx_name); 1024 if (eth_dev == NULL) { 1025 octeontx_log_err("failed to allocate rte_eth_dev"); 1026 res = -ENOMEM; 1027 goto err; 1028 } 1029 data = eth_dev->data; 1030 1031 nic = rte_zmalloc_socket(octtx_name, sizeof(*nic), 0, socket_id); 1032 if (nic == NULL) { 1033 octeontx_log_err("failed to allocate nic structure"); 1034 res = -ENOMEM; 1035 goto err; 1036 } 1037 data->dev_private = nic; 1038 1039 nic->port_id = port; 1040 nic->evdev = evdev; 1041 1042 res = octeontx_port_open(nic); 1043 if (res < 0) 1044 goto err; 1045 1046 /* Rx side port configuration */ 1047 res = octeontx_pki_port_open(port); 1048 if (res != 0) { 1049 octeontx_log_err("failed to open PKI port %d", port); 1050 res = -ENODEV; 1051 goto err; 1052 } 1053 1054 eth_dev->device = &dev->device; 1055 eth_dev->intr_handle = NULL; 1056 eth_dev->data->kdrv = RTE_KDRV_NONE; 1057 eth_dev->data->numa_node = dev->device.numa_node; 1058 1059 data->port_id = eth_dev->data->port_id; 1060 1061 nic->ev_queues = 1; 1062 nic->ev_ports = 1; 1063 1064 data->dev_link.link_status = ETH_LINK_DOWN; 1065 data->dev_started = 0; 1066 data->promiscuous = 0; 1067 data->all_multicast = 0; 1068 data->scattered_rx = 0; 1069 1070 data->mac_addrs = rte_zmalloc_socket(octtx_name, RTE_ETHER_ADDR_LEN, 0, 1071 socket_id); 1072 if (data->mac_addrs == NULL) { 1073 octeontx_log_err("failed to allocate memory for mac_addrs"); 1074 res = -ENOMEM; 1075 goto err; 1076 } 1077 1078 eth_dev->dev_ops = &octeontx_dev_ops; 1079 1080 /* Finally save ethdev pointer to the NIC structure */ 1081 nic->dev = eth_dev; 1082 1083 if (nic->port_id != data->port_id) { 1084 octeontx_log_err("eth_dev->port_id (%d) is diff to orig (%d)", 1085 data->port_id, nic->port_id); 1086 res = -EINVAL; 1087 goto err; 1088 } 1089 1090 /* Update port_id mac to eth_dev */ 1091 memcpy(data->mac_addrs, nic->mac_addr, RTE_ETHER_ADDR_LEN); 1092 1093 PMD_INIT_LOG(DEBUG, "ethdev info: "); 1094 PMD_INIT_LOG(DEBUG, "port %d, port_ena %d ochan %d num_ochan %d tx_q %d", 1095 nic->port_id, nic->port_ena, 1096 nic->base_ochan, nic->num_ochans, 1097 nic->num_tx_queues); 1098 PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); 1099 1100 rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] 1101 [(nic->base_ochan >> 4) & 0xF] = data->port_id; 1102 1103 rte_eth_dev_probing_finish(eth_dev); 1104 return data->port_id; 1105 1106 err: 1107 if (nic) 1108 octeontx_port_close(nic); 1109 1110 rte_eth_dev_release_port(eth_dev); 1111 1112 return res; 1113 } 1114 1115 /* Un initialize octeontx device */ 1116 static int 1117 octeontx_remove(struct rte_vdev_device *dev) 1118 { 1119 char octtx_name[OCTEONTX_MAX_NAME_LEN]; 1120 struct rte_eth_dev *eth_dev = NULL; 1121 struct octeontx_nic *nic = NULL; 1122 int i; 1123 1124 if (dev == NULL) 1125 return -EINVAL; 1126 1127 for (i = 0; i < OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT; i++) { 1128 sprintf(octtx_name, "eth_octeontx_%d", i); 1129 1130 /* reserve an ethdev entry */ 1131 eth_dev = rte_eth_dev_allocated(octtx_name); 1132 if (eth_dev == NULL) 1133 return -ENODEV; 1134 1135 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1136 rte_eth_dev_release_port(eth_dev); 1137 continue; 1138 } 1139 1140 nic = octeontx_pmd_priv(eth_dev); 1141 rte_event_dev_stop(nic->evdev); 1142 PMD_INIT_LOG(INFO, "Closing octeontx device %s", octtx_name); 1143 1144 rte_eth_dev_release_port(eth_dev); 1145 rte_event_dev_close(nic->evdev); 1146 } 1147 1148 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1149 return 0; 1150 1151 /* Free FC resource */ 1152 octeontx_pko_fc_free(); 1153 1154 return 0; 1155 } 1156 1157 /* Initialize octeontx device */ 1158 static int 1159 octeontx_probe(struct rte_vdev_device *dev) 1160 { 1161 const char *dev_name; 1162 static int probe_once; 1163 uint8_t socket_id, qlist; 1164 int tx_vfcnt, port_id, evdev, qnum, pnum, res, i; 1165 struct rte_event_dev_config dev_conf; 1166 const char *eventdev_name = "event_octeontx"; 1167 struct rte_event_dev_info info; 1168 struct rte_eth_dev *eth_dev; 1169 1170 struct octeontx_vdev_init_params init_params = { 1171 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT 1172 }; 1173 1174 dev_name = rte_vdev_device_name(dev); 1175 1176 if (rte_eal_process_type() == RTE_PROC_SECONDARY && 1177 strlen(rte_vdev_device_args(dev)) == 0) { 1178 eth_dev = rte_eth_dev_attach_secondary(dev_name); 1179 if (!eth_dev) { 1180 PMD_INIT_LOG(ERR, "Failed to probe %s", dev_name); 1181 return -1; 1182 } 1183 /* TODO: request info from primary to set up Rx and Tx */ 1184 eth_dev->dev_ops = &octeontx_dev_ops; 1185 eth_dev->device = &dev->device; 1186 rte_eth_dev_probing_finish(eth_dev); 1187 return 0; 1188 } 1189 1190 res = octeontx_parse_vdev_init_params(&init_params, dev); 1191 if (res < 0) 1192 return -EINVAL; 1193 1194 if (init_params.nr_port > OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT) { 1195 octeontx_log_err("nr_port (%d) > max (%d)", init_params.nr_port, 1196 OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT); 1197 return -ENOTSUP; 1198 } 1199 1200 PMD_INIT_LOG(DEBUG, "initializing %s pmd", dev_name); 1201 1202 socket_id = rte_socket_id(); 1203 1204 tx_vfcnt = octeontx_pko_vf_count(); 1205 1206 if (tx_vfcnt < init_params.nr_port) { 1207 octeontx_log_err("not enough PKO (%d) for port number (%d)", 1208 tx_vfcnt, init_params.nr_port); 1209 return -EINVAL; 1210 } 1211 evdev = rte_event_dev_get_dev_id(eventdev_name); 1212 if (evdev < 0) { 1213 octeontx_log_err("eventdev %s not found", eventdev_name); 1214 return -ENODEV; 1215 } 1216 1217 res = rte_event_dev_info_get(evdev, &info); 1218 if (res < 0) { 1219 octeontx_log_err("failed to eventdev info %d", res); 1220 return -EINVAL; 1221 } 1222 1223 PMD_INIT_LOG(DEBUG, "max_queue %d max_port %d", 1224 info.max_event_queues, info.max_event_ports); 1225 1226 if (octeontx_pko_init_fc(tx_vfcnt)) 1227 return -ENOMEM; 1228 1229 devconf_set_default_sane_values(&dev_conf, &info); 1230 res = rte_event_dev_configure(evdev, &dev_conf); 1231 if (res < 0) 1232 goto parse_error; 1233 1234 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_PORT_COUNT, 1235 (uint32_t *)&pnum); 1236 rte_event_dev_attr_get(evdev, RTE_EVENT_DEV_ATTR_QUEUE_COUNT, 1237 (uint32_t *)&qnum); 1238 if (pnum < qnum) { 1239 octeontx_log_err("too few event ports (%d) for event_q(%d)", 1240 pnum, qnum); 1241 res = -EINVAL; 1242 goto parse_error; 1243 } 1244 1245 /* Enable all queues available */ 1246 for (i = 0; i < qnum; i++) { 1247 res = rte_event_queue_setup(evdev, i, NULL); 1248 if (res < 0) { 1249 octeontx_log_err("failed to setup event_q(%d): res %d", 1250 i, res); 1251 goto parse_error; 1252 } 1253 } 1254 1255 /* Enable all ports available */ 1256 for (i = 0; i < pnum; i++) { 1257 res = rte_event_port_setup(evdev, i, NULL); 1258 if (res < 0) { 1259 res = -ENODEV; 1260 octeontx_log_err("failed to setup ev port(%d) res=%d", 1261 i, res); 1262 goto parse_error; 1263 } 1264 } 1265 1266 /* 1267 * Do 1:1 links for ports & queues. All queues would be mapped to 1268 * one port. If there are more ports than queues, then some ports 1269 * won't be linked to any queue. 1270 */ 1271 for (i = 0; i < qnum; i++) { 1272 /* Link one queue to one event port */ 1273 qlist = i; 1274 res = rte_event_port_link(evdev, i, &qlist, NULL, 1); 1275 if (res < 0) { 1276 res = -ENODEV; 1277 octeontx_log_err("failed to link port (%d): res=%d", 1278 i, res); 1279 goto parse_error; 1280 } 1281 } 1282 1283 /* Create ethdev interface */ 1284 for (i = 0; i < init_params.nr_port; i++) { 1285 port_id = octeontx_create(dev, i, evdev, socket_id); 1286 if (port_id < 0) { 1287 octeontx_log_err("failed to create device %s", 1288 dev_name); 1289 res = -ENODEV; 1290 goto parse_error; 1291 } 1292 1293 PMD_INIT_LOG(INFO, "created ethdev %s for port %d", dev_name, 1294 port_id); 1295 } 1296 1297 if (probe_once) { 1298 octeontx_log_err("interface %s not supported", dev_name); 1299 octeontx_remove(dev); 1300 res = -ENOTSUP; 1301 goto parse_error; 1302 } 1303 rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); 1304 probe_once = 1; 1305 1306 return 0; 1307 1308 parse_error: 1309 octeontx_pko_fc_free(); 1310 return res; 1311 } 1312 1313 static struct rte_vdev_driver octeontx_pmd_drv = { 1314 .probe = octeontx_probe, 1315 .remove = octeontx_remove, 1316 }; 1317 1318 RTE_PMD_REGISTER_VDEV(OCTEONTX_PMD, octeontx_pmd_drv); 1319 RTE_PMD_REGISTER_ALIAS(OCTEONTX_PMD, eth_octeontx); 1320 RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX_PMD, "nr_port=<int> "); 1321