168eb13a1SJiawen Wu /* SPDX-License-Identifier: BSD-3-Clause 268eb13a1SJiawen Wu * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd. 368eb13a1SJiawen Wu * Copyright(c) 2010-2017 Intel Corporation 468eb13a1SJiawen Wu */ 568eb13a1SJiawen Wu 668eb13a1SJiawen Wu #ifndef _NGBE_ETHDEV_H_ 768eb13a1SJiawen Wu #define _NGBE_ETHDEV_H_ 868eb13a1SJiawen Wu 9f6aef1daSJiawen Wu #include "ngbe_ptypes.h" 1024cd85f7SJiawen Wu #include <rte_time.h> 1160229dcfSJiawen Wu #include <rte_ethdev.h> 1260229dcfSJiawen Wu #include <rte_ethdev_core.h> 13f6aef1daSJiawen Wu 14b9246b8fSJiawen Wu /* need update link, bit flag */ 15b9246b8fSJiawen Wu #define NGBE_FLAG_NEED_LINK_UPDATE ((uint32_t)(1 << 0)) 16b9246b8fSJiawen Wu #define NGBE_FLAG_MAILBOX ((uint32_t)(1 << 1)) 17b9246b8fSJiawen Wu #define NGBE_FLAG_PHY_INTERRUPT ((uint32_t)(1 << 2)) 18b9246b8fSJiawen Wu #define NGBE_FLAG_MACSEC ((uint32_t)(1 << 3)) 19b9246b8fSJiawen Wu #define NGBE_FLAG_NEED_LINK_CONFIG ((uint32_t)(1 << 4)) 20f3ff9f28SJiawen Wu #define NGBE_FLAG_OVERHEAT ((uint32_t)(1 << 5)) 21b9246b8fSJiawen Wu 2259b46438SJiawen Wu #define NGBE_VFTA_SIZE 128 230779d7f6SJiawen Wu #define NGBE_HKEY_MAX_INDEX 10 2459b46438SJiawen Wu /*Default value of Max Rx Queue*/ 2559b46438SJiawen Wu #define NGBE_MAX_RX_QUEUE_NUM 8 2659b46438SJiawen Wu 2759b46438SJiawen Wu #ifndef NBBY 2859b46438SJiawen Wu #define NBBY 8 /* number of bits in a byte */ 2959b46438SJiawen Wu #endif 3059b46438SJiawen Wu #define NGBE_HWSTRIP_BITMAP_SIZE \ 3159b46438SJiawen Wu (NGBE_MAX_RX_QUEUE_NUM / (sizeof(uint32_t) * NBBY)) 3259b46438SJiawen Wu 333518df57SJiawen Wu #define NGBE_QUEUE_ITR_INTERVAL_DEFAULT 500 /* 500us */ 343518df57SJiawen Wu 35df2075ebSJiawen Wu #define NGBE_MAX_MTU 9414 36586e6028SJiawen Wu /* The overhead from MTU to max frame size. */ 37586e6028SJiawen Wu #define NGBE_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN) 38586e6028SJiawen Wu 390779d7f6SJiawen Wu #define NGBE_RSS_OFFLOAD_ALL ( \ 400779d7f6SJiawen Wu RTE_ETH_RSS_IPV4 | \ 410779d7f6SJiawen Wu RTE_ETH_RSS_NONFRAG_IPV4_TCP | \ 420779d7f6SJiawen Wu RTE_ETH_RSS_NONFRAG_IPV4_UDP | \ 430779d7f6SJiawen Wu RTE_ETH_RSS_IPV6 | \ 440779d7f6SJiawen Wu RTE_ETH_RSS_NONFRAG_IPV6_TCP | \ 450779d7f6SJiawen Wu RTE_ETH_RSS_NONFRAG_IPV6_UDP | \ 460779d7f6SJiawen Wu RTE_ETH_RSS_IPV6_EX | \ 470779d7f6SJiawen Wu RTE_ETH_RSS_IPV6_TCP_EX | \ 480779d7f6SJiawen Wu RTE_ETH_RSS_IPV6_UDP_EX) 490779d7f6SJiawen Wu 50b9246b8fSJiawen Wu #define NGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET 513518df57SJiawen Wu #define NGBE_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET 52b9246b8fSJiawen Wu 53b9246b8fSJiawen Wu /* structure for interrupt relative data */ 54b9246b8fSJiawen Wu struct ngbe_interrupt { 55b9246b8fSJiawen Wu uint32_t flags; 56b9246b8fSJiawen Wu uint32_t mask_misc; 57b9246b8fSJiawen Wu uint32_t mask_misc_orig; /* save mask during delayed handler */ 58b9246b8fSJiawen Wu uint64_t mask; 59b9246b8fSJiawen Wu uint64_t mask_orig; /* save mask during delayed handler */ 60b9246b8fSJiawen Wu }; 61b9246b8fSJiawen Wu 62fdb1e851SJiawen Wu #define NGBE_NB_STAT_MAPPING 32 63fdb1e851SJiawen Wu #define NB_QMAP_FIELDS_PER_QSM_REG 4 64fdb1e851SJiawen Wu #define QMAP_FIELD_RESERVED_BITS_MASK 0x0f 65fdb1e851SJiawen Wu struct ngbe_stat_mappings { 66fdb1e851SJiawen Wu uint32_t tqsm[NGBE_NB_STAT_MAPPING]; 67fdb1e851SJiawen Wu uint32_t rqsm[NGBE_NB_STAT_MAPPING]; 68fdb1e851SJiawen Wu }; 69fdb1e851SJiawen Wu 7059b46438SJiawen Wu struct ngbe_vfta { 7159b46438SJiawen Wu uint32_t vfta[NGBE_VFTA_SIZE]; 7259b46438SJiawen Wu }; 7359b46438SJiawen Wu 7459b46438SJiawen Wu struct ngbe_hwstrip { 7559b46438SJiawen Wu uint32_t bitmap[NGBE_HWSTRIP_BITMAP_SIZE]; 7659b46438SJiawen Wu }; 7759b46438SJiawen Wu 78e2a289a7SJiawen Wu /** 79e2a289a7SJiawen Wu * Response sent back to ngbe driver from user app after callback 80e2a289a7SJiawen Wu */ 81e2a289a7SJiawen Wu enum ngbe_mb_event_rsp { 82e2a289a7SJiawen Wu NGBE_MB_EVENT_NOOP_ACK, /**< skip mbox request and ACK */ 83e2a289a7SJiawen Wu NGBE_MB_EVENT_NOOP_NACK, /**< skip mbox request and NACK */ 84e2a289a7SJiawen Wu NGBE_MB_EVENT_PROCEED, /**< proceed with mbox request */ 85e2a289a7SJiawen Wu NGBE_MB_EVENT_MAX /**< max value of this enum */ 86e2a289a7SJiawen Wu }; 87e2a289a7SJiawen Wu 88e2a289a7SJiawen Wu /** 89e2a289a7SJiawen Wu * Data sent to the user application when the callback is executed. 90e2a289a7SJiawen Wu */ 91e2a289a7SJiawen Wu struct ngbe_mb_event_param { 92e2a289a7SJiawen Wu uint16_t vfid; /**< Virtual Function number */ 93e2a289a7SJiawen Wu uint16_t msg_type; /**< VF to PF message type, defined in ngbe_mbx.h */ 94e2a289a7SJiawen Wu uint16_t retval; /**< return value */ 95e2a289a7SJiawen Wu void *msg; /**< pointer to message */ 96e2a289a7SJiawen Wu }; 97e2a289a7SJiawen Wu 98e2a289a7SJiawen Wu /* 99e2a289a7SJiawen Wu * VF data which used by PF host only 100e2a289a7SJiawen Wu */ 101e2a289a7SJiawen Wu #define NGBE_MAX_VF_MC_ENTRIES 30 102e2a289a7SJiawen Wu 103dee93977SJiawen Wu struct ngbe_uta_info { 104dee93977SJiawen Wu uint8_t uc_filter_type; 105dee93977SJiawen Wu uint16_t uta_in_use; 106dee93977SJiawen Wu uint32_t uta_shadow[NGBE_MAX_UTA]; 107dee93977SJiawen Wu }; 108dee93977SJiawen Wu 10960229dcfSJiawen Wu struct ngbe_vf_info { 11060229dcfSJiawen Wu uint8_t vf_mac_addresses[RTE_ETHER_ADDR_LEN]; 111e2a289a7SJiawen Wu uint16_t vf_mc_hashes[NGBE_MAX_VF_MC_ENTRIES]; 112e2a289a7SJiawen Wu uint16_t num_vf_mc_hashes; 11360229dcfSJiawen Wu bool clear_to_send; 114e2a289a7SJiawen Wu uint16_t vlan_count; 115e2a289a7SJiawen Wu uint8_t api_version; 11660229dcfSJiawen Wu uint16_t switch_domain_id; 117e2a289a7SJiawen Wu uint16_t xcast_mode; 118e2a289a7SJiawen Wu uint16_t mac_count; 11960229dcfSJiawen Wu }; 12060229dcfSJiawen Wu 12168eb13a1SJiawen Wu /* 12268eb13a1SJiawen Wu * Structure to store private data for each driver instance (for each port). 12368eb13a1SJiawen Wu */ 12468eb13a1SJiawen Wu struct ngbe_adapter { 12568eb13a1SJiawen Wu struct ngbe_hw hw; 126fdb1e851SJiawen Wu struct ngbe_hw_stats stats; 127b9246b8fSJiawen Wu struct ngbe_interrupt intr; 128fdb1e851SJiawen Wu struct ngbe_stat_mappings stat_mappings; 12959b46438SJiawen Wu struct ngbe_vfta shadow_vfta; 13059b46438SJiawen Wu struct ngbe_hwstrip hwstrip; 13160229dcfSJiawen Wu struct ngbe_vf_info *vfdata; 132dee93977SJiawen Wu struct ngbe_uta_info uta_info; 13343b7e5eaSJiawen Wu bool rx_bulk_alloc_allowed; 134e94c20c3SJiawen Wu bool rx_vec_allowed; 13524cd85f7SJiawen Wu struct rte_timecounter systime_tc; 13624cd85f7SJiawen Wu struct rte_timecounter rx_tstamp_tc; 13724cd85f7SJiawen Wu struct rte_timecounter tx_tstamp_tc; 1380779d7f6SJiawen Wu 1390779d7f6SJiawen Wu /* For RSS reta table update */ 1400779d7f6SJiawen Wu uint8_t rss_reta_updated; 14168eb13a1SJiawen Wu }; 14268eb13a1SJiawen Wu 14368eb13a1SJiawen Wu static inline struct ngbe_adapter * 14468eb13a1SJiawen Wu ngbe_dev_adapter(struct rte_eth_dev *dev) 14568eb13a1SJiawen Wu { 14668eb13a1SJiawen Wu struct ngbe_adapter *ad = dev->data->dev_private; 14768eb13a1SJiawen Wu 14868eb13a1SJiawen Wu return ad; 14968eb13a1SJiawen Wu } 15068eb13a1SJiawen Wu 15168eb13a1SJiawen Wu static inline struct ngbe_hw * 15268eb13a1SJiawen Wu ngbe_dev_hw(struct rte_eth_dev *dev) 15368eb13a1SJiawen Wu { 15468eb13a1SJiawen Wu struct ngbe_adapter *ad = ngbe_dev_adapter(dev); 15568eb13a1SJiawen Wu struct ngbe_hw *hw = &ad->hw; 15668eb13a1SJiawen Wu 15768eb13a1SJiawen Wu return hw; 15868eb13a1SJiawen Wu } 15968eb13a1SJiawen Wu 160fdb1e851SJiawen Wu #define NGBE_DEV_STATS(dev) \ 161fdb1e851SJiawen Wu (&((struct ngbe_adapter *)(dev)->data->dev_private)->stats) 162fdb1e851SJiawen Wu 163b9246b8fSJiawen Wu static inline struct ngbe_interrupt * 164b9246b8fSJiawen Wu ngbe_dev_intr(struct rte_eth_dev *dev) 165b9246b8fSJiawen Wu { 166b9246b8fSJiawen Wu struct ngbe_adapter *ad = ngbe_dev_adapter(dev); 167b9246b8fSJiawen Wu struct ngbe_interrupt *intr = &ad->intr; 168b9246b8fSJiawen Wu 169b9246b8fSJiawen Wu return intr; 170b9246b8fSJiawen Wu } 171b9246b8fSJiawen Wu 172fdb1e851SJiawen Wu #define NGBE_DEV_STAT_MAPPINGS(dev) \ 173fdb1e851SJiawen Wu (&((struct ngbe_adapter *)(dev)->data->dev_private)->stat_mappings) 174fdb1e851SJiawen Wu 17559b46438SJiawen Wu #define NGBE_DEV_VFTA(dev) \ 17659b46438SJiawen Wu (&((struct ngbe_adapter *)(dev)->data->dev_private)->shadow_vfta) 17759b46438SJiawen Wu 17859b46438SJiawen Wu #define NGBE_DEV_HWSTRIP(dev) \ 17959b46438SJiawen Wu (&((struct ngbe_adapter *)(dev)->data->dev_private)->hwstrip) 18060229dcfSJiawen Wu 18160229dcfSJiawen Wu #define NGBE_DEV_VFDATA(dev) \ 18260229dcfSJiawen Wu (&((struct ngbe_adapter *)(dev)->data->dev_private)->vfdata) 18360229dcfSJiawen Wu 184dee93977SJiawen Wu #define NGBE_DEV_UTA_INFO(dev) \ 185dee93977SJiawen Wu (&((struct ngbe_adapter *)(dev)->data->dev_private)->uta_info) 18659b46438SJiawen Wu 1873518df57SJiawen Wu /* 1883518df57SJiawen Wu * Rx/Tx function prototypes 1893518df57SJiawen Wu */ 1903518df57SJiawen Wu void ngbe_dev_clear_queues(struct rte_eth_dev *dev); 1913518df57SJiawen Wu 192cc63194eSJiawen Wu void ngbe_dev_free_queues(struct rte_eth_dev *dev); 193cc63194eSJiawen Wu 1947483341aSXueming Li void ngbe_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid); 19543b7e5eaSJiawen Wu 1967483341aSXueming Li void ngbe_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid); 197a58e7c31SJiawen Wu 19843b7e5eaSJiawen Wu int ngbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 19943b7e5eaSJiawen Wu uint16_t nb_rx_desc, unsigned int socket_id, 20043b7e5eaSJiawen Wu const struct rte_eth_rxconf *rx_conf, 20143b7e5eaSJiawen Wu struct rte_mempool *mb_pool); 20243b7e5eaSJiawen Wu 203a58e7c31SJiawen Wu int ngbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 204a58e7c31SJiawen Wu uint16_t nb_tx_desc, unsigned int socket_id, 205a58e7c31SJiawen Wu const struct rte_eth_txconf *tx_conf); 206a58e7c31SJiawen Wu 207b7aad633SJiawen Wu uint32_t ngbe_dev_rx_queue_count(void *rx_queue); 208b7aad633SJiawen Wu 209b7aad633SJiawen Wu int ngbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset); 210b7aad633SJiawen Wu int ngbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset); 211b7aad633SJiawen Wu 2123518df57SJiawen Wu int ngbe_dev_rx_init(struct rte_eth_dev *dev); 2133518df57SJiawen Wu 2143518df57SJiawen Wu void ngbe_dev_tx_init(struct rte_eth_dev *dev); 2153518df57SJiawen Wu 2163518df57SJiawen Wu int ngbe_dev_rxtx_start(struct rte_eth_dev *dev); 2173518df57SJiawen Wu 21862fc35e6SJiawen Wu void ngbe_dev_save_rx_queue(struct ngbe_hw *hw, uint16_t rx_queue_id); 21962fc35e6SJiawen Wu void ngbe_dev_store_rx_queue(struct ngbe_hw *hw, uint16_t rx_queue_id); 220001c7823SJiawen Wu void ngbe_dev_save_tx_queue(struct ngbe_hw *hw, uint16_t tx_queue_id); 221001c7823SJiawen Wu void ngbe_dev_store_tx_queue(struct ngbe_hw *hw, uint16_t tx_queue_id); 222001c7823SJiawen Wu 22362fc35e6SJiawen Wu int ngbe_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id); 22462fc35e6SJiawen Wu 22562fc35e6SJiawen Wu int ngbe_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); 22662fc35e6SJiawen Wu 227001c7823SJiawen Wu int ngbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); 228001c7823SJiawen Wu 229001c7823SJiawen Wu int ngbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); 230001c7823SJiawen Wu 231eec3e736SJiawen Wu void ngbe_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 232eec3e736SJiawen Wu struct rte_eth_rxq_info *qinfo); 233eec3e736SJiawen Wu 234eec3e736SJiawen Wu void ngbe_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 235eec3e736SJiawen Wu struct rte_eth_txq_info *qinfo); 236eec3e736SJiawen Wu 237d148a87eSJiawen Wu int 238d148a87eSJiawen Wu ngbe_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id, 239d148a87eSJiawen Wu struct rte_eth_burst_mode *mode); 240d148a87eSJiawen Wu int 241d148a87eSJiawen Wu ngbe_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id, 242d148a87eSJiawen Wu struct rte_eth_burst_mode *mode); 243d148a87eSJiawen Wu 244*711a06e8SZaiyu Wang int ngbevf_dev_rx_init(struct rte_eth_dev *dev); 245*711a06e8SZaiyu Wang 246*711a06e8SZaiyu Wang void ngbevf_dev_tx_init(struct rte_eth_dev *dev); 247*711a06e8SZaiyu Wang 248*711a06e8SZaiyu Wang void ngbevf_dev_rxtx_start(struct rte_eth_dev *dev); 249*711a06e8SZaiyu Wang 25093dfebd2SJiawen Wu uint16_t ngbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, 25193dfebd2SJiawen Wu uint16_t nb_pkts); 25293dfebd2SJiawen Wu 25379f3128dSJiawen Wu uint16_t ngbe_recv_pkts_bulk_alloc(void *rx_queue, struct rte_mbuf **rx_pkts, 25479f3128dSJiawen Wu uint16_t nb_pkts); 25579f3128dSJiawen Wu 25679f3128dSJiawen Wu uint16_t ngbe_recv_pkts_sc_single_alloc(void *rx_queue, 25779f3128dSJiawen Wu struct rte_mbuf **rx_pkts, uint16_t nb_pkts); 25879f3128dSJiawen Wu uint16_t ngbe_recv_pkts_sc_bulk_alloc(void *rx_queue, 25979f3128dSJiawen Wu struct rte_mbuf **rx_pkts, uint16_t nb_pkts); 26079f3128dSJiawen Wu 2619f320614SJiawen Wu uint16_t ngbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 2629f320614SJiawen Wu uint16_t nb_pkts); 2639f320614SJiawen Wu 264aad91eddSJiawen Wu uint16_t ngbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts, 265aad91eddSJiawen Wu uint16_t nb_pkts); 266aad91eddSJiawen Wu 2679f320614SJiawen Wu uint16_t ngbe_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 2689f320614SJiawen Wu uint16_t nb_pkts); 2699f320614SJiawen Wu 2700779d7f6SJiawen Wu int ngbe_dev_rss_hash_update(struct rte_eth_dev *dev, 2710779d7f6SJiawen Wu struct rte_eth_rss_conf *rss_conf); 2720779d7f6SJiawen Wu 2730779d7f6SJiawen Wu int ngbe_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 2740779d7f6SJiawen Wu struct rte_eth_rss_conf *rss_conf); 2750779d7f6SJiawen Wu 2763518df57SJiawen Wu void ngbe_set_ivar_map(struct ngbe_hw *hw, int8_t direction, 2773518df57SJiawen Wu uint8_t queue, uint8_t msix_vector); 2783518df57SJiawen Wu 27959b46438SJiawen Wu void ngbe_configure_port(struct rte_eth_dev *dev); 28059b46438SJiawen Wu 281b9246b8fSJiawen Wu int 282b9246b8fSJiawen Wu ngbe_dev_link_update_share(struct rte_eth_dev *dev, 283b9246b8fSJiawen Wu int wait_to_complete); 284b9246b8fSJiawen Wu 28559b46438SJiawen Wu /* 28659b46438SJiawen Wu * misc function prototypes 28759b46438SJiawen Wu */ 28859b46438SJiawen Wu void ngbe_vlan_hw_filter_enable(struct rte_eth_dev *dev); 28959b46438SJiawen Wu 29059b46438SJiawen Wu void ngbe_vlan_hw_filter_disable(struct rte_eth_dev *dev); 29159b46438SJiawen Wu 29259b46438SJiawen Wu void ngbe_vlan_hw_strip_config(struct rte_eth_dev *dev); 29359b46438SJiawen Wu 29460229dcfSJiawen Wu int ngbe_pf_host_init(struct rte_eth_dev *eth_dev); 29560229dcfSJiawen Wu 29660229dcfSJiawen Wu void ngbe_pf_host_uninit(struct rte_eth_dev *eth_dev); 29760229dcfSJiawen Wu 298e2a289a7SJiawen Wu void ngbe_pf_mbx_process(struct rte_eth_dev *eth_dev); 299e2a289a7SJiawen Wu 30060229dcfSJiawen Wu int ngbe_pf_host_configure(struct rte_eth_dev *eth_dev); 30160229dcfSJiawen Wu 302f40e9f0eSJiawen Wu /* High threshold controlling when to start sending XOFF frames. */ 303f40e9f0eSJiawen Wu #define NGBE_FC_XOFF_HITH 128 /*KB*/ 304f40e9f0eSJiawen Wu /* Low threshold controlling when to start sending XON frames. */ 305f40e9f0eSJiawen Wu #define NGBE_FC_XON_LOTH 64 /*KB*/ 306f40e9f0eSJiawen Wu 307f40e9f0eSJiawen Wu /* Timer value included in XOFF frames. */ 308f40e9f0eSJiawen Wu #define NGBE_FC_PAUSE_TIME 0x680 309f40e9f0eSJiawen Wu 310b9246b8fSJiawen Wu #define NGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */ 311b9246b8fSJiawen Wu #define NGBE_LINK_UP_CHECK_TIMEOUT 1000 /* ms */ 312539d55daSJiawen Wu #define NGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */ 313539d55daSJiawen Wu 31443b7e5eaSJiawen Wu /* 31543b7e5eaSJiawen Wu * Default values for Rx/Tx configuration 31643b7e5eaSJiawen Wu */ 31743b7e5eaSJiawen Wu #define NGBE_DEFAULT_RX_FREE_THRESH 32 31843b7e5eaSJiawen Wu #define NGBE_DEFAULT_RX_PTHRESH 8 31943b7e5eaSJiawen Wu #define NGBE_DEFAULT_RX_HTHRESH 8 32043b7e5eaSJiawen Wu #define NGBE_DEFAULT_RX_WTHRESH 0 32143b7e5eaSJiawen Wu 322a58e7c31SJiawen Wu #define NGBE_DEFAULT_TX_FREE_THRESH 32 323a58e7c31SJiawen Wu #define NGBE_DEFAULT_TX_PTHRESH 32 324a58e7c31SJiawen Wu #define NGBE_DEFAULT_TX_HTHRESH 0 325a58e7c31SJiawen Wu #define NGBE_DEFAULT_TX_WTHRESH 0 326a58e7c31SJiawen Wu 32724cd85f7SJiawen Wu /* Additional timesync values. */ 32824cd85f7SJiawen Wu #define NGBE_INCVAL_1GB 0x2000000 /* all speed is same in Emerald */ 32924cd85f7SJiawen Wu #define NGBE_INCVAL_SHIFT_1GB 22 /* all speed is same in Emerald */ 33024cd85f7SJiawen Wu 33124cd85f7SJiawen Wu #define NGBE_CYCLECOUNTER_MASK 0xffffffffffffffffULL 33224cd85f7SJiawen Wu 3338b433d04SJiawen Wu /* store statistics names and its offset in stats structure */ 3348b433d04SJiawen Wu struct rte_ngbe_xstats_name_off { 3358b433d04SJiawen Wu char name[RTE_ETH_XSTATS_NAME_SIZE]; 3368b433d04SJiawen Wu unsigned int offset; 3378b433d04SJiawen Wu }; 3388b433d04SJiawen Wu 339ba6a168aSSivaramakrishnan Venkat const uint32_t *ngbe_dev_supported_ptypes_get(struct rte_eth_dev *dev, 340ba6a168aSSivaramakrishnan Venkat size_t *no_of_elements); 341dee93977SJiawen Wu int ngbe_dev_set_mc_addr_list(struct rte_eth_dev *dev, 342dee93977SJiawen Wu struct rte_ether_addr *mc_addr_set, 343dee93977SJiawen Wu uint32_t nb_mc_addr); 3440779d7f6SJiawen Wu int ngbe_dev_rss_reta_update(struct rte_eth_dev *dev, 3450779d7f6SJiawen Wu struct rte_eth_rss_reta_entry64 *reta_conf, 3460779d7f6SJiawen Wu uint16_t reta_size); 3470779d7f6SJiawen Wu int ngbe_dev_rss_reta_query(struct rte_eth_dev *dev, 3480779d7f6SJiawen Wu struct rte_eth_rss_reta_entry64 *reta_conf, 3490779d7f6SJiawen Wu uint16_t reta_size); 35059b46438SJiawen Wu void ngbe_vlan_hw_strip_bitmap_set(struct rte_eth_dev *dev, 35159b46438SJiawen Wu uint16_t queue, bool on); 35259b46438SJiawen Wu void ngbe_config_vlan_strip_on_all_queues(struct rte_eth_dev *dev, 35359b46438SJiawen Wu int mask); 354fdb1e851SJiawen Wu void ngbe_read_stats_registers(struct ngbe_hw *hw, 355fdb1e851SJiawen Wu struct ngbe_hw_stats *hw_stats); 356f6aef1daSJiawen Wu 35768eb13a1SJiawen Wu #endif /* _NGBE_ETHDEV_H_ */ 358