144e97550SJiawen Wu /* SPDX-License-Identifier: BSD-3-Clause 244e97550SJiawen Wu * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd. 344e97550SJiawen Wu */ 444e97550SJiawen Wu 544e97550SJiawen Wu #include "ngbe_phy.h" 644e97550SJiawen Wu 744e97550SJiawen Wu #ifndef _NGBE_PHY_YT_H_ 844e97550SJiawen Wu #define _NGBE_PHY_YT_H_ 944e97550SJiawen Wu 105eade8a3SJiawen Wu #define NGBE_PHYID_YT8521 0x00000110U 115eade8a3SJiawen Wu #define NGBE_PHYID_YT8531 0x4F51E910U 1244e97550SJiawen Wu 1344e97550SJiawen Wu /* Common EXT */ 1444e97550SJiawen Wu #define YT_SMI_PHY 0xA000 151c44384fSJiawen Wu #define YT_SMI_PHY_SW_RST MS16(15, 0x1) 1644e97550SJiawen Wu #define YT_SMI_PHY_SDS MS16(1, 0x1) /* 0 for UTP */ 1744e97550SJiawen Wu #define YT_CHIP 0xA001 1844e97550SJiawen Wu #define YT_CHIP_SW_RST MS16(15, 0x1) 1944e97550SJiawen Wu #define YT_CHIP_SW_LDO_EN MS16(6, 0x1) 201c44384fSJiawen Wu #define YT_CHIP_MODE_MASK MS16(0, 0x7) 2144e97550SJiawen Wu #define YT_CHIP_MODE_SEL(v) LS16(v, 0, 0x7) 2244e97550SJiawen Wu #define YT_RGMII_CONF1 0xA003 231c44384fSJiawen Wu #define YT_RGMII_CONF1_MODE MS16(15, 0x1) 2444e97550SJiawen Wu #define YT_RGMII_CONF1_RXDELAY MS16(10, 0xF) 2544e97550SJiawen Wu #define YT_RGMII_CONF1_TXDELAY_FE MS16(4, 0xF) 2644e97550SJiawen Wu #define YT_RGMII_CONF1_TXDELAY MS16(0, 0x1) 271c44384fSJiawen Wu #define YT_RGMII_CONF2 0xA004 281c44384fSJiawen Wu #define YT_RGMII_CONF2_SPEED_MASK MS16(6, 0x3) 291c44384fSJiawen Wu #define YT_RGMII_CONF2_SPEED(v) LS16(v, 6, 0x3) 301c44384fSJiawen Wu #define YT_RGMII_CONF2_DUPLEX MS16(5, 0x1) 311c44384fSJiawen Wu #define YT_RGMII_CONF2_LINKUP MS16(4, 0x1) 3244e97550SJiawen Wu #define YT_MISC 0xA006 3344e97550SJiawen Wu #define YT_MISC_FIBER_PRIO MS16(8, 0x1) /* 0 for UTP */ 34f1268369SJiawen Wu #define YT_MISC_RESV MS16(0, 0x1) 35*79be49ddSJiawen Wu #define YT_SPEC_CONF 0xA023 36*79be49ddSJiawen Wu #define YT_SPEC_CONF_8531SH_CA 0x4031 37f1268369SJiawen Wu 38f1268369SJiawen Wu /* SDS EXT */ 39f1268369SJiawen Wu #define YT_AUTO 0xA5 40f1268369SJiawen Wu #define YT_AUTO_SENSING MS16(15, 0x1) 4144e97550SJiawen Wu 4244e97550SJiawen Wu /* MII common registers in UTP and SDS */ 4344e97550SJiawen Wu #define YT_BCR 0x0 4444e97550SJiawen Wu #define YT_BCR_RESET MS16(15, 0x1) 451c44384fSJiawen Wu #define YT_BCR_SPEED_SELECT0 MS16(13, 0x1) 461c44384fSJiawen Wu #define YT_BCR_ANE MS16(12, 0x1) 4744e97550SJiawen Wu #define YT_BCR_PWDN MS16(11, 0x1) 481c44384fSJiawen Wu #define YT_BCR_RESTART_AN MS16(9, 0x1) 491c44384fSJiawen Wu #define YT_BCR_DUPLEX MS16(8, 0x1) 501c44384fSJiawen Wu #define YT_BCR_SPEED_SELECT1 MS16(6, 0x1) 5144e97550SJiawen Wu #define YT_ANA 0x4 5244e97550SJiawen Wu /* copper */ 5344e97550SJiawen Wu #define YT_ANA_100BASET_FULL MS16(8, 0x1) 541c44384fSJiawen Wu #define YT_ANA_100BASET_HALF MS16(7, 0x1) 5544e97550SJiawen Wu #define YT_ANA_10BASET_FULL MS16(6, 0x1) 561c44384fSJiawen Wu #define YT_ANA_10BASET_HALF MS16(5, 0x1) 5744e97550SJiawen Wu /* fiber */ 5844e97550SJiawen Wu #define YT_FANA_PAUSE_MASK MS16(7, 0x3) 5944e97550SJiawen Wu 6044e97550SJiawen Wu #define YT_LPAR 0x5 6144e97550SJiawen Wu #define YT_CLPAR_ASM_PAUSE MS(11, 0x1) 6244e97550SJiawen Wu #define YT_CLPAR_PAUSE MS(10, 0x1) 6344e97550SJiawen Wu #define YT_FLPAR_PAUSE_MASK MS(7, 0x3) 6444e97550SJiawen Wu 6544e97550SJiawen Wu #define YT_MS_CTRL 0x9 6644e97550SJiawen Wu #define YT_MS_1000BASET_FULL MS16(9, 0x1) 671c44384fSJiawen Wu #define YT_MS_1000BASET_HALF MS16(8, 0x1) 6844e97550SJiawen Wu #define YT_SPST 0x11 6944e97550SJiawen Wu #define YT_SPST_SPEED_MASK MS16(14, 0x3) 7044e97550SJiawen Wu #define YT_SPST_SPEED_1000M LS16(2, 14, 0x3) 7144e97550SJiawen Wu #define YT_SPST_SPEED_100M LS16(1, 14, 0x3) 7244e97550SJiawen Wu #define YT_SPST_SPEED_10M LS16(0, 14, 0x3) 7344e97550SJiawen Wu #define YT_SPST_LINK MS16(10, 0x1) 7444e97550SJiawen Wu 7544e97550SJiawen Wu /* UTP only */ 7644e97550SJiawen Wu #define YT_INTR 0x12 771c44384fSJiawen Wu #define YT_INTR_ENA_MASK MS16(10, 0x3) 781c44384fSJiawen Wu #define YT_SDS_INTR_ENA_MASK MS16(2, 0x3) 7944e97550SJiawen Wu #define YT_INTR_STATUS 0x13 8044e97550SJiawen Wu 8144e97550SJiawen Wu s32 ngbe_read_phy_reg_yt(struct ngbe_hw *hw, u32 reg_addr, u32 device_type, 8244e97550SJiawen Wu u16 *phy_data); 8344e97550SJiawen Wu s32 ngbe_write_phy_reg_yt(struct ngbe_hw *hw, u32 reg_addr, u32 device_type, 8444e97550SJiawen Wu u16 phy_data); 8544e97550SJiawen Wu s32 ngbe_read_phy_reg_ext_yt(struct ngbe_hw *hw, 8644e97550SJiawen Wu u32 reg_addr, u32 device_type, u16 *phy_data); 8744e97550SJiawen Wu s32 ngbe_write_phy_reg_ext_yt(struct ngbe_hw *hw, 8844e97550SJiawen Wu u32 reg_addr, u32 device_type, u16 phy_data); 893d0af706SJiawen Wu s32 ngbe_read_phy_reg_sds_ext_yt(struct ngbe_hw *hw, 903d0af706SJiawen Wu u32 reg_addr, u32 device_type, u16 *phy_data); 913d0af706SJiawen Wu s32 ngbe_write_phy_reg_sds_ext_yt(struct ngbe_hw *hw, 923d0af706SJiawen Wu u32 reg_addr, u32 device_type, u16 phy_data); 933518df57SJiawen Wu s32 ngbe_init_phy_yt(struct ngbe_hw *hw); 9444e97550SJiawen Wu 9544e97550SJiawen Wu s32 ngbe_reset_phy_yt(struct ngbe_hw *hw); 9644e97550SJiawen Wu 973d0af706SJiawen Wu s32 ngbe_check_phy_link_yt(struct ngbe_hw *hw, 983d0af706SJiawen Wu u32 *speed, bool *link_up); 99708ebe7dSJiawen Wu s32 ngbe_set_phy_power_yt(struct ngbe_hw *hw, bool on); 100708ebe7dSJiawen Wu 1013d0af706SJiawen Wu s32 ngbe_setup_phy_link_yt(struct ngbe_hw *hw, 1023d0af706SJiawen Wu u32 speed, bool autoneg_wait_to_complete); 103f40e9f0eSJiawen Wu s32 ngbe_get_phy_advertised_pause_yt(struct ngbe_hw *hw, 104f40e9f0eSJiawen Wu u8 *pause_bit); 105f40e9f0eSJiawen Wu s32 ngbe_get_phy_lp_advertised_pause_yt(struct ngbe_hw *hw, 106f40e9f0eSJiawen Wu u8 *pause_bit); 107f40e9f0eSJiawen Wu s32 ngbe_set_phy_pause_adv_yt(struct ngbe_hw *hw, u16 pause_bit); 108f40e9f0eSJiawen Wu 10944e97550SJiawen Wu #endif /* _NGBE_PHY_YT_H_ */ 110