144e97550SJiawen Wu /* SPDX-License-Identifier: BSD-3-Clause 244e97550SJiawen Wu * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd. 344e97550SJiawen Wu */ 444e97550SJiawen Wu 544e97550SJiawen Wu #include "ngbe_phy.h" 6*6dcfb19fSJiawen Wu #include "ngbe_hw.h" 744e97550SJiawen Wu 844e97550SJiawen Wu #ifndef _NGBE_PHY_MVL_H_ 944e97550SJiawen Wu #define _NGBE_PHY_MVL_H_ 1044e97550SJiawen Wu 1144e97550SJiawen Wu #define NGBE_PHYID_MVL 0x01410DD0U 1244e97550SJiawen Wu 1344e97550SJiawen Wu /* Page 0 for Copper, Page 1 for Fiber */ 1444e97550SJiawen Wu #define MVL_CTRL 0x0 1544e97550SJiawen Wu #define MVL_CTRL_RESET MS16(15, 0x1) 161c44384fSJiawen Wu #define MVL_CTRL_SPEED_SELECT0 MS16(13, 0x1) 1744e97550SJiawen Wu #define MVL_CTRL_ANE MS16(12, 0x1) 181c44384fSJiawen Wu #define MVL_CTRL_PWDN MS16(11, 0x1) 1944e97550SJiawen Wu #define MVL_CTRL_RESTART_AN MS16(9, 0x1) 201c44384fSJiawen Wu #define MVL_CTRL_DUPLEX MS16(8, 0x1) 211c44384fSJiawen Wu #define MVL_CTRL_SPEED_SELECT1 MS16(6, 0x1) 2244e97550SJiawen Wu #define MVL_ANA 0x4 2344e97550SJiawen Wu /* copper */ 2444e97550SJiawen Wu #define MVL_CANA_ASM_PAUSE MS16(11, 0x1) 2544e97550SJiawen Wu #define MVL_CANA_PAUSE MS16(10, 0x1) 2644e97550SJiawen Wu #define MVL_PHY_100BASET_FULL MS16(8, 0x1) 2744e97550SJiawen Wu #define MVL_PHY_100BASET_HALF MS16(7, 0x1) 2844e97550SJiawen Wu #define MVL_PHY_10BASET_FULL MS16(6, 0x1) 2944e97550SJiawen Wu #define MVL_PHY_10BASET_HALF MS16(5, 0x1) 3044e97550SJiawen Wu /* fiber */ 3144e97550SJiawen Wu #define MVL_FANA_PAUSE_MASK MS16(7, 0x3) 3244e97550SJiawen Wu #define MVL_FANA_SYM_PAUSE LS16(1, 7, 0x3) 3344e97550SJiawen Wu #define MVL_FANA_ASM_PAUSE LS16(2, 7, 0x3) 3444e97550SJiawen Wu #define MVL_PHY_1000BASEX_HALF MS16(6, 0x1) 3544e97550SJiawen Wu #define MVL_PHY_1000BASEX_FULL MS16(5, 0x1) 3644e97550SJiawen Wu #define MVL_LPAR 0x5 3744e97550SJiawen Wu #define MVL_CLPAR_ASM_PAUSE MS(11, 0x1) 3844e97550SJiawen Wu #define MVL_CLPAR_PAUSE MS(10, 0x1) 3944e97550SJiawen Wu #define MVL_FLPAR_PAUSE_MASK MS(7, 0x3) 4044e97550SJiawen Wu #define MVL_PHY_1000BASET 0x9 4144e97550SJiawen Wu #define MVL_PHY_1000BASET_FULL MS16(9, 0x1) 4244e97550SJiawen Wu #define MVL_PHY_1000BASET_HALF MS16(8, 0x1) 4344e97550SJiawen Wu #define MVL_CTRL1 0x10 4444e97550SJiawen Wu #define MVL_CTRL1_INTR_POL MS16(2, 0x1) 4544e97550SJiawen Wu #define MVL_PHYSR 0x11 4644e97550SJiawen Wu #define MVL_PHYSR_SPEED_MASK MS16(14, 0x3) 4744e97550SJiawen Wu #define MVL_PHYSR_SPEED_1000M LS16(2, 14, 0x3) 4844e97550SJiawen Wu #define MVL_PHYSR_SPEED_100M LS16(1, 14, 0x3) 4944e97550SJiawen Wu #define MVL_PHYSR_SPEED_10M LS16(0, 14, 0x3) 5044e97550SJiawen Wu #define MVL_PHYSR_LINK MS16(10, 0x1) 5144e97550SJiawen Wu #define MVL_INTR_EN 0x12 5244e97550SJiawen Wu #define MVL_INTR_EN_ANC MS16(11, 0x1) 5344e97550SJiawen Wu #define MVL_INTR_EN_LSC MS16(10, 0x1) 5444e97550SJiawen Wu #define MVL_INTR 0x13 5544e97550SJiawen Wu #define MVL_INTR_ANC MS16(11, 0x1) 5644e97550SJiawen Wu #define MVL_INTR_LSC MS16(10, 0x1) 5744e97550SJiawen Wu 5844e97550SJiawen Wu /* Page 2 */ 5944e97550SJiawen Wu #define MVL_RGM_CTL2 0x15 6044e97550SJiawen Wu #define MVL_RGM_CTL2_TTC MS16(4, 0x1) 6144e97550SJiawen Wu #define MVL_RGM_CTL2_RTC MS16(5, 0x1) 6244e97550SJiawen Wu /* Page 3 */ 6344e97550SJiawen Wu #define MVL_LEDFCR 0x10 6444e97550SJiawen Wu #define MVL_LEDFCR_CTL1 MS16(4, 0xF) 6544e97550SJiawen Wu #define MVL_LEDFCR_CTL1_CONF LS16(6, 4, 0xF) 6644e97550SJiawen Wu #define MVL_LEDFCR_CTL0 MS16(0, 0xF) 6744e97550SJiawen Wu #define MVL_LEDFCR_CTL0_CONF LS16(1, 0, 0xF) 6844e97550SJiawen Wu #define MVL_LEDPCR 0x11 6944e97550SJiawen Wu #define MVL_LEDPCR_CTL1 MS16(2, 0x3) 7044e97550SJiawen Wu #define MVL_LEDPCR_CTL1_CONF LS16(1, 2, 0x3) 7144e97550SJiawen Wu #define MVL_LEDPCR_CTL0 MS16(0, 0x3) 7244e97550SJiawen Wu #define MVL_LEDPCR_CTL0_CONF LS16(1, 0, 0x3) 7344e97550SJiawen Wu #define MVL_LEDTCR 0x12 7444e97550SJiawen Wu #define MVL_LEDTCR_INTR_POL MS16(11, 0x1) 7544e97550SJiawen Wu #define MVL_LEDTCR_INTR_EN MS16(7, 0x1) 7644e97550SJiawen Wu /* Page 18 */ 7744e97550SJiawen Wu #define MVL_GEN_CTL 0x14 7844e97550SJiawen Wu #define MVL_GEN_CTL_RESET MS16(15, 0x1) 7944e97550SJiawen Wu #define MVL_GEN_CTL_MODE(v) LS16(v, 0, 0x7) 8044e97550SJiawen Wu #define MVL_GEN_CTL_MODE_COPPER LS16(0, 0, 0x7) 8144e97550SJiawen Wu #define MVL_GEN_CTL_MODE_FIBER LS16(2, 0, 0x7) 8244e97550SJiawen Wu 8344e97550SJiawen Wu /* reg 22 */ 8444e97550SJiawen Wu #define MVL_PAGE_SEL 22 8544e97550SJiawen Wu 8644e97550SJiawen Wu /* reg 19_0 INT status*/ 8744e97550SJiawen Wu #define MVL_PHY_ANC 0x0800 8844e97550SJiawen Wu #define MVL_PHY_LSC 0x0400 8944e97550SJiawen Wu 9044e97550SJiawen Wu s32 ngbe_read_phy_reg_mvl(struct ngbe_hw *hw, u32 reg_addr, u32 device_type, 9144e97550SJiawen Wu u16 *phy_data); 9244e97550SJiawen Wu s32 ngbe_write_phy_reg_mvl(struct ngbe_hw *hw, u32 reg_addr, u32 device_type, 9344e97550SJiawen Wu u16 phy_data); 941c44384fSJiawen Wu s32 ngbe_check_phy_mode_mvl(struct ngbe_hw *hw); 953518df57SJiawen Wu s32 ngbe_init_phy_mvl(struct ngbe_hw *hw); 9644e97550SJiawen Wu 9744e97550SJiawen Wu s32 ngbe_reset_phy_mvl(struct ngbe_hw *hw); 9844e97550SJiawen Wu 993d0af706SJiawen Wu s32 ngbe_check_phy_link_mvl(struct ngbe_hw *hw, 1003d0af706SJiawen Wu u32 *speed, bool *link_up); 101708ebe7dSJiawen Wu s32 ngbe_set_phy_power_mvl(struct ngbe_hw *hw, bool on); 1023d0af706SJiawen Wu s32 ngbe_setup_phy_link_mvl(struct ngbe_hw *hw, 1033d0af706SJiawen Wu u32 speed, bool autoneg_wait_to_complete); 104f40e9f0eSJiawen Wu s32 ngbe_get_phy_advertised_pause_mvl(struct ngbe_hw *hw, u8 *pause_bit); 105f40e9f0eSJiawen Wu s32 ngbe_get_phy_lp_advertised_pause_mvl(struct ngbe_hw *hw, u8 *pause_bit); 106f40e9f0eSJiawen Wu s32 ngbe_set_phy_pause_adv_mvl(struct ngbe_hw *hw, u16 pause_bit); 107f40e9f0eSJiawen Wu 10844e97550SJiawen Wu #endif /* _NGBE_PHY_MVL_H_ */ 109