1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2014-2021 Netronome Systems, Inc. 3 * All rights reserved. 4 * 5 * Small portions derived from code Copyright(c) 2010-2015 Intel Corporation. 6 */ 7 8 #include <unistd.h> 9 10 #include <eal_firmware.h> 11 #include <rte_alarm.h> 12 #include <rte_kvargs.h> 13 #include <rte_pci.h> 14 15 #include "flower/nfp_flower.h" 16 #include "nfd3/nfp_nfd3.h" 17 #include "nfdk/nfp_nfdk.h" 18 #include "nfpcore/nfp_cpp.h" 19 #include "nfpcore/nfp_elf.h" 20 #include "nfpcore/nfp_hwinfo.h" 21 #include "nfpcore/nfp_rtsym.h" 22 #include "nfpcore/nfp_nsp.h" 23 #include "nfpcore/nfp6000_pcie.h" 24 #include "nfpcore/nfp_resource.h" 25 #include "nfpcore/nfp_sync.h" 26 27 #include "nfp_cpp_bridge.h" 28 #include "nfp_ipsec.h" 29 #include "nfp_logs.h" 30 #include "nfp_net_flow.h" 31 #include "nfp_rxtx_vec.h" 32 33 /* 64-bit per app capabilities */ 34 #define NFP_NET_APP_CAP_SP_INDIFF RTE_BIT64(0) /* Indifferent to port speed */ 35 36 #define NFP_PF_DRIVER_NAME net_nfp_pf 37 #define NFP_PF_FORCE_RELOAD_FW "force_reload_fw" 38 #define NFP_CPP_SERVICE_ENABLE "cpp_service_enable" 39 #define NFP_QUEUE_PER_VF 1 40 41 struct nfp_net_init { 42 /** Sequential physical port number, only valid for CoreNIC firmware */ 43 uint8_t idx; 44 45 /** Internal port number as seen from NFP */ 46 uint8_t nfp_idx; 47 48 struct nfp_net_hw_priv *hw_priv; 49 }; 50 51 static int 52 nfp_devarg_handle_int(const char *key, 53 const char *value, 54 void *extra_args) 55 { 56 char *end_ptr; 57 uint64_t *num = extra_args; 58 59 if (value == NULL) 60 return -EPERM; 61 62 *num = strtoul(value, &end_ptr, 10); 63 if (*num == ULONG_MAX) { 64 PMD_DRV_LOG(ERR, "%s: '%s' is not a valid param", key, value); 65 return -ERANGE; 66 } else if (value == end_ptr) { 67 return -EPERM; 68 } 69 70 return 0; 71 } 72 73 static int 74 nfp_devarg_parse_bool_para(struct rte_kvargs *kvlist, 75 const char *key_match, 76 bool *value_ret) 77 { 78 int ret; 79 uint32_t count; 80 uint64_t value; 81 82 count = rte_kvargs_count(kvlist, key_match); 83 if (count == 0) 84 return 0; 85 86 if (count > 1) { 87 PMD_DRV_LOG(ERR, "Too much bool arguments: %s", key_match); 88 return -EINVAL; 89 } 90 91 ret = rte_kvargs_process(kvlist, key_match, &nfp_devarg_handle_int, &value); 92 if (ret != 0) 93 return -EINVAL; 94 95 if (value == 1) { 96 *value_ret = true; 97 } else if (value == 0) { 98 *value_ret = false; 99 } else { 100 PMD_DRV_LOG(ERR, "The param does not work, the format is %s=0/1", 101 key_match); 102 return -EINVAL; 103 } 104 105 return 0; 106 } 107 108 static int 109 nfp_devargs_parse(struct nfp_devargs *nfp_devargs_param, 110 const struct rte_devargs *devargs) 111 { 112 int ret; 113 struct rte_kvargs *kvlist; 114 115 if (devargs == NULL) 116 return 0; 117 118 kvlist = rte_kvargs_parse(devargs->args, NULL); 119 if (kvlist == NULL) 120 return -EINVAL; 121 122 ret = nfp_devarg_parse_bool_para(kvlist, NFP_PF_FORCE_RELOAD_FW, 123 &nfp_devargs_param->force_reload_fw); 124 if (ret != 0) 125 goto exit; 126 127 ret = nfp_devarg_parse_bool_para(kvlist, NFP_CPP_SERVICE_ENABLE, 128 &nfp_devargs_param->cpp_service_enable); 129 if (ret != 0) 130 goto exit; 131 132 exit: 133 rte_kvargs_free(kvlist); 134 135 return ret; 136 } 137 138 static void 139 nfp_net_pf_read_mac(struct nfp_app_fw_nic *app_fw_nic, 140 uint16_t port, 141 struct nfp_net_hw_priv *hw_priv) 142 { 143 struct nfp_net_hw *hw; 144 struct nfp_eth_table *nfp_eth_table; 145 146 /* Grab a pointer to the correct physical port */ 147 hw = app_fw_nic->ports[port]; 148 149 nfp_eth_table = hw_priv->pf_dev->nfp_eth_table; 150 151 rte_ether_addr_copy(&nfp_eth_table->ports[port].mac_addr, &hw->super.mac_addr); 152 } 153 154 static uint32_t 155 nfp_net_speed_bitmap2speed(uint32_t speeds_bitmap) 156 { 157 switch (speeds_bitmap) { 158 case RTE_ETH_LINK_SPEED_10M_HD: 159 return RTE_ETH_SPEED_NUM_10M; 160 case RTE_ETH_LINK_SPEED_10M: 161 return RTE_ETH_SPEED_NUM_10M; 162 case RTE_ETH_LINK_SPEED_100M_HD: 163 return RTE_ETH_SPEED_NUM_100M; 164 case RTE_ETH_LINK_SPEED_100M: 165 return RTE_ETH_SPEED_NUM_100M; 166 case RTE_ETH_LINK_SPEED_1G: 167 return RTE_ETH_SPEED_NUM_1G; 168 case RTE_ETH_LINK_SPEED_2_5G: 169 return RTE_ETH_SPEED_NUM_2_5G; 170 case RTE_ETH_LINK_SPEED_5G: 171 return RTE_ETH_SPEED_NUM_5G; 172 case RTE_ETH_LINK_SPEED_10G: 173 return RTE_ETH_SPEED_NUM_10G; 174 case RTE_ETH_LINK_SPEED_20G: 175 return RTE_ETH_SPEED_NUM_20G; 176 case RTE_ETH_LINK_SPEED_25G: 177 return RTE_ETH_SPEED_NUM_25G; 178 case RTE_ETH_LINK_SPEED_40G: 179 return RTE_ETH_SPEED_NUM_40G; 180 case RTE_ETH_LINK_SPEED_50G: 181 return RTE_ETH_SPEED_NUM_50G; 182 case RTE_ETH_LINK_SPEED_56G: 183 return RTE_ETH_SPEED_NUM_56G; 184 case RTE_ETH_LINK_SPEED_100G: 185 return RTE_ETH_SPEED_NUM_100G; 186 case RTE_ETH_LINK_SPEED_200G: 187 return RTE_ETH_SPEED_NUM_200G; 188 case RTE_ETH_LINK_SPEED_400G: 189 return RTE_ETH_SPEED_NUM_400G; 190 default: 191 return RTE_ETH_SPEED_NUM_NONE; 192 } 193 } 194 195 static int 196 nfp_net_nfp4000_speed_configure_check(uint16_t port_id, 197 uint32_t configure_speed, 198 struct nfp_eth_table *nfp_eth_table) 199 { 200 switch (port_id) { 201 case 0: 202 if (configure_speed == RTE_ETH_SPEED_NUM_25G && 203 nfp_eth_table->ports[1].speed == RTE_ETH_SPEED_NUM_10G) { 204 PMD_DRV_LOG(ERR, "The speed configuration is not supported for NFP4000."); 205 return -ENOTSUP; 206 } 207 break; 208 case 1: 209 if (configure_speed == RTE_ETH_SPEED_NUM_10G && 210 nfp_eth_table->ports[0].speed == RTE_ETH_SPEED_NUM_25G) { 211 PMD_DRV_LOG(ERR, "The speed configuration is not supported for NFP4000."); 212 return -ENOTSUP; 213 } 214 break; 215 default: 216 PMD_DRV_LOG(ERR, "The port id is invalid."); 217 return -EINVAL; 218 } 219 220 return 0; 221 } 222 223 static int 224 nfp_net_speed_autoneg_set(struct nfp_net_hw_priv *hw_priv, 225 struct nfp_eth_table_port *eth_port) 226 { 227 int ret; 228 struct nfp_nsp *nsp; 229 230 nsp = nfp_eth_config_start(hw_priv->pf_dev->cpp, eth_port->index); 231 if (nsp == NULL) { 232 PMD_DRV_LOG(ERR, "Could not get NSP."); 233 return -EIO; 234 } 235 236 ret = nfp_eth_set_aneg(nsp, NFP_ANEG_AUTO); 237 if (ret != 0) { 238 PMD_DRV_LOG(ERR, "Failed to set ANEG enable."); 239 nfp_eth_config_cleanup_end(nsp); 240 return ret; 241 } 242 243 return nfp_eth_config_commit_end(nsp); 244 } 245 246 static int 247 nfp_net_speed_fixed_set(struct nfp_net_hw_priv *hw_priv, 248 struct nfp_eth_table_port *eth_port, 249 uint32_t configure_speed) 250 { 251 int ret; 252 struct nfp_nsp *nsp; 253 254 nsp = nfp_eth_config_start(hw_priv->pf_dev->cpp, eth_port->index); 255 if (nsp == NULL) { 256 PMD_DRV_LOG(ERR, "Could not get NSP."); 257 return -EIO; 258 } 259 260 ret = nfp_eth_set_aneg(nsp, NFP_ANEG_DISABLED); 261 if (ret != 0) { 262 PMD_DRV_LOG(ERR, "Failed to set ANEG disable."); 263 goto config_cleanup; 264 } 265 266 ret = nfp_eth_set_speed(nsp, configure_speed); 267 if (ret != 0) { 268 PMD_DRV_LOG(ERR, "Failed to set speed."); 269 goto config_cleanup; 270 } 271 272 return nfp_eth_config_commit_end(nsp); 273 274 config_cleanup: 275 nfp_eth_config_cleanup_end(nsp); 276 277 return ret; 278 } 279 280 static int 281 nfp_net_speed_configure(struct rte_eth_dev *dev) 282 { 283 int ret; 284 uint32_t speed_capa; 285 uint32_t link_speeds; 286 uint32_t configure_speed; 287 struct nfp_eth_table_port *eth_port; 288 struct nfp_eth_table *nfp_eth_table; 289 struct nfp_net_hw *net_hw = dev->data->dev_private; 290 struct nfp_net_hw_priv *hw_priv = dev->process_private; 291 292 nfp_eth_table = hw_priv->pf_dev->nfp_eth_table; 293 eth_port = &nfp_eth_table->ports[net_hw->idx]; 294 295 speed_capa = hw_priv->pf_dev->speed_capa; 296 if (speed_capa == 0) { 297 PMD_DRV_LOG(ERR, "Speed_capa is invalid."); 298 return -EINVAL; 299 } 300 301 link_speeds = dev->data->dev_conf.link_speeds; 302 configure_speed = nfp_net_speed_bitmap2speed(speed_capa & link_speeds); 303 if (configure_speed == RTE_ETH_SPEED_NUM_NONE && 304 link_speeds != RTE_ETH_LINK_SPEED_AUTONEG) { 305 PMD_DRV_LOG(ERR, "Configured speed is invalid."); 306 return -EINVAL; 307 } 308 309 /* NFP4000 does not allow the port 0 25Gbps and port 1 10Gbps at the same time. */ 310 if (net_hw->device_id == PCI_DEVICE_ID_NFP4000_PF_NIC) { 311 ret = nfp_net_nfp4000_speed_configure_check(net_hw->idx, 312 configure_speed, nfp_eth_table); 313 if (ret != 0) { 314 PMD_DRV_LOG(ERR, "Failed to configure speed for NFP4000."); 315 return ret; 316 } 317 } 318 319 if (configure_speed == RTE_ETH_LINK_SPEED_AUTONEG) { 320 if (!eth_port->supp_aneg) 321 return 0; 322 323 if (eth_port->aneg == NFP_ANEG_AUTO) 324 return 0; 325 326 ret = nfp_net_speed_autoneg_set(hw_priv, eth_port); 327 if (ret != 0) { 328 PMD_DRV_LOG(ERR, "Failed to set speed autoneg."); 329 return ret; 330 } 331 } else { 332 if (eth_port->aneg == NFP_ANEG_DISABLED && configure_speed == eth_port->speed) 333 return 0; 334 335 ret = nfp_net_speed_fixed_set(hw_priv, eth_port, configure_speed); 336 if (ret != 0) { 337 PMD_DRV_LOG(ERR, "Failed to set speed fixed."); 338 return ret; 339 } 340 } 341 342 hw_priv->pf_dev->speed_updated = true; 343 344 return 0; 345 } 346 347 static int 348 nfp_net_start(struct rte_eth_dev *dev) 349 { 350 int ret; 351 uint16_t i; 352 struct nfp_hw *hw; 353 uint32_t new_ctrl; 354 uint32_t update = 0; 355 uint32_t cap_extend; 356 uint32_t intr_vector; 357 uint32_t ctrl_extend = 0; 358 struct nfp_net_hw *net_hw; 359 struct nfp_pf_dev *pf_dev; 360 struct rte_eth_rxmode *rxmode; 361 struct rte_eth_txmode *txmode; 362 struct nfp_net_hw_priv *hw_priv; 363 struct nfp_app_fw_nic *app_fw_nic; 364 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 365 struct rte_intr_handle *intr_handle = pci_dev->intr_handle; 366 367 net_hw = dev->data->dev_private; 368 hw_priv = dev->process_private; 369 pf_dev = hw_priv->pf_dev; 370 app_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv); 371 hw = &net_hw->super; 372 373 /* Disabling queues just in case... */ 374 nfp_net_disable_queues(dev); 375 376 /* Enabling the required queues in the device */ 377 nfp_net_enable_queues(dev); 378 379 /* Configure the port speed and the auto-negotiation mode. */ 380 ret = nfp_net_speed_configure(dev); 381 if (ret < 0) { 382 PMD_DRV_LOG(ERR, "Failed to set the speed and auto-negotiation mode."); 383 return ret; 384 } 385 386 /* Check and configure queue intr-vector mapping */ 387 if (dev->data->dev_conf.intr_conf.rxq != 0) { 388 if (app_fw_nic->multiport) { 389 PMD_INIT_LOG(ERR, "PMD rx interrupt is not supported " 390 "with NFP multiport PF"); 391 return -EINVAL; 392 } 393 394 if (rte_intr_type_get(intr_handle) == RTE_INTR_HANDLE_UIO) { 395 /* 396 * Better not to share LSC with RX interrupts. 397 * Unregistering LSC interrupt handler. 398 */ 399 rte_intr_callback_unregister(intr_handle, 400 nfp_net_dev_interrupt_handler, (void *)dev); 401 402 if (dev->data->nb_rx_queues > 1) { 403 PMD_INIT_LOG(ERR, "PMD rx interrupt only " 404 "supports 1 queue with UIO"); 405 return -EIO; 406 } 407 } 408 409 intr_vector = dev->data->nb_rx_queues; 410 if (rte_intr_efd_enable(intr_handle, intr_vector) != 0) 411 return -1; 412 413 nfp_configure_rx_interrupt(dev, intr_handle); 414 update = NFP_NET_CFG_UPDATE_MSIX; 415 } 416 417 /* Checking MTU set */ 418 if (dev->data->mtu > net_hw->flbufsz) { 419 PMD_INIT_LOG(ERR, "MTU (%u) can't be larger than the current NFP_FRAME_SIZE (%u)", 420 dev->data->mtu, net_hw->flbufsz); 421 return -ERANGE; 422 } 423 424 rte_intr_enable(intr_handle); 425 426 new_ctrl = nfp_check_offloads(dev); 427 428 /* Writing configuration parameters in the device */ 429 nfp_net_params_setup(net_hw); 430 431 rxmode = &dev->data->dev_conf.rxmode; 432 if ((rxmode->offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH) != 0) { 433 nfp_net_rss_config_default(dev); 434 update |= NFP_NET_CFG_UPDATE_RSS; 435 new_ctrl |= nfp_net_cfg_ctrl_rss(hw->cap); 436 } 437 438 /* Enable device */ 439 new_ctrl |= NFP_NET_CFG_CTRL_ENABLE; 440 441 update |= NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING; 442 443 txmode = &dev->data->dev_conf.txmode; 444 /* Enable vxlan */ 445 if ((txmode->offloads & RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO) != 0) { 446 if ((hw->cap & NFP_NET_CFG_CTRL_VXLAN) != 0) { 447 new_ctrl |= NFP_NET_CFG_CTRL_VXLAN; 448 update |= NFP_NET_CFG_UPDATE_VXLAN; 449 } 450 } 451 452 if ((hw->cap & NFP_NET_CFG_CTRL_RINGCFG) != 0) 453 new_ctrl |= NFP_NET_CFG_CTRL_RINGCFG; 454 455 if ((hw->cap & NFP_NET_CFG_CTRL_TXRWB) != 0) 456 new_ctrl |= NFP_NET_CFG_CTRL_TXRWB; 457 458 if (nfp_reconfig(hw, new_ctrl, update) != 0) 459 return -EIO; 460 461 hw->ctrl = new_ctrl; 462 463 /* Enable packet type offload by extend ctrl word1. */ 464 cap_extend = hw->cap_ext; 465 if ((cap_extend & NFP_NET_CFG_CTRL_PKT_TYPE) != 0) 466 ctrl_extend = NFP_NET_CFG_CTRL_PKT_TYPE; 467 468 if ((rxmode->offloads & RTE_ETH_RX_OFFLOAD_SECURITY) != 0 || 469 (txmode->offloads & RTE_ETH_TX_OFFLOAD_SECURITY) != 0) { 470 if ((cap_extend & NFP_NET_CFG_CTRL_IPSEC) != 0) 471 ctrl_extend |= NFP_NET_CFG_CTRL_IPSEC | 472 NFP_NET_CFG_CTRL_IPSEC_SM_LOOKUP | 473 NFP_NET_CFG_CTRL_IPSEC_LM_LOOKUP; 474 } 475 476 /* Enable flow steer by extend ctrl word1. */ 477 if ((cap_extend & NFP_NET_CFG_CTRL_FLOW_STEER) != 0) 478 ctrl_extend |= NFP_NET_CFG_CTRL_FLOW_STEER; 479 480 update = NFP_NET_CFG_UPDATE_GEN; 481 if (nfp_ext_reconfig(hw, ctrl_extend, update) != 0) 482 return -EIO; 483 484 hw->ctrl_ext = ctrl_extend; 485 486 /* 487 * Allocating rte mbufs for configured rx queues. 488 * This requires queues being enabled before. 489 */ 490 if (nfp_net_rx_freelist_setup(dev) != 0) { 491 ret = -ENOMEM; 492 goto error; 493 } 494 495 /* Configure the physical port up */ 496 nfp_eth_set_configured(pf_dev->cpp, net_hw->nfp_idx, 1); 497 498 for (i = 0; i < dev->data->nb_rx_queues; i++) 499 dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED; 500 for (i = 0; i < dev->data->nb_tx_queues; i++) 501 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED; 502 503 return 0; 504 505 error: 506 /* 507 * An error returned by this function should mean the app 508 * exiting and then the system releasing all the memory 509 * allocated even memory coming from hugepages. 510 * 511 * The device could be enabled at this point with some queues 512 * ready for getting packets. This is true if the call to 513 * nfp_net_rx_freelist_setup() succeeds for some queues but 514 * fails for subsequent queues. 515 * 516 * This should make the app exiting but better if we tell the 517 * device first. 518 */ 519 nfp_net_disable_queues(dev); 520 521 return ret; 522 } 523 524 /* Set the link up. */ 525 static int 526 nfp_net_set_link_up(struct rte_eth_dev *dev) 527 { 528 struct nfp_net_hw *hw; 529 struct nfp_net_hw_priv *hw_priv; 530 531 hw = dev->data->dev_private; 532 hw_priv = dev->process_private; 533 534 return nfp_eth_set_configured(hw_priv->pf_dev->cpp, hw->nfp_idx, 1); 535 } 536 537 /* Set the link down. */ 538 static int 539 nfp_net_set_link_down(struct rte_eth_dev *dev) 540 { 541 struct nfp_net_hw *hw; 542 struct nfp_net_hw_priv *hw_priv; 543 544 hw = dev->data->dev_private; 545 hw_priv = dev->process_private; 546 547 return nfp_eth_set_configured(hw_priv->pf_dev->cpp, hw->nfp_idx, 0); 548 } 549 550 static void 551 nfp_net_beat_timer(void *arg) 552 { 553 uint64_t cur_sec; 554 struct nfp_multi_pf *multi_pf = arg; 555 556 cur_sec = rte_rdtsc(); 557 nn_writeq(cur_sec, multi_pf->beat_addr + NFP_BEAT_OFFSET(multi_pf->function_id)); 558 559 /* Beat once per second. */ 560 if (rte_eal_alarm_set(1000 * 1000, nfp_net_beat_timer, 561 (void *)multi_pf) < 0) { 562 PMD_DRV_LOG(ERR, "Error setting alarm"); 563 } 564 } 565 566 static int 567 nfp_net_keepalive_init(struct nfp_cpp *cpp, 568 struct nfp_multi_pf *multi_pf) 569 { 570 uint8_t *base; 571 uint64_t addr; 572 uint32_t size; 573 uint32_t cpp_id; 574 struct nfp_resource *res; 575 576 res = nfp_resource_acquire(cpp, NFP_RESOURCE_KEEPALIVE); 577 if (res == NULL) 578 return -EIO; 579 580 cpp_id = nfp_resource_cpp_id(res); 581 addr = nfp_resource_address(res); 582 size = nfp_resource_size(res); 583 584 nfp_resource_release(res); 585 586 /* Allocate a fixed area for keepalive. */ 587 base = nfp_cpp_map_area(cpp, cpp_id, addr, size, &multi_pf->beat_area); 588 if (base == NULL) { 589 PMD_DRV_LOG(ERR, "Failed to map area for keepalive."); 590 return -EIO; 591 } 592 593 multi_pf->beat_addr = base; 594 595 return 0; 596 } 597 598 static void 599 nfp_net_keepalive_uninit(struct nfp_multi_pf *multi_pf) 600 { 601 nfp_cpp_area_release_free(multi_pf->beat_area); 602 } 603 604 static int 605 nfp_net_keepalive_start(struct nfp_multi_pf *multi_pf) 606 { 607 if (rte_eal_alarm_set(1000 * 1000, nfp_net_beat_timer, 608 (void *)multi_pf) < 0) { 609 PMD_DRV_LOG(ERR, "Error setting alarm"); 610 return -EIO; 611 } 612 613 return 0; 614 } 615 616 static void 617 nfp_net_keepalive_clear(uint8_t *beat_addr, 618 uint8_t function_id) 619 { 620 nn_writeq(0, beat_addr + NFP_BEAT_OFFSET(function_id)); 621 } 622 623 static void 624 nfp_net_keepalive_clear_others(const struct nfp_dev_info *dev_info, 625 struct nfp_multi_pf *multi_pf) 626 { 627 uint8_t port_num; 628 629 for (port_num = 0; port_num < dev_info->pf_num_per_unit; port_num++) { 630 if (port_num == multi_pf->function_id) 631 continue; 632 633 nfp_net_keepalive_clear(multi_pf->beat_addr, port_num); 634 } 635 } 636 637 static void 638 nfp_net_keepalive_stop(struct nfp_multi_pf *multi_pf) 639 { 640 /* Cancel keepalive for multiple PF setup */ 641 rte_eal_alarm_cancel(nfp_net_beat_timer, (void *)multi_pf); 642 } 643 644 static int 645 nfp_net_uninit(struct rte_eth_dev *eth_dev) 646 { 647 struct nfp_net_hw *net_hw; 648 struct nfp_net_hw_priv *hw_priv; 649 650 net_hw = eth_dev->data->dev_private; 651 hw_priv = eth_dev->process_private; 652 653 if ((net_hw->super.cap_ext & NFP_NET_CFG_CTRL_FLOW_STEER) != 0) 654 nfp_net_flow_priv_uninit(hw_priv->pf_dev, net_hw->idx); 655 656 rte_free(net_hw->eth_xstats_base); 657 if ((net_hw->super.cap & NFP_NET_CFG_CTRL_TXRWB) != 0) 658 nfp_net_txrwb_free(eth_dev); 659 nfp_ipsec_uninit(eth_dev); 660 661 return 0; 662 } 663 664 static void 665 nfp_cleanup_port_app_fw_nic(struct nfp_pf_dev *pf_dev, 666 uint8_t id, 667 struct rte_eth_dev *eth_dev) 668 { 669 struct nfp_app_fw_nic *app_fw_nic; 670 671 app_fw_nic = pf_dev->app_fw_priv; 672 if (app_fw_nic->ports[id] != NULL) { 673 nfp_net_uninit(eth_dev); 674 app_fw_nic->ports[id] = NULL; 675 } 676 } 677 678 static void 679 nfp_uninit_app_fw_nic(struct nfp_pf_dev *pf_dev) 680 { 681 nfp_cpp_area_release_free(pf_dev->ctrl_area); 682 rte_free(pf_dev->app_fw_priv); 683 } 684 685 static void 686 nfp_net_vf_config_uninit(struct nfp_pf_dev *pf_dev) 687 { 688 if (pf_dev->sriov_vf == 0) 689 return; 690 691 nfp_cpp_area_release_free(pf_dev->vf_cfg_tbl_area); 692 nfp_cpp_area_release_free(pf_dev->vf_area); 693 } 694 695 void 696 nfp_pf_uninit(struct nfp_net_hw_priv *hw_priv) 697 { 698 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 699 700 if (pf_dev->devargs.cpp_service_enable) 701 nfp_disable_cpp_service(pf_dev); 702 nfp_net_vf_config_uninit(pf_dev); 703 nfp_cpp_area_release_free(pf_dev->mac_stats_area); 704 nfp_cpp_area_release_free(pf_dev->qc_area); 705 free(pf_dev->sym_tbl); 706 if (pf_dev->multi_pf.enabled) { 707 nfp_net_keepalive_stop(&pf_dev->multi_pf); 708 nfp_net_keepalive_clear(pf_dev->multi_pf.beat_addr, pf_dev->multi_pf.function_id); 709 nfp_net_keepalive_uninit(&pf_dev->multi_pf); 710 } 711 free(pf_dev->nfp_eth_table); 712 free(pf_dev->hwinfo); 713 nfp_cpp_free(pf_dev->cpp); 714 nfp_sync_free(pf_dev->sync); 715 rte_free(pf_dev); 716 rte_free(hw_priv); 717 } 718 719 static int 720 nfp_pf_secondary_uninit(struct nfp_net_hw_priv *hw_priv) 721 { 722 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 723 724 free(pf_dev->sym_tbl); 725 nfp_cpp_free(pf_dev->cpp); 726 nfp_sync_free(pf_dev->sync); 727 rte_free(pf_dev); 728 rte_free(hw_priv); 729 730 return 0; 731 } 732 733 /* Reset and stop device. The device can not be restarted. */ 734 static int 735 nfp_net_close(struct rte_eth_dev *dev) 736 { 737 uint8_t i; 738 uint8_t id; 739 struct nfp_net_hw *hw; 740 struct nfp_pf_dev *pf_dev; 741 struct rte_pci_device *pci_dev; 742 struct nfp_net_hw_priv *hw_priv; 743 struct nfp_app_fw_nic *app_fw_nic; 744 745 hw_priv = dev->process_private; 746 747 /* 748 * In secondary process, a released eth device can be found by its name 749 * in shared memory. 750 * If the state of the eth device is RTE_ETH_DEV_UNUSED, it means the 751 * eth device has been released. 752 */ 753 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 754 if (dev->state == RTE_ETH_DEV_UNUSED) 755 return 0; 756 757 nfp_pf_secondary_uninit(hw_priv); 758 return 0; 759 } 760 761 hw = dev->data->dev_private; 762 pf_dev = hw_priv->pf_dev; 763 pci_dev = RTE_ETH_DEV_TO_PCI(dev); 764 app_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv); 765 766 /* 767 * We assume that the DPDK application is stopping all the 768 * threads/queues before calling the device close function. 769 */ 770 nfp_net_disable_queues(dev); 771 772 /* Clear queues */ 773 nfp_net_close_tx_queue(dev); 774 nfp_net_close_rx_queue(dev); 775 776 /* Cancel possible impending LSC work here before releasing the port */ 777 rte_eal_alarm_cancel(nfp_net_dev_interrupt_delayed_handler, (void *)dev); 778 779 /* Only free PF resources after all physical ports have been closed */ 780 /* Mark this port as unused and free device priv resources */ 781 nn_cfg_writeb(&hw->super, NFP_NET_CFG_LSC, 0xff); 782 783 if (pf_dev->app_fw_id != NFP_APP_FW_CORE_NIC) 784 return -EINVAL; 785 786 nfp_cleanup_port_app_fw_nic(pf_dev, hw->idx, dev); 787 788 for (i = 0; i < pf_dev->total_phyports; i++) { 789 id = nfp_function_id_get(pf_dev, i); 790 791 /* Check to see if ports are still in use */ 792 if (app_fw_nic->ports[id] != NULL) 793 return 0; 794 } 795 796 /* Enable in nfp_net_start() */ 797 rte_intr_disable(pci_dev->intr_handle); 798 799 /* Register in nfp_net_init() */ 800 rte_intr_callback_unregister(pci_dev->intr_handle, 801 nfp_net_dev_interrupt_handler, (void *)dev); 802 803 nfp_uninit_app_fw_nic(pf_dev); 804 nfp_pf_uninit(hw_priv); 805 806 return 0; 807 } 808 809 static int 810 nfp_net_find_vxlan_idx(struct nfp_net_hw *hw, 811 uint16_t port, 812 uint32_t *idx) 813 { 814 uint32_t i; 815 int free_idx = -1; 816 817 for (i = 0; i < NFP_NET_N_VXLAN_PORTS; i++) { 818 if (hw->vxlan_ports[i] == port) { 819 free_idx = i; 820 break; 821 } 822 823 if (hw->vxlan_usecnt[i] == 0) { 824 free_idx = i; 825 break; 826 } 827 } 828 829 if (free_idx == -1) 830 return -EINVAL; 831 832 *idx = free_idx; 833 834 return 0; 835 } 836 837 static int 838 nfp_udp_tunnel_port_add(struct rte_eth_dev *dev, 839 struct rte_eth_udp_tunnel *tunnel_udp) 840 { 841 int ret; 842 uint32_t idx; 843 uint16_t vxlan_port; 844 struct nfp_net_hw *hw; 845 enum rte_eth_tunnel_type tnl_type; 846 847 hw = dev->data->dev_private; 848 vxlan_port = tunnel_udp->udp_port; 849 tnl_type = tunnel_udp->prot_type; 850 851 if (tnl_type != RTE_ETH_TUNNEL_TYPE_VXLAN) { 852 PMD_DRV_LOG(ERR, "Not VXLAN tunnel"); 853 return -ENOTSUP; 854 } 855 856 ret = nfp_net_find_vxlan_idx(hw, vxlan_port, &idx); 857 if (ret != 0) { 858 PMD_DRV_LOG(ERR, "Failed find valid vxlan idx"); 859 return -EINVAL; 860 } 861 862 if (hw->vxlan_usecnt[idx] == 0) { 863 ret = nfp_net_set_vxlan_port(hw, idx, vxlan_port); 864 if (ret != 0) { 865 PMD_DRV_LOG(ERR, "Failed set vxlan port"); 866 return -EINVAL; 867 } 868 } 869 870 hw->vxlan_usecnt[idx]++; 871 872 return 0; 873 } 874 875 static int 876 nfp_udp_tunnel_port_del(struct rte_eth_dev *dev, 877 struct rte_eth_udp_tunnel *tunnel_udp) 878 { 879 int ret; 880 uint32_t idx; 881 uint16_t vxlan_port; 882 struct nfp_net_hw *hw; 883 enum rte_eth_tunnel_type tnl_type; 884 885 hw = dev->data->dev_private; 886 vxlan_port = tunnel_udp->udp_port; 887 tnl_type = tunnel_udp->prot_type; 888 889 if (tnl_type != RTE_ETH_TUNNEL_TYPE_VXLAN) { 890 PMD_DRV_LOG(ERR, "Not VXLAN tunnel"); 891 return -ENOTSUP; 892 } 893 894 ret = nfp_net_find_vxlan_idx(hw, vxlan_port, &idx); 895 if (ret != 0 || hw->vxlan_usecnt[idx] == 0) { 896 PMD_DRV_LOG(ERR, "Failed find valid vxlan idx"); 897 return -EINVAL; 898 } 899 900 hw->vxlan_usecnt[idx]--; 901 902 if (hw->vxlan_usecnt[idx] == 0) { 903 ret = nfp_net_set_vxlan_port(hw, idx, 0); 904 if (ret != 0) { 905 PMD_DRV_LOG(ERR, "Failed set vxlan port"); 906 return -EINVAL; 907 } 908 } 909 910 return 0; 911 } 912 913 /* Initialise and register driver with DPDK Application */ 914 static const struct eth_dev_ops nfp_net_eth_dev_ops = { 915 .dev_configure = nfp_net_configure, 916 .dev_start = nfp_net_start, 917 .dev_stop = nfp_net_stop, 918 .dev_set_link_up = nfp_net_set_link_up, 919 .dev_set_link_down = nfp_net_set_link_down, 920 .dev_close = nfp_net_close, 921 .promiscuous_enable = nfp_net_promisc_enable, 922 .promiscuous_disable = nfp_net_promisc_disable, 923 .allmulticast_enable = nfp_net_allmulticast_enable, 924 .allmulticast_disable = nfp_net_allmulticast_disable, 925 .link_update = nfp_net_link_update, 926 .stats_get = nfp_net_stats_get, 927 .stats_reset = nfp_net_stats_reset, 928 .xstats_get = nfp_net_xstats_get, 929 .xstats_reset = nfp_net_xstats_reset, 930 .xstats_get_names = nfp_net_xstats_get_names, 931 .xstats_get_by_id = nfp_net_xstats_get_by_id, 932 .xstats_get_names_by_id = nfp_net_xstats_get_names_by_id, 933 .dev_infos_get = nfp_net_infos_get, 934 .dev_supported_ptypes_get = nfp_net_supported_ptypes_get, 935 .mtu_set = nfp_net_dev_mtu_set, 936 .mac_addr_set = nfp_net_set_mac_addr, 937 .vlan_offload_set = nfp_net_vlan_offload_set, 938 .reta_update = nfp_net_reta_update, 939 .reta_query = nfp_net_reta_query, 940 .rss_hash_update = nfp_net_rss_hash_update, 941 .rss_hash_conf_get = nfp_net_rss_hash_conf_get, 942 .rx_queue_setup = nfp_net_rx_queue_setup, 943 .rx_queue_release = nfp_net_rx_queue_release, 944 .rxq_info_get = nfp_net_rx_queue_info_get, 945 .tx_queue_setup = nfp_net_tx_queue_setup, 946 .tx_queue_release = nfp_net_tx_queue_release, 947 .txq_info_get = nfp_net_tx_queue_info_get, 948 .rx_queue_intr_enable = nfp_rx_queue_intr_enable, 949 .rx_queue_intr_disable = nfp_rx_queue_intr_disable, 950 .udp_tunnel_port_add = nfp_udp_tunnel_port_add, 951 .udp_tunnel_port_del = nfp_udp_tunnel_port_del, 952 .fw_version_get = nfp_net_firmware_version_get, 953 .flow_ctrl_get = nfp_net_flow_ctrl_get, 954 .flow_ctrl_set = nfp_net_flow_ctrl_set, 955 .flow_ops_get = nfp_net_flow_ops_get, 956 .fec_get_capability = nfp_net_fec_get_capability, 957 .fec_get = nfp_net_fec_get, 958 .fec_set = nfp_net_fec_set, 959 }; 960 961 static inline void 962 nfp_net_ethdev_ops_mount(struct nfp_net_hw *hw, 963 struct rte_eth_dev *eth_dev) 964 { 965 if (hw->ver.extend == NFP_NET_CFG_VERSION_DP_NFD3) 966 eth_dev->tx_pkt_burst = nfp_net_nfd3_xmit_pkts; 967 else 968 nfp_net_nfdk_xmit_pkts_set(eth_dev); 969 970 eth_dev->dev_ops = &nfp_net_eth_dev_ops; 971 eth_dev->rx_queue_count = nfp_net_rx_queue_count; 972 nfp_net_recv_pkts_set(eth_dev); 973 } 974 975 static int 976 nfp_net_init(struct rte_eth_dev *eth_dev, 977 void *para) 978 { 979 int err; 980 uint16_t port; 981 uint64_t rx_base; 982 uint64_t tx_base; 983 struct nfp_hw *hw; 984 struct nfp_net_hw *net_hw; 985 struct nfp_pf_dev *pf_dev; 986 struct nfp_net_init *hw_init; 987 struct rte_pci_device *pci_dev; 988 struct nfp_net_hw_priv *hw_priv; 989 struct nfp_app_fw_nic *app_fw_nic; 990 991 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 992 net_hw = eth_dev->data->dev_private; 993 994 hw_init = para; 995 net_hw->idx = hw_init->idx; 996 net_hw->nfp_idx = hw_init->nfp_idx; 997 eth_dev->process_private = hw_init->hw_priv; 998 999 /* Use backpointer here to the PF of this eth_dev */ 1000 hw_priv = eth_dev->process_private; 1001 pf_dev = hw_priv->pf_dev; 1002 1003 /* Use backpointer to the CoreNIC app struct */ 1004 app_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv); 1005 1006 /* Add this device to the PF's array of physical ports */ 1007 app_fw_nic->ports[net_hw->idx] = net_hw; 1008 1009 port = net_hw->idx; 1010 if (port > 7) { 1011 PMD_DRV_LOG(ERR, "Port value is wrong"); 1012 return -ENODEV; 1013 } 1014 1015 hw = &net_hw->super; 1016 1017 PMD_INIT_LOG(DEBUG, "Working with physical port number: %hu, " 1018 "NFP internal port number: %d", port, net_hw->nfp_idx); 1019 1020 rte_eth_copy_pci_info(eth_dev, pci_dev); 1021 1022 if (pf_dev->multi_pf.enabled) 1023 hw->ctrl_bar = pf_dev->ctrl_bar; 1024 else 1025 hw->ctrl_bar = pf_dev->ctrl_bar + (port * NFP_NET_CFG_BAR_SZ); 1026 1027 net_hw->mac_stats = pf_dev->mac_stats_bar + 1028 (net_hw->nfp_idx * NFP_MAC_STATS_SIZE); 1029 1030 PMD_INIT_LOG(DEBUG, "ctrl bar: %p", hw->ctrl_bar); 1031 PMD_INIT_LOG(DEBUG, "MAC stats: %p", net_hw->mac_stats); 1032 1033 err = nfp_net_common_init(pci_dev, net_hw); 1034 if (err != 0) 1035 return err; 1036 1037 err = nfp_net_tlv_caps_parse(eth_dev); 1038 if (err != 0) { 1039 PMD_INIT_LOG(ERR, "Failed to parser TLV caps"); 1040 return err; 1041 } 1042 1043 err = nfp_ipsec_init(eth_dev); 1044 if (err != 0) { 1045 PMD_INIT_LOG(ERR, "Failed to init IPsec module"); 1046 return err; 1047 } 1048 1049 nfp_net_ethdev_ops_mount(net_hw, eth_dev); 1050 1051 net_hw->eth_xstats_base = rte_malloc("rte_eth_xstat", sizeof(struct rte_eth_xstat) * 1052 nfp_net_xstats_size(eth_dev), 0); 1053 if (net_hw->eth_xstats_base == NULL) { 1054 PMD_INIT_LOG(ERR, "no memory for xstats base values on device %s!", 1055 pci_dev->device.name); 1056 err = -ENOMEM; 1057 goto ipsec_exit; 1058 } 1059 1060 /* Work out where in the BAR the queues start. */ 1061 tx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ); 1062 rx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ); 1063 1064 net_hw->tx_bar = pf_dev->qc_bar + tx_base * NFP_QCP_QUEUE_ADDR_SZ; 1065 net_hw->rx_bar = pf_dev->qc_bar + rx_base * NFP_QCP_QUEUE_ADDR_SZ; 1066 1067 PMD_INIT_LOG(DEBUG, "ctrl_bar: %p, tx_bar: %p, rx_bar: %p", 1068 hw->ctrl_bar, net_hw->tx_bar, net_hw->rx_bar); 1069 1070 nfp_net_cfg_queue_setup(net_hw); 1071 net_hw->mtu = RTE_ETHER_MTU; 1072 1073 /* VLAN insertion is incompatible with LSOv2 */ 1074 if ((hw->cap & NFP_NET_CFG_CTRL_LSO2) != 0) 1075 hw->cap &= ~NFP_NET_CFG_CTRL_TXVLAN; 1076 1077 nfp_net_log_device_information(net_hw); 1078 1079 /* Initializing spinlock for reconfigs */ 1080 rte_spinlock_init(&hw->reconfig_lock); 1081 1082 if ((port == 0 || pf_dev->multi_pf.enabled)) { 1083 err = nfp_net_vf_config_app_init(net_hw, pf_dev); 1084 if (err != 0) { 1085 PMD_INIT_LOG(ERR, "Failed to init sriov module"); 1086 goto xstats_free; 1087 } 1088 } 1089 1090 /* Allocating memory for mac addr */ 1091 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", RTE_ETHER_ADDR_LEN, 0); 1092 if (eth_dev->data->mac_addrs == NULL) { 1093 PMD_INIT_LOG(ERR, "Failed to space for MAC address"); 1094 err = -ENOMEM; 1095 goto xstats_free; 1096 } 1097 1098 if ((hw->cap & NFP_NET_CFG_CTRL_TXRWB) != 0) { 1099 err = nfp_net_txrwb_alloc(eth_dev); 1100 if (err != 0) 1101 goto xstats_free; 1102 } 1103 1104 nfp_net_pf_read_mac(app_fw_nic, port, hw_priv); 1105 nfp_write_mac(hw, &hw->mac_addr.addr_bytes[0]); 1106 1107 if (rte_is_valid_assigned_ether_addr(&hw->mac_addr) == 0) { 1108 PMD_INIT_LOG(INFO, "Using random mac address for port %d", port); 1109 /* Using random mac addresses for VFs */ 1110 rte_eth_random_addr(&hw->mac_addr.addr_bytes[0]); 1111 nfp_write_mac(hw, &hw->mac_addr.addr_bytes[0]); 1112 } 1113 1114 /* Copying mac address to DPDK eth_dev struct */ 1115 rte_ether_addr_copy(&hw->mac_addr, eth_dev->data->mac_addrs); 1116 1117 if ((hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR) == 0) 1118 eth_dev->data->dev_flags |= RTE_ETH_DEV_NOLIVE_MAC_ADDR; 1119 1120 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1121 1122 PMD_INIT_LOG(INFO, "port %d VendorID=%#x DeviceID=%#x " 1123 "mac=" RTE_ETHER_ADDR_PRT_FMT, 1124 eth_dev->data->port_id, pci_dev->id.vendor_id, 1125 pci_dev->id.device_id, 1126 RTE_ETHER_ADDR_BYTES(&hw->mac_addr)); 1127 1128 /* Registering LSC interrupt handler */ 1129 rte_intr_callback_register(pci_dev->intr_handle, 1130 nfp_net_dev_interrupt_handler, (void *)eth_dev); 1131 /* Telling the firmware about the LSC interrupt entry */ 1132 nn_cfg_writeb(hw, NFP_NET_CFG_LSC, NFP_NET_IRQ_LSC_IDX); 1133 /* Unmask the LSC interrupt */ 1134 nfp_net_irq_unmask(eth_dev); 1135 /* Recording current stats counters values */ 1136 nfp_net_stats_reset(eth_dev); 1137 1138 if ((hw->cap_ext & NFP_NET_CFG_CTRL_FLOW_STEER) != 0) { 1139 err = nfp_net_flow_priv_init(pf_dev, port); 1140 if (err != 0) { 1141 PMD_INIT_LOG(ERR, "Init net flow priv failed"); 1142 goto txrwb_free; 1143 } 1144 } 1145 1146 return 0; 1147 1148 txrwb_free: 1149 if ((hw->cap & NFP_NET_CFG_CTRL_TXRWB) != 0) 1150 nfp_net_txrwb_free(eth_dev); 1151 xstats_free: 1152 rte_free(net_hw->eth_xstats_base); 1153 ipsec_exit: 1154 nfp_ipsec_uninit(eth_dev); 1155 1156 return err; 1157 } 1158 1159 static int 1160 nfp_net_device_activate(struct nfp_cpp *cpp, 1161 struct nfp_multi_pf *multi_pf) 1162 { 1163 int ret; 1164 struct nfp_nsp *nsp; 1165 1166 if (multi_pf->enabled && multi_pf->function_id != 0) { 1167 nsp = nfp_nsp_open(cpp); 1168 if (nsp == NULL) { 1169 PMD_DRV_LOG(ERR, "NFP error when obtaining NSP handle"); 1170 return -EIO; 1171 } 1172 1173 ret = nfp_nsp_device_activate(nsp); 1174 nfp_nsp_close(nsp); 1175 if (ret != 0 && ret != -EOPNOTSUPP) 1176 return ret; 1177 } 1178 1179 return 0; 1180 } 1181 1182 #define DEFAULT_FW_PATH "/lib/firmware/netronome" 1183 1184 static int 1185 nfp_fw_get_name(struct rte_pci_device *dev, 1186 struct nfp_cpp *cpp, 1187 struct nfp_eth_table *nfp_eth_table, 1188 struct nfp_hwinfo *hwinfo, 1189 char *fw_name, 1190 size_t fw_size) 1191 { 1192 char serial[40]; 1193 uint16_t interface; 1194 char card_desc[100]; 1195 uint32_t cpp_serial_len; 1196 const char *nfp_fw_model; 1197 const uint8_t *cpp_serial; 1198 1199 cpp_serial_len = nfp_cpp_serial(cpp, &cpp_serial); 1200 if (cpp_serial_len != NFP_SERIAL_LEN) 1201 return -ERANGE; 1202 1203 interface = nfp_cpp_interface(cpp); 1204 1205 /* Looking for firmware file in order of priority */ 1206 1207 /* First try to find a firmware image specific for this device */ 1208 snprintf(serial, sizeof(serial), 1209 "serial-%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x", 1210 cpp_serial[0], cpp_serial[1], cpp_serial[2], cpp_serial[3], 1211 cpp_serial[4], cpp_serial[5], interface >> 8, interface & 0xff); 1212 snprintf(fw_name, fw_size, "%s/%s.nffw", DEFAULT_FW_PATH, serial); 1213 1214 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s", fw_name); 1215 if (access(fw_name, F_OK) == 0) 1216 return 0; 1217 1218 /* Then try the PCI name */ 1219 snprintf(fw_name, fw_size, "%s/pci-%s.nffw", DEFAULT_FW_PATH, 1220 dev->name); 1221 1222 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s", fw_name); 1223 if (access(fw_name, F_OK) == 0) 1224 return 0; 1225 1226 nfp_fw_model = nfp_hwinfo_lookup(hwinfo, "nffw.partno"); 1227 if (nfp_fw_model == NULL) { 1228 nfp_fw_model = nfp_hwinfo_lookup(hwinfo, "assembly.partno"); 1229 if (nfp_fw_model == NULL) { 1230 PMD_DRV_LOG(ERR, "firmware model NOT found"); 1231 return -EIO; 1232 } 1233 } 1234 1235 /* And then try the model name */ 1236 snprintf(card_desc, sizeof(card_desc), "%s.nffw", nfp_fw_model); 1237 snprintf(fw_name, fw_size, "%s/%s", DEFAULT_FW_PATH, card_desc); 1238 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s", fw_name); 1239 if (access(fw_name, F_OK) == 0) 1240 return 0; 1241 1242 /* Finally try the card type and media */ 1243 snprintf(card_desc, sizeof(card_desc), "nic_%s_%dx%d.nffw", 1244 nfp_fw_model, nfp_eth_table->count, 1245 nfp_eth_table->ports[0].speed / 1000); 1246 snprintf(fw_name, fw_size, "%s/%s", DEFAULT_FW_PATH, card_desc); 1247 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s", fw_name); 1248 if (access(fw_name, F_OK) == 0) 1249 return 0; 1250 1251 return -ENOENT; 1252 } 1253 1254 static int 1255 nfp_fw_upload(struct nfp_nsp *nsp, 1256 char *fw_name) 1257 { 1258 int err; 1259 void *fw_buf; 1260 size_t fsize; 1261 1262 err = rte_firmware_read(fw_name, &fw_buf, &fsize); 1263 if (err != 0) { 1264 PMD_DRV_LOG(ERR, "firmware %s not found!", fw_name); 1265 return -ENOENT; 1266 } 1267 1268 PMD_DRV_LOG(INFO, "Firmware file found at %s with size: %zu", 1269 fw_name, fsize); 1270 PMD_DRV_LOG(INFO, "Uploading the firmware ..."); 1271 if (nfp_nsp_load_fw(nsp, fw_buf, fsize) < 0) { 1272 free(fw_buf); 1273 PMD_DRV_LOG(ERR, "Firmware load failed."); 1274 return -EIO; 1275 } 1276 1277 PMD_DRV_LOG(INFO, "Done"); 1278 1279 free(fw_buf); 1280 1281 return 0; 1282 } 1283 1284 static void 1285 nfp_fw_unload(struct nfp_cpp *cpp) 1286 { 1287 struct nfp_nsp *nsp; 1288 1289 nsp = nfp_nsp_open(cpp); 1290 if (nsp == NULL) 1291 return; 1292 1293 nfp_nsp_device_soft_reset(nsp); 1294 nfp_nsp_close(nsp); 1295 } 1296 1297 static int 1298 nfp_fw_check_change(struct nfp_cpp *cpp, 1299 char *fw_name, 1300 bool *fw_changed) 1301 { 1302 int ret; 1303 uint32_t new_version = 0; 1304 uint32_t old_version = 0; 1305 1306 ret = nfp_elf_get_fw_version(&new_version, fw_name); 1307 if (ret != 0) 1308 return ret; 1309 1310 nfp_net_get_fw_version(cpp, &old_version); 1311 1312 if (new_version != old_version) { 1313 PMD_DRV_LOG(INFO, "FW version is changed, new %u, old %u", 1314 new_version, old_version); 1315 *fw_changed = true; 1316 } else { 1317 PMD_DRV_LOG(INFO, "FW version is not changed and is %u", new_version); 1318 *fw_changed = false; 1319 } 1320 1321 return 0; 1322 } 1323 1324 static int 1325 nfp_fw_reload(struct nfp_nsp *nsp, 1326 char *fw_name) 1327 { 1328 int err; 1329 1330 nfp_nsp_device_soft_reset(nsp); 1331 err = nfp_fw_upload(nsp, fw_name); 1332 if (err != 0) 1333 PMD_DRV_LOG(ERR, "NFP firmware load failed"); 1334 1335 return err; 1336 } 1337 1338 static bool 1339 nfp_fw_skip_load(const struct nfp_dev_info *dev_info, 1340 struct nfp_multi_pf *multi_pf, 1341 bool *reload_fw) 1342 { 1343 uint8_t i; 1344 uint64_t tmp_beat; 1345 uint32_t port_num; 1346 uint8_t in_use = 0; 1347 uint64_t beat[dev_info->pf_num_per_unit]; 1348 uint32_t offset[dev_info->pf_num_per_unit]; 1349 uint8_t abnormal = dev_info->pf_num_per_unit; 1350 1351 sleep(1); 1352 for (port_num = 0; port_num < dev_info->pf_num_per_unit; port_num++) { 1353 if (port_num == multi_pf->function_id) { 1354 abnormal--; 1355 continue; 1356 } 1357 1358 offset[port_num] = NFP_BEAT_OFFSET(port_num); 1359 beat[port_num] = nn_readq(multi_pf->beat_addr + offset[port_num]); 1360 if (beat[port_num] == 0) 1361 abnormal--; 1362 } 1363 1364 if (abnormal == 0) 1365 return true; 1366 1367 for (i = 0; i < 3; i++) { 1368 sleep(1); 1369 for (port_num = 0; port_num < dev_info->pf_num_per_unit; port_num++) { 1370 if (port_num == multi_pf->function_id) 1371 continue; 1372 1373 if (beat[port_num] == 0) 1374 continue; 1375 1376 tmp_beat = nn_readq(multi_pf->beat_addr + offset[port_num]); 1377 if (tmp_beat != beat[port_num]) { 1378 in_use++; 1379 abnormal--; 1380 beat[port_num] = 0; 1381 if (*reload_fw) { 1382 *reload_fw = false; 1383 PMD_DRV_LOG(ERR, "The param %s does not work", 1384 NFP_PF_FORCE_RELOAD_FW); 1385 } 1386 } 1387 } 1388 1389 if (abnormal == 0) 1390 return true; 1391 } 1392 1393 if (in_use != 0) { 1394 PMD_DRV_LOG(WARNING, "Abnormal %u != 0, the nic has port which is exit abnormally.", 1395 abnormal); 1396 return true; 1397 } 1398 1399 return false; 1400 } 1401 static int 1402 nfp_fw_reload_for_single_pf(struct nfp_nsp *nsp, 1403 char *fw_name, 1404 struct nfp_cpp *cpp, 1405 bool force_reload_fw) 1406 { 1407 int ret; 1408 bool fw_changed = true; 1409 1410 if (nfp_nsp_fw_loaded(nsp) && !force_reload_fw) { 1411 ret = nfp_fw_check_change(cpp, fw_name, &fw_changed); 1412 if (ret != 0) 1413 return ret; 1414 } 1415 1416 if (!fw_changed) 1417 return 0; 1418 1419 ret = nfp_fw_reload(nsp, fw_name); 1420 if (ret != 0) 1421 return ret; 1422 1423 return 0; 1424 } 1425 1426 static int 1427 nfp_fw_reload_for_multi_pf(struct nfp_nsp *nsp, 1428 char *fw_name, 1429 struct nfp_cpp *cpp, 1430 const struct nfp_dev_info *dev_info, 1431 struct nfp_multi_pf *multi_pf, 1432 bool force_reload_fw) 1433 { 1434 int err; 1435 bool fw_changed = true; 1436 bool skip_load_fw = false; 1437 bool reload_fw = force_reload_fw; 1438 1439 err = nfp_net_keepalive_init(cpp, multi_pf); 1440 if (err != 0) { 1441 PMD_DRV_LOG(ERR, "NFP init beat failed"); 1442 return err; 1443 } 1444 1445 err = nfp_net_keepalive_start(multi_pf); 1446 if (err != 0) { 1447 PMD_DRV_LOG(ERR, "NFP write beat failed"); 1448 goto keepalive_uninit; 1449 } 1450 1451 if (nfp_nsp_fw_loaded(nsp) && !reload_fw) { 1452 err = nfp_fw_check_change(cpp, fw_name, &fw_changed); 1453 if (err != 0) 1454 goto keepalive_stop; 1455 } 1456 1457 if (!fw_changed || reload_fw) 1458 skip_load_fw = nfp_fw_skip_load(dev_info, multi_pf, &reload_fw); 1459 1460 if (skip_load_fw && !reload_fw) 1461 return 0; 1462 1463 err = nfp_fw_reload(nsp, fw_name); 1464 if (err != 0) 1465 goto keepalive_stop; 1466 1467 nfp_net_keepalive_clear_others(dev_info, multi_pf); 1468 1469 return 0; 1470 1471 keepalive_stop: 1472 nfp_net_keepalive_stop(multi_pf); 1473 keepalive_uninit: 1474 nfp_net_keepalive_uninit(multi_pf); 1475 1476 return err; 1477 } 1478 1479 static int 1480 nfp_fw_setup(struct rte_pci_device *dev, 1481 struct nfp_cpp *cpp, 1482 struct nfp_eth_table *nfp_eth_table, 1483 struct nfp_hwinfo *hwinfo, 1484 const struct nfp_dev_info *dev_info, 1485 struct nfp_multi_pf *multi_pf, 1486 bool force_reload_fw) 1487 { 1488 int err; 1489 char fw_name[125]; 1490 struct nfp_nsp *nsp; 1491 1492 err = nfp_fw_get_name(dev, cpp, nfp_eth_table, hwinfo, fw_name, sizeof(fw_name)); 1493 if (err != 0) { 1494 PMD_DRV_LOG(ERR, "Can't find suitable firmware."); 1495 return err; 1496 } 1497 1498 nsp = nfp_nsp_open(cpp); 1499 if (nsp == NULL) { 1500 PMD_DRV_LOG(ERR, "NFP error when obtaining NSP handle"); 1501 return -EIO; 1502 } 1503 1504 if (multi_pf->enabled) 1505 err = nfp_fw_reload_for_multi_pf(nsp, fw_name, cpp, dev_info, multi_pf, 1506 force_reload_fw); 1507 else 1508 err = nfp_fw_reload_for_single_pf(nsp, fw_name, cpp, force_reload_fw); 1509 1510 nfp_nsp_close(nsp); 1511 return err; 1512 } 1513 1514 static inline bool 1515 nfp_check_multi_pf_from_fw(uint32_t total_vnics) 1516 { 1517 if (total_vnics == 1) 1518 return true; 1519 1520 return false; 1521 } 1522 1523 static inline bool 1524 nfp_check_multi_pf_from_nsp(struct rte_pci_device *pci_dev, 1525 struct nfp_cpp *cpp) 1526 { 1527 bool flag; 1528 struct nfp_nsp *nsp; 1529 1530 nsp = nfp_nsp_open(cpp); 1531 if (nsp == NULL) { 1532 PMD_DRV_LOG(ERR, "NFP error when obtaining NSP handle"); 1533 return false; 1534 } 1535 1536 flag = (nfp_nsp_get_abi_ver_major(nsp) > 0) && 1537 (pci_dev->id.device_id == PCI_DEVICE_ID_NFP3800_PF_NIC); 1538 1539 nfp_nsp_close(nsp); 1540 return flag; 1541 } 1542 1543 static int 1544 nfp_enable_multi_pf(struct nfp_pf_dev *pf_dev) 1545 { 1546 int err = 0; 1547 uint64_t tx_base; 1548 uint8_t *ctrl_bar; 1549 struct nfp_hw *hw; 1550 uint32_t cap_extend; 1551 struct nfp_net_hw net_hw; 1552 struct nfp_cpp_area *area; 1553 char name[RTE_ETH_NAME_MAX_LEN]; 1554 1555 if (!pf_dev->multi_pf.enabled) 1556 return 0; 1557 1558 memset(&net_hw, 0, sizeof(struct nfp_net_hw)); 1559 1560 /* Map the symbol table */ 1561 snprintf(name, sizeof(name), "_pf%u_net_bar0", 1562 pf_dev->multi_pf.function_id); 1563 ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, name, NFP_NET_CFG_BAR_SZ, 1564 &area); 1565 if (ctrl_bar == NULL) { 1566 PMD_INIT_LOG(ERR, "Failed to find data vNIC memory symbol"); 1567 return -ENODEV; 1568 } 1569 1570 hw = &net_hw.super; 1571 hw->ctrl_bar = ctrl_bar; 1572 1573 cap_extend = nn_cfg_readl(hw, NFP_NET_CFG_CAP_WORD1); 1574 if ((cap_extend & NFP_NET_CFG_CTRL_MULTI_PF) == 0) { 1575 PMD_INIT_LOG(ERR, "Loaded firmware doesn't support multiple PF"); 1576 err = -EINVAL; 1577 goto end; 1578 } 1579 1580 tx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ); 1581 net_hw.tx_bar = pf_dev->qc_bar + tx_base * NFP_QCP_QUEUE_ADDR_SZ; 1582 nfp_net_cfg_queue_setup(&net_hw); 1583 rte_spinlock_init(&hw->reconfig_lock); 1584 nfp_ext_reconfig(&net_hw.super, NFP_NET_CFG_CTRL_MULTI_PF, NFP_NET_CFG_UPDATE_GEN); 1585 end: 1586 nfp_cpp_area_release_free(area); 1587 return err; 1588 } 1589 1590 static bool 1591 nfp_app_fw_nic_total_phyports_check(struct nfp_pf_dev *pf_dev) 1592 { 1593 int ret; 1594 uint8_t id; 1595 uint8_t total_phyports; 1596 char vnic_name[RTE_ETH_NAME_MAX_LEN]; 1597 1598 /* Read the number of vNIC's created for the PF */ 1599 id = nfp_function_id_get(pf_dev, 0); 1600 snprintf(vnic_name, sizeof(vnic_name), "nfd_cfg_pf%u_num_ports", id); 1601 total_phyports = nfp_rtsym_read_le(pf_dev->sym_tbl, vnic_name, &ret); 1602 if (ret != 0 || total_phyports == 0 || total_phyports > 8) { 1603 PMD_INIT_LOG(ERR, "%s symbol with wrong value", vnic_name); 1604 return false; 1605 } 1606 1607 if (pf_dev->multi_pf.enabled) { 1608 if (!nfp_check_multi_pf_from_fw(total_phyports)) { 1609 PMD_INIT_LOG(ERR, "NSP report multipf, but FW report not multipf"); 1610 return false; 1611 } 1612 } else { 1613 /* 1614 * For single PF the number of vNICs exposed should be the same as the 1615 * number of physical ports. 1616 */ 1617 if (total_phyports != pf_dev->nfp_eth_table->count) { 1618 PMD_INIT_LOG(ERR, "Total physical ports do not match number of vNICs"); 1619 return false; 1620 } 1621 } 1622 1623 return true; 1624 } 1625 1626 static int 1627 nfp_init_app_fw_nic(struct nfp_net_hw_priv *hw_priv) 1628 { 1629 uint8_t i; 1630 uint8_t id; 1631 int ret = 0; 1632 struct nfp_app_fw_nic *app_fw_nic; 1633 struct nfp_eth_table *nfp_eth_table; 1634 char bar_name[RTE_ETH_NAME_MAX_LEN]; 1635 char port_name[RTE_ETH_NAME_MAX_LEN]; 1636 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 1637 struct nfp_net_init hw_init = { 1638 .hw_priv = hw_priv, 1639 }; 1640 1641 nfp_eth_table = pf_dev->nfp_eth_table; 1642 PMD_INIT_LOG(INFO, "Total physical ports: %d", nfp_eth_table->count); 1643 id = nfp_function_id_get(pf_dev, 0); 1644 1645 /* Allocate memory for the CoreNIC app */ 1646 app_fw_nic = rte_zmalloc("nfp_app_fw_nic", sizeof(*app_fw_nic), 0); 1647 if (app_fw_nic == NULL) 1648 return -ENOMEM; 1649 1650 /* Point the app_fw_priv pointer in the PF to the coreNIC app */ 1651 pf_dev->app_fw_priv = app_fw_nic; 1652 1653 /* Check the number of vNIC's created for the PF */ 1654 if (!nfp_app_fw_nic_total_phyports_check(pf_dev)) { 1655 ret = -ENODEV; 1656 goto app_cleanup; 1657 } 1658 1659 /* Populate coreNIC app properties */ 1660 if (pf_dev->total_phyports > 1) 1661 app_fw_nic->multiport = true; 1662 1663 /* Map the symbol table */ 1664 snprintf(bar_name, sizeof(bar_name), "_pf%u_net_bar0", id); 1665 pf_dev->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, bar_name, 1666 pf_dev->total_phyports * NFP_NET_CFG_BAR_SZ, 1667 &pf_dev->ctrl_area); 1668 if (pf_dev->ctrl_bar == NULL) { 1669 PMD_INIT_LOG(ERR, "nfp_rtsym_map fails for %s", bar_name); 1670 ret = -EIO; 1671 goto app_cleanup; 1672 } 1673 1674 PMD_INIT_LOG(DEBUG, "ctrl bar: %p", pf_dev->ctrl_bar); 1675 1676 /* Loop through all physical ports on PF */ 1677 for (i = 0; i < pf_dev->total_phyports; i++) { 1678 if (pf_dev->multi_pf.enabled) 1679 snprintf(port_name, sizeof(port_name), "%s", 1680 pf_dev->pci_dev->device.name); 1681 else 1682 snprintf(port_name, sizeof(port_name), "%s_port%u", 1683 pf_dev->pci_dev->device.name, i); 1684 1685 id = nfp_function_id_get(pf_dev, i); 1686 hw_init.idx = id; 1687 hw_init.nfp_idx = nfp_eth_table->ports[id].index; 1688 ret = rte_eth_dev_create(&pf_dev->pci_dev->device, port_name, 1689 sizeof(struct nfp_net_hw), NULL, NULL, 1690 nfp_net_init, &hw_init); 1691 if (ret != 0) 1692 goto port_cleanup; 1693 1694 } /* End loop, all ports on this PF */ 1695 1696 return 0; 1697 1698 port_cleanup: 1699 for (i = 0; i < pf_dev->total_phyports; i++) { 1700 struct rte_eth_dev *eth_dev; 1701 1702 if (pf_dev->multi_pf.enabled) 1703 snprintf(port_name, sizeof(port_name), "%s", 1704 pf_dev->pci_dev->device.name); 1705 else 1706 snprintf(port_name, sizeof(port_name), "%s_port%u", 1707 pf_dev->pci_dev->device.name, i); 1708 eth_dev = rte_eth_dev_get_by_name(port_name); 1709 if (eth_dev != NULL) 1710 rte_eth_dev_destroy(eth_dev, nfp_net_uninit); 1711 } 1712 nfp_cpp_area_release_free(pf_dev->ctrl_area); 1713 app_cleanup: 1714 rte_free(app_fw_nic); 1715 1716 return ret; 1717 } 1718 1719 static int 1720 nfp_net_hwinfo_set(uint8_t function_id, 1721 struct nfp_rtsym_table *sym_tbl, 1722 struct nfp_cpp *cpp, 1723 enum nfp_app_fw_id app_fw_id) 1724 { 1725 int ret = 0; 1726 uint64_t app_cap; 1727 struct nfp_nsp *nsp; 1728 uint8_t sp_indiff = 1; 1729 char hw_info[RTE_ETH_NAME_MAX_LEN]; 1730 char app_cap_name[RTE_ETH_NAME_MAX_LEN]; 1731 1732 if (app_fw_id != NFP_APP_FW_FLOWER_NIC) { 1733 /* Read the app capabilities of the firmware loaded */ 1734 snprintf(app_cap_name, sizeof(app_cap_name), "_pf%u_net_app_cap", function_id); 1735 app_cap = nfp_rtsym_read_le(sym_tbl, app_cap_name, &ret); 1736 if (ret != 0) { 1737 PMD_INIT_LOG(ERR, "Could not read app_fw_cap from firmware."); 1738 return ret; 1739 } 1740 1741 /* Calculate the value of sp_indiff and write to hw_info */ 1742 sp_indiff = app_cap & NFP_NET_APP_CAP_SP_INDIFF; 1743 } 1744 1745 snprintf(hw_info, sizeof(hw_info), "sp_indiff=%u", sp_indiff); 1746 1747 nsp = nfp_nsp_open(cpp); 1748 if (nsp == NULL) { 1749 PMD_INIT_LOG(ERR, "Could not get NSP."); 1750 return -EIO; 1751 } 1752 1753 ret = nfp_nsp_hwinfo_set(nsp, hw_info, sizeof(hw_info)); 1754 nfp_nsp_close(nsp); 1755 if (ret != 0) { 1756 PMD_INIT_LOG(ERR, "Failed to set parameter to hwinfo."); 1757 return ret; 1758 } 1759 1760 return 0; 1761 } 1762 1763 const uint32_t nfp_eth_media_table[NFP_MEDIA_LINK_MODES_NUMBER] = { 1764 [NFP_MEDIA_W0_RJ45_10M] = RTE_ETH_LINK_SPEED_10M, 1765 [NFP_MEDIA_W0_RJ45_10M_HD] = RTE_ETH_LINK_SPEED_10M_HD, 1766 [NFP_MEDIA_W0_RJ45_100M] = RTE_ETH_LINK_SPEED_100M, 1767 [NFP_MEDIA_W0_RJ45_100M_HD] = RTE_ETH_LINK_SPEED_100M_HD, 1768 [NFP_MEDIA_W0_RJ45_1G] = RTE_ETH_LINK_SPEED_1G, 1769 [NFP_MEDIA_W0_RJ45_2P5G] = RTE_ETH_LINK_SPEED_2_5G, 1770 [NFP_MEDIA_W0_RJ45_5G] = RTE_ETH_LINK_SPEED_5G, 1771 [NFP_MEDIA_W0_RJ45_10G] = RTE_ETH_LINK_SPEED_10G, 1772 [NFP_MEDIA_1000BASE_CX] = RTE_ETH_LINK_SPEED_1G, 1773 [NFP_MEDIA_1000BASE_KX] = RTE_ETH_LINK_SPEED_1G, 1774 [NFP_MEDIA_10GBASE_KX4] = RTE_ETH_LINK_SPEED_10G, 1775 [NFP_MEDIA_10GBASE_KR] = RTE_ETH_LINK_SPEED_10G, 1776 [NFP_MEDIA_10GBASE_CX4] = RTE_ETH_LINK_SPEED_10G, 1777 [NFP_MEDIA_10GBASE_CR] = RTE_ETH_LINK_SPEED_10G, 1778 [NFP_MEDIA_10GBASE_SR] = RTE_ETH_LINK_SPEED_10G, 1779 [NFP_MEDIA_10GBASE_ER] = RTE_ETH_LINK_SPEED_10G, 1780 [NFP_MEDIA_25GBASE_KR] = RTE_ETH_LINK_SPEED_25G, 1781 [NFP_MEDIA_25GBASE_KR_S] = RTE_ETH_LINK_SPEED_25G, 1782 [NFP_MEDIA_25GBASE_CR] = RTE_ETH_LINK_SPEED_25G, 1783 [NFP_MEDIA_25GBASE_CR_S] = RTE_ETH_LINK_SPEED_25G, 1784 [NFP_MEDIA_25GBASE_SR] = RTE_ETH_LINK_SPEED_25G, 1785 [NFP_MEDIA_40GBASE_CR4] = RTE_ETH_LINK_SPEED_40G, 1786 [NFP_MEDIA_40GBASE_KR4] = RTE_ETH_LINK_SPEED_40G, 1787 [NFP_MEDIA_40GBASE_SR4] = RTE_ETH_LINK_SPEED_40G, 1788 [NFP_MEDIA_40GBASE_LR4] = RTE_ETH_LINK_SPEED_40G, 1789 [NFP_MEDIA_50GBASE_KR] = RTE_ETH_LINK_SPEED_50G, 1790 [NFP_MEDIA_50GBASE_SR] = RTE_ETH_LINK_SPEED_50G, 1791 [NFP_MEDIA_50GBASE_CR] = RTE_ETH_LINK_SPEED_50G, 1792 [NFP_MEDIA_50GBASE_LR] = RTE_ETH_LINK_SPEED_50G, 1793 [NFP_MEDIA_50GBASE_ER] = RTE_ETH_LINK_SPEED_50G, 1794 [NFP_MEDIA_50GBASE_FR] = RTE_ETH_LINK_SPEED_50G, 1795 [NFP_MEDIA_100GBASE_KR4] = RTE_ETH_LINK_SPEED_100G, 1796 [NFP_MEDIA_100GBASE_SR4] = RTE_ETH_LINK_SPEED_100G, 1797 [NFP_MEDIA_100GBASE_CR4] = RTE_ETH_LINK_SPEED_100G, 1798 [NFP_MEDIA_100GBASE_KP4] = RTE_ETH_LINK_SPEED_100G, 1799 [NFP_MEDIA_100GBASE_CR10] = RTE_ETH_LINK_SPEED_100G, 1800 [NFP_MEDIA_10GBASE_LR] = RTE_ETH_LINK_SPEED_10G, 1801 [NFP_MEDIA_25GBASE_LR] = RTE_ETH_LINK_SPEED_25G, 1802 [NFP_MEDIA_25GBASE_ER] = RTE_ETH_LINK_SPEED_25G 1803 }; 1804 1805 static int 1806 nfp_net_speed_capa_get_real(struct nfp_eth_media_buf *media_buf, 1807 struct nfp_pf_dev *pf_dev) 1808 { 1809 uint32_t i; 1810 uint32_t j; 1811 uint32_t offset; 1812 uint32_t speed_capa = 0; 1813 uint64_t supported_modes; 1814 1815 for (i = 0; i < RTE_DIM(media_buf->supported_modes); i++) { 1816 supported_modes = media_buf->supported_modes[i]; 1817 offset = i * UINT64_BIT; 1818 for (j = 0; j < UINT64_BIT; j++) { 1819 if (supported_modes == 0) 1820 break; 1821 1822 if ((supported_modes & 1) != 0) { 1823 if ((j + offset) >= NFP_MEDIA_LINK_MODES_NUMBER) { 1824 PMD_DRV_LOG(ERR, "Invalid offset of media table."); 1825 return -EINVAL; 1826 } 1827 1828 speed_capa |= nfp_eth_media_table[j + offset]; 1829 } 1830 1831 supported_modes = supported_modes >> 1; 1832 } 1833 } 1834 1835 pf_dev->speed_capa = speed_capa; 1836 1837 return pf_dev->speed_capa == 0 ? -EINVAL : 0; 1838 } 1839 1840 static int 1841 nfp_net_speed_cap_get_one(struct nfp_pf_dev *pf_dev, 1842 uint32_t port_id) 1843 { 1844 int ret; 1845 struct nfp_nsp *nsp; 1846 struct nfp_eth_media_buf media_buf; 1847 1848 media_buf.eth_index = pf_dev->nfp_eth_table->ports[port_id].eth_index; 1849 pf_dev->speed_capa = 0; 1850 1851 nsp = nfp_nsp_open(pf_dev->cpp); 1852 if (nsp == NULL) { 1853 PMD_DRV_LOG(ERR, "Couldn't get NSP."); 1854 return -EIO; 1855 } 1856 1857 ret = nfp_nsp_read_media(nsp, &media_buf, sizeof(media_buf)); 1858 nfp_nsp_close(nsp); 1859 if (ret != 0) { 1860 PMD_DRV_LOG(ERR, "Failed to read media."); 1861 return ret; 1862 } 1863 1864 ret = nfp_net_speed_capa_get_real(&media_buf, pf_dev); 1865 if (ret < 0) { 1866 PMD_DRV_LOG(ERR, "Speed capability is invalid."); 1867 return ret; 1868 } 1869 1870 return 0; 1871 } 1872 1873 static int 1874 nfp_net_speed_cap_get(struct nfp_pf_dev *pf_dev) 1875 { 1876 int ret; 1877 uint32_t i; 1878 uint32_t id; 1879 uint32_t count; 1880 1881 count = nfp_net_get_port_num(pf_dev, pf_dev->nfp_eth_table); 1882 for (i = 0; i < count; i++) { 1883 id = nfp_function_id_get(pf_dev, i); 1884 ret = nfp_net_speed_cap_get_one(pf_dev, id); 1885 if (ret != 0) { 1886 PMD_INIT_LOG(ERR, "Failed to get port %d speed capability.", id); 1887 return ret; 1888 } 1889 } 1890 1891 return 0; 1892 } 1893 1894 /* Force the physical port down to clear the possible DMA error */ 1895 static int 1896 nfp_net_force_port_down(struct nfp_pf_dev *pf_dev, 1897 struct nfp_eth_table *nfp_eth_table, 1898 struct nfp_cpp *cpp) 1899 { 1900 int ret; 1901 uint32_t i; 1902 uint32_t id; 1903 uint32_t index; 1904 uint32_t count; 1905 1906 count = nfp_net_get_port_num(pf_dev, nfp_eth_table); 1907 for (i = 0; i < count; i++) { 1908 id = nfp_function_id_get(pf_dev, i); 1909 index = nfp_eth_table->ports[id].index; 1910 ret = nfp_eth_set_configured(cpp, index, 0); 1911 if (ret < 0) 1912 return ret; 1913 } 1914 1915 return 0; 1916 } 1917 1918 static int 1919 nfp_fw_app_primary_init(struct nfp_net_hw_priv *hw_priv) 1920 { 1921 int ret; 1922 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 1923 1924 switch (pf_dev->app_fw_id) { 1925 case NFP_APP_FW_CORE_NIC: 1926 PMD_INIT_LOG(INFO, "Initializing coreNIC"); 1927 ret = nfp_init_app_fw_nic(hw_priv); 1928 if (ret != 0) { 1929 PMD_INIT_LOG(ERR, "Could not initialize coreNIC!"); 1930 return ret; 1931 } 1932 break; 1933 case NFP_APP_FW_FLOWER_NIC: 1934 PMD_INIT_LOG(INFO, "Initializing Flower"); 1935 ret = nfp_init_app_fw_flower(hw_priv); 1936 if (ret != 0) { 1937 PMD_INIT_LOG(ERR, "Could not initialize Flower!"); 1938 return ret; 1939 } 1940 break; 1941 default: 1942 PMD_INIT_LOG(ERR, "Unsupported Firmware loaded"); 1943 ret = -EINVAL; 1944 return ret; 1945 } 1946 1947 return 0; 1948 } 1949 1950 static int 1951 nfp_pf_get_max_vf(struct nfp_pf_dev *pf_dev) 1952 { 1953 int ret; 1954 uint32_t max_vfs; 1955 1956 max_vfs = nfp_rtsym_read_le(pf_dev->sym_tbl, "nfd_vf_cfg_max_vfs", &ret); 1957 if (ret != 0) 1958 return ret; 1959 1960 pf_dev->max_vfs = max_vfs; 1961 1962 return 0; 1963 } 1964 1965 static int 1966 nfp_pf_get_sriov_vf(struct nfp_pf_dev *pf_dev, 1967 const struct nfp_dev_info *dev_info) 1968 { 1969 int ret; 1970 off_t pos; 1971 uint16_t offset; 1972 uint16_t sriov_vf; 1973 1974 /* For 3800 single-PF and 4000 card */ 1975 if (!pf_dev->multi_pf.enabled) { 1976 pf_dev->sriov_vf = pf_dev->max_vfs; 1977 return 0; 1978 } 1979 1980 pos = rte_pci_find_ext_capability(pf_dev->pci_dev, RTE_PCI_EXT_CAP_ID_SRIOV); 1981 if (pos == 0) { 1982 PMD_INIT_LOG(ERR, "Can not get the pci sriov cap"); 1983 return -EIO; 1984 } 1985 1986 /* 1987 * Management firmware ensures that sriov capability registers 1988 * are initialized correctly. 1989 */ 1990 ret = rte_pci_read_config(pf_dev->pci_dev, &sriov_vf, sizeof(sriov_vf), 1991 pos + RTE_PCI_SRIOV_TOTAL_VF); 1992 if (ret < 0) { 1993 PMD_INIT_LOG(ERR, "Can not read the sriov toatl VF"); 1994 return -EIO; 1995 } 1996 1997 /* Offset of first VF is relative to its PF. */ 1998 ret = rte_pci_read_config(pf_dev->pci_dev, &offset, sizeof(offset), 1999 pos + RTE_PCI_SRIOV_VF_OFFSET); 2000 if (ret < 0) { 2001 PMD_INIT_LOG(ERR, "Can not get the VF offset"); 2002 return -EIO; 2003 } 2004 2005 offset += pf_dev->multi_pf.function_id; 2006 if (offset < dev_info->pf_num_per_unit) 2007 return -ERANGE; 2008 2009 offset -= dev_info->pf_num_per_unit; 2010 if (offset >= pf_dev->max_vfs || offset + sriov_vf > pf_dev->max_vfs) { 2011 PMD_INIT_LOG(ERR, "The pci allocate VF is more than the MAX VF"); 2012 return -ERANGE; 2013 } 2014 2015 pf_dev->vf_base_id = offset; 2016 pf_dev->sriov_vf = sriov_vf; 2017 2018 return 0; 2019 } 2020 2021 static int 2022 nfp_net_get_vf_info(struct nfp_pf_dev *pf_dev, 2023 const struct nfp_dev_info *dev_info) 2024 { 2025 int ret; 2026 2027 ret = nfp_pf_get_max_vf(pf_dev); 2028 if (ret != 0) { 2029 if (ret != -ENOENT) { 2030 PMD_INIT_LOG(ERR, "Read max VFs failed"); 2031 return ret; 2032 } 2033 2034 PMD_INIT_LOG(WARNING, "The firmware can not support read max VFs"); 2035 return 0; 2036 } 2037 2038 if (pf_dev->max_vfs == 0) 2039 return 0; 2040 2041 ret = nfp_pf_get_sriov_vf(pf_dev, dev_info); 2042 if (ret < 0) 2043 return ret; 2044 2045 pf_dev->queue_per_vf = NFP_QUEUE_PER_VF; 2046 2047 return 0; 2048 } 2049 2050 static int 2051 nfp_net_vf_config_init(struct nfp_pf_dev *pf_dev) 2052 { 2053 int ret = 0; 2054 uint32_t min_size; 2055 char vf_bar_name[RTE_ETH_NAME_MAX_LEN]; 2056 char vf_cfg_name[RTE_ETH_NAME_MAX_LEN]; 2057 2058 if (pf_dev->sriov_vf == 0) 2059 return 0; 2060 2061 min_size = NFP_NET_CFG_BAR_SZ * pf_dev->sriov_vf; 2062 snprintf(vf_bar_name, sizeof(vf_bar_name), "_pf%d_net_vf_bar", 2063 pf_dev->multi_pf.function_id); 2064 pf_dev->vf_bar = nfp_rtsym_map_offset(pf_dev->sym_tbl, vf_bar_name, 2065 NFP_NET_CFG_BAR_SZ * pf_dev->vf_base_id, 2066 min_size, &pf_dev->vf_area); 2067 if (pf_dev->vf_bar == NULL) { 2068 PMD_INIT_LOG(ERR, "Failed to get vf cfg."); 2069 return -EIO; 2070 } 2071 2072 min_size = NFP_NET_VF_CFG_SZ * pf_dev->sriov_vf + NFP_NET_VF_CFG_MB_SZ; 2073 snprintf(vf_cfg_name, sizeof(vf_cfg_name), "_pf%d_net_vf_cfg2", 2074 pf_dev->multi_pf.function_id); 2075 pf_dev->vf_cfg_tbl_bar = nfp_rtsym_map(pf_dev->sym_tbl, vf_cfg_name, 2076 min_size, &pf_dev->vf_cfg_tbl_area); 2077 if (pf_dev->vf_cfg_tbl_bar == NULL) { 2078 PMD_INIT_LOG(ERR, "Failed to get vf configure table."); 2079 ret = -EIO; 2080 goto vf_bar_cleanup; 2081 } 2082 2083 return 0; 2084 2085 vf_bar_cleanup: 2086 nfp_cpp_area_release_free(pf_dev->vf_area); 2087 2088 return ret; 2089 } 2090 2091 static int 2092 nfp_pf_init(struct rte_pci_device *pci_dev) 2093 { 2094 void *sync; 2095 int ret = 0; 2096 uint64_t addr; 2097 uint32_t cpp_id; 2098 uint8_t function_id; 2099 struct nfp_cpp *cpp; 2100 struct nfp_pf_dev *pf_dev; 2101 struct nfp_hwinfo *hwinfo; 2102 enum nfp_app_fw_id app_fw_id; 2103 char name[RTE_ETH_NAME_MAX_LEN]; 2104 struct nfp_rtsym_table *sym_tbl; 2105 struct nfp_net_hw_priv *hw_priv; 2106 char app_name[RTE_ETH_NAME_MAX_LEN]; 2107 struct nfp_eth_table *nfp_eth_table; 2108 const struct nfp_dev_info *dev_info; 2109 2110 if (pci_dev == NULL) 2111 return -ENODEV; 2112 2113 if (pci_dev->mem_resource[0].addr == NULL) { 2114 PMD_INIT_LOG(ERR, "The address of BAR0 is NULL."); 2115 return -ENODEV; 2116 } 2117 2118 dev_info = nfp_dev_info_get(pci_dev->id.device_id); 2119 if (dev_info == NULL) { 2120 PMD_INIT_LOG(ERR, "Not supported device ID"); 2121 return -ENODEV; 2122 } 2123 2124 hw_priv = rte_zmalloc(NULL, sizeof(*hw_priv), 0); 2125 if (hw_priv == NULL) { 2126 PMD_INIT_LOG(ERR, "Can not alloc memory for hw priv data"); 2127 return -ENOMEM; 2128 } 2129 2130 /* Allocate memory for the PF "device" */ 2131 function_id = (pci_dev->addr.function) & 0x07; 2132 snprintf(name, sizeof(name), "nfp_pf%u", function_id); 2133 pf_dev = rte_zmalloc(name, sizeof(*pf_dev), 0); 2134 if (pf_dev == NULL) { 2135 PMD_INIT_LOG(ERR, "Can't allocate memory for the PF device"); 2136 ret = -ENOMEM; 2137 goto hw_priv_free; 2138 } 2139 2140 sync = nfp_sync_alloc(); 2141 if (sync == NULL) { 2142 PMD_INIT_LOG(ERR, "Failed to alloc sync zone."); 2143 ret = -ENOMEM; 2144 goto pf_cleanup; 2145 } 2146 2147 /* 2148 * When device bound to UIO, the device could be used, by mistake, 2149 * by two DPDK apps, and the UIO driver does not avoid it. This 2150 * could lead to a serious problem when configuring the NFP CPP 2151 * interface. Here we avoid this telling to the CPP init code to 2152 * use a lock file if UIO is being used. 2153 */ 2154 if (pci_dev->kdrv == RTE_PCI_KDRV_VFIO) 2155 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, false); 2156 else 2157 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, true); 2158 2159 if (cpp == NULL) { 2160 PMD_INIT_LOG(ERR, "A CPP handle can not be obtained"); 2161 ret = -EIO; 2162 goto sync_free; 2163 } 2164 2165 hwinfo = nfp_hwinfo_read(cpp); 2166 if (hwinfo == NULL) { 2167 PMD_INIT_LOG(ERR, "Error reading hwinfo table"); 2168 ret = -EIO; 2169 goto cpp_cleanup; 2170 } 2171 2172 /* Read the number of physical ports from hardware */ 2173 nfp_eth_table = nfp_eth_read_ports(cpp); 2174 if (nfp_eth_table == NULL) { 2175 PMD_INIT_LOG(ERR, "Error reading NFP ethernet table"); 2176 ret = -EIO; 2177 goto hwinfo_cleanup; 2178 } 2179 2180 if (nfp_eth_table->count == 0 || nfp_eth_table->count > 8) { 2181 PMD_INIT_LOG(ERR, "NFP ethernet table reports wrong ports: %u", 2182 nfp_eth_table->count); 2183 ret = -EIO; 2184 goto eth_table_cleanup; 2185 } 2186 2187 pf_dev->multi_pf.enabled = nfp_check_multi_pf_from_nsp(pci_dev, cpp); 2188 pf_dev->multi_pf.function_id = function_id; 2189 2190 ret = nfp_net_force_port_down(pf_dev, nfp_eth_table, cpp); 2191 if (ret != 0) { 2192 PMD_INIT_LOG(ERR, "Failed to force port down"); 2193 ret = -EIO; 2194 goto eth_table_cleanup; 2195 } 2196 2197 ret = nfp_devargs_parse(&pf_dev->devargs, pci_dev->device.devargs); 2198 if (ret != 0) { 2199 PMD_INIT_LOG(ERR, "Error when parsing device args"); 2200 ret = -EINVAL; 2201 goto eth_table_cleanup; 2202 } 2203 2204 ret = nfp_net_device_activate(cpp, &pf_dev->multi_pf); 2205 if (ret != 0) { 2206 PMD_INIT_LOG(ERR, "Failed to activate the NFP device"); 2207 ret = -EIO; 2208 goto eth_table_cleanup; 2209 } 2210 2211 if (nfp_fw_setup(pci_dev, cpp, nfp_eth_table, hwinfo, 2212 dev_info, &pf_dev->multi_pf, pf_dev->devargs.force_reload_fw) != 0) { 2213 PMD_INIT_LOG(ERR, "Error when uploading firmware"); 2214 ret = -EIO; 2215 goto eth_table_cleanup; 2216 } 2217 2218 /* Now the symbol table should be there */ 2219 sym_tbl = nfp_rtsym_table_read(cpp); 2220 if (sym_tbl == NULL) { 2221 PMD_INIT_LOG(ERR, "Something is wrong with the firmware symbol table"); 2222 ret = -EIO; 2223 goto fw_cleanup; 2224 } 2225 2226 /* Read the app ID of the firmware loaded */ 2227 snprintf(app_name, sizeof(app_name), "_pf%u_net_app_id", function_id); 2228 app_fw_id = nfp_rtsym_read_le(sym_tbl, app_name, &ret); 2229 if (ret != 0) { 2230 PMD_INIT_LOG(ERR, "Couldn't read %s from firmware", app_name); 2231 ret = -EIO; 2232 goto sym_tbl_cleanup; 2233 } 2234 2235 /* Write sp_indiff to hw_info */ 2236 ret = nfp_net_hwinfo_set(function_id, sym_tbl, cpp, app_fw_id); 2237 if (ret != 0) { 2238 PMD_INIT_LOG(ERR, "Failed to set hwinfo."); 2239 ret = -EIO; 2240 goto sym_tbl_cleanup; 2241 } 2242 2243 /* Populate the newly created PF device */ 2244 pf_dev->app_fw_id = app_fw_id; 2245 pf_dev->cpp = cpp; 2246 pf_dev->hwinfo = hwinfo; 2247 pf_dev->sym_tbl = sym_tbl; 2248 pf_dev->pci_dev = pci_dev; 2249 pf_dev->nfp_eth_table = nfp_eth_table; 2250 pf_dev->sync = sync; 2251 pf_dev->total_phyports = nfp_net_get_port_num(pf_dev, nfp_eth_table); 2252 pf_dev->speed_updated = false; 2253 2254 ret = nfp_net_speed_cap_get(pf_dev); 2255 if (ret != 0) { 2256 PMD_INIT_LOG(ERR, "Failed to get speed capability."); 2257 ret = -EIO; 2258 goto sym_tbl_cleanup; 2259 } 2260 2261 /* Get the VF info */ 2262 ret = nfp_net_get_vf_info(pf_dev, dev_info); 2263 if (ret != 0) { 2264 PMD_INIT_LOG(ERR, "Failed to get VF info."); 2265 ret = -EIO; 2266 goto sym_tbl_cleanup; 2267 } 2268 2269 /* Configure access to tx/rx vNIC BARs */ 2270 addr = nfp_qcp_queue_offset(dev_info, 0); 2271 cpp_id = NFP_CPP_ISLAND_ID(0, NFP_CPP_ACTION_RW, 0, 0); 2272 2273 pf_dev->qc_bar = nfp_cpp_map_area(pf_dev->cpp, cpp_id, 2274 addr, dev_info->qc_area_sz, &pf_dev->qc_area); 2275 if (pf_dev->qc_bar == NULL) { 2276 PMD_INIT_LOG(ERR, "nfp_rtsym_map fails for net.qc"); 2277 ret = -EIO; 2278 goto sym_tbl_cleanup; 2279 } 2280 2281 PMD_INIT_LOG(DEBUG, "qc_bar address: %p", pf_dev->qc_bar); 2282 2283 pf_dev->mac_stats_bar = nfp_rtsym_map(sym_tbl, "_mac_stats", 2284 NFP_MAC_STATS_SIZE * nfp_eth_table->max_index, 2285 &pf_dev->mac_stats_area); 2286 if (pf_dev->mac_stats_bar == NULL) { 2287 PMD_INIT_LOG(ERR, "nfp_rtsym_map fails for _mac_stats"); 2288 goto hwqueues_cleanup; 2289 } 2290 2291 ret = nfp_net_vf_config_init(pf_dev); 2292 if (ret != 0) { 2293 PMD_INIT_LOG(ERR, "Failed to init VF config."); 2294 goto mac_stats_cleanup; 2295 } 2296 2297 ret = nfp_enable_multi_pf(pf_dev); 2298 if (ret != 0) 2299 goto vf_cfg_tbl_cleanup; 2300 2301 hw_priv->pf_dev = pf_dev; 2302 hw_priv->dev_info = dev_info; 2303 2304 /* 2305 * PF initialization has been done at this point. Call app specific 2306 * init code now. 2307 */ 2308 ret = nfp_fw_app_primary_init(hw_priv); 2309 if (ret != 0) { 2310 PMD_INIT_LOG(ERR, "Failed to init hw app primary."); 2311 goto vf_cfg_tbl_cleanup; 2312 } 2313 2314 /* Register the CPP bridge service here for primary use */ 2315 if (pf_dev->devargs.cpp_service_enable) { 2316 ret = nfp_enable_cpp_service(pf_dev); 2317 if (ret != 0) { 2318 PMD_INIT_LOG(ERR, "Enable CPP service failed."); 2319 goto vf_cfg_tbl_cleanup; 2320 } 2321 } 2322 2323 return 0; 2324 2325 vf_cfg_tbl_cleanup: 2326 nfp_net_vf_config_uninit(pf_dev); 2327 mac_stats_cleanup: 2328 nfp_cpp_area_release_free(pf_dev->mac_stats_area); 2329 hwqueues_cleanup: 2330 nfp_cpp_area_release_free(pf_dev->qc_area); 2331 sym_tbl_cleanup: 2332 free(sym_tbl); 2333 fw_cleanup: 2334 nfp_fw_unload(cpp); 2335 if (pf_dev->multi_pf.enabled) { 2336 nfp_net_keepalive_stop(&pf_dev->multi_pf); 2337 nfp_net_keepalive_clear(pf_dev->multi_pf.beat_addr, pf_dev->multi_pf.function_id); 2338 nfp_net_keepalive_uninit(&pf_dev->multi_pf); 2339 } 2340 eth_table_cleanup: 2341 free(nfp_eth_table); 2342 hwinfo_cleanup: 2343 free(hwinfo); 2344 cpp_cleanup: 2345 nfp_cpp_free(cpp); 2346 sync_free: 2347 nfp_sync_free(sync); 2348 pf_cleanup: 2349 rte_free(pf_dev); 2350 hw_priv_free: 2351 rte_free(hw_priv); 2352 2353 return ret; 2354 } 2355 2356 static int 2357 nfp_secondary_net_init(struct rte_eth_dev *eth_dev, 2358 void *para) 2359 { 2360 struct nfp_net_hw *net_hw; 2361 2362 net_hw = eth_dev->data->dev_private; 2363 nfp_net_ethdev_ops_mount(net_hw, eth_dev); 2364 2365 eth_dev->process_private = para; 2366 2367 return 0; 2368 } 2369 2370 static int 2371 nfp_secondary_init_app_fw_nic(struct nfp_net_hw_priv *hw_priv) 2372 { 2373 uint32_t i; 2374 int err = 0; 2375 int ret = 0; 2376 uint8_t function_id; 2377 uint32_t total_vnics; 2378 char pf_name[RTE_ETH_NAME_MAX_LEN]; 2379 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 2380 2381 /* Read the number of vNIC's created for the PF */ 2382 function_id = (pf_dev->pci_dev->addr.function) & 0x07; 2383 snprintf(pf_name, sizeof(pf_name), "nfd_cfg_pf%u_num_ports", function_id); 2384 total_vnics = nfp_rtsym_read_le(pf_dev->sym_tbl, pf_name, &err); 2385 if (err != 0 || total_vnics == 0 || total_vnics > 8) { 2386 PMD_INIT_LOG(ERR, "%s symbol with wrong value", pf_name); 2387 return -ENODEV; 2388 } 2389 2390 for (i = 0; i < total_vnics; i++) { 2391 char port_name[RTE_ETH_NAME_MAX_LEN]; 2392 2393 if (nfp_check_multi_pf_from_fw(total_vnics)) 2394 snprintf(port_name, sizeof(port_name), "%s", 2395 pf_dev->pci_dev->device.name); 2396 else 2397 snprintf(port_name, sizeof(port_name), "%s_port%u", 2398 pf_dev->pci_dev->device.name, i); 2399 2400 PMD_INIT_LOG(DEBUG, "Secondary attaching to port %s", port_name); 2401 ret = rte_eth_dev_create(&pf_dev->pci_dev->device, port_name, 0, 2402 NULL, NULL, nfp_secondary_net_init, hw_priv); 2403 if (ret != 0) { 2404 PMD_INIT_LOG(ERR, "Secondary process attach to port %s failed", port_name); 2405 ret = -ENODEV; 2406 break; 2407 } 2408 } 2409 2410 return ret; 2411 } 2412 2413 static int 2414 nfp_fw_app_secondary_init(struct nfp_net_hw_priv *hw_priv) 2415 { 2416 int ret; 2417 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 2418 2419 switch (pf_dev->app_fw_id) { 2420 case NFP_APP_FW_CORE_NIC: 2421 PMD_INIT_LOG(INFO, "Initializing coreNIC"); 2422 ret = nfp_secondary_init_app_fw_nic(hw_priv); 2423 if (ret != 0) { 2424 PMD_INIT_LOG(ERR, "Could not initialize coreNIC!"); 2425 return ret; 2426 } 2427 break; 2428 case NFP_APP_FW_FLOWER_NIC: 2429 PMD_INIT_LOG(INFO, "Initializing Flower"); 2430 ret = nfp_secondary_init_app_fw_flower(hw_priv); 2431 if (ret != 0) { 2432 PMD_INIT_LOG(ERR, "Could not initialize Flower!"); 2433 return ret; 2434 } 2435 break; 2436 default: 2437 PMD_INIT_LOG(ERR, "Unsupported Firmware loaded"); 2438 ret = -EINVAL; 2439 return ret; 2440 } 2441 2442 return 0; 2443 } 2444 2445 /* 2446 * When attaching to the NFP4000/6000 PF on a secondary process there 2447 * is no need to initialise the PF again. Only minimal work is required 2448 * here. 2449 */ 2450 static int 2451 nfp_pf_secondary_init(struct rte_pci_device *pci_dev) 2452 { 2453 void *sync; 2454 int ret = 0; 2455 struct nfp_cpp *cpp; 2456 uint8_t function_id; 2457 struct nfp_pf_dev *pf_dev; 2458 enum nfp_app_fw_id app_fw_id; 2459 char name[RTE_ETH_NAME_MAX_LEN]; 2460 struct nfp_rtsym_table *sym_tbl; 2461 struct nfp_net_hw_priv *hw_priv; 2462 const struct nfp_dev_info *dev_info; 2463 char app_name[RTE_ETH_NAME_MAX_LEN]; 2464 2465 if (pci_dev == NULL) 2466 return -ENODEV; 2467 2468 if (pci_dev->mem_resource[0].addr == NULL) { 2469 PMD_INIT_LOG(ERR, "The address of BAR0 is NULL."); 2470 return -ENODEV; 2471 } 2472 2473 dev_info = nfp_dev_info_get(pci_dev->id.device_id); 2474 if (dev_info == NULL) { 2475 PMD_INIT_LOG(ERR, "Not supported device ID"); 2476 return -ENODEV; 2477 } 2478 2479 hw_priv = rte_zmalloc(NULL, sizeof(*hw_priv), 0); 2480 if (hw_priv == NULL) { 2481 PMD_INIT_LOG(ERR, "Can not alloc memory for hw priv data"); 2482 return -ENOMEM; 2483 } 2484 2485 /* Allocate memory for the PF "device" */ 2486 snprintf(name, sizeof(name), "nfp_pf%d", 0); 2487 pf_dev = rte_zmalloc(name, sizeof(*pf_dev), 0); 2488 if (pf_dev == NULL) { 2489 PMD_INIT_LOG(ERR, "Can't allocate memory for the PF device"); 2490 ret = -ENOMEM; 2491 goto hw_priv_free; 2492 } 2493 2494 sync = nfp_sync_alloc(); 2495 if (sync == NULL) { 2496 PMD_INIT_LOG(ERR, "Failed to alloc sync zone."); 2497 ret = -ENOMEM; 2498 goto pf_cleanup; 2499 } 2500 2501 /* 2502 * When device bound to UIO, the device could be used, by mistake, 2503 * by two DPDK apps, and the UIO driver does not avoid it. This 2504 * could lead to a serious problem when configuring the NFP CPP 2505 * interface. Here we avoid this telling to the CPP init code to 2506 * use a lock file if UIO is being used. 2507 */ 2508 if (pci_dev->kdrv == RTE_PCI_KDRV_VFIO) 2509 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, false); 2510 else 2511 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, true); 2512 2513 if (cpp == NULL) { 2514 PMD_INIT_LOG(ERR, "A CPP handle can not be obtained"); 2515 ret = -EIO; 2516 goto sync_free; 2517 } 2518 2519 /* 2520 * We don't have access to the PF created in the primary process 2521 * here so we have to read the number of ports from firmware. 2522 */ 2523 sym_tbl = nfp_rtsym_table_read(cpp); 2524 if (sym_tbl == NULL) { 2525 PMD_INIT_LOG(ERR, "Something is wrong with the firmware symbol table"); 2526 ret = -EIO; 2527 goto cpp_cleanup; 2528 } 2529 2530 /* Read the app ID of the firmware loaded */ 2531 function_id = pci_dev->addr.function & 0x7; 2532 snprintf(app_name, sizeof(app_name), "_pf%u_net_app_id", function_id); 2533 app_fw_id = nfp_rtsym_read_le(sym_tbl, app_name, &ret); 2534 if (ret != 0) { 2535 PMD_INIT_LOG(ERR, "Couldn't read %s from fw", app_name); 2536 ret = -EIO; 2537 goto sym_tbl_cleanup; 2538 } 2539 2540 /* Populate the newly created PF device */ 2541 pf_dev->app_fw_id = app_fw_id; 2542 pf_dev->cpp = cpp; 2543 pf_dev->sym_tbl = sym_tbl; 2544 pf_dev->pci_dev = pci_dev; 2545 pf_dev->sync = sync; 2546 2547 hw_priv->pf_dev = pf_dev; 2548 hw_priv->dev_info = dev_info; 2549 2550 /* Call app specific init code now */ 2551 ret = nfp_fw_app_secondary_init(hw_priv); 2552 if (ret != 0) { 2553 PMD_INIT_LOG(ERR, "Failed to init hw app primary."); 2554 goto sym_tbl_cleanup; 2555 } 2556 2557 return 0; 2558 2559 sym_tbl_cleanup: 2560 free(sym_tbl); 2561 cpp_cleanup: 2562 nfp_cpp_free(cpp); 2563 sync_free: 2564 nfp_sync_free(sync); 2565 pf_cleanup: 2566 rte_free(pf_dev); 2567 hw_priv_free: 2568 rte_free(hw_priv); 2569 2570 return ret; 2571 } 2572 2573 static int 2574 nfp_pf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2575 struct rte_pci_device *dev) 2576 { 2577 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2578 return nfp_pf_init(dev); 2579 else 2580 return nfp_pf_secondary_init(dev); 2581 } 2582 2583 static const struct rte_pci_id pci_id_nfp_pf_net_map[] = { 2584 { 2585 RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, 2586 PCI_DEVICE_ID_NFP3800_PF_NIC) 2587 }, 2588 { 2589 RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, 2590 PCI_DEVICE_ID_NFP4000_PF_NIC) 2591 }, 2592 { 2593 RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, 2594 PCI_DEVICE_ID_NFP6000_PF_NIC) 2595 }, 2596 { 2597 RTE_PCI_DEVICE(PCI_VENDOR_ID_CORIGINE, 2598 PCI_DEVICE_ID_NFP3800_PF_NIC) 2599 }, 2600 { 2601 RTE_PCI_DEVICE(PCI_VENDOR_ID_CORIGINE, 2602 PCI_DEVICE_ID_NFP4000_PF_NIC) 2603 }, 2604 { 2605 RTE_PCI_DEVICE(PCI_VENDOR_ID_CORIGINE, 2606 PCI_DEVICE_ID_NFP6000_PF_NIC) 2607 }, 2608 { 2609 .vendor_id = 0, 2610 }, 2611 }; 2612 2613 static int 2614 nfp_pci_uninit(struct rte_eth_dev *eth_dev) 2615 { 2616 uint16_t port_id; 2617 struct rte_pci_device *pci_dev; 2618 2619 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 2620 2621 /* Free up all physical ports under PF */ 2622 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device) 2623 rte_eth_dev_close(port_id); 2624 /* 2625 * Ports can be closed and freed but hotplugging is not 2626 * currently supported. 2627 */ 2628 return -ENOTSUP; 2629 } 2630 2631 static int 2632 eth_nfp_pci_remove(struct rte_pci_device *pci_dev) 2633 { 2634 return rte_eth_dev_pci_generic_remove(pci_dev, nfp_pci_uninit); 2635 } 2636 2637 static struct rte_pci_driver rte_nfp_net_pf_pmd = { 2638 .id_table = pci_id_nfp_pf_net_map, 2639 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 2640 .probe = nfp_pf_pci_probe, 2641 .remove = eth_nfp_pci_remove, 2642 }; 2643 2644 RTE_PMD_REGISTER_PCI(NFP_PF_DRIVER_NAME, rte_nfp_net_pf_pmd); 2645 RTE_PMD_REGISTER_PCI_TABLE(NFP_PF_DRIVER_NAME, pci_id_nfp_pf_net_map); 2646 RTE_PMD_REGISTER_KMOD_DEP(NFP_PF_DRIVER_NAME, "* igb_uio | uio_pci_generic | vfio"); 2647 RTE_PMD_REGISTER_PARAM_STRING(NFP_PF_DRIVER_NAME, 2648 NFP_PF_FORCE_RELOAD_FW "=<0|1>" 2649 NFP_CPP_SERVICE_ENABLE "=<0|1>"); 2650