1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2014-2021 Netronome Systems, Inc. 3 * All rights reserved. 4 * 5 * Small portions derived from code Copyright(c) 2010-2015 Intel Corporation. 6 */ 7 8 #include <unistd.h> 9 10 #include <eal_firmware.h> 11 #include <rte_alarm.h> 12 #include <rte_kvargs.h> 13 #include <rte_pci.h> 14 15 #include "flower/nfp_flower.h" 16 #include "nfd3/nfp_nfd3.h" 17 #include "nfdk/nfp_nfdk.h" 18 #include "nfpcore/nfp_cpp.h" 19 #include "nfpcore/nfp_elf.h" 20 #include "nfpcore/nfp_hwinfo.h" 21 #include "nfpcore/nfp_rtsym.h" 22 #include "nfpcore/nfp_nsp.h" 23 #include "nfpcore/nfp6000_pcie.h" 24 #include "nfpcore/nfp_resource.h" 25 #include "nfpcore/nfp_sync.h" 26 27 #include "nfp_cpp_bridge.h" 28 #include "nfp_ipsec.h" 29 #include "nfp_logs.h" 30 #include "nfp_net_flow.h" 31 #include "nfp_rxtx_vec.h" 32 33 /* 64-bit per app capabilities */ 34 #define NFP_NET_APP_CAP_SP_INDIFF RTE_BIT64(0) /* Indifferent to port speed */ 35 36 #define NFP_PF_DRIVER_NAME net_nfp_pf 37 #define NFP_PF_FORCE_RELOAD_FW "force_reload_fw" 38 #define NFP_CPP_SERVICE_ENABLE "cpp_service_enable" 39 #define NFP_QUEUE_PER_VF 1 40 41 struct nfp_net_init { 42 /** Sequential physical port number, only valid for CoreNIC firmware */ 43 uint8_t idx; 44 45 /** Internal port number as seen from NFP */ 46 uint8_t nfp_idx; 47 48 struct nfp_net_hw_priv *hw_priv; 49 }; 50 51 static int 52 nfp_devarg_handle_int(const char *key, 53 const char *value, 54 void *extra_args) 55 { 56 char *end_ptr; 57 uint64_t *num = extra_args; 58 59 if (value == NULL) 60 return -EPERM; 61 62 *num = strtoul(value, &end_ptr, 10); 63 if (*num == ULONG_MAX) { 64 PMD_DRV_LOG(ERR, "%s: '%s' is not a valid param.", key, value); 65 return -ERANGE; 66 } else if (value == end_ptr) { 67 return -EPERM; 68 } 69 70 return 0; 71 } 72 73 static int 74 nfp_devarg_parse_bool_para(struct rte_kvargs *kvlist, 75 const char *key_match, 76 bool *value_ret) 77 { 78 int ret; 79 uint32_t count; 80 uint64_t value; 81 82 count = rte_kvargs_count(kvlist, key_match); 83 if (count == 0) 84 return 0; 85 86 if (count > 1) { 87 PMD_DRV_LOG(ERR, "Too much bool arguments: %s.", key_match); 88 return -EINVAL; 89 } 90 91 ret = rte_kvargs_process(kvlist, key_match, &nfp_devarg_handle_int, &value); 92 if (ret != 0) 93 return -EINVAL; 94 95 if (value == 1) { 96 *value_ret = true; 97 } else if (value == 0) { 98 *value_ret = false; 99 } else { 100 PMD_DRV_LOG(ERR, "The param does not work, the format is %s=0/1.", 101 key_match); 102 return -EINVAL; 103 } 104 105 return 0; 106 } 107 108 static int 109 nfp_devargs_parse(struct nfp_devargs *nfp_devargs_param, 110 const struct rte_devargs *devargs) 111 { 112 int ret; 113 struct rte_kvargs *kvlist; 114 115 if (devargs == NULL) 116 return 0; 117 118 kvlist = rte_kvargs_parse(devargs->args, NULL); 119 if (kvlist == NULL) 120 return -EINVAL; 121 122 ret = nfp_devarg_parse_bool_para(kvlist, NFP_PF_FORCE_RELOAD_FW, 123 &nfp_devargs_param->force_reload_fw); 124 if (ret != 0) 125 goto exit; 126 127 ret = nfp_devarg_parse_bool_para(kvlist, NFP_CPP_SERVICE_ENABLE, 128 &nfp_devargs_param->cpp_service_enable); 129 if (ret != 0) 130 goto exit; 131 132 exit: 133 rte_kvargs_free(kvlist); 134 135 return ret; 136 } 137 138 static void 139 nfp_net_pf_read_mac(struct nfp_app_fw_nic *app_fw_nic, 140 uint16_t port, 141 struct nfp_net_hw_priv *hw_priv) 142 { 143 struct nfp_net_hw *hw; 144 struct nfp_eth_table *nfp_eth_table; 145 146 /* Grab a pointer to the correct physical port */ 147 hw = app_fw_nic->ports[port]; 148 149 nfp_eth_table = hw_priv->pf_dev->nfp_eth_table; 150 151 rte_ether_addr_copy(&nfp_eth_table->ports[port].mac_addr, &hw->super.mac_addr); 152 } 153 154 static uint32_t 155 nfp_net_speed_bitmap2speed(uint32_t speeds_bitmap) 156 { 157 switch (speeds_bitmap) { 158 case RTE_ETH_LINK_SPEED_10M_HD: 159 return RTE_ETH_SPEED_NUM_10M; 160 case RTE_ETH_LINK_SPEED_10M: 161 return RTE_ETH_SPEED_NUM_10M; 162 case RTE_ETH_LINK_SPEED_100M_HD: 163 return RTE_ETH_SPEED_NUM_100M; 164 case RTE_ETH_LINK_SPEED_100M: 165 return RTE_ETH_SPEED_NUM_100M; 166 case RTE_ETH_LINK_SPEED_1G: 167 return RTE_ETH_SPEED_NUM_1G; 168 case RTE_ETH_LINK_SPEED_2_5G: 169 return RTE_ETH_SPEED_NUM_2_5G; 170 case RTE_ETH_LINK_SPEED_5G: 171 return RTE_ETH_SPEED_NUM_5G; 172 case RTE_ETH_LINK_SPEED_10G: 173 return RTE_ETH_SPEED_NUM_10G; 174 case RTE_ETH_LINK_SPEED_20G: 175 return RTE_ETH_SPEED_NUM_20G; 176 case RTE_ETH_LINK_SPEED_25G: 177 return RTE_ETH_SPEED_NUM_25G; 178 case RTE_ETH_LINK_SPEED_40G: 179 return RTE_ETH_SPEED_NUM_40G; 180 case RTE_ETH_LINK_SPEED_50G: 181 return RTE_ETH_SPEED_NUM_50G; 182 case RTE_ETH_LINK_SPEED_56G: 183 return RTE_ETH_SPEED_NUM_56G; 184 case RTE_ETH_LINK_SPEED_100G: 185 return RTE_ETH_SPEED_NUM_100G; 186 case RTE_ETH_LINK_SPEED_200G: 187 return RTE_ETH_SPEED_NUM_200G; 188 case RTE_ETH_LINK_SPEED_400G: 189 return RTE_ETH_SPEED_NUM_400G; 190 default: 191 return RTE_ETH_SPEED_NUM_NONE; 192 } 193 } 194 195 static int 196 nfp_net_nfp4000_speed_configure_check(uint16_t port_id, 197 uint32_t configure_speed, 198 struct nfp_eth_table *nfp_eth_table) 199 { 200 switch (port_id) { 201 case 0: 202 if (configure_speed == RTE_ETH_SPEED_NUM_25G && 203 nfp_eth_table->ports[1].speed == RTE_ETH_SPEED_NUM_10G) { 204 PMD_DRV_LOG(ERR, "The speed configuration is not supported for NFP4000."); 205 return -ENOTSUP; 206 } 207 break; 208 case 1: 209 if (configure_speed == RTE_ETH_SPEED_NUM_10G && 210 nfp_eth_table->ports[0].speed == RTE_ETH_SPEED_NUM_25G) { 211 PMD_DRV_LOG(ERR, "The speed configuration is not supported for NFP4000."); 212 return -ENOTSUP; 213 } 214 break; 215 default: 216 PMD_DRV_LOG(ERR, "The port id is invalid."); 217 return -EINVAL; 218 } 219 220 return 0; 221 } 222 223 static int 224 nfp_net_speed_autoneg_set(struct nfp_net_hw_priv *hw_priv, 225 struct nfp_eth_table_port *eth_port) 226 { 227 int ret; 228 struct nfp_nsp *nsp; 229 230 nsp = nfp_eth_config_start(hw_priv->pf_dev->cpp, eth_port->index); 231 if (nsp == NULL) { 232 PMD_DRV_LOG(ERR, "Could not get NSP."); 233 return -EIO; 234 } 235 236 ret = nfp_eth_set_aneg(nsp, NFP_ANEG_AUTO); 237 if (ret != 0) { 238 PMD_DRV_LOG(ERR, "Failed to set ANEG enable."); 239 nfp_eth_config_cleanup_end(nsp); 240 return ret; 241 } 242 243 return nfp_eth_config_commit_end(nsp); 244 } 245 246 static int 247 nfp_net_speed_fixed_set(struct nfp_net_hw_priv *hw_priv, 248 struct nfp_eth_table_port *eth_port, 249 uint32_t configure_speed) 250 { 251 int ret; 252 struct nfp_nsp *nsp; 253 254 nsp = nfp_eth_config_start(hw_priv->pf_dev->cpp, eth_port->index); 255 if (nsp == NULL) { 256 PMD_DRV_LOG(ERR, "Could not get NSP."); 257 return -EIO; 258 } 259 260 ret = nfp_eth_set_aneg(nsp, NFP_ANEG_DISABLED); 261 if (ret != 0) { 262 PMD_DRV_LOG(ERR, "Failed to set ANEG disable."); 263 goto config_cleanup; 264 } 265 266 ret = nfp_eth_set_speed(nsp, configure_speed); 267 if (ret != 0) { 268 PMD_DRV_LOG(ERR, "Failed to set speed."); 269 goto config_cleanup; 270 } 271 272 return nfp_eth_config_commit_end(nsp); 273 274 config_cleanup: 275 nfp_eth_config_cleanup_end(nsp); 276 277 return ret; 278 } 279 280 static int 281 nfp_net_speed_configure(struct rte_eth_dev *dev) 282 { 283 int ret; 284 uint8_t idx; 285 uint32_t speed_capa; 286 uint32_t link_speeds; 287 uint32_t configure_speed; 288 struct nfp_eth_table_port *eth_port; 289 struct nfp_eth_table *nfp_eth_table; 290 struct nfp_net_hw *net_hw = dev->data->dev_private; 291 struct nfp_net_hw_priv *hw_priv = dev->process_private; 292 293 idx = nfp_net_get_idx(dev); 294 nfp_eth_table = hw_priv->pf_dev->nfp_eth_table; 295 eth_port = &nfp_eth_table->ports[idx]; 296 297 speed_capa = hw_priv->pf_dev->speed_capa; 298 if (speed_capa == 0) { 299 PMD_DRV_LOG(ERR, "Speed_capa is invalid."); 300 return -EINVAL; 301 } 302 303 link_speeds = dev->data->dev_conf.link_speeds; 304 configure_speed = nfp_net_speed_bitmap2speed(speed_capa & link_speeds); 305 if (configure_speed == RTE_ETH_SPEED_NUM_NONE && 306 link_speeds != RTE_ETH_LINK_SPEED_AUTONEG) { 307 PMD_DRV_LOG(ERR, "Configured speed is invalid."); 308 return -EINVAL; 309 } 310 311 /* NFP4000 does not allow the port 0 25Gbps and port 1 10Gbps at the same time. */ 312 if (net_hw->device_id == PCI_DEVICE_ID_NFP4000_PF_NIC) { 313 ret = nfp_net_nfp4000_speed_configure_check(idx, 314 configure_speed, nfp_eth_table); 315 if (ret != 0) { 316 PMD_DRV_LOG(ERR, "Failed to configure speed for NFP4000."); 317 return ret; 318 } 319 } 320 321 if (configure_speed == RTE_ETH_LINK_SPEED_AUTONEG) { 322 if (!eth_port->supp_aneg) 323 return 0; 324 325 if (eth_port->aneg == NFP_ANEG_AUTO) 326 return 0; 327 328 ret = nfp_net_speed_autoneg_set(hw_priv, eth_port); 329 if (ret != 0) { 330 PMD_DRV_LOG(ERR, "Failed to set speed autoneg."); 331 return ret; 332 } 333 } else { 334 if (eth_port->aneg == NFP_ANEG_DISABLED && configure_speed == eth_port->speed) 335 return 0; 336 337 ret = nfp_net_speed_fixed_set(hw_priv, eth_port, configure_speed); 338 if (ret != 0) { 339 PMD_DRV_LOG(ERR, "Failed to set speed fixed."); 340 return ret; 341 } 342 } 343 344 hw_priv->pf_dev->speed_updated = true; 345 346 return 0; 347 } 348 349 static int 350 nfp_net_start(struct rte_eth_dev *dev) 351 { 352 int ret; 353 uint16_t i; 354 struct nfp_hw *hw; 355 uint32_t new_ctrl; 356 uint32_t update = 0; 357 uint32_t cap_extend; 358 uint32_t intr_vector; 359 uint32_t ctrl_extend = 0; 360 struct nfp_net_hw *net_hw; 361 struct nfp_pf_dev *pf_dev; 362 struct rte_eth_rxmode *rxmode; 363 struct rte_eth_txmode *txmode; 364 struct nfp_net_hw_priv *hw_priv; 365 struct nfp_app_fw_nic *app_fw_nic; 366 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 367 struct rte_intr_handle *intr_handle = pci_dev->intr_handle; 368 369 net_hw = dev->data->dev_private; 370 hw_priv = dev->process_private; 371 pf_dev = hw_priv->pf_dev; 372 app_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv); 373 hw = &net_hw->super; 374 375 /* Disabling queues just in case... */ 376 nfp_net_disable_queues(dev); 377 378 /* Enabling the required queues in the device */ 379 nfp_net_enable_queues(dev); 380 381 /* Configure the port speed and the auto-negotiation mode. */ 382 ret = nfp_net_speed_configure(dev); 383 if (ret < 0) { 384 PMD_DRV_LOG(ERR, "Failed to set the speed and auto-negotiation mode."); 385 return ret; 386 } 387 388 /* Check and configure queue intr-vector mapping */ 389 if (dev->data->dev_conf.intr_conf.rxq != 0) { 390 if (app_fw_nic->multiport) { 391 PMD_INIT_LOG(ERR, "PMD rx interrupt is not supported " 392 "with NFP multiport PF."); 393 return -EINVAL; 394 } 395 396 if (rte_intr_type_get(intr_handle) == RTE_INTR_HANDLE_UIO) { 397 /* 398 * Better not to share LSC with RX interrupts. 399 * Unregistering LSC interrupt handler. 400 */ 401 rte_intr_callback_unregister(intr_handle, 402 nfp_net_dev_interrupt_handler, (void *)dev); 403 404 if (dev->data->nb_rx_queues > 1) { 405 PMD_INIT_LOG(ERR, "PMD rx interrupt only " 406 "supports 1 queue with UIO."); 407 return -EIO; 408 } 409 } 410 411 intr_vector = dev->data->nb_rx_queues; 412 if (rte_intr_efd_enable(intr_handle, intr_vector) != 0) 413 return -1; 414 415 nfp_configure_rx_interrupt(dev, intr_handle); 416 update = NFP_NET_CFG_UPDATE_MSIX; 417 } 418 419 /* Checking MTU set */ 420 if (dev->data->mtu > net_hw->flbufsz) { 421 PMD_INIT_LOG(ERR, "MTU (%u) can not be larger than the current NFP_FRAME_SIZE (%u).", 422 dev->data->mtu, net_hw->flbufsz); 423 return -ERANGE; 424 } 425 426 rte_intr_enable(intr_handle); 427 428 new_ctrl = nfp_check_offloads(dev); 429 430 /* Writing configuration parameters in the device */ 431 nfp_net_params_setup(net_hw); 432 433 rxmode = &dev->data->dev_conf.rxmode; 434 if ((rxmode->offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH) != 0) { 435 nfp_net_rss_config_default(dev); 436 update |= NFP_NET_CFG_UPDATE_RSS; 437 new_ctrl |= nfp_net_cfg_ctrl_rss(hw->cap); 438 } 439 440 /* Enable device */ 441 new_ctrl |= NFP_NET_CFG_CTRL_ENABLE; 442 443 update |= NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING; 444 445 txmode = &dev->data->dev_conf.txmode; 446 447 if ((hw->cap & NFP_NET_CFG_CTRL_RINGCFG) != 0) 448 new_ctrl |= NFP_NET_CFG_CTRL_RINGCFG; 449 450 if ((hw->cap & NFP_NET_CFG_CTRL_TXRWB) != 0) 451 new_ctrl |= NFP_NET_CFG_CTRL_TXRWB; 452 453 if (nfp_reconfig(hw, new_ctrl, update) != 0) 454 return -EIO; 455 456 hw->ctrl = new_ctrl; 457 458 /* Enable packet type offload by extend ctrl word1. */ 459 cap_extend = hw->cap_ext; 460 if ((cap_extend & NFP_NET_CFG_CTRL_PKT_TYPE) != 0) 461 ctrl_extend = NFP_NET_CFG_CTRL_PKT_TYPE; 462 463 if ((rxmode->offloads & RTE_ETH_RX_OFFLOAD_SECURITY) != 0 || 464 (txmode->offloads & RTE_ETH_TX_OFFLOAD_SECURITY) != 0) { 465 if ((cap_extend & NFP_NET_CFG_CTRL_IPSEC) != 0) 466 ctrl_extend |= NFP_NET_CFG_CTRL_IPSEC | 467 NFP_NET_CFG_CTRL_IPSEC_SM_LOOKUP | 468 NFP_NET_CFG_CTRL_IPSEC_LM_LOOKUP; 469 } 470 471 /* Enable flow steer by extend ctrl word1. */ 472 if ((cap_extend & NFP_NET_CFG_CTRL_FLOW_STEER) != 0) 473 ctrl_extend |= NFP_NET_CFG_CTRL_FLOW_STEER; 474 475 update = NFP_NET_CFG_UPDATE_GEN; 476 if (nfp_ext_reconfig(hw, ctrl_extend, update) != 0) 477 return -EIO; 478 479 hw->ctrl_ext = ctrl_extend; 480 481 /* 482 * Allocating rte mbufs for configured rx queues. 483 * This requires queues being enabled before. 484 */ 485 if (nfp_net_rx_freelist_setup(dev) != 0) { 486 ret = -ENOMEM; 487 goto error; 488 } 489 490 /* Configure the physical port up */ 491 ret = nfp_eth_set_configured(pf_dev->cpp, net_hw->nfp_idx, 1); 492 if (ret < 0) 493 goto error; 494 495 for (i = 0; i < dev->data->nb_rx_queues; i++) 496 dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED; 497 for (i = 0; i < dev->data->nb_tx_queues; i++) 498 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED; 499 500 return 0; 501 502 error: 503 /* 504 * An error returned by this function should mean the app 505 * exiting and then the system releasing all the memory 506 * allocated even memory coming from hugepages. 507 * 508 * The device could be enabled at this point with some queues 509 * ready for getting packets. This is true if the call to 510 * nfp_net_rx_freelist_setup() succeeds for some queues but 511 * fails for subsequent queues. 512 * 513 * This should make the app exiting but better if we tell the 514 * device first. 515 */ 516 nfp_net_disable_queues(dev); 517 518 return ret; 519 } 520 521 /* Set the link up. */ 522 static int 523 nfp_net_set_link_up(struct rte_eth_dev *dev) 524 { 525 int ret; 526 struct nfp_net_hw *hw; 527 struct nfp_net_hw_priv *hw_priv; 528 529 hw = dev->data->dev_private; 530 hw_priv = dev->process_private; 531 532 ret = nfp_eth_set_configured(hw_priv->pf_dev->cpp, hw->nfp_idx, 1); 533 if (ret < 0) 534 return ret; 535 536 return 0; 537 } 538 539 /* Set the link down. */ 540 static int 541 nfp_net_set_link_down(struct rte_eth_dev *dev) 542 { 543 int ret; 544 struct nfp_net_hw *hw; 545 struct nfp_net_hw_priv *hw_priv; 546 547 hw = dev->data->dev_private; 548 hw_priv = dev->process_private; 549 550 ret = nfp_eth_set_configured(hw_priv->pf_dev->cpp, hw->nfp_idx, 0); 551 if (ret < 0) 552 return ret; 553 554 return 0; 555 } 556 557 static void 558 nfp_net_beat_timer(void *arg) 559 { 560 uint64_t cur_sec; 561 struct nfp_multi_pf *multi_pf = arg; 562 563 cur_sec = rte_rdtsc(); 564 nn_writeq(cur_sec, multi_pf->beat_addr + NFP_BEAT_OFFSET(multi_pf->function_id)); 565 566 /* Beat once per second. */ 567 if (rte_eal_alarm_set(1000 * 1000, nfp_net_beat_timer, 568 (void *)multi_pf) < 0) { 569 PMD_DRV_LOG(ERR, "Error setting alarm."); 570 } 571 } 572 573 static int 574 nfp_net_keepalive_init(struct nfp_cpp *cpp, 575 struct nfp_multi_pf *multi_pf) 576 { 577 uint8_t *base; 578 uint64_t addr; 579 uint32_t size; 580 uint32_t cpp_id; 581 struct nfp_resource *res; 582 583 res = nfp_resource_acquire(cpp, NFP_RESOURCE_KEEPALIVE); 584 if (res == NULL) 585 return -EIO; 586 587 cpp_id = nfp_resource_cpp_id(res); 588 addr = nfp_resource_address(res); 589 size = nfp_resource_size(res); 590 591 nfp_resource_release(res); 592 593 /* Allocate a fixed area for keepalive. */ 594 base = nfp_cpp_map_area(cpp, cpp_id, addr, size, &multi_pf->beat_area); 595 if (base == NULL) { 596 PMD_DRV_LOG(ERR, "Failed to map area for keepalive."); 597 return -EIO; 598 } 599 600 multi_pf->beat_addr = base; 601 602 return 0; 603 } 604 605 static void 606 nfp_net_keepalive_uninit(struct nfp_multi_pf *multi_pf) 607 { 608 nfp_cpp_area_release_free(multi_pf->beat_area); 609 } 610 611 static int 612 nfp_net_keepalive_start(struct nfp_multi_pf *multi_pf) 613 { 614 if (rte_eal_alarm_set(1000 * 1000, nfp_net_beat_timer, 615 (void *)multi_pf) < 0) { 616 PMD_DRV_LOG(ERR, "Error setting alarm."); 617 return -EIO; 618 } 619 620 return 0; 621 } 622 623 static void 624 nfp_net_keepalive_clear(uint8_t *beat_addr, 625 uint8_t function_id) 626 { 627 nn_writeq(0, beat_addr + NFP_BEAT_OFFSET(function_id)); 628 } 629 630 static void 631 nfp_net_keepalive_clear_others(const struct nfp_dev_info *dev_info, 632 struct nfp_multi_pf *multi_pf) 633 { 634 uint8_t port_num; 635 636 for (port_num = 0; port_num < dev_info->pf_num_per_unit; port_num++) { 637 if (port_num == multi_pf->function_id) 638 continue; 639 640 nfp_net_keepalive_clear(multi_pf->beat_addr, port_num); 641 } 642 } 643 644 static void 645 nfp_net_keepalive_stop(struct nfp_multi_pf *multi_pf) 646 { 647 /* Cancel keepalive for multiple PF setup */ 648 rte_eal_alarm_cancel(nfp_net_beat_timer, (void *)multi_pf); 649 } 650 651 static int 652 nfp_net_uninit(struct rte_eth_dev *eth_dev) 653 { 654 struct nfp_net_hw *net_hw; 655 struct nfp_net_hw_priv *hw_priv; 656 657 net_hw = eth_dev->data->dev_private; 658 hw_priv = eth_dev->process_private; 659 660 if ((net_hw->super.cap_ext & NFP_NET_CFG_CTRL_FLOW_STEER) != 0) 661 nfp_net_flow_priv_uninit(hw_priv->pf_dev, net_hw->idx); 662 663 rte_free(net_hw->eth_xstats_base); 664 if ((net_hw->super.cap & NFP_NET_CFG_CTRL_TXRWB) != 0) 665 nfp_net_txrwb_free(eth_dev); 666 nfp_ipsec_uninit(eth_dev); 667 668 return 0; 669 } 670 671 static void 672 nfp_cleanup_port_app_fw_nic(struct nfp_pf_dev *pf_dev, 673 uint8_t id, 674 struct rte_eth_dev *eth_dev) 675 { 676 struct nfp_app_fw_nic *app_fw_nic; 677 678 app_fw_nic = pf_dev->app_fw_priv; 679 if (app_fw_nic->ports[id] != NULL) { 680 nfp_net_uninit(eth_dev); 681 app_fw_nic->ports[id] = NULL; 682 } 683 } 684 685 static void 686 nfp_uninit_app_fw_nic(struct nfp_pf_dev *pf_dev) 687 { 688 nfp_cpp_area_release_free(pf_dev->ctrl_area); 689 rte_free(pf_dev->app_fw_priv); 690 } 691 692 static void 693 nfp_net_vf_config_uninit(struct nfp_pf_dev *pf_dev) 694 { 695 if (pf_dev->sriov_vf == 0) 696 return; 697 698 nfp_cpp_area_release_free(pf_dev->vf_cfg_tbl_area); 699 nfp_cpp_area_release_free(pf_dev->vf_area); 700 } 701 702 void 703 nfp_pf_uninit(struct nfp_net_hw_priv *hw_priv) 704 { 705 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 706 707 if (pf_dev->devargs.cpp_service_enable) 708 nfp_disable_cpp_service(pf_dev); 709 nfp_net_vf_config_uninit(pf_dev); 710 nfp_cpp_area_release_free(pf_dev->mac_stats_area); 711 nfp_cpp_area_release_free(pf_dev->qc_area); 712 free(pf_dev->sym_tbl); 713 if (pf_dev->multi_pf.enabled) { 714 nfp_net_keepalive_stop(&pf_dev->multi_pf); 715 nfp_net_keepalive_clear(pf_dev->multi_pf.beat_addr, pf_dev->multi_pf.function_id); 716 nfp_net_keepalive_uninit(&pf_dev->multi_pf); 717 } 718 free(pf_dev->nfp_eth_table); 719 free(pf_dev->hwinfo); 720 nfp_cpp_free(pf_dev->cpp); 721 nfp_sync_free(pf_dev->sync); 722 rte_free(pf_dev); 723 rte_free(hw_priv); 724 } 725 726 static int 727 nfp_pf_secondary_uninit(struct nfp_net_hw_priv *hw_priv) 728 { 729 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 730 731 free(pf_dev->sym_tbl); 732 nfp_cpp_free(pf_dev->cpp); 733 nfp_sync_free(pf_dev->sync); 734 rte_free(pf_dev); 735 rte_free(hw_priv); 736 737 return 0; 738 } 739 740 /* Reset and stop device. The device can not be restarted. */ 741 static int 742 nfp_net_close(struct rte_eth_dev *dev) 743 { 744 uint8_t i; 745 uint8_t id; 746 struct nfp_net_hw *hw; 747 struct nfp_pf_dev *pf_dev; 748 struct rte_pci_device *pci_dev; 749 struct nfp_net_hw_priv *hw_priv; 750 struct nfp_app_fw_nic *app_fw_nic; 751 752 hw_priv = dev->process_private; 753 754 /* 755 * In secondary process, a released eth device can be found by its name 756 * in shared memory. 757 * If the state of the eth device is RTE_ETH_DEV_UNUSED, it means the 758 * eth device has been released. 759 */ 760 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 761 if (dev->state == RTE_ETH_DEV_UNUSED) 762 return 0; 763 764 nfp_pf_secondary_uninit(hw_priv); 765 return 0; 766 } 767 768 hw = dev->data->dev_private; 769 pf_dev = hw_priv->pf_dev; 770 pci_dev = RTE_ETH_DEV_TO_PCI(dev); 771 app_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv); 772 773 /* 774 * We assume that the DPDK application is stopping all the 775 * threads/queues before calling the device close function. 776 */ 777 nfp_net_disable_queues(dev); 778 779 /* Clear queues */ 780 nfp_net_close_tx_queue(dev); 781 nfp_net_close_rx_queue(dev); 782 783 /* Cancel possible impending LSC work here before releasing the port */ 784 rte_eal_alarm_cancel(nfp_net_dev_interrupt_delayed_handler, (void *)dev); 785 786 /* Only free PF resources after all physical ports have been closed */ 787 /* Mark this port as unused and free device priv resources */ 788 nn_cfg_writeb(&hw->super, NFP_NET_CFG_LSC, 0xff); 789 790 if (pf_dev->app_fw_id != NFP_APP_FW_CORE_NIC) 791 return -EINVAL; 792 793 nfp_cleanup_port_app_fw_nic(pf_dev, hw->idx, dev); 794 795 for (i = 0; i < pf_dev->total_phyports; i++) { 796 id = nfp_function_id_get(pf_dev, i); 797 798 /* Check to see if ports are still in use */ 799 if (app_fw_nic->ports[id] != NULL) 800 return 0; 801 } 802 803 /* Enable in nfp_net_start() */ 804 rte_intr_disable(pci_dev->intr_handle); 805 806 /* Register in nfp_net_init() */ 807 rte_intr_callback_unregister(pci_dev->intr_handle, 808 nfp_net_dev_interrupt_handler, (void *)dev); 809 810 nfp_uninit_app_fw_nic(pf_dev); 811 nfp_pf_uninit(hw_priv); 812 813 return 0; 814 } 815 816 static int 817 nfp_net_find_vxlan_idx(struct nfp_net_hw *hw, 818 uint16_t port, 819 uint32_t *idx) 820 { 821 uint32_t i; 822 int free_idx = -1; 823 824 for (i = 0; i < NFP_NET_N_VXLAN_PORTS; i++) { 825 if (hw->vxlan_ports[i] == port) { 826 free_idx = i; 827 break; 828 } 829 830 if (hw->vxlan_usecnt[i] == 0) { 831 free_idx = i; 832 break; 833 } 834 } 835 836 if (free_idx == -1) 837 return -EINVAL; 838 839 *idx = free_idx; 840 841 return 0; 842 } 843 844 static int 845 nfp_udp_tunnel_port_add(struct rte_eth_dev *dev, 846 struct rte_eth_udp_tunnel *tunnel_udp) 847 { 848 int ret; 849 uint32_t idx; 850 uint32_t ctrl; 851 struct nfp_hw *hw; 852 uint16_t vxlan_port; 853 struct nfp_net_hw *net_hw; 854 enum rte_eth_tunnel_type tnl_type; 855 856 net_hw = dev->data->dev_private; 857 vxlan_port = tunnel_udp->udp_port; 858 tnl_type = tunnel_udp->prot_type; 859 860 if (tnl_type != RTE_ETH_TUNNEL_TYPE_VXLAN) { 861 PMD_DRV_LOG(ERR, "Not VXLAN tunnel."); 862 return -ENOTSUP; 863 } 864 865 ret = nfp_net_find_vxlan_idx(net_hw, vxlan_port, &idx); 866 if (ret != 0) { 867 PMD_DRV_LOG(ERR, "Failed find valid vxlan idx."); 868 return -EINVAL; 869 } 870 871 if (net_hw->vxlan_usecnt[idx] == 0) { 872 hw = &net_hw->super; 873 ctrl = hw->ctrl | NFP_NET_CFG_CTRL_VXLAN; 874 875 ret = nfp_net_set_vxlan_port(net_hw, idx, vxlan_port, ctrl); 876 if (ret != 0) { 877 PMD_DRV_LOG(ERR, "Failed set vxlan port."); 878 return -EINVAL; 879 } 880 881 hw->ctrl = ctrl; 882 } 883 884 net_hw->vxlan_usecnt[idx]++; 885 886 return 0; 887 } 888 889 static int 890 nfp_udp_tunnel_port_del(struct rte_eth_dev *dev, 891 struct rte_eth_udp_tunnel *tunnel_udp) 892 { 893 int ret; 894 uint32_t idx; 895 uint32_t ctrl; 896 struct nfp_hw *hw; 897 uint16_t vxlan_port; 898 struct nfp_net_hw *net_hw; 899 enum rte_eth_tunnel_type tnl_type; 900 901 net_hw = dev->data->dev_private; 902 vxlan_port = tunnel_udp->udp_port; 903 tnl_type = tunnel_udp->prot_type; 904 905 if (tnl_type != RTE_ETH_TUNNEL_TYPE_VXLAN) { 906 PMD_DRV_LOG(ERR, "Not VXLAN tunnel."); 907 return -ENOTSUP; 908 } 909 910 ret = nfp_net_find_vxlan_idx(net_hw, vxlan_port, &idx); 911 if (ret != 0 || net_hw->vxlan_usecnt[idx] == 0) { 912 PMD_DRV_LOG(ERR, "Failed find valid vxlan idx."); 913 return -EINVAL; 914 } 915 916 net_hw->vxlan_usecnt[idx]--; 917 918 if (net_hw->vxlan_usecnt[idx] == 0) { 919 hw = &net_hw->super; 920 ctrl = hw->ctrl & ~NFP_NET_CFG_CTRL_VXLAN; 921 922 ret = nfp_net_set_vxlan_port(net_hw, idx, 0, ctrl); 923 if (ret != 0) { 924 PMD_DRV_LOG(ERR, "Failed set vxlan port."); 925 return -EINVAL; 926 } 927 928 hw->ctrl = ctrl; 929 } 930 931 return 0; 932 } 933 934 /* Initialise and register driver with DPDK Application */ 935 static const struct eth_dev_ops nfp_net_eth_dev_ops = { 936 .dev_configure = nfp_net_configure, 937 .dev_start = nfp_net_start, 938 .dev_stop = nfp_net_stop, 939 .dev_set_link_up = nfp_net_set_link_up, 940 .dev_set_link_down = nfp_net_set_link_down, 941 .dev_close = nfp_net_close, 942 .promiscuous_enable = nfp_net_promisc_enable, 943 .promiscuous_disable = nfp_net_promisc_disable, 944 .allmulticast_enable = nfp_net_allmulticast_enable, 945 .allmulticast_disable = nfp_net_allmulticast_disable, 946 .link_update = nfp_net_link_update, 947 .stats_get = nfp_net_stats_get, 948 .stats_reset = nfp_net_stats_reset, 949 .xstats_get = nfp_net_xstats_get, 950 .xstats_reset = nfp_net_xstats_reset, 951 .xstats_get_names = nfp_net_xstats_get_names, 952 .xstats_get_by_id = nfp_net_xstats_get_by_id, 953 .xstats_get_names_by_id = nfp_net_xstats_get_names_by_id, 954 .dev_infos_get = nfp_net_infos_get, 955 .dev_supported_ptypes_get = nfp_net_supported_ptypes_get, 956 .dev_ptypes_set = nfp_net_ptypes_set, 957 .mtu_set = nfp_net_dev_mtu_set, 958 .mac_addr_set = nfp_net_set_mac_addr, 959 .vlan_offload_set = nfp_net_vlan_offload_set, 960 .reta_update = nfp_net_reta_update, 961 .reta_query = nfp_net_reta_query, 962 .rss_hash_update = nfp_net_rss_hash_update, 963 .rss_hash_conf_get = nfp_net_rss_hash_conf_get, 964 .rx_queue_setup = nfp_net_rx_queue_setup, 965 .rx_queue_release = nfp_net_rx_queue_release, 966 .rxq_info_get = nfp_net_rx_queue_info_get, 967 .tx_queue_setup = nfp_net_tx_queue_setup, 968 .tx_queue_release = nfp_net_tx_queue_release, 969 .txq_info_get = nfp_net_tx_queue_info_get, 970 .rx_queue_intr_enable = nfp_rx_queue_intr_enable, 971 .rx_queue_intr_disable = nfp_rx_queue_intr_disable, 972 .udp_tunnel_port_add = nfp_udp_tunnel_port_add, 973 .udp_tunnel_port_del = nfp_udp_tunnel_port_del, 974 .fw_version_get = nfp_net_firmware_version_get, 975 .flow_ctrl_get = nfp_net_flow_ctrl_get, 976 .flow_ctrl_set = nfp_net_flow_ctrl_set, 977 .flow_ops_get = nfp_net_flow_ops_get, 978 .fec_get_capability = nfp_net_fec_get_capability, 979 .fec_get = nfp_net_fec_get, 980 .fec_set = nfp_net_fec_set, 981 .get_eeprom_length = nfp_net_get_eeprom_len, 982 .get_eeprom = nfp_net_get_eeprom, 983 .set_eeprom = nfp_net_set_eeprom, 984 .get_module_info = nfp_net_get_module_info, 985 .get_module_eeprom = nfp_net_get_module_eeprom, 986 .dev_led_on = nfp_net_led_on, 987 .dev_led_off = nfp_net_led_off, 988 }; 989 990 static inline void 991 nfp_net_ethdev_ops_mount(struct nfp_pf_dev *pf_dev, 992 struct rte_eth_dev *eth_dev) 993 { 994 if (pf_dev->ver.extend == NFP_NET_CFG_VERSION_DP_NFD3) 995 eth_dev->tx_pkt_burst = nfp_net_nfd3_xmit_pkts; 996 else 997 nfp_net_nfdk_xmit_pkts_set(eth_dev); 998 999 eth_dev->dev_ops = &nfp_net_eth_dev_ops; 1000 eth_dev->rx_queue_count = nfp_net_rx_queue_count; 1001 nfp_net_recv_pkts_set(eth_dev); 1002 } 1003 1004 static int 1005 nfp_net_init(struct rte_eth_dev *eth_dev, 1006 void *para) 1007 { 1008 int err; 1009 uint16_t port; 1010 uint64_t rx_base; 1011 uint64_t tx_base; 1012 struct nfp_hw *hw; 1013 struct nfp_net_hw *net_hw; 1014 struct nfp_pf_dev *pf_dev; 1015 struct nfp_net_init *hw_init; 1016 struct rte_pci_device *pci_dev; 1017 struct nfp_net_hw_priv *hw_priv; 1018 struct nfp_app_fw_nic *app_fw_nic; 1019 1020 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 1021 net_hw = eth_dev->data->dev_private; 1022 1023 hw_init = para; 1024 net_hw->idx = hw_init->idx; 1025 net_hw->nfp_idx = hw_init->nfp_idx; 1026 eth_dev->process_private = hw_init->hw_priv; 1027 1028 /* Use backpointer here to the PF of this eth_dev */ 1029 hw_priv = eth_dev->process_private; 1030 pf_dev = hw_priv->pf_dev; 1031 1032 /* Use backpointer to the CoreNIC app struct */ 1033 app_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv); 1034 1035 /* Add this device to the PF's array of physical ports */ 1036 app_fw_nic->ports[net_hw->idx] = net_hw; 1037 1038 port = net_hw->idx; 1039 if (port > 7) { 1040 PMD_DRV_LOG(ERR, "Port value is wrong."); 1041 return -ENODEV; 1042 } 1043 1044 hw = &net_hw->super; 1045 1046 PMD_INIT_LOG(DEBUG, "Working with physical port number: %hu, " 1047 "NFP internal port number: %d.", port, net_hw->nfp_idx); 1048 1049 rte_eth_copy_pci_info(eth_dev, pci_dev); 1050 1051 if (pf_dev->multi_pf.enabled) 1052 hw->ctrl_bar = pf_dev->ctrl_bar; 1053 else 1054 hw->ctrl_bar = pf_dev->ctrl_bar + (port * pf_dev->ctrl_bar_size); 1055 1056 net_hw->mac_stats = pf_dev->mac_stats_bar + 1057 (net_hw->nfp_idx * NFP_MAC_STATS_SIZE); 1058 1059 PMD_INIT_LOG(DEBUG, "Ctrl bar: %p.", hw->ctrl_bar); 1060 PMD_INIT_LOG(DEBUG, "MAC stats: %p.", net_hw->mac_stats); 1061 1062 err = nfp_net_common_init(pf_dev, net_hw); 1063 if (err != 0) 1064 return err; 1065 1066 err = nfp_net_tlv_caps_parse(eth_dev); 1067 if (err != 0) { 1068 PMD_INIT_LOG(ERR, "Failed to parser TLV caps."); 1069 return err; 1070 } 1071 1072 err = nfp_ipsec_init(eth_dev); 1073 if (err != 0) { 1074 PMD_INIT_LOG(ERR, "Failed to init IPsec module."); 1075 return err; 1076 } 1077 1078 nfp_net_ethdev_ops_mount(pf_dev, eth_dev); 1079 1080 net_hw->eth_xstats_base = rte_malloc("rte_eth_xstat", sizeof(struct rte_eth_xstat) * 1081 nfp_net_xstats_size(eth_dev), 0); 1082 if (net_hw->eth_xstats_base == NULL) { 1083 PMD_INIT_LOG(ERR, "No memory for xstats base values on device %s!", 1084 pci_dev->device.name); 1085 err = -ENOMEM; 1086 goto ipsec_exit; 1087 } 1088 1089 /* Work out where in the BAR the queues start. */ 1090 tx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ); 1091 rx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ); 1092 1093 net_hw->tx_bar = pf_dev->qc_bar + tx_base * NFP_QCP_QUEUE_ADDR_SZ; 1094 net_hw->rx_bar = pf_dev->qc_bar + rx_base * NFP_QCP_QUEUE_ADDR_SZ; 1095 1096 PMD_INIT_LOG(DEBUG, "The ctrl_bar: %p, tx_bar: %p, rx_bar: %p.", 1097 hw->ctrl_bar, net_hw->tx_bar, net_hw->rx_bar); 1098 1099 nfp_net_cfg_queue_setup(net_hw); 1100 net_hw->mtu = RTE_ETHER_MTU; 1101 1102 /* VLAN insertion is incompatible with LSOv2 */ 1103 if ((hw->cap & NFP_NET_CFG_CTRL_LSO2) != 0) 1104 hw->cap &= ~NFP_NET_CFG_CTRL_TXVLAN; 1105 1106 nfp_net_log_device_information(net_hw, pf_dev); 1107 1108 /* Initializing spinlock for reconfigs */ 1109 rte_spinlock_init(&hw->reconfig_lock); 1110 1111 if ((port == 0 || pf_dev->multi_pf.enabled)) { 1112 err = nfp_net_vf_config_app_init(net_hw, pf_dev); 1113 if (err != 0) { 1114 PMD_INIT_LOG(ERR, "Failed to init sriov module."); 1115 goto xstats_free; 1116 } 1117 } 1118 1119 /* Allocating memory for mac addr */ 1120 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", RTE_ETHER_ADDR_LEN, 0); 1121 if (eth_dev->data->mac_addrs == NULL) { 1122 PMD_INIT_LOG(ERR, "Failed to space for MAC address."); 1123 err = -ENOMEM; 1124 goto xstats_free; 1125 } 1126 1127 if ((hw->cap & NFP_NET_CFG_CTRL_TXRWB) != 0) { 1128 err = nfp_net_txrwb_alloc(eth_dev); 1129 if (err != 0) 1130 goto xstats_free; 1131 } 1132 1133 nfp_net_pf_read_mac(app_fw_nic, port, hw_priv); 1134 nfp_write_mac(hw, &hw->mac_addr.addr_bytes[0]); 1135 1136 if (rte_is_valid_assigned_ether_addr(&hw->mac_addr) == 0) { 1137 PMD_INIT_LOG(INFO, "Using random mac address for port %d.", port); 1138 /* Using random mac addresses for VFs */ 1139 rte_eth_random_addr(&hw->mac_addr.addr_bytes[0]); 1140 nfp_write_mac(hw, &hw->mac_addr.addr_bytes[0]); 1141 } 1142 1143 /* Copying mac address to DPDK eth_dev struct */ 1144 rte_ether_addr_copy(&hw->mac_addr, eth_dev->data->mac_addrs); 1145 1146 if ((hw->cap & NFP_NET_CFG_CTRL_LIVE_ADDR) == 0) 1147 eth_dev->data->dev_flags |= RTE_ETH_DEV_NOLIVE_MAC_ADDR; 1148 1149 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1150 1151 PMD_INIT_LOG(INFO, "Port %d VendorID=%#x DeviceID=%#x " 1152 "mac=" RTE_ETHER_ADDR_PRT_FMT, 1153 eth_dev->data->port_id, pci_dev->id.vendor_id, 1154 pci_dev->id.device_id, 1155 RTE_ETHER_ADDR_BYTES(&hw->mac_addr)); 1156 1157 /* Registering LSC interrupt handler */ 1158 rte_intr_callback_register(pci_dev->intr_handle, 1159 nfp_net_dev_interrupt_handler, (void *)eth_dev); 1160 /* Telling the firmware about the LSC interrupt entry */ 1161 nn_cfg_writeb(hw, NFP_NET_CFG_LSC, NFP_NET_IRQ_LSC_IDX); 1162 /* Unmask the LSC interrupt */ 1163 nfp_net_irq_unmask(eth_dev); 1164 /* Recording current stats counters values */ 1165 nfp_net_stats_reset(eth_dev); 1166 1167 if ((hw->cap_ext & NFP_NET_CFG_CTRL_FLOW_STEER) != 0) { 1168 err = nfp_net_flow_priv_init(pf_dev, port); 1169 if (err != 0) { 1170 PMD_INIT_LOG(ERR, "Init net flow priv failed."); 1171 goto txrwb_free; 1172 } 1173 } 1174 1175 return 0; 1176 1177 txrwb_free: 1178 if ((hw->cap & NFP_NET_CFG_CTRL_TXRWB) != 0) 1179 nfp_net_txrwb_free(eth_dev); 1180 xstats_free: 1181 rte_free(net_hw->eth_xstats_base); 1182 ipsec_exit: 1183 nfp_ipsec_uninit(eth_dev); 1184 1185 return err; 1186 } 1187 1188 static int 1189 nfp_net_device_activate(struct nfp_pf_dev *pf_dev) 1190 { 1191 int ret; 1192 struct nfp_nsp *nsp; 1193 struct nfp_multi_pf *multi_pf; 1194 1195 multi_pf = &pf_dev->multi_pf; 1196 if (multi_pf->enabled && multi_pf->function_id != 0) { 1197 nsp = nfp_nsp_open(pf_dev->cpp); 1198 if (nsp == NULL) { 1199 PMD_DRV_LOG(ERR, "NFP error when obtaining NSP handle."); 1200 return -EIO; 1201 } 1202 1203 ret = nfp_nsp_device_activate(nsp); 1204 nfp_nsp_close(nsp); 1205 if (ret != 0 && ret != -EOPNOTSUPP) 1206 return ret; 1207 } 1208 1209 return 0; 1210 } 1211 1212 #define DEFAULT_FW_PATH "/lib/firmware/netronome" 1213 1214 static int 1215 nfp_fw_get_name(struct nfp_pf_dev *pf_dev, 1216 char *fw_name, 1217 size_t fw_size) 1218 { 1219 char serial[40]; 1220 uint16_t interface; 1221 char card_desc[100]; 1222 uint32_t cpp_serial_len; 1223 const char *nfp_fw_model; 1224 const uint8_t *cpp_serial; 1225 1226 cpp_serial_len = nfp_cpp_serial(pf_dev->cpp, &cpp_serial); 1227 if (cpp_serial_len != NFP_SERIAL_LEN) 1228 return -ERANGE; 1229 1230 interface = nfp_cpp_interface(pf_dev->cpp); 1231 1232 /* Looking for firmware file in order of priority */ 1233 1234 /* First try to find a firmware image specific for this device */ 1235 snprintf(serial, sizeof(serial), 1236 "serial-%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x", 1237 cpp_serial[0], cpp_serial[1], cpp_serial[2], cpp_serial[3], 1238 cpp_serial[4], cpp_serial[5], interface >> 8, interface & 0xff); 1239 snprintf(fw_name, fw_size, "%s/%s.nffw", DEFAULT_FW_PATH, serial); 1240 1241 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s.", fw_name); 1242 if (access(fw_name, F_OK) == 0) 1243 return 0; 1244 1245 /* Then try the PCI name */ 1246 snprintf(fw_name, fw_size, "%s/pci-%s.nffw", DEFAULT_FW_PATH, 1247 pf_dev->pci_dev->name); 1248 1249 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s.", fw_name); 1250 if (access(fw_name, F_OK) == 0) 1251 return 0; 1252 1253 nfp_fw_model = nfp_hwinfo_lookup(pf_dev->hwinfo, "nffw.partno"); 1254 if (nfp_fw_model == NULL) { 1255 nfp_fw_model = nfp_hwinfo_lookup(pf_dev->hwinfo, "assembly.partno"); 1256 if (nfp_fw_model == NULL) { 1257 PMD_DRV_LOG(ERR, "Firmware model NOT found."); 1258 return -EIO; 1259 } 1260 } 1261 1262 /* And then try the model name */ 1263 snprintf(card_desc, sizeof(card_desc), "%s.nffw", nfp_fw_model); 1264 snprintf(fw_name, fw_size, "%s/%s", DEFAULT_FW_PATH, card_desc); 1265 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s.", fw_name); 1266 if (access(fw_name, F_OK) == 0) 1267 return 0; 1268 1269 /* Finally try the card type and media */ 1270 snprintf(card_desc, sizeof(card_desc), "nic_%s_%dx%d.nffw", 1271 nfp_fw_model, pf_dev->nfp_eth_table->count, 1272 pf_dev->nfp_eth_table->ports[0].speed / 1000); 1273 snprintf(fw_name, fw_size, "%s/%s", DEFAULT_FW_PATH, card_desc); 1274 PMD_DRV_LOG(DEBUG, "Trying with fw file: %s.", fw_name); 1275 if (access(fw_name, F_OK) == 0) 1276 return 0; 1277 1278 return -ENOENT; 1279 } 1280 1281 static int 1282 nfp_fw_upload(struct nfp_nsp *nsp, 1283 char *fw_name) 1284 { 1285 int err; 1286 void *fw_buf; 1287 size_t fsize; 1288 1289 err = rte_firmware_read(fw_name, &fw_buf, &fsize); 1290 if (err != 0) { 1291 PMD_DRV_LOG(ERR, "Firmware %s not found!", fw_name); 1292 return -ENOENT; 1293 } 1294 1295 PMD_DRV_LOG(INFO, "Firmware file found at %s with size: %zu.", 1296 fw_name, fsize); 1297 PMD_DRV_LOG(INFO, "Uploading the firmware ..."); 1298 if (nfp_nsp_load_fw(nsp, fw_buf, fsize) < 0) { 1299 free(fw_buf); 1300 PMD_DRV_LOG(ERR, "Firmware load failed."); 1301 return -EIO; 1302 } 1303 1304 PMD_DRV_LOG(INFO, "Done."); 1305 1306 free(fw_buf); 1307 1308 return 0; 1309 } 1310 1311 static void 1312 nfp_fw_unload(struct nfp_cpp *cpp) 1313 { 1314 int err; 1315 struct nfp_nsp *nsp; 1316 1317 nsp = nfp_nsp_open(cpp); 1318 if (nsp == NULL) 1319 return; 1320 1321 err = nfp_nsp_device_soft_reset(nsp); 1322 if (err != 0) 1323 PMD_DRV_LOG(WARNING, "Failed to do soft reset when nfp fw unload."); 1324 1325 nfp_nsp_close(nsp); 1326 } 1327 1328 static int 1329 nfp_fw_check_change(struct nfp_cpp *cpp, 1330 char *fw_name, 1331 bool *fw_changed) 1332 { 1333 int ret; 1334 uint32_t new_version = 0; 1335 uint32_t old_version = 0; 1336 1337 ret = nfp_elf_get_fw_version(&new_version, fw_name); 1338 if (ret != 0) 1339 return ret; 1340 1341 nfp_net_get_fw_version(cpp, &old_version); 1342 1343 if (new_version != old_version) { 1344 PMD_DRV_LOG(INFO, "FW version is changed, new %u, old %u.", 1345 new_version, old_version); 1346 *fw_changed = true; 1347 } else { 1348 PMD_DRV_LOG(INFO, "FW version is not changed and is %u.", new_version); 1349 *fw_changed = false; 1350 } 1351 1352 return 0; 1353 } 1354 1355 static void 1356 nfp_pcie_reg32_write_clear(struct rte_pci_device *pci_dev, 1357 int position) 1358 { 1359 int ret; 1360 uint32_t capability; 1361 1362 ret = rte_pci_read_config(pci_dev, &capability, 4, position); 1363 if (ret < 0) 1364 capability = 0xffffffff; 1365 1366 (void)rte_pci_write_config(pci_dev, &capability, 4, position); 1367 } 1368 1369 static void 1370 nfp_pcie_aer_clear(struct rte_pci_device *pci_dev) 1371 { 1372 int pos; 1373 1374 pos = rte_pci_find_ext_capability(pci_dev, RTE_PCI_EXT_CAP_ID_ERR); 1375 if (pos <= 0) 1376 return; 1377 1378 nfp_pcie_reg32_write_clear(pci_dev, pos + RTE_PCI_ERR_UNCOR_STATUS); 1379 nfp_pcie_reg32_write_clear(pci_dev, pos + RTE_PCI_ERR_COR_STATUS); 1380 } 1381 1382 static int 1383 nfp_fw_reload(struct nfp_nsp *nsp, 1384 char *fw_name, 1385 struct rte_pci_device *pci_dev, 1386 int reset) 1387 { 1388 int err; 1389 bool reset_flag; 1390 1391 reset_flag = (reset == NFP_NSP_DRV_RESET_ALWAYS) || 1392 (reset == NFP_NSP_DRV_RESET_DISK); 1393 1394 if (reset_flag) { 1395 err = nfp_nsp_device_soft_reset(nsp); 1396 if (err != 0) { 1397 PMD_DRV_LOG(ERR, "NFP firmware soft reset failed."); 1398 return err; 1399 } 1400 } 1401 1402 /* 1403 * Accessing device memory during soft reset may result in some 1404 * errors being recorded in PCIE's AER register, which is normal. 1405 * Therefore, after the soft reset is completed, these errors 1406 * should be cleared. 1407 */ 1408 nfp_pcie_aer_clear(pci_dev); 1409 1410 err = nfp_fw_upload(nsp, fw_name); 1411 if (err != 0) { 1412 PMD_DRV_LOG(ERR, "NFP firmware load failed."); 1413 return err; 1414 } 1415 1416 return 0; 1417 } 1418 1419 static bool 1420 nfp_fw_skip_load(const struct nfp_dev_info *dev_info, 1421 struct nfp_multi_pf *multi_pf, 1422 bool *reload_fw) 1423 { 1424 uint8_t i; 1425 uint64_t tmp_beat; 1426 uint32_t port_num; 1427 uint8_t in_use = 0; 1428 uint64_t beat[dev_info->pf_num_per_unit]; 1429 uint32_t offset[dev_info->pf_num_per_unit]; 1430 uint8_t abnormal = dev_info->pf_num_per_unit; 1431 1432 sleep(1); 1433 for (port_num = 0; port_num < dev_info->pf_num_per_unit; port_num++) { 1434 if (port_num == multi_pf->function_id) { 1435 abnormal--; 1436 continue; 1437 } 1438 1439 offset[port_num] = NFP_BEAT_OFFSET(port_num); 1440 beat[port_num] = nn_readq(multi_pf->beat_addr + offset[port_num]); 1441 if (beat[port_num] == 0) 1442 abnormal--; 1443 } 1444 1445 if (abnormal == 0) 1446 return true; 1447 1448 for (i = 0; i < 3; i++) { 1449 sleep(1); 1450 for (port_num = 0; port_num < dev_info->pf_num_per_unit; port_num++) { 1451 if (port_num == multi_pf->function_id) 1452 continue; 1453 1454 if (beat[port_num] == 0) 1455 continue; 1456 1457 tmp_beat = nn_readq(multi_pf->beat_addr + offset[port_num]); 1458 if (tmp_beat != beat[port_num]) { 1459 in_use++; 1460 abnormal--; 1461 beat[port_num] = 0; 1462 if (*reload_fw) { 1463 *reload_fw = false; 1464 PMD_DRV_LOG(ERR, "The param %s does not work.", 1465 NFP_PF_FORCE_RELOAD_FW); 1466 } 1467 } 1468 } 1469 1470 if (abnormal == 0) 1471 return true; 1472 } 1473 1474 if (in_use != 0) { 1475 PMD_DRV_LOG(WARNING, "Abnormal %u != 0, the nic has port which is exit abnormally.", 1476 abnormal); 1477 return true; 1478 } 1479 1480 return false; 1481 } 1482 1483 static int 1484 nfp_fw_reload_from_flash(struct nfp_nsp *nsp) 1485 { 1486 int ret; 1487 1488 ret = nfp_nsp_load_stored_fw(nsp); 1489 if (ret != 0) { 1490 PMD_DRV_LOG(ERR, "Load firmware from flash failed."); 1491 return -EACCES; 1492 } 1493 1494 return 0; 1495 } 1496 1497 static int 1498 nfp_fw_reload_for_single_pf_from_disk(struct nfp_nsp *nsp, 1499 char *fw_name, 1500 struct nfp_pf_dev *pf_dev, 1501 int reset) 1502 { 1503 int ret; 1504 bool fw_changed = true; 1505 1506 if (nfp_nsp_has_fw_loaded(nsp) && nfp_nsp_fw_loaded(nsp) && 1507 !pf_dev->devargs.force_reload_fw) { 1508 ret = nfp_fw_check_change(pf_dev->cpp, fw_name, &fw_changed); 1509 if (ret != 0) 1510 return ret; 1511 } 1512 1513 if (!fw_changed) 1514 return 0; 1515 1516 ret = nfp_fw_reload(nsp, fw_name, pf_dev->pci_dev, reset); 1517 if (ret != 0) 1518 return ret; 1519 1520 return 0; 1521 } 1522 1523 static int 1524 nfp_fw_reload_for_single_pf(struct nfp_nsp *nsp, 1525 char *fw_name, 1526 struct nfp_pf_dev *pf_dev, 1527 int reset, 1528 int policy) 1529 { 1530 int ret; 1531 1532 if (policy == NFP_NSP_APP_FW_LOAD_FLASH && nfp_nsp_has_stored_fw_load(nsp)) { 1533 ret = nfp_fw_reload_from_flash(nsp); 1534 if (ret != 0) { 1535 PMD_DRV_LOG(ERR, "Load single PF firmware from flash failed."); 1536 return ret; 1537 } 1538 } else if (fw_name[0] != 0) { 1539 ret = nfp_fw_reload_for_single_pf_from_disk(nsp, fw_name, pf_dev, reset); 1540 if (ret != 0) { 1541 PMD_DRV_LOG(ERR, "Load single PF firmware from disk failed."); 1542 return ret; 1543 } 1544 } else { 1545 PMD_DRV_LOG(ERR, "Not load firmware, please update flash or recofigure card."); 1546 return -ENODATA; 1547 } 1548 1549 return 0; 1550 } 1551 1552 static int 1553 nfp_fw_reload_for_multi_pf_from_disk(struct nfp_nsp *nsp, 1554 char *fw_name, 1555 const struct nfp_dev_info *dev_info, 1556 struct nfp_pf_dev *pf_dev, 1557 int reset) 1558 { 1559 int err; 1560 bool fw_changed = true; 1561 bool skip_load_fw = false; 1562 bool reload_fw = pf_dev->devargs.force_reload_fw; 1563 1564 if (nfp_nsp_has_fw_loaded(nsp) && nfp_nsp_fw_loaded(nsp) && !reload_fw) { 1565 err = nfp_fw_check_change(pf_dev->cpp, fw_name, &fw_changed); 1566 if (err != 0) 1567 return err; 1568 } 1569 1570 if (!fw_changed || reload_fw) 1571 skip_load_fw = nfp_fw_skip_load(dev_info, &pf_dev->multi_pf, &reload_fw); 1572 1573 if (skip_load_fw && !reload_fw) 1574 return 0; 1575 1576 err = nfp_fw_reload(nsp, fw_name, pf_dev->pci_dev, reset); 1577 if (err != 0) 1578 return err; 1579 1580 return 0; 1581 } 1582 1583 static int 1584 nfp_fw_reload_for_multi_pf(struct nfp_nsp *nsp, 1585 char *fw_name, 1586 const struct nfp_dev_info *dev_info, 1587 struct nfp_pf_dev *pf_dev, 1588 int reset, 1589 int policy) 1590 { 1591 int err; 1592 struct nfp_multi_pf *multi_pf; 1593 1594 multi_pf = &pf_dev->multi_pf; 1595 1596 err = nfp_net_keepalive_init(pf_dev->cpp, multi_pf); 1597 if (err != 0) { 1598 PMD_DRV_LOG(ERR, "NFP init beat failed."); 1599 return err; 1600 } 1601 1602 err = nfp_net_keepalive_start(multi_pf); 1603 if (err != 0) { 1604 PMD_DRV_LOG(ERR, "NFP write beat failed."); 1605 goto keepalive_uninit; 1606 } 1607 1608 if (policy == NFP_NSP_APP_FW_LOAD_FLASH && nfp_nsp_has_stored_fw_load(nsp)) { 1609 err = nfp_fw_reload_from_flash(nsp); 1610 if (err != 0) { 1611 PMD_DRV_LOG(ERR, "Load multi PF firmware from flash failed."); 1612 goto keepalive_stop; 1613 } 1614 } else if (fw_name[0] != 0) { 1615 err = nfp_fw_reload_for_multi_pf_from_disk(nsp, fw_name, dev_info, 1616 pf_dev, reset); 1617 if (err != 0) { 1618 PMD_DRV_LOG(ERR, "Load multi PF firmware from disk failed."); 1619 goto keepalive_stop; 1620 } 1621 } else { 1622 PMD_DRV_LOG(ERR, "Not load firmware, please update flash or recofigure card."); 1623 err = -ENODATA; 1624 goto keepalive_stop; 1625 } 1626 1627 nfp_net_keepalive_clear_others(dev_info, multi_pf); 1628 1629 return 0; 1630 1631 keepalive_stop: 1632 nfp_net_keepalive_stop(multi_pf); 1633 keepalive_uninit: 1634 nfp_net_keepalive_uninit(multi_pf); 1635 1636 return err; 1637 } 1638 1639 static int 1640 nfp_strtol(const char *buf, 1641 int base, 1642 long *value) 1643 { 1644 long val; 1645 char *tmp; 1646 1647 if (value == NULL) 1648 return -EINVAL; 1649 1650 val = strtol(buf, &tmp, base); 1651 if (tmp == NULL || *tmp != 0) 1652 return -EINVAL; 1653 1654 *value = val; 1655 1656 return 0; 1657 } 1658 1659 static int 1660 nfp_fw_policy_value_get(struct nfp_nsp *nsp, 1661 const char *key, 1662 const char *default_val, 1663 int max_val, 1664 int *value) 1665 { 1666 int ret; 1667 int64_t val; 1668 char buf[64]; 1669 1670 snprintf(buf, sizeof(buf), "%s", key); 1671 ret = nfp_nsp_hwinfo_lookup_optional(nsp, buf, sizeof(buf), default_val); 1672 if (ret != 0) 1673 return ret; 1674 1675 ret = nfp_strtol(buf, 0, &val); 1676 if (ret != 0 || val < 0 || val > max_val) { 1677 PMD_DRV_LOG(WARNING, "Invalid value '%s' from '%s', ignoring.", 1678 buf, key); 1679 /* Fall back to the default value */ 1680 ret = nfp_strtol(default_val, 0, &val); 1681 if (ret != 0) 1682 return ret; 1683 } 1684 1685 *value = val; 1686 1687 return 0; 1688 } 1689 1690 static int 1691 nfp_fw_setup(struct nfp_pf_dev *pf_dev, 1692 const struct nfp_dev_info *dev_info) 1693 { 1694 int err; 1695 int reset; 1696 int policy; 1697 char fw_name[125]; 1698 struct nfp_nsp *nsp; 1699 1700 nsp = nfp_nsp_open(pf_dev->cpp); 1701 if (nsp == NULL) { 1702 PMD_DRV_LOG(ERR, "NFP error when obtaining NSP handle."); 1703 return -EIO; 1704 } 1705 1706 err = nfp_fw_policy_value_get(nsp, "abi_drv_reset", 1707 NFP_NSP_DRV_RESET_DEFAULT, NFP_NSP_DRV_RESET_NEVER, 1708 &reset); 1709 if (err != 0) { 1710 PMD_DRV_LOG(ERR, "Get 'abi_drv_reset' from HWinfo failed."); 1711 goto close_nsp; 1712 } 1713 1714 err = nfp_fw_policy_value_get(nsp, "app_fw_from_flash", 1715 NFP_NSP_APP_FW_LOAD_DEFAULT, NFP_NSP_APP_FW_LOAD_PREF, 1716 &policy); 1717 if (err != 0) { 1718 PMD_DRV_LOG(ERR, "Get 'app_fw_from_flash' from HWinfo failed."); 1719 goto close_nsp; 1720 } 1721 1722 fw_name[0] = 0; 1723 if (policy != NFP_NSP_APP_FW_LOAD_FLASH) { 1724 err = nfp_fw_get_name(pf_dev, fw_name, sizeof(fw_name)); 1725 if (err != 0) { 1726 PMD_DRV_LOG(ERR, "Can not find suitable firmware."); 1727 goto close_nsp; 1728 } 1729 } 1730 1731 if (pf_dev->multi_pf.enabled) 1732 err = nfp_fw_reload_for_multi_pf(nsp, fw_name, dev_info, 1733 pf_dev, reset, policy); 1734 else 1735 err = nfp_fw_reload_for_single_pf(nsp, fw_name, pf_dev, 1736 reset, policy); 1737 1738 close_nsp: 1739 nfp_nsp_close(nsp); 1740 return err; 1741 } 1742 1743 static inline bool 1744 nfp_check_multi_pf_from_fw(uint32_t total_vnics) 1745 { 1746 if (total_vnics == 1) 1747 return true; 1748 1749 return false; 1750 } 1751 1752 static inline bool 1753 nfp_check_multi_pf_from_nsp(struct rte_pci_device *pci_dev, 1754 struct nfp_cpp *cpp) 1755 { 1756 bool flag; 1757 struct nfp_nsp *nsp; 1758 1759 nsp = nfp_nsp_open(cpp); 1760 if (nsp == NULL) { 1761 PMD_DRV_LOG(ERR, "NFP error when obtaining NSP handle."); 1762 return false; 1763 } 1764 1765 flag = (nfp_nsp_get_abi_ver_major(nsp) > 0) && 1766 (pci_dev->id.device_id == PCI_DEVICE_ID_NFP3800_PF_NIC); 1767 1768 nfp_nsp_close(nsp); 1769 return flag; 1770 } 1771 1772 static int 1773 nfp_enable_multi_pf(struct nfp_pf_dev *pf_dev) 1774 { 1775 int err = 0; 1776 uint64_t tx_base; 1777 uint8_t *ctrl_bar; 1778 struct nfp_hw *hw; 1779 uint32_t cap_extend; 1780 struct nfp_net_hw net_hw; 1781 struct nfp_cpp_area *area; 1782 char name[RTE_ETH_NAME_MAX_LEN]; 1783 1784 memset(&net_hw, 0, sizeof(struct nfp_net_hw)); 1785 1786 /* Map the symbol table */ 1787 pf_dev->ctrl_bar_size = NFP_NET_CFG_BAR_SZ_MIN; 1788 snprintf(name, sizeof(name), "_pf%u_net_bar0", 1789 pf_dev->multi_pf.function_id); 1790 ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, name, pf_dev->ctrl_bar_size, 1791 &area); 1792 if (ctrl_bar == NULL) { 1793 PMD_INIT_LOG(ERR, "Failed to find data vNIC memory symbol."); 1794 return -ENODEV; 1795 } 1796 1797 hw = &net_hw.super; 1798 hw->ctrl_bar = ctrl_bar; 1799 1800 /* Check the version from firmware */ 1801 if (!nfp_net_version_check(hw, pf_dev)) { 1802 PMD_INIT_LOG(ERR, "Not the valid version."); 1803 err = -EINVAL; 1804 goto end; 1805 } 1806 1807 /* Set the ctrl bar size */ 1808 nfp_net_ctrl_bar_size_set(pf_dev); 1809 1810 if (!pf_dev->multi_pf.enabled) 1811 goto end; 1812 1813 cap_extend = nn_cfg_readl(hw, NFP_NET_CFG_CAP_WORD1); 1814 if ((cap_extend & NFP_NET_CFG_CTRL_MULTI_PF) == 0) { 1815 PMD_INIT_LOG(ERR, "Loaded firmware does not support multiple PF."); 1816 err = -EINVAL; 1817 goto end; 1818 } 1819 1820 tx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ); 1821 net_hw.tx_bar = pf_dev->qc_bar + tx_base * NFP_QCP_QUEUE_ADDR_SZ; 1822 nfp_net_cfg_queue_setup(&net_hw); 1823 rte_spinlock_init(&hw->reconfig_lock); 1824 err = nfp_ext_reconfig(&net_hw.super, NFP_NET_CFG_CTRL_MULTI_PF, 1825 NFP_NET_CFG_UPDATE_GEN); 1826 if (err != 0) { 1827 PMD_INIT_LOG(ERR, "Configure multiple PF failed."); 1828 goto end; 1829 } 1830 1831 end: 1832 nfp_cpp_area_release_free(area); 1833 return err; 1834 } 1835 1836 static bool 1837 nfp_app_fw_nic_total_phyports_check(struct nfp_pf_dev *pf_dev) 1838 { 1839 uint8_t total_phyports; 1840 1841 total_phyports = nfp_net_get_phyports_from_fw(pf_dev); 1842 1843 if (pf_dev->multi_pf.enabled) { 1844 if (!nfp_check_multi_pf_from_fw(total_phyports)) { 1845 PMD_INIT_LOG(ERR, "NSP report multipf, but FW report not multipf."); 1846 return false; 1847 } 1848 } else { 1849 /* 1850 * For single PF the number of vNICs exposed should be the same as the 1851 * number of physical ports. 1852 */ 1853 if (total_phyports != pf_dev->nfp_eth_table->count) { 1854 PMD_INIT_LOG(ERR, "Total physical ports do not match number of vNICs."); 1855 return false; 1856 } 1857 } 1858 1859 return true; 1860 } 1861 1862 static void 1863 nfp_port_name_generate(char *port_name, 1864 size_t length, 1865 int port_id, 1866 struct nfp_pf_dev *pf_dev) 1867 { 1868 const char *name = pf_dev->pci_dev->device.name; 1869 1870 if (pf_dev->multi_pf.enabled) 1871 snprintf(port_name, length, "%s", name); 1872 else 1873 snprintf(port_name, length, "%s_port%u", name, port_id); 1874 } 1875 1876 static int 1877 nfp_init_app_fw_nic(struct nfp_net_hw_priv *hw_priv) 1878 { 1879 uint8_t i; 1880 uint8_t id; 1881 int ret = 0; 1882 struct nfp_app_fw_nic *app_fw_nic; 1883 struct nfp_eth_table *nfp_eth_table; 1884 char bar_name[RTE_ETH_NAME_MAX_LEN]; 1885 char port_name[RTE_ETH_NAME_MAX_LEN]; 1886 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 1887 struct nfp_net_init hw_init = { 1888 .hw_priv = hw_priv, 1889 }; 1890 1891 nfp_eth_table = pf_dev->nfp_eth_table; 1892 PMD_INIT_LOG(INFO, "Total physical ports: %d.", nfp_eth_table->count); 1893 id = nfp_function_id_get(pf_dev, 0); 1894 1895 /* Allocate memory for the CoreNIC app */ 1896 app_fw_nic = rte_zmalloc("nfp_app_fw_nic", sizeof(*app_fw_nic), 0); 1897 if (app_fw_nic == NULL) 1898 return -ENOMEM; 1899 1900 /* Point the app_fw_priv pointer in the PF to the coreNIC app */ 1901 pf_dev->app_fw_priv = app_fw_nic; 1902 1903 /* Check the number of vNIC's created for the PF */ 1904 if (!nfp_app_fw_nic_total_phyports_check(pf_dev)) { 1905 ret = -ENODEV; 1906 goto app_cleanup; 1907 } 1908 1909 /* Populate coreNIC app properties */ 1910 if (pf_dev->total_phyports > 1) 1911 app_fw_nic->multiport = true; 1912 1913 /* Map the symbol table */ 1914 snprintf(bar_name, sizeof(bar_name), "_pf%u_net_bar0", id); 1915 pf_dev->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, bar_name, 1916 pf_dev->total_phyports * pf_dev->ctrl_bar_size, 1917 &pf_dev->ctrl_area); 1918 if (pf_dev->ctrl_bar == NULL) { 1919 PMD_INIT_LOG(ERR, "The nfp_rtsym_map fails for %s.", bar_name); 1920 ret = -EIO; 1921 goto app_cleanup; 1922 } 1923 1924 PMD_INIT_LOG(DEBUG, "Ctrl bar: %p.", pf_dev->ctrl_bar); 1925 1926 /* Loop through all physical ports on PF */ 1927 for (i = 0; i < pf_dev->total_phyports; i++) { 1928 nfp_port_name_generate(port_name, sizeof(port_name), i, pf_dev); 1929 1930 id = nfp_function_id_get(pf_dev, i); 1931 hw_init.idx = id; 1932 hw_init.nfp_idx = nfp_eth_table->ports[id].index; 1933 ret = rte_eth_dev_create(&pf_dev->pci_dev->device, port_name, 1934 sizeof(struct nfp_net_hw), NULL, NULL, 1935 nfp_net_init, &hw_init); 1936 if (ret != 0) 1937 goto port_cleanup; 1938 1939 } /* End loop, all ports on this PF */ 1940 1941 return 0; 1942 1943 port_cleanup: 1944 for (uint32_t j = 0; j < i; j++) { 1945 struct rte_eth_dev *eth_dev; 1946 1947 nfp_port_name_generate(port_name, sizeof(port_name), j, pf_dev); 1948 eth_dev = rte_eth_dev_get_by_name(port_name); 1949 if (eth_dev != NULL) 1950 rte_eth_dev_destroy(eth_dev, nfp_net_uninit); 1951 } 1952 nfp_cpp_area_release_free(pf_dev->ctrl_area); 1953 app_cleanup: 1954 rte_free(app_fw_nic); 1955 1956 return ret; 1957 } 1958 1959 static int 1960 nfp_net_hwinfo_set(uint8_t function_id, 1961 struct nfp_rtsym_table *sym_tbl, 1962 struct nfp_cpp *cpp, 1963 enum nfp_app_fw_id app_fw_id) 1964 { 1965 int ret = 0; 1966 uint64_t app_cap; 1967 struct nfp_nsp *nsp; 1968 uint8_t sp_indiff = 1; 1969 char hw_info[RTE_ETH_NAME_MAX_LEN]; 1970 char app_cap_name[RTE_ETH_NAME_MAX_LEN]; 1971 1972 if (app_fw_id != NFP_APP_FW_FLOWER_NIC) { 1973 /* Read the app capabilities of the firmware loaded */ 1974 snprintf(app_cap_name, sizeof(app_cap_name), "_pf%u_net_app_cap", function_id); 1975 app_cap = nfp_rtsym_read_le(sym_tbl, app_cap_name, &ret); 1976 if (ret != 0) { 1977 PMD_INIT_LOG(ERR, "Could not read app_fw_cap from firmware."); 1978 return ret; 1979 } 1980 1981 /* Calculate the value of sp_indiff and write to hw_info */ 1982 sp_indiff = app_cap & NFP_NET_APP_CAP_SP_INDIFF; 1983 } 1984 1985 snprintf(hw_info, sizeof(hw_info), "sp_indiff=%u", sp_indiff); 1986 1987 nsp = nfp_nsp_open(cpp); 1988 if (nsp == NULL) { 1989 PMD_INIT_LOG(ERR, "Could not get NSP."); 1990 return -EIO; 1991 } 1992 1993 ret = nfp_nsp_hwinfo_set(nsp, hw_info, sizeof(hw_info)); 1994 nfp_nsp_close(nsp); 1995 if (ret != 0) { 1996 PMD_INIT_LOG(ERR, "Failed to set parameter to hwinfo."); 1997 return ret; 1998 } 1999 2000 return 0; 2001 } 2002 2003 const uint32_t nfp_eth_media_table[NFP_MEDIA_LINK_MODES_NUMBER] = { 2004 [NFP_MEDIA_W0_RJ45_10M] = RTE_ETH_LINK_SPEED_10M, 2005 [NFP_MEDIA_W0_RJ45_10M_HD] = RTE_ETH_LINK_SPEED_10M_HD, 2006 [NFP_MEDIA_W0_RJ45_100M] = RTE_ETH_LINK_SPEED_100M, 2007 [NFP_MEDIA_W0_RJ45_100M_HD] = RTE_ETH_LINK_SPEED_100M_HD, 2008 [NFP_MEDIA_W0_RJ45_1G] = RTE_ETH_LINK_SPEED_1G, 2009 [NFP_MEDIA_W0_RJ45_2P5G] = RTE_ETH_LINK_SPEED_2_5G, 2010 [NFP_MEDIA_W0_RJ45_5G] = RTE_ETH_LINK_SPEED_5G, 2011 [NFP_MEDIA_W0_RJ45_10G] = RTE_ETH_LINK_SPEED_10G, 2012 [NFP_MEDIA_1000BASE_CX] = RTE_ETH_LINK_SPEED_1G, 2013 [NFP_MEDIA_1000BASE_KX] = RTE_ETH_LINK_SPEED_1G, 2014 [NFP_MEDIA_10GBASE_KX4] = RTE_ETH_LINK_SPEED_10G, 2015 [NFP_MEDIA_10GBASE_KR] = RTE_ETH_LINK_SPEED_10G, 2016 [NFP_MEDIA_10GBASE_CX4] = RTE_ETH_LINK_SPEED_10G, 2017 [NFP_MEDIA_10GBASE_CR] = RTE_ETH_LINK_SPEED_10G, 2018 [NFP_MEDIA_10GBASE_SR] = RTE_ETH_LINK_SPEED_10G, 2019 [NFP_MEDIA_10GBASE_ER] = RTE_ETH_LINK_SPEED_10G, 2020 [NFP_MEDIA_25GBASE_KR] = RTE_ETH_LINK_SPEED_25G, 2021 [NFP_MEDIA_25GBASE_KR_S] = RTE_ETH_LINK_SPEED_25G, 2022 [NFP_MEDIA_25GBASE_CR] = RTE_ETH_LINK_SPEED_25G, 2023 [NFP_MEDIA_25GBASE_CR_S] = RTE_ETH_LINK_SPEED_25G, 2024 [NFP_MEDIA_25GBASE_SR] = RTE_ETH_LINK_SPEED_25G, 2025 [NFP_MEDIA_40GBASE_CR4] = RTE_ETH_LINK_SPEED_40G, 2026 [NFP_MEDIA_40GBASE_KR4] = RTE_ETH_LINK_SPEED_40G, 2027 [NFP_MEDIA_40GBASE_SR4] = RTE_ETH_LINK_SPEED_40G, 2028 [NFP_MEDIA_40GBASE_LR4] = RTE_ETH_LINK_SPEED_40G, 2029 [NFP_MEDIA_50GBASE_KR] = RTE_ETH_LINK_SPEED_50G, 2030 [NFP_MEDIA_50GBASE_SR] = RTE_ETH_LINK_SPEED_50G, 2031 [NFP_MEDIA_50GBASE_CR] = RTE_ETH_LINK_SPEED_50G, 2032 [NFP_MEDIA_50GBASE_LR] = RTE_ETH_LINK_SPEED_50G, 2033 [NFP_MEDIA_50GBASE_ER] = RTE_ETH_LINK_SPEED_50G, 2034 [NFP_MEDIA_50GBASE_FR] = RTE_ETH_LINK_SPEED_50G, 2035 [NFP_MEDIA_100GBASE_KR4] = RTE_ETH_LINK_SPEED_100G, 2036 [NFP_MEDIA_100GBASE_SR4] = RTE_ETH_LINK_SPEED_100G, 2037 [NFP_MEDIA_100GBASE_CR4] = RTE_ETH_LINK_SPEED_100G, 2038 [NFP_MEDIA_100GBASE_KP4] = RTE_ETH_LINK_SPEED_100G, 2039 [NFP_MEDIA_100GBASE_CR10] = RTE_ETH_LINK_SPEED_100G, 2040 [NFP_MEDIA_10GBASE_LR] = RTE_ETH_LINK_SPEED_10G, 2041 [NFP_MEDIA_25GBASE_LR] = RTE_ETH_LINK_SPEED_25G, 2042 [NFP_MEDIA_25GBASE_ER] = RTE_ETH_LINK_SPEED_25G 2043 }; 2044 2045 static int 2046 nfp_net_speed_capa_get_real(struct nfp_eth_media_buf *media_buf, 2047 struct nfp_pf_dev *pf_dev) 2048 { 2049 uint32_t i; 2050 uint32_t j; 2051 uint32_t offset; 2052 uint32_t speed_capa = 0; 2053 uint64_t supported_modes; 2054 2055 for (i = 0; i < RTE_DIM(media_buf->supported_modes); i++) { 2056 supported_modes = media_buf->supported_modes[i]; 2057 offset = i * UINT64_BIT; 2058 for (j = 0; j < UINT64_BIT; j++) { 2059 if (supported_modes == 0) 2060 break; 2061 2062 if ((supported_modes & 1) != 0) { 2063 if ((j + offset) >= NFP_MEDIA_LINK_MODES_NUMBER) { 2064 PMD_DRV_LOG(ERR, "Invalid offset of media table."); 2065 return -EINVAL; 2066 } 2067 2068 speed_capa |= nfp_eth_media_table[j + offset]; 2069 } 2070 2071 supported_modes = supported_modes >> 1; 2072 } 2073 } 2074 2075 pf_dev->speed_capa = speed_capa; 2076 2077 return pf_dev->speed_capa == 0 ? -EINVAL : 0; 2078 } 2079 2080 static int 2081 nfp_net_speed_cap_get_one(struct nfp_pf_dev *pf_dev, 2082 uint32_t port_id) 2083 { 2084 int ret; 2085 struct nfp_nsp *nsp; 2086 struct nfp_eth_media_buf media_buf; 2087 2088 media_buf.eth_index = pf_dev->nfp_eth_table->ports[port_id].eth_index; 2089 pf_dev->speed_capa = 0; 2090 2091 nsp = nfp_nsp_open(pf_dev->cpp); 2092 if (nsp == NULL) { 2093 PMD_DRV_LOG(ERR, "Could not get NSP."); 2094 return -EIO; 2095 } 2096 2097 ret = nfp_nsp_read_media(nsp, &media_buf, sizeof(media_buf)); 2098 nfp_nsp_close(nsp); 2099 if (ret != 0) { 2100 PMD_DRV_LOG(ERR, "Failed to read media."); 2101 return ret; 2102 } 2103 2104 ret = nfp_net_speed_capa_get_real(&media_buf, pf_dev); 2105 if (ret < 0) { 2106 PMD_DRV_LOG(ERR, "Speed capability is invalid."); 2107 return ret; 2108 } 2109 2110 return 0; 2111 } 2112 2113 static int 2114 nfp_net_speed_cap_get(struct nfp_pf_dev *pf_dev) 2115 { 2116 int ret; 2117 uint32_t i; 2118 uint32_t id; 2119 uint32_t count; 2120 2121 count = pf_dev->total_phyports; 2122 for (i = 0; i < count; i++) { 2123 id = nfp_function_id_get(pf_dev, i); 2124 ret = nfp_net_speed_cap_get_one(pf_dev, id); 2125 if (ret != 0) { 2126 PMD_INIT_LOG(ERR, "Failed to get port %d speed capability.", id); 2127 return ret; 2128 } 2129 } 2130 2131 return 0; 2132 } 2133 2134 /* Force the physical port down to clear the possible DMA error */ 2135 static int 2136 nfp_net_force_port_down(struct nfp_pf_dev *pf_dev) 2137 { 2138 int ret; 2139 uint32_t i; 2140 uint32_t id; 2141 uint32_t index; 2142 uint32_t count; 2143 2144 count = pf_dev->total_phyports; 2145 for (i = 0; i < count; i++) { 2146 id = nfp_function_id_get(pf_dev, i); 2147 index = pf_dev->nfp_eth_table->ports[id].index; 2148 ret = nfp_eth_set_configured(pf_dev->cpp, index, 0); 2149 if (ret < 0) 2150 return ret; 2151 } 2152 2153 return 0; 2154 } 2155 2156 static int 2157 nfp_fw_app_primary_init(struct nfp_net_hw_priv *hw_priv) 2158 { 2159 int ret; 2160 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 2161 2162 switch (pf_dev->app_fw_id) { 2163 case NFP_APP_FW_CORE_NIC: 2164 PMD_INIT_LOG(INFO, "Initializing coreNIC."); 2165 ret = nfp_init_app_fw_nic(hw_priv); 2166 if (ret != 0) { 2167 PMD_INIT_LOG(ERR, "Could not initialize coreNIC!"); 2168 return ret; 2169 } 2170 break; 2171 case NFP_APP_FW_FLOWER_NIC: 2172 PMD_INIT_LOG(INFO, "Initializing Flower."); 2173 ret = nfp_init_app_fw_flower(hw_priv); 2174 if (ret != 0) { 2175 PMD_INIT_LOG(ERR, "Could not initialize Flower!"); 2176 return ret; 2177 } 2178 break; 2179 default: 2180 PMD_INIT_LOG(ERR, "Unsupported Firmware loaded."); 2181 ret = -EINVAL; 2182 return ret; 2183 } 2184 2185 return 0; 2186 } 2187 2188 static int 2189 nfp_pf_get_max_vf(struct nfp_pf_dev *pf_dev) 2190 { 2191 int ret; 2192 uint32_t max_vfs; 2193 2194 max_vfs = nfp_rtsym_read_le(pf_dev->sym_tbl, "nfd_vf_cfg_max_vfs", &ret); 2195 if (ret != 0) 2196 return ret; 2197 2198 pf_dev->max_vfs = max_vfs; 2199 2200 return 0; 2201 } 2202 2203 static int 2204 nfp_pf_get_sriov_vf(struct nfp_pf_dev *pf_dev, 2205 const struct nfp_dev_info *dev_info) 2206 { 2207 int ret; 2208 off_t pos; 2209 uint16_t offset; 2210 uint16_t sriov_vf; 2211 2212 /* For 3800 single-PF and 4000 card */ 2213 if (!pf_dev->multi_pf.enabled) { 2214 pf_dev->sriov_vf = pf_dev->max_vfs; 2215 return 0; 2216 } 2217 2218 pos = rte_pci_find_ext_capability(pf_dev->pci_dev, RTE_PCI_EXT_CAP_ID_SRIOV); 2219 if (pos == 0) { 2220 PMD_INIT_LOG(ERR, "Can not get the pci sriov cap."); 2221 return -EIO; 2222 } 2223 2224 /* 2225 * Management firmware ensures that sriov capability registers 2226 * are initialized correctly. 2227 */ 2228 ret = rte_pci_read_config(pf_dev->pci_dev, &sriov_vf, sizeof(sriov_vf), 2229 pos + RTE_PCI_SRIOV_TOTAL_VF); 2230 if (ret < 0) { 2231 PMD_INIT_LOG(ERR, "Can not read the sriov toatl VF."); 2232 return -EIO; 2233 } 2234 2235 /* Offset of first VF is relative to its PF. */ 2236 ret = rte_pci_read_config(pf_dev->pci_dev, &offset, sizeof(offset), 2237 pos + RTE_PCI_SRIOV_VF_OFFSET); 2238 if (ret < 0) { 2239 PMD_INIT_LOG(ERR, "Can not get the VF offset."); 2240 return -EIO; 2241 } 2242 2243 offset += pf_dev->multi_pf.function_id; 2244 if (offset < dev_info->pf_num_per_unit) 2245 return -ERANGE; 2246 2247 offset -= dev_info->pf_num_per_unit; 2248 if (offset >= pf_dev->max_vfs || offset + sriov_vf > pf_dev->max_vfs) { 2249 PMD_INIT_LOG(ERR, "The pci allocate VF is more than the MAX VF."); 2250 return -ERANGE; 2251 } 2252 2253 pf_dev->vf_base_id = offset; 2254 pf_dev->sriov_vf = sriov_vf; 2255 2256 return 0; 2257 } 2258 2259 static int 2260 nfp_net_get_vf_info(struct nfp_pf_dev *pf_dev, 2261 const struct nfp_dev_info *dev_info) 2262 { 2263 int ret; 2264 2265 ret = nfp_pf_get_max_vf(pf_dev); 2266 if (ret != 0) { 2267 if (ret != -ENOENT) { 2268 PMD_INIT_LOG(ERR, "Read max VFs failed."); 2269 return ret; 2270 } 2271 2272 PMD_INIT_LOG(WARNING, "The firmware can not support read max VFs."); 2273 return 0; 2274 } 2275 2276 if (pf_dev->max_vfs == 0) 2277 return 0; 2278 2279 ret = nfp_pf_get_sriov_vf(pf_dev, dev_info); 2280 if (ret < 0) 2281 return ret; 2282 2283 pf_dev->queue_per_vf = NFP_QUEUE_PER_VF; 2284 2285 return 0; 2286 } 2287 2288 static int 2289 nfp_net_vf_config_init(struct nfp_pf_dev *pf_dev) 2290 { 2291 int ret = 0; 2292 uint32_t min_size; 2293 char vf_bar_name[RTE_ETH_NAME_MAX_LEN]; 2294 char vf_cfg_name[RTE_ETH_NAME_MAX_LEN]; 2295 2296 if (pf_dev->sriov_vf == 0) 2297 return 0; 2298 2299 min_size = pf_dev->ctrl_bar_size * pf_dev->sriov_vf; 2300 snprintf(vf_bar_name, sizeof(vf_bar_name), "_pf%d_net_vf_bar", 2301 pf_dev->multi_pf.function_id); 2302 pf_dev->vf_bar = nfp_rtsym_map_offset(pf_dev->sym_tbl, vf_bar_name, 2303 pf_dev->ctrl_bar_size * pf_dev->vf_base_id, 2304 min_size, &pf_dev->vf_area); 2305 if (pf_dev->vf_bar == NULL) { 2306 PMD_INIT_LOG(ERR, "Failed to get vf cfg."); 2307 return -EIO; 2308 } 2309 2310 min_size = NFP_NET_VF_CFG_SZ * pf_dev->sriov_vf + NFP_NET_VF_CFG_MB_SZ; 2311 snprintf(vf_cfg_name, sizeof(vf_cfg_name), "_pf%d_net_vf_cfg2", 2312 pf_dev->multi_pf.function_id); 2313 pf_dev->vf_cfg_tbl_bar = nfp_rtsym_map(pf_dev->sym_tbl, vf_cfg_name, 2314 min_size, &pf_dev->vf_cfg_tbl_area); 2315 if (pf_dev->vf_cfg_tbl_bar == NULL) { 2316 PMD_INIT_LOG(ERR, "Failed to get vf configure table."); 2317 ret = -EIO; 2318 goto vf_bar_cleanup; 2319 } 2320 2321 return 0; 2322 2323 vf_bar_cleanup: 2324 nfp_cpp_area_release_free(pf_dev->vf_area); 2325 2326 return ret; 2327 } 2328 2329 static int 2330 nfp_pf_init(struct rte_pci_device *pci_dev) 2331 { 2332 void *sync; 2333 int ret = 0; 2334 uint64_t addr; 2335 uint32_t cpp_id; 2336 uint8_t function_id; 2337 struct nfp_cpp *cpp; 2338 struct nfp_pf_dev *pf_dev; 2339 struct nfp_hwinfo *hwinfo; 2340 enum nfp_app_fw_id app_fw_id; 2341 char name[RTE_ETH_NAME_MAX_LEN]; 2342 struct nfp_rtsym_table *sym_tbl; 2343 struct nfp_net_hw_priv *hw_priv; 2344 char app_name[RTE_ETH_NAME_MAX_LEN]; 2345 struct nfp_eth_table *nfp_eth_table; 2346 const struct nfp_dev_info *dev_info; 2347 2348 if (pci_dev == NULL) 2349 return -ENODEV; 2350 2351 if (pci_dev->mem_resource[0].addr == NULL) { 2352 PMD_INIT_LOG(ERR, "The address of BAR0 is NULL."); 2353 return -ENODEV; 2354 } 2355 2356 dev_info = nfp_dev_info_get(pci_dev->id.device_id); 2357 if (dev_info == NULL) { 2358 PMD_INIT_LOG(ERR, "Not supported device ID."); 2359 return -ENODEV; 2360 } 2361 2362 hw_priv = rte_zmalloc(NULL, sizeof(*hw_priv), 0); 2363 if (hw_priv == NULL) { 2364 PMD_INIT_LOG(ERR, "Can not alloc memory for hw priv data."); 2365 return -ENOMEM; 2366 } 2367 2368 /* Allocate memory for the PF "device" */ 2369 function_id = (pci_dev->addr.function) & 0x07; 2370 snprintf(name, sizeof(name), "nfp_pf%u", function_id); 2371 pf_dev = rte_zmalloc(name, sizeof(*pf_dev), 0); 2372 if (pf_dev == NULL) { 2373 PMD_INIT_LOG(ERR, "Can not allocate memory for the PF device."); 2374 ret = -ENOMEM; 2375 goto hw_priv_free; 2376 } 2377 2378 hw_priv->dev_info = dev_info; 2379 hw_priv->pf_dev = pf_dev; 2380 2381 sync = nfp_sync_alloc(); 2382 if (sync == NULL) { 2383 PMD_INIT_LOG(ERR, "Failed to alloc sync zone."); 2384 ret = -ENOMEM; 2385 goto pf_cleanup; 2386 } 2387 2388 pf_dev->sync = sync; 2389 2390 /* 2391 * When device bound to UIO, the device could be used, by mistake, 2392 * by two DPDK apps, and the UIO driver does not avoid it. This 2393 * could lead to a serious problem when configuring the NFP CPP 2394 * interface. Here we avoid this telling to the CPP init code to 2395 * use a lock file if UIO is being used. 2396 */ 2397 if (pci_dev->kdrv == RTE_PCI_KDRV_VFIO) 2398 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, false); 2399 else 2400 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, true); 2401 2402 if (cpp == NULL) { 2403 PMD_INIT_LOG(ERR, "A CPP handle can not be obtained."); 2404 ret = -EIO; 2405 goto sync_free; 2406 } 2407 2408 pf_dev->cpp = cpp; 2409 pf_dev->pci_dev = pci_dev; 2410 2411 hwinfo = nfp_hwinfo_read(cpp); 2412 if (hwinfo == NULL) { 2413 PMD_INIT_LOG(ERR, "Error reading hwinfo table."); 2414 ret = -EIO; 2415 goto cpp_cleanup; 2416 } 2417 2418 pf_dev->hwinfo = hwinfo; 2419 2420 /* Read the number of physical ports from hardware */ 2421 nfp_eth_table = nfp_eth_read_ports(cpp); 2422 if (nfp_eth_table == NULL) { 2423 PMD_INIT_LOG(ERR, "Error reading NFP ethernet table."); 2424 ret = -EIO; 2425 goto hwinfo_cleanup; 2426 } 2427 2428 if (nfp_eth_table->count == 0 || nfp_eth_table->count > 8) { 2429 PMD_INIT_LOG(ERR, "NFP ethernet table reports wrong ports: %u.", 2430 nfp_eth_table->count); 2431 ret = -EIO; 2432 goto eth_table_cleanup; 2433 } 2434 2435 pf_dev->nfp_eth_table = nfp_eth_table; 2436 pf_dev->multi_pf.enabled = nfp_check_multi_pf_from_nsp(pci_dev, cpp); 2437 pf_dev->multi_pf.function_id = function_id; 2438 pf_dev->total_phyports = nfp_net_get_phyports_from_nsp(pf_dev); 2439 2440 ret = nfp_net_force_port_down(pf_dev); 2441 if (ret != 0) { 2442 PMD_INIT_LOG(ERR, "Failed to force port down."); 2443 ret = -EIO; 2444 goto eth_table_cleanup; 2445 } 2446 2447 ret = nfp_devargs_parse(&pf_dev->devargs, pci_dev->device.devargs); 2448 if (ret != 0) { 2449 PMD_INIT_LOG(ERR, "Error when parsing device args."); 2450 ret = -EINVAL; 2451 goto eth_table_cleanup; 2452 } 2453 2454 ret = nfp_net_device_activate(pf_dev); 2455 if (ret != 0) { 2456 PMD_INIT_LOG(ERR, "Failed to activate the NFP device."); 2457 ret = -EIO; 2458 goto eth_table_cleanup; 2459 } 2460 2461 ret = nfp_fw_setup(pf_dev, dev_info); 2462 if (ret != 0) { 2463 PMD_INIT_LOG(ERR, "Error when uploading firmware."); 2464 ret = -EIO; 2465 goto eth_table_cleanup; 2466 } 2467 2468 /* Now the symbol table should be there */ 2469 sym_tbl = nfp_rtsym_table_read(cpp); 2470 if (sym_tbl == NULL) { 2471 PMD_INIT_LOG(ERR, "Something is wrong with the firmware symbol table."); 2472 ret = -EIO; 2473 goto fw_cleanup; 2474 } 2475 2476 pf_dev->sym_tbl = sym_tbl; 2477 2478 /* Read the app ID of the firmware loaded */ 2479 snprintf(app_name, sizeof(app_name), "_pf%u_net_app_id", function_id); 2480 app_fw_id = nfp_rtsym_read_le(sym_tbl, app_name, &ret); 2481 if (ret != 0) { 2482 PMD_INIT_LOG(ERR, "Could not read %s from firmware.", app_name); 2483 ret = -EIO; 2484 goto sym_tbl_cleanup; 2485 } 2486 2487 pf_dev->app_fw_id = app_fw_id; 2488 2489 /* Write sp_indiff to hw_info */ 2490 ret = nfp_net_hwinfo_set(function_id, sym_tbl, cpp, app_fw_id); 2491 if (ret != 0) { 2492 PMD_INIT_LOG(ERR, "Failed to set hwinfo."); 2493 ret = -EIO; 2494 goto sym_tbl_cleanup; 2495 } 2496 2497 ret = nfp_net_speed_cap_get(pf_dev); 2498 if (ret != 0) { 2499 PMD_INIT_LOG(ERR, "Failed to get speed capability."); 2500 ret = -EIO; 2501 goto sym_tbl_cleanup; 2502 } 2503 2504 /* Get the VF info */ 2505 ret = nfp_net_get_vf_info(pf_dev, dev_info); 2506 if (ret != 0) { 2507 PMD_INIT_LOG(ERR, "Failed to get VF info."); 2508 ret = -EIO; 2509 goto sym_tbl_cleanup; 2510 } 2511 2512 /* Configure access to tx/rx vNIC BARs */ 2513 addr = nfp_qcp_queue_offset(dev_info, 0); 2514 cpp_id = NFP_CPP_ISLAND_ID(0, NFP_CPP_ACTION_RW, 0, 0); 2515 2516 pf_dev->qc_bar = nfp_cpp_map_area(pf_dev->cpp, cpp_id, 2517 addr, dev_info->qc_area_sz, &pf_dev->qc_area); 2518 if (pf_dev->qc_bar == NULL) { 2519 PMD_INIT_LOG(ERR, "The nfp_rtsym_map fails for net.qc."); 2520 ret = -EIO; 2521 goto sym_tbl_cleanup; 2522 } 2523 2524 PMD_INIT_LOG(DEBUG, "The qc_bar address: %p.", pf_dev->qc_bar); 2525 2526 pf_dev->mac_stats_bar = nfp_rtsym_map(sym_tbl, "_mac_stats", 2527 NFP_MAC_STATS_SIZE * nfp_eth_table->max_index, 2528 &pf_dev->mac_stats_area); 2529 if (pf_dev->mac_stats_bar == NULL) { 2530 PMD_INIT_LOG(ERR, "The nfp_rtsym_map fails for _mac_stats."); 2531 goto hwqueues_cleanup; 2532 } 2533 2534 ret = nfp_enable_multi_pf(pf_dev); 2535 if (ret != 0) 2536 goto mac_stats_cleanup; 2537 2538 ret = nfp_net_vf_config_init(pf_dev); 2539 if (ret != 0) { 2540 PMD_INIT_LOG(ERR, "Failed to init VF config."); 2541 goto vf_cfg_tbl_cleanup; 2542 } 2543 2544 hw_priv->is_pf = true; 2545 2546 if (!nfp_net_recv_pkt_meta_check_register(hw_priv)) { 2547 PMD_INIT_LOG(ERR, "PF register meta check function failed."); 2548 ret = -EIO; 2549 goto hw_priv_free; 2550 } 2551 2552 /* 2553 * PF initialization has been done at this point. Call app specific 2554 * init code now. 2555 */ 2556 ret = nfp_fw_app_primary_init(hw_priv); 2557 if (ret != 0) { 2558 PMD_INIT_LOG(ERR, "Failed to init hw app primary."); 2559 goto vf_cfg_tbl_cleanup; 2560 } 2561 2562 /* Register the CPP bridge service here for primary use */ 2563 if (pf_dev->devargs.cpp_service_enable) { 2564 ret = nfp_enable_cpp_service(pf_dev); 2565 if (ret != 0) { 2566 PMD_INIT_LOG(ERR, "Enable CPP service failed."); 2567 goto vf_cfg_tbl_cleanup; 2568 } 2569 } 2570 2571 return 0; 2572 2573 vf_cfg_tbl_cleanup: 2574 nfp_net_vf_config_uninit(pf_dev); 2575 mac_stats_cleanup: 2576 nfp_cpp_area_release_free(pf_dev->mac_stats_area); 2577 hwqueues_cleanup: 2578 nfp_cpp_area_release_free(pf_dev->qc_area); 2579 sym_tbl_cleanup: 2580 free(sym_tbl); 2581 fw_cleanup: 2582 nfp_fw_unload(cpp); 2583 if (pf_dev->multi_pf.enabled) { 2584 nfp_net_keepalive_stop(&pf_dev->multi_pf); 2585 nfp_net_keepalive_clear(pf_dev->multi_pf.beat_addr, pf_dev->multi_pf.function_id); 2586 nfp_net_keepalive_uninit(&pf_dev->multi_pf); 2587 } 2588 eth_table_cleanup: 2589 free(nfp_eth_table); 2590 hwinfo_cleanup: 2591 free(hwinfo); 2592 cpp_cleanup: 2593 nfp_cpp_free(cpp); 2594 sync_free: 2595 nfp_sync_free(sync); 2596 pf_cleanup: 2597 rte_free(pf_dev); 2598 hw_priv_free: 2599 rte_free(hw_priv); 2600 2601 return ret; 2602 } 2603 2604 static int 2605 nfp_secondary_net_init(struct rte_eth_dev *eth_dev, 2606 void *para) 2607 { 2608 struct nfp_net_hw_priv *hw_priv; 2609 2610 hw_priv = para; 2611 nfp_net_ethdev_ops_mount(hw_priv->pf_dev, eth_dev); 2612 2613 eth_dev->process_private = para; 2614 2615 return 0; 2616 } 2617 2618 static int 2619 nfp_secondary_init_app_fw_nic(struct nfp_net_hw_priv *hw_priv) 2620 { 2621 uint32_t i; 2622 int ret = 0; 2623 uint32_t total_vnics; 2624 char port_name[RTE_ETH_NAME_MAX_LEN]; 2625 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 2626 2627 total_vnics = nfp_net_get_phyports_from_fw(pf_dev); 2628 2629 for (i = 0; i < total_vnics; i++) { 2630 nfp_port_name_generate(port_name, sizeof(port_name), i, pf_dev); 2631 2632 PMD_INIT_LOG(DEBUG, "Secondary attaching to port %s.", port_name); 2633 ret = rte_eth_dev_create(&pf_dev->pci_dev->device, port_name, 0, 2634 NULL, NULL, nfp_secondary_net_init, hw_priv); 2635 if (ret != 0) { 2636 PMD_INIT_LOG(ERR, "Secondary process attach to port %s failed.", port_name); 2637 goto port_cleanup; 2638 } 2639 } 2640 2641 return 0; 2642 2643 port_cleanup: 2644 for (uint32_t j = 0; j < i; j++) { 2645 struct rte_eth_dev *eth_dev; 2646 2647 nfp_port_name_generate(port_name, sizeof(port_name), j, pf_dev); 2648 eth_dev = rte_eth_dev_get_by_name(port_name); 2649 if (eth_dev != NULL) 2650 rte_eth_dev_destroy(eth_dev, NULL); 2651 } 2652 2653 return ret; 2654 } 2655 2656 static int 2657 nfp_fw_app_secondary_init(struct nfp_net_hw_priv *hw_priv) 2658 { 2659 int ret; 2660 struct nfp_pf_dev *pf_dev = hw_priv->pf_dev; 2661 2662 switch (pf_dev->app_fw_id) { 2663 case NFP_APP_FW_CORE_NIC: 2664 PMD_INIT_LOG(INFO, "Initializing coreNIC."); 2665 ret = nfp_secondary_init_app_fw_nic(hw_priv); 2666 if (ret != 0) { 2667 PMD_INIT_LOG(ERR, "Could not initialize coreNIC!"); 2668 return ret; 2669 } 2670 break; 2671 case NFP_APP_FW_FLOWER_NIC: 2672 PMD_INIT_LOG(INFO, "Initializing Flower."); 2673 ret = nfp_secondary_init_app_fw_flower(hw_priv); 2674 if (ret != 0) { 2675 PMD_INIT_LOG(ERR, "Could not initialize Flower!"); 2676 return ret; 2677 } 2678 break; 2679 default: 2680 PMD_INIT_LOG(ERR, "Unsupported Firmware loaded."); 2681 ret = -EINVAL; 2682 return ret; 2683 } 2684 2685 return 0; 2686 } 2687 2688 /* 2689 * When attaching to the NFP4000/6000 PF on a secondary process there 2690 * is no need to initialise the PF again. Only minimal work is required 2691 * here. 2692 */ 2693 static int 2694 nfp_pf_secondary_init(struct rte_pci_device *pci_dev) 2695 { 2696 void *sync; 2697 int ret = 0; 2698 struct nfp_cpp *cpp; 2699 uint8_t function_id; 2700 struct nfp_pf_dev *pf_dev; 2701 enum nfp_app_fw_id app_fw_id; 2702 char name[RTE_ETH_NAME_MAX_LEN]; 2703 struct nfp_rtsym_table *sym_tbl; 2704 struct nfp_net_hw_priv *hw_priv; 2705 const struct nfp_dev_info *dev_info; 2706 char app_name[RTE_ETH_NAME_MAX_LEN]; 2707 2708 if (pci_dev == NULL) 2709 return -ENODEV; 2710 2711 if (pci_dev->mem_resource[0].addr == NULL) { 2712 PMD_INIT_LOG(ERR, "The address of BAR0 is NULL."); 2713 return -ENODEV; 2714 } 2715 2716 dev_info = nfp_dev_info_get(pci_dev->id.device_id); 2717 if (dev_info == NULL) { 2718 PMD_INIT_LOG(ERR, "Not supported device ID."); 2719 return -ENODEV; 2720 } 2721 2722 hw_priv = rte_zmalloc(NULL, sizeof(*hw_priv), 0); 2723 if (hw_priv == NULL) { 2724 PMD_INIT_LOG(ERR, "Can not alloc memory for hw priv data."); 2725 return -ENOMEM; 2726 } 2727 2728 /* Allocate memory for the PF "device" */ 2729 function_id = pci_dev->addr.function & 0x7; 2730 snprintf(name, sizeof(name), "nfp_pf%d", 0); 2731 pf_dev = rte_zmalloc(name, sizeof(*pf_dev), 0); 2732 if (pf_dev == NULL) { 2733 PMD_INIT_LOG(ERR, "Can not allocate memory for the PF device."); 2734 ret = -ENOMEM; 2735 goto hw_priv_free; 2736 } 2737 2738 hw_priv->pf_dev = pf_dev; 2739 hw_priv->dev_info = dev_info; 2740 2741 sync = nfp_sync_alloc(); 2742 if (sync == NULL) { 2743 PMD_INIT_LOG(ERR, "Failed to alloc sync zone."); 2744 ret = -ENOMEM; 2745 goto pf_cleanup; 2746 } 2747 2748 pf_dev->sync = sync; 2749 2750 /* 2751 * When device bound to UIO, the device could be used, by mistake, 2752 * by two DPDK apps, and the UIO driver does not avoid it. This 2753 * could lead to a serious problem when configuring the NFP CPP 2754 * interface. Here we avoid this telling to the CPP init code to 2755 * use a lock file if UIO is being used. 2756 */ 2757 if (pci_dev->kdrv == RTE_PCI_KDRV_VFIO) 2758 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, false); 2759 else 2760 cpp = nfp_cpp_from_nfp6000_pcie(pci_dev, dev_info, true); 2761 2762 if (cpp == NULL) { 2763 PMD_INIT_LOG(ERR, "A CPP handle can not be obtained."); 2764 ret = -EIO; 2765 goto sync_free; 2766 } 2767 2768 pf_dev->cpp = cpp; 2769 pf_dev->pci_dev = pci_dev; 2770 2771 /* 2772 * We don't have access to the PF created in the primary process 2773 * here so we have to read the number of ports from firmware. 2774 */ 2775 sym_tbl = nfp_rtsym_table_read(cpp); 2776 if (sym_tbl == NULL) { 2777 PMD_INIT_LOG(ERR, "Something is wrong with the firmware symbol table."); 2778 ret = -EIO; 2779 goto cpp_cleanup; 2780 } 2781 2782 pf_dev->sym_tbl = sym_tbl; 2783 2784 /* Read the number of physical ports from firmware */ 2785 pf_dev->multi_pf.function_id = function_id; 2786 pf_dev->total_phyports = nfp_net_get_phyports_from_fw(pf_dev); 2787 pf_dev->multi_pf.enabled = nfp_check_multi_pf_from_fw(pf_dev->total_phyports); 2788 2789 /* Read the app ID of the firmware loaded */ 2790 snprintf(app_name, sizeof(app_name), "_pf%u_net_app_id", function_id); 2791 app_fw_id = nfp_rtsym_read_le(sym_tbl, app_name, &ret); 2792 if (ret != 0) { 2793 PMD_INIT_LOG(ERR, "Could not read %s from fw.", app_name); 2794 ret = -EIO; 2795 goto sym_tbl_cleanup; 2796 } 2797 2798 pf_dev->app_fw_id = app_fw_id; 2799 2800 hw_priv->is_pf = true; 2801 2802 /* Call app specific init code now */ 2803 ret = nfp_fw_app_secondary_init(hw_priv); 2804 if (ret != 0) { 2805 PMD_INIT_LOG(ERR, "Failed to init hw app primary."); 2806 goto sym_tbl_cleanup; 2807 } 2808 2809 return 0; 2810 2811 sym_tbl_cleanup: 2812 free(sym_tbl); 2813 cpp_cleanup: 2814 nfp_cpp_free(cpp); 2815 sync_free: 2816 nfp_sync_free(sync); 2817 pf_cleanup: 2818 rte_free(pf_dev); 2819 hw_priv_free: 2820 rte_free(hw_priv); 2821 2822 return ret; 2823 } 2824 2825 static int 2826 nfp_pf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2827 struct rte_pci_device *dev) 2828 { 2829 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2830 return nfp_pf_init(dev); 2831 else 2832 return nfp_pf_secondary_init(dev); 2833 } 2834 2835 static const struct rte_pci_id pci_id_nfp_pf_net_map[] = { 2836 { 2837 RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, 2838 PCI_DEVICE_ID_NFP3800_PF_NIC) 2839 }, 2840 { 2841 RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, 2842 PCI_DEVICE_ID_NFP4000_PF_NIC) 2843 }, 2844 { 2845 RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, 2846 PCI_DEVICE_ID_NFP6000_PF_NIC) 2847 }, 2848 { 2849 RTE_PCI_DEVICE(PCI_VENDOR_ID_CORIGINE, 2850 PCI_DEVICE_ID_NFP3800_PF_NIC) 2851 }, 2852 { 2853 RTE_PCI_DEVICE(PCI_VENDOR_ID_CORIGINE, 2854 PCI_DEVICE_ID_NFP4000_PF_NIC) 2855 }, 2856 { 2857 RTE_PCI_DEVICE(PCI_VENDOR_ID_CORIGINE, 2858 PCI_DEVICE_ID_NFP6000_PF_NIC) 2859 }, 2860 { 2861 .vendor_id = 0, 2862 }, 2863 }; 2864 2865 static int 2866 nfp_pci_uninit(struct rte_eth_dev *eth_dev) 2867 { 2868 uint16_t port_id; 2869 struct rte_pci_device *pci_dev; 2870 2871 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 2872 2873 /* Free up all physical ports under PF */ 2874 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device) 2875 rte_eth_dev_close(port_id); 2876 /* 2877 * Ports can be closed and freed but hotplugging is not 2878 * currently supported. 2879 */ 2880 return -ENOTSUP; 2881 } 2882 2883 static int 2884 eth_nfp_pci_remove(struct rte_pci_device *pci_dev) 2885 { 2886 return rte_eth_dev_pci_generic_remove(pci_dev, nfp_pci_uninit); 2887 } 2888 2889 static struct rte_pci_driver rte_nfp_net_pf_pmd = { 2890 .id_table = pci_id_nfp_pf_net_map, 2891 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 2892 .probe = nfp_pf_pci_probe, 2893 .remove = eth_nfp_pci_remove, 2894 }; 2895 2896 RTE_PMD_REGISTER_PCI(NFP_PF_DRIVER_NAME, rte_nfp_net_pf_pmd); 2897 RTE_PMD_REGISTER_PCI_TABLE(NFP_PF_DRIVER_NAME, pci_id_nfp_pf_net_map); 2898 RTE_PMD_REGISTER_KMOD_DEP(NFP_PF_DRIVER_NAME, "* igb_uio | uio_pci_generic | vfio"); 2899 RTE_PMD_REGISTER_PARAM_STRING(NFP_PF_DRIVER_NAME, 2900 NFP_PF_FORCE_RELOAD_FW "=<0|1>" 2901 NFP_CPP_SERVICE_ENABLE "=<0|1>"); 2902