1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Marvell International Ltd. 3 * Copyright(c) 2017 Semihalf. 4 * All rights reserved. 5 */ 6 7 #ifndef _MRVL_ETHDEV_H_ 8 #define _MRVL_ETHDEV_H_ 9 10 #include <rte_spinlock.h> 11 #include <rte_flow_driver.h> 12 #include <rte_mtr_driver.h> 13 #include <rte_tm_driver.h> 14 15 /* 16 * container_of is defined by both DPDK and MUSDK, 17 * we'll declare only one version. 18 * 19 * Note that it is not used in this PMD anyway. 20 */ 21 #ifdef container_of 22 #undef container_of 23 #endif 24 25 #include <env/mv_autogen_comp_flags.h> 26 #include <drivers/mv_pp2.h> 27 #include <drivers/mv_pp2_bpool.h> 28 #include <drivers/mv_pp2_cls.h> 29 #include <drivers/mv_pp2_hif.h> 30 #include <drivers/mv_pp2_ppio.h> 31 #include "env/mv_common.h" /* for BIT() */ 32 33 /** Maximum number of rx queues per port */ 34 #define MRVL_PP2_RXQ_MAX 32 35 36 /** Maximum number of tx queues per port */ 37 #define MRVL_PP2_TXQ_MAX 8 38 39 /** Minimum number of descriptors in tx queue */ 40 #define MRVL_PP2_TXD_MIN 16 41 42 /** Maximum number of descriptors in tx queue */ 43 #define MRVL_PP2_TXD_MAX 2048 44 45 /** Tx queue descriptors alignment */ 46 #define MRVL_PP2_TXD_ALIGN 16 47 48 /** Minimum number of descriptors in rx queue */ 49 #define MRVL_PP2_RXD_MIN 16 50 51 /** Maximum number of descriptors in rx queue */ 52 #define MRVL_PP2_RXD_MAX 2048 53 54 /** Rx queue descriptors alignment */ 55 #define MRVL_PP2_RXD_ALIGN 16 56 57 /** Maximum number of descriptors in tx aggregated queue */ 58 #define MRVL_PP2_AGGR_TXQD_MAX 2048 59 60 /** Maximum number of Traffic Classes. */ 61 #define MRVL_PP2_TC_MAX 8 62 63 /** Packet offset inside RX buffer. */ 64 #define MRVL_PKT_OFFS 64 65 66 /** Maximum number of descriptors in shadow queue. Must be power of 2 */ 67 #define MRVL_PP2_TX_SHADOWQ_SIZE MRVL_PP2_TXD_MAX 68 69 /** Shadow queue size mask (since shadow queue size is power of 2) */ 70 #define MRVL_PP2_TX_SHADOWQ_MASK (MRVL_PP2_TX_SHADOWQ_SIZE - 1) 71 72 /** Minimum number of sent buffers to release from shadow queue to BM */ 73 #define MRVL_PP2_BUF_RELEASE_BURST_SIZE 64 74 75 #define MRVL_PP2_ETH_HDRS_LEN (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \ 76 (2 * RTE_VLAN_HLEN)) 77 #define MRVL_PP2_HDRS_LEN (MV_MH_SIZE + MRVL_PP2_ETH_HDRS_LEN) 78 #define MRVL_PP2_MTU_TO_MRU(mtu) ((mtu) + MRVL_PP2_HDRS_LEN) 79 #define MRVL_PP2_MRU_TO_MTU(mru) ((mru) - MRVL_PP2_HDRS_LEN) 80 81 /** Maximum length of a match string */ 82 #define MRVL_MATCH_LEN 16 83 84 #define MRVL_BURST_SIZE 64 85 86 /** PMD-specific definition of a flow rule handle. */ 87 struct mrvl_mtr; 88 struct rte_flow { 89 LIST_ENTRY(rte_flow) next; 90 struct mrvl_mtr *mtr; 91 92 struct pp2_cls_tbl_key table_key; 93 struct pp2_cls_tbl_rule rule; 94 struct pp2_cls_cos_desc cos; 95 struct pp2_cls_tbl_action action; 96 uint8_t next_udf_id; 97 }; 98 99 struct mrvl_mtr_profile { 100 LIST_ENTRY(mrvl_mtr_profile) next; 101 uint32_t profile_id; 102 int refcnt; 103 struct rte_mtr_meter_profile profile; 104 }; 105 106 struct mrvl_mtr { 107 LIST_ENTRY(mrvl_mtr) next; 108 uint32_t mtr_id; 109 int refcnt; 110 int shared; 111 int enabled; 112 int plcr_bit; 113 struct mrvl_mtr_profile *profile; 114 struct pp2_cls_plcr *plcr; 115 }; 116 117 struct mrvl_tm_shaper_profile { 118 LIST_ENTRY(mrvl_tm_shaper_profile) next; 119 uint32_t id; 120 int refcnt; 121 struct rte_tm_shaper_params params; 122 }; 123 124 enum { 125 MRVL_NODE_PORT, 126 MRVL_NODE_QUEUE, 127 }; 128 129 struct mrvl_tm_node { 130 LIST_ENTRY(mrvl_tm_node) next; 131 uint32_t id; 132 uint32_t type; 133 int refcnt; 134 struct mrvl_tm_node *parent; 135 struct mrvl_tm_shaper_profile *profile; 136 uint8_t weight; 137 uint64_t stats_mask; 138 }; 139 140 struct mrvl_priv { 141 /* Hot fields, used in fast path. */ 142 struct pp2_bpool *bpool; /**< BPool pointer */ 143 struct pp2_ppio *ppio; /**< Port handler pointer */ 144 rte_spinlock_t lock; /**< Spinlock for checking bpool status */ 145 uint16_t bpool_max_size; /**< BPool maximum size */ 146 uint16_t bpool_min_size; /**< BPool minimum size */ 147 uint16_t bpool_init_size; /**< Configured BPool size */ 148 149 /** Mapping for DPDK rx queue->(TC, MRVL relative inq) */ 150 alignas(RTE_CACHE_LINE_SIZE) struct { 151 uint8_t tc; /**< Traffic Class */ 152 uint8_t inq; /**< Relative in-queue number */ 153 } rxq_map[MRVL_PP2_RXQ_MAX]; 154 155 /* Configuration data, used sporadically. */ 156 uint8_t pp_id; 157 uint8_t ppio_id; 158 uint8_t bpool_bit; 159 uint8_t rss_hf_tcp; 160 uint8_t uc_mc_flushed; 161 uint8_t isolated; 162 uint8_t multiseg; 163 uint16_t max_mtu; 164 uint8_t flow_ctrl; 165 struct rte_eth_fc_conf fc_conf; 166 167 struct pp2_ppio_params ppio_params; 168 struct pp2_cls_qos_tbl_params qos_tbl_params; 169 struct pp2_cls_tbl *qos_tbl; 170 uint16_t nb_rx_queues; 171 172 struct pp2_cls_tbl_params cls_tbl_params; 173 struct pp2_cls_tbl *cls_tbl; 174 LIST_HEAD(mrvl_flows, rte_flow) flows; 175 176 struct pp2_cls_plcr *default_policer; 177 178 LIST_HEAD(profiles, mrvl_mtr_profile) profiles; 179 LIST_HEAD(mtrs, mrvl_mtr) mtrs; 180 uint32_t used_plcrs; 181 182 LIST_HEAD(shaper_profiles, mrvl_tm_shaper_profile) shaper_profiles; 183 LIST_HEAD(nodes, mrvl_tm_node) nodes; 184 uint64_t rate_max; 185 186 uint8_t forward_bad_frames; 187 uint32_t fill_bpool_buffs; 188 189 uint8_t configured; /** indicates if device has been configured */ 190 }; 191 192 /** Flow operations forward declaration. */ 193 extern const struct rte_flow_ops mrvl_flow_ops; 194 195 /** Meter operations forward declaration. */ 196 extern const struct rte_mtr_ops mrvl_mtr_ops; 197 198 /** Traffic manager operations forward declaration. */ 199 extern const struct rte_tm_ops mrvl_tm_ops; 200 201 /** Current log type. */ 202 extern int mrvl_logtype; 203 #define RTE_LOGTYPE_MRVL mrvl_logtype 204 205 #define MRVL_LOG(level, ...) \ 206 RTE_LOG_LINE_PREFIX(level, MRVL, "%s(): ", __func__, __VA_ARGS__) 207 208 extern struct pp2_bpool *dummy_pool[PP2_NUM_PKT_PROC]; 209 210 /** 211 * Convert string to uint32_t with extra checks for result correctness. 212 * 213 * @param string String to convert. 214 * @param val Conversion result. 215 * @returns 0 in case of success, negative value otherwise. 216 */ 217 static int 218 get_val_securely(const char *string, uint32_t *val) 219 { 220 char *endptr; 221 size_t len = strlen(string); 222 223 if (len == 0) 224 return -1; 225 226 errno = 0; 227 *val = strtoul(string, &endptr, 0); 228 if (errno != 0 || RTE_PTR_DIFF(endptr, string) != len) 229 return -2; 230 231 return 0; 232 } 233 234 static int 235 get_val_securely8(const char *string, uint32_t base, uint8_t *val) 236 { 237 char *endptr; 238 size_t len = strlen(string); 239 240 if (len == 0) 241 return -1; 242 243 errno = 0; 244 *val = (uint8_t)strtoul(string, &endptr, base); 245 if (errno != 0 || RTE_PTR_DIFF(endptr, string) != len) 246 return -2; 247 248 return 0; 249 } 250 251 #endif /* _MRVL_ETHDEV_H_ */ 252