1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2020 Mellanox Technologies, Ltd 3 */ 4 5 #include <errno.h> 6 #include <stdalign.h> 7 #include <stddef.h> 8 #include <stdint.h> 9 #include <stdlib.h> 10 11 #include <rte_windows.h> 12 #include <rte_ethdev_pci.h> 13 14 #include <mlx5_glue.h> 15 #include <mlx5_devx_cmds.h> 16 #include <mlx5_common.h> 17 #include <mlx5_common_mp.h> 18 #include <mlx5_common_mr.h> 19 #include <mlx5_malloc.h> 20 21 #include "mlx5_defs.h" 22 #include "mlx5.h" 23 #include "mlx5_common_os.h" 24 #include "mlx5_utils.h" 25 #include "mlx5_rxtx.h" 26 #include "mlx5_autoconf.h" 27 #include "mlx5_mr.h" 28 #include "mlx5_flow.h" 29 #include "mlx5_devx.h" 30 31 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192 32 33 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data"; 34 35 /* Spinlock for mlx5_shared_data allocation. */ 36 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 37 38 /** 39 * Initialize shared data between primary and secondary process. 40 * 41 * A memzone is reserved by primary process and secondary processes attach to 42 * the memzone. 43 * 44 * @return 45 * 0 on success, a negative errno value otherwise and rte_errno is set. 46 */ 47 static int 48 mlx5_init_shared_data(void) 49 { 50 const struct rte_memzone *mz; 51 int ret = 0; 52 53 rte_spinlock_lock(&mlx5_shared_data_lock); 54 if (mlx5_shared_data == NULL) { 55 /* Allocate shared memory. */ 56 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA, 57 sizeof(*mlx5_shared_data), 58 SOCKET_ID_ANY, 0); 59 if (mz == NULL) { 60 DRV_LOG(ERR, 61 "Cannot allocate mlx5 shared data"); 62 ret = -rte_errno; 63 goto error; 64 } 65 mlx5_shared_data = mz->addr; 66 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data)); 67 rte_spinlock_init(&mlx5_shared_data->lock); 68 } 69 error: 70 rte_spinlock_unlock(&mlx5_shared_data_lock); 71 return ret; 72 } 73 74 /** 75 * PMD global initialization. 76 * 77 * Independent from individual device, this function initializes global 78 * per-PMD data structures distinguishing primary and secondary processes. 79 * Hence, each initialization is called once per a process. 80 * 81 * @return 82 * 0 on success, a negative errno value otherwise and rte_errno is set. 83 */ 84 static int 85 mlx5_init_once(void) 86 { 87 if (mlx5_init_shared_data()) 88 return -rte_errno; 89 return 0; 90 } 91 92 /** 93 * Get mlx5 device attributes. 94 * 95 * @param ctx 96 * Pointer to device context. 97 * 98 * @param device_attr 99 * Pointer to mlx5 device attributes. 100 * 101 * @return 102 * 0 on success, non zero error number otherwise 103 */ 104 int 105 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) 106 { 107 struct mlx5_context *mlx5_ctx; 108 struct mlx5_hca_attr hca_attr; 109 void *pv_iseg = NULL; 110 u32 cb_iseg = 0; 111 int err = 0; 112 113 if (!ctx) 114 return -EINVAL; 115 mlx5_ctx = (struct mlx5_context *)ctx; 116 memset(device_attr, 0, sizeof(*device_attr)); 117 err = mlx5_devx_cmd_query_hca_attr(mlx5_ctx, &hca_attr); 118 if (err) { 119 DRV_LOG(ERR, "Failed to get device hca_cap"); 120 return err; 121 } 122 device_attr->max_cq = 1 << hca_attr.log_max_cq; 123 device_attr->max_qp = 1 << hca_attr.log_max_qp; 124 device_attr->max_qp_wr = 1 << hca_attr.log_max_qp_sz; 125 device_attr->max_cqe = 1 << hca_attr.log_max_cq_sz; 126 device_attr->max_mr = 1 << hca_attr.log_max_mrw_sz; 127 device_attr->max_pd = 1 << hca_attr.log_max_pd; 128 device_attr->max_srq = 1 << hca_attr.log_max_srq; 129 device_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz; 130 if (hca_attr.rss_ind_tbl_cap) { 131 device_attr->max_rwq_indirection_table_size = 132 1 << hca_attr.rss_ind_tbl_cap; 133 } 134 pv_iseg = mlx5_glue->query_hca_iseg(mlx5_ctx, &cb_iseg); 135 if (pv_iseg == NULL) { 136 DRV_LOG(ERR, "Failed to get device hca_iseg"); 137 return errno; 138 } 139 if (!err) { 140 snprintf(device_attr->fw_ver, 64, "%x.%x.%04x", 141 MLX5_GET(initial_seg, pv_iseg, fw_rev_major), 142 MLX5_GET(initial_seg, pv_iseg, fw_rev_minor), 143 MLX5_GET(initial_seg, pv_iseg, fw_rev_subminor)); 144 } 145 return err; 146 } 147 148 /** 149 * Initialize DR related data within private structure. 150 * Routine checks the reference counter and does actual 151 * resources creation/initialization only if counter is zero. 152 * 153 * @param[in] priv 154 * Pointer to the private device data structure. 155 * 156 * @return 157 * Zero on success, positive error code otherwise. 158 */ 159 static int 160 mlx5_alloc_shared_dr(struct mlx5_priv *priv) 161 { 162 struct mlx5_dev_ctx_shared *sh = priv->sh; 163 int err = 0; 164 165 if (!sh->flow_tbls) 166 err = mlx5_alloc_table_hash_list(priv); 167 else 168 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n", 169 (void *)sh->flow_tbls); 170 return err; 171 } 172 /** 173 * Destroy DR related data within private structure. 174 * 175 * @param[in] priv 176 * Pointer to the private device data structure. 177 */ 178 void 179 mlx5_os_free_shared_dr(struct mlx5_priv *priv) 180 { 181 mlx5_free_table_hash_list(priv); 182 } 183 184 /** 185 * Set the completion channel file descriptor interrupt as non-blocking. 186 * Currently it has no support under Windows. 187 * 188 * @param[in] rxq_obj 189 * Pointer to RQ channel object, which includes the channel fd 190 * 191 * @param[out] fd 192 * The file descriptor (representing the intetrrupt) used in this channel. 193 * 194 * @return 195 * 0 on successfully setting the fd to non-blocking, non-zero otherwise. 196 */ 197 int 198 mlx5_os_set_nonblock_channel_fd(int fd) 199 { 200 (void)fd; 201 DRV_LOG(WARNING, "%s: is not supported", __func__); 202 return -ENOTSUP; 203 } 204 205 /** 206 * Function API open device under Windows 207 * 208 * This function calls the Windows glue APIs to open a device. 209 * 210 * @param[in] spawn 211 * Pointer to the device attributes (name, port, etc). 212 * @param[out] config 213 * Pointer to device configuration structure. 214 * @param[out] sh 215 * Pointer to shared context structure. 216 * 217 * @return 218 * 0 on success, a positive error value otherwise. 219 */ 220 int 221 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn, 222 const struct mlx5_dev_config *config, 223 struct mlx5_dev_ctx_shared *sh) 224 { 225 RTE_SET_USED(config); 226 int err = 0; 227 struct mlx5_context *mlx5_ctx; 228 229 pthread_mutex_init(&sh->txpp.mutex, NULL); 230 /* Set numa node from pci probe */ 231 sh->numa_node = spawn->pci_dev->device.numa_node; 232 233 /* Try to open device with DevX */ 234 rte_errno = 0; 235 sh->ctx = mlx5_glue->open_device(spawn->phys_dev); 236 if (!sh->ctx) { 237 DRV_LOG(ERR, "open_device failed"); 238 err = errno; 239 return err; 240 } 241 sh->devx = 1; 242 mlx5_ctx = (struct mlx5_context *)sh->ctx; 243 err = mlx5_glue->query_device(spawn->phys_dev, &mlx5_ctx->mlx5_dev); 244 if (err) 245 DRV_LOG(ERR, "Failed to query device context fields."); 246 return err; 247 } 248 249 /** 250 * DV flow counter mode detect and config. 251 * 252 * @param dev 253 * Pointer to rte_eth_dev structure. 254 * 255 */ 256 static void 257 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused) 258 { 259 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 260 struct mlx5_priv *priv = dev->data->dev_private; 261 struct mlx5_dev_ctx_shared *sh = priv->sh; 262 bool fallback; 263 264 #ifndef HAVE_IBV_DEVX_ASYNC 265 fallback = true; 266 #else 267 fallback = false; 268 if (!priv->config.devx || !priv->config.dv_flow_en || 269 !priv->config.hca_attr.flow_counters_dump || 270 !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) || 271 (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP)) 272 fallback = true; 273 #endif 274 if (fallback) 275 DRV_LOG(INFO, "Use fall-back DV counter management. Flow " 276 "counter dump:%d, bulk_alloc_bitmap:0x%hhx.", 277 priv->config.hca_attr.flow_counters_dump, 278 priv->config.hca_attr.flow_counter_bulk_alloc_bitmap); 279 /* Initialize fallback mode only on the port initializes sh. */ 280 if (sh->refcnt == 1) 281 sh->cmng.counter_fallback = fallback; 282 else if (fallback != sh->cmng.counter_fallback) 283 DRV_LOG(WARNING, "Port %d in sh has different fallback mode " 284 "with others:%d.", PORT_ID(priv), fallback); 285 #endif 286 } 287 288 /** 289 * Spawn an Ethernet device from Verbs information. 290 * 291 * @param dpdk_dev 292 * Backing DPDK device. 293 * @param spawn 294 * Verbs device parameters (name, port, switch_info) to spawn. 295 * @param config 296 * Device configuration parameters. 297 * 298 * @return 299 * A valid Ethernet device object on success, NULL otherwise and rte_errno 300 * is set. The following errors are defined: 301 * 302 * EEXIST: device is already spawned 303 */ 304 static struct rte_eth_dev * 305 mlx5_dev_spawn(struct rte_device *dpdk_dev, 306 struct mlx5_dev_spawn_data *spawn, 307 struct mlx5_dev_config *config) 308 { 309 const struct mlx5_switch_info *switch_info = &spawn->info; 310 struct mlx5_dev_ctx_shared *sh = NULL; 311 struct mlx5_dev_attr device_attr; 312 struct rte_eth_dev *eth_dev = NULL; 313 struct mlx5_priv *priv = NULL; 314 int err = 0; 315 unsigned int cqe_comp; 316 struct rte_ether_addr mac; 317 char name[RTE_ETH_NAME_MAX_LEN]; 318 int own_domain_id = 0; 319 uint16_t port_id; 320 321 /* Build device name. */ 322 strlcpy(name, dpdk_dev->name, sizeof(name)); 323 /* check if the device is already spawned */ 324 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) { 325 rte_errno = EEXIST; 326 return NULL; 327 } 328 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name); 329 /* 330 * Some parameters are needed in advance to create device context. We 331 * process the devargs here to get ones, and later process devargs 332 * again to override some hardware settings. 333 */ 334 err = mlx5_args(config, dpdk_dev->devargs); 335 if (err) { 336 err = rte_errno; 337 DRV_LOG(ERR, "failed to process device arguments: %s", 338 strerror(rte_errno)); 339 goto error; 340 } 341 mlx5_malloc_mem_select(config->sys_mem_en); 342 sh = mlx5_alloc_shared_dev_ctx(spawn, config); 343 if (!sh) 344 return NULL; 345 config->devx = sh->devx; 346 /* Initialize the shutdown event in mlx5_dev_spawn to 347 * support mlx5_is_removed for Windows. 348 */ 349 err = mlx5_glue->devx_init_showdown_event(sh->ctx); 350 if (err) { 351 DRV_LOG(ERR, "failed to init showdown event: %s", 352 strerror(errno)); 353 goto error; 354 } 355 DRV_LOG(DEBUG, "MPW isn't supported"); 356 mlx5_os_get_dev_attr(sh->ctx, &device_attr); 357 config->swp = 0; 358 config->ind_table_max_size = 359 sh->device_attr.max_rwq_indirection_table_size; 360 if (RTE_CACHE_LINE_SIZE == 128 && 361 !(device_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) 362 cqe_comp = 0; 363 else 364 cqe_comp = 1; 365 config->cqe_comp = cqe_comp; 366 DRV_LOG(DEBUG, "tunnel offloading is not supported"); 367 config->tunnel_en = 0; 368 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is no supported"); 369 config->mpls_en = 0; 370 /* Allocate private eth device data. */ 371 priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE, 372 sizeof(*priv), 373 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 374 if (priv == NULL) { 375 DRV_LOG(ERR, "priv allocation failure"); 376 err = ENOMEM; 377 goto error; 378 } 379 priv->sh = sh; 380 priv->dev_port = spawn->phys_port; 381 priv->pci_dev = spawn->pci_dev; 382 priv->mtu = RTE_ETHER_MTU; 383 priv->mp_id.port_id = port_id; 384 strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN); 385 priv->representor = !!switch_info->representor; 386 priv->master = !!switch_info->master; 387 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 388 priv->vport_meta_tag = 0; 389 priv->vport_meta_mask = 0; 390 priv->pf_bond = spawn->pf_bond; 391 priv->vport_id = -1; 392 /* representor_id field keeps the unmodified VF index. */ 393 priv->representor_id = -1; 394 /* 395 * Look for sibling devices in order to reuse their switch domain 396 * if any, otherwise allocate one. 397 */ 398 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 399 const struct mlx5_priv *opriv = 400 rte_eth_devices[port_id].data->dev_private; 401 402 if (!opriv || 403 opriv->sh != priv->sh || 404 opriv->domain_id == 405 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) 406 continue; 407 priv->domain_id = opriv->domain_id; 408 break; 409 } 410 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) { 411 err = rte_eth_switch_domain_alloc(&priv->domain_id); 412 if (err) { 413 err = rte_errno; 414 DRV_LOG(ERR, "unable to allocate switch domain: %s", 415 strerror(rte_errno)); 416 goto error; 417 } 418 own_domain_id = 1; 419 } 420 /* Override some values set by hardware configuration. */ 421 mlx5_args(config, dpdk_dev->devargs); 422 err = mlx5_dev_check_sibling_config(priv, config); 423 if (err) 424 goto error; 425 config->hw_csum = !!(sh->device_attr.device_cap_flags_ex & 426 IBV_DEVICE_RAW_IP_CSUM); 427 DRV_LOG(DEBUG, "checksum offloading is %ssupported", 428 (config->hw_csum ? "" : "not ")); 429 DRV_LOG(DEBUG, "counters are not supported"); 430 config->ind_table_max_size = 431 sh->device_attr.max_rwq_indirection_table_size; 432 /* 433 * Remove this check once DPDK supports larger/variable 434 * indirection tables. 435 */ 436 if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512) 437 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512; 438 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u", 439 config->ind_table_max_size); 440 config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps & 441 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING); 442 DRV_LOG(DEBUG, "VLAN stripping is %ssupported", 443 (config->hw_vlan_strip ? "" : "not ")); 444 config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps & 445 IBV_RAW_PACKET_CAP_SCATTER_FCS); 446 if (config->hw_padding) { 447 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported"); 448 config->hw_padding = 0; 449 } 450 config->tso = (sh->device_attr.max_tso > 0 && 451 (sh->device_attr.tso_supported_qpts & 452 (1 << IBV_QPT_RAW_PACKET))); 453 if (config->tso) 454 config->tso_max_payload_sz = sh->device_attr.max_tso; 455 DRV_LOG(DEBUG, "%sMPS is %s.", 456 config->mps == MLX5_MPW_ENHANCED ? "enhanced " : 457 config->mps == MLX5_MPW ? "legacy " : "", 458 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); 459 if (config->cqe_comp && !cqe_comp) { 460 DRV_LOG(WARNING, "Rx CQE compression isn't supported."); 461 config->cqe_comp = 0; 462 } 463 if (config->devx) { 464 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); 465 if (err) { 466 err = -err; 467 goto error; 468 } 469 /* Check relax ordering support. */ 470 sh->cmng.relaxed_ordering_read = 0; 471 sh->cmng.relaxed_ordering_write = 0; 472 if (!haswell_broadwell_cpu) { 473 sh->cmng.relaxed_ordering_write = 474 config->hca_attr.relaxed_ordering_write; 475 sh->cmng.relaxed_ordering_read = 476 config->hca_attr.relaxed_ordering_read; 477 } 478 } 479 if (config->devx) { 480 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; 481 482 err = config->hca_attr.access_register_user ? 483 mlx5_devx_cmd_register_read 484 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, 485 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP; 486 if (!err) { 487 uint32_t ts_mode; 488 489 /* MTUTC register is read successfully. */ 490 ts_mode = MLX5_GET(register_mtutc, reg, 491 time_stamp_mode); 492 if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME) 493 config->rt_timestamp = 1; 494 } else { 495 /* Kernel does not support register reading. */ 496 if (config->hca_attr.dev_freq_khz == 497 (NS_PER_S / MS_PER_S)) 498 config->rt_timestamp = 1; 499 } 500 } 501 if (config->mprq.enabled) { 502 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported"); 503 config->mprq.enabled = 0; 504 } 505 if (config->max_dump_files_num == 0) 506 config->max_dump_files_num = 128; 507 eth_dev = rte_eth_dev_allocate(name); 508 if (eth_dev == NULL) { 509 DRV_LOG(ERR, "can not allocate rte ethdev"); 510 err = ENOMEM; 511 goto error; 512 } 513 if (priv->representor) { 514 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR; 515 eth_dev->data->representor_id = priv->representor_id; 516 } 517 /* 518 * Store associated network device interface index. This index 519 * is permanent throughout the lifetime of device. So, we may store 520 * the ifindex here and use the cached value further. 521 */ 522 MLX5_ASSERT(spawn->ifindex); 523 priv->if_index = spawn->ifindex; 524 eth_dev->data->dev_private = priv; 525 priv->dev_data = eth_dev->data; 526 eth_dev->data->mac_addrs = priv->mac; 527 eth_dev->device = dpdk_dev; 528 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 529 /* Configure the first MAC address by default. */ 530 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { 531 DRV_LOG(ERR, 532 "port %u cannot get MAC address, is mlx5_en" 533 " loaded? (errno: %s).", 534 eth_dev->data->port_id, strerror(rte_errno)); 535 err = ENODEV; 536 goto error; 537 } 538 DRV_LOG(INFO, 539 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x", 540 eth_dev->data->port_id, 541 mac.addr_bytes[0], mac.addr_bytes[1], 542 mac.addr_bytes[2], mac.addr_bytes[3], 543 mac.addr_bytes[4], mac.addr_bytes[5]); 544 #ifdef RTE_LIBRTE_MLX5_DEBUG 545 { 546 char ifname[MLX5_NAMESIZE]; 547 548 if (mlx5_get_ifname(eth_dev, &ifname) == 0) 549 DRV_LOG(DEBUG, "port %u ifname is \"%s\"", 550 eth_dev->data->port_id, ifname); 551 else 552 DRV_LOG(DEBUG, "port %u ifname is unknown.", 553 eth_dev->data->port_id); 554 } 555 #endif 556 /* Get actual MTU if possible. */ 557 err = mlx5_get_mtu(eth_dev, &priv->mtu); 558 if (err) { 559 err = rte_errno; 560 goto error; 561 } 562 DRV_LOG(DEBUG, "port %u MTU is %u.", eth_dev->data->port_id, 563 priv->mtu); 564 /* Initialize burst functions to prevent crashes before link-up. */ 565 eth_dev->rx_pkt_burst = removed_rx_burst; 566 eth_dev->tx_pkt_burst = removed_tx_burst; 567 eth_dev->dev_ops = &mlx5_dev_ops; 568 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; 569 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; 570 eth_dev->rx_queue_count = mlx5_rx_queue_count; 571 /* Register MAC address. */ 572 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0)); 573 priv->flows = 0; 574 priv->ctrl_flows = 0; 575 TAILQ_INIT(&priv->flow_meters); 576 TAILQ_INIT(&priv->flow_meter_profiles); 577 /* Bring Ethernet device up. */ 578 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up.", 579 eth_dev->data->port_id); 580 /* nl calls are unsupported - set to -1 not to fail on release */ 581 priv->nl_socket_rdma = -1; 582 priv->nl_socket_route = -1; 583 mlx5_set_link_up(eth_dev); 584 /* 585 * Even though the interrupt handler is not installed yet, 586 * interrupts will still trigger on the async_fd from 587 * Verbs context returned by ibv_open_device(). 588 */ 589 mlx5_link_update(eth_dev, 0); 590 config->dv_esw_en = 0; 591 /* Detect minimal data bytes to inline. */ 592 mlx5_set_min_inline(spawn, config); 593 /* Store device configuration on private structure. */ 594 priv->config = *config; 595 /* Create context for virtual machine VLAN workaround. */ 596 priv->vmwa_context = NULL; 597 if (config->dv_flow_en) { 598 err = mlx5_alloc_shared_dr(priv); 599 if (err) 600 goto error; 601 } 602 /* No supported flow priority number detection. */ 603 priv->config.flow_prio = -1; 604 if (!priv->config.dv_esw_en && 605 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 606 DRV_LOG(WARNING, "metadata mode %u is not supported " 607 "(no E-Switch)", priv->config.dv_xmeta_en); 608 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; 609 } 610 mlx5_set_metadata_mask(eth_dev); 611 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 612 !priv->sh->dv_regc0_mask) { 613 DRV_LOG(ERR, "metadata mode %u is not supported " 614 "(no metadata reg_c[0] is available).", 615 priv->config.dv_xmeta_en); 616 err = ENOTSUP; 617 goto error; 618 } 619 mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev, 620 mlx5_hrxq_create_cb, 621 mlx5_hrxq_match_cb, 622 mlx5_hrxq_remove_cb); 623 /* Query availability of metadata reg_c's. */ 624 err = mlx5_flow_discover_mreg_c(eth_dev); 625 if (err < 0) { 626 err = -err; 627 goto error; 628 } 629 if (!mlx5_flow_ext_mreg_supported(eth_dev)) { 630 DRV_LOG(DEBUG, 631 "port %u extensive metadata register is not supported.", 632 eth_dev->data->port_id); 633 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { 634 DRV_LOG(ERR, "metadata mode %u is not supported " 635 "(no metadata registers available).", 636 priv->config.dv_xmeta_en); 637 err = ENOTSUP; 638 goto error; 639 } 640 } 641 if (config->devx && config->dv_flow_en) { 642 priv->obj_ops = devx_obj_ops; 643 } else { 644 DRV_LOG(ERR, "Flow mode %u is not supported " 645 "(Windows flow must be DevX with DV flow enabled).", 646 priv->config.dv_flow_en); 647 err = ENOTSUP; 648 goto error; 649 } 650 mlx5_flow_counter_mode_config(eth_dev); 651 return eth_dev; 652 error: 653 if (priv) { 654 if (own_domain_id) 655 claim_zero(rte_eth_switch_domain_free(priv->domain_id)); 656 mlx5_free(priv); 657 if (eth_dev != NULL) 658 eth_dev->data->dev_private = NULL; 659 } 660 if (eth_dev != NULL) { 661 /* mac_addrs must not be freed alone because part of 662 * dev_private 663 **/ 664 eth_dev->data->mac_addrs = NULL; 665 rte_eth_dev_release_port(eth_dev); 666 } 667 if (sh) 668 mlx5_free_shared_dev_ctx(sh); 669 MLX5_ASSERT(err > 0); 670 rte_errno = err; 671 return NULL; 672 } 673 674 /** 675 * This function should share events between multiple ports of single IB 676 * device. Currently it has no support under Windows. 677 * 678 * @param sh 679 * Pointer to mlx5_dev_ctx_shared object. 680 */ 681 void 682 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh) 683 { 684 (void)sh; 685 DRV_LOG(WARNING, "%s: is not supported", __func__); 686 } 687 688 /** 689 * This function should share events between multiple ports of single IB 690 * device. Currently it has no support under Windows. 691 * 692 * @param dev 693 * Pointer to mlx5_dev_ctx_shared object. 694 */ 695 void 696 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh) 697 { 698 (void)sh; 699 DRV_LOG(WARNING, "%s: is not supported", __func__); 700 } 701 702 /** 703 * Read statistics by a named counter. 704 * 705 * @param[in] priv 706 * Pointer to the private device data structure. 707 * @param[in] ctr_name 708 * Pointer to the name of the statistic counter to read 709 * @param[out] stat 710 * Pointer to read statistic value. 711 * @return 712 * 0 on success and stat is valud, 1 if failed to read the value 713 * rte_errno is set. 714 * 715 */ 716 int 717 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name, 718 uint64_t *stat) 719 { 720 RTE_SET_USED(priv); 721 RTE_SET_USED(ctr_name); 722 RTE_SET_USED(stat); 723 DRV_LOG(WARNING, "%s: is not supported", __func__); 724 return -ENOTSUP; 725 } 726 727 /** 728 * Flush device MAC addresses 729 * Currently it has no support under Windows. 730 * 731 * @param dev 732 * Pointer to Ethernet device structure. 733 * 734 */ 735 void 736 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev) 737 { 738 (void)dev; 739 DRV_LOG(WARNING, "%s: is not supported", __func__); 740 } 741 742 /** 743 * Remove a MAC address from device 744 * Currently it has no support under Windows. 745 * 746 * @param dev 747 * Pointer to Ethernet device structure. 748 * @param index 749 * MAC address index. 750 */ 751 void 752 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index) 753 { 754 (void)dev; 755 (void)(index); 756 DRV_LOG(WARNING, "%s: is not supported", __func__); 757 } 758 759 /** 760 * Adds a MAC address to the device 761 * Currently it has no support under Windows. 762 * 763 * @param dev 764 * Pointer to Ethernet device structure. 765 * @param mac_addr 766 * MAC address to register. 767 * @param index 768 * MAC address index. 769 * 770 * @return 771 * 0 on success, a negative errno value otherwise 772 */ 773 int 774 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac, 775 uint32_t index) 776 { 777 (void)index; 778 struct rte_ether_addr lmac; 779 780 if (mlx5_get_mac(dev, &lmac.addr_bytes)) { 781 DRV_LOG(ERR, 782 "port %u cannot get MAC address, is mlx5_en" 783 " loaded? (errno: %s)", 784 dev->data->port_id, strerror(rte_errno)); 785 return rte_errno; 786 } 787 if (!rte_is_same_ether_addr(&lmac, mac)) { 788 DRV_LOG(ERR, 789 "adding new mac address to device is unsupported"); 790 return -ENOTSUP; 791 } 792 return 0; 793 } 794 795 /** 796 * Modify a VF MAC address 797 * Currently it has no support under Windows. 798 * 799 * @param priv 800 * Pointer to device private data. 801 * @param mac_addr 802 * MAC address to modify into. 803 * @param iface_idx 804 * Net device interface index 805 * @param vf_index 806 * VF index 807 * 808 * @return 809 * 0 on success, a negative errno value otherwise 810 */ 811 int 812 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv, 813 unsigned int iface_idx, 814 struct rte_ether_addr *mac_addr, 815 int vf_index) 816 { 817 (void)priv; 818 (void)iface_idx; 819 (void)mac_addr; 820 (void)vf_index; 821 DRV_LOG(WARNING, "%s: is not supported", __func__); 822 return -ENOTSUP; 823 } 824 825 /** 826 * Set device promiscuous mode 827 * Currently it has no support under Windows. 828 * 829 * @param dev 830 * Pointer to Ethernet device structure. 831 * @param enable 832 * 0 - promiscuous is disabled, otherwise - enabled 833 * 834 * @return 835 * 0 on success, a negative error value otherwise 836 */ 837 int 838 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable) 839 { 840 (void)dev; 841 (void)enable; 842 DRV_LOG(WARNING, "%s: is not supported", __func__); 843 return -ENOTSUP; 844 } 845 846 /** 847 * Set device allmulti mode 848 * 849 * @param dev 850 * Pointer to Ethernet device structure. 851 * @param enable 852 * 0 - all multicase is disabled, otherwise - enabled 853 * 854 * @return 855 * 0 on success, a negative error value otherwise 856 */ 857 int 858 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable) 859 { 860 (void)dev; 861 (void)enable; 862 DRV_LOG(WARNING, "%s: is not supported", __func__); 863 return -ENOTSUP; 864 } 865 866 /** 867 * Detect if a devx_device_bdf object has identical DBDF values to the 868 * rte_pci_addr found in bus/pci probing 869 * 870 * @param[in] devx_bdf 871 * Pointer to the devx_device_bdf structure. 872 * @param[in] addr 873 * Pointer to the rte_pci_addr structure. 874 * 875 * @return 876 * 1 on Device match, 0 on mismatch. 877 */ 878 static int 879 mlx5_match_devx_bdf_to_addr(struct devx_device_bdf *devx_bdf, 880 struct rte_pci_addr *addr) 881 { 882 if (addr->domain != (devx_bdf->bus_id >> 8) || 883 addr->bus != (devx_bdf->bus_id & 0xff) || 884 addr->devid != devx_bdf->dev_id || 885 addr->function != devx_bdf->fnc_id) { 886 return 0; 887 } 888 return 1; 889 } 890 891 /** 892 * Detect if a devx_device_bdf object matches the rte_pci_addr 893 * found in bus/pci probing 894 * Compare both the Native/PF BDF and the raw_bdf representing a VF BDF. 895 * 896 * @param[in] devx_bdf 897 * Pointer to the devx_device_bdf structure. 898 * @param[in] addr 899 * Pointer to the rte_pci_addr structure. 900 * 901 * @return 902 * 1 on Device match, 0 on mismatch, rte_errno code on failure. 903 */ 904 static int 905 mlx5_match_devx_devices_to_addr(struct devx_device_bdf *devx_bdf, 906 struct rte_pci_addr *addr) 907 { 908 int err; 909 struct devx_device mlx5_dev; 910 911 if (mlx5_match_devx_bdf_to_addr(devx_bdf, addr)) 912 return 1; 913 /** 914 * Didn't match on Native/PF BDF, could still 915 * Match a VF BDF, check it next 916 */ 917 err = mlx5_glue->query_device(devx_bdf, &mlx5_dev); 918 if (err) { 919 DRV_LOG(ERR, "query_device failed"); 920 rte_errno = err; 921 return rte_errno; 922 } 923 if (mlx5_match_devx_bdf_to_addr(&mlx5_dev.raw_bdf, addr)) 924 return 1; 925 return 0; 926 } 927 928 /** 929 * DPDK callback to register a PCI device. 930 * 931 * This function spawns Ethernet devices out of a given PCI device. 932 * 933 * @param[in] pci_drv 934 * PCI driver structure (mlx5_driver). 935 * @param[in] pci_dev 936 * PCI device information. 937 * 938 * @return 939 * 0 on success, a negative errno value otherwise and rte_errno is set. 940 */ 941 int 942 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 943 struct rte_pci_device *pci_dev) 944 { 945 struct devx_device_bdf *devx_bdf_devs, *orig_devx_bdf_devs; 946 /* 947 * Number of found IB Devices matching with requested PCI BDF. 948 * nd != 1 means there are multiple IB devices over the same 949 * PCI device and we have representors and master. 950 */ 951 unsigned int nd = 0; 952 /* 953 * Number of found IB device Ports. nd = 1 and np = 1..n means 954 * we have the single multiport IB device, and there may be 955 * representors attached to some of found ports. 956 * Currently not supported. 957 * unsigned int np = 0; 958 */ 959 960 /* 961 * Number of DPDK ethernet devices to Spawn - either over 962 * multiple IB devices or multiple ports of single IB device. 963 * Actually this is the number of iterations to spawn. 964 */ 965 unsigned int ns = 0; 966 /* 967 * Bonding device 968 * < 0 - no bonding device (single one) 969 * >= 0 - bonding device (value is slave PF index) 970 */ 971 int bd = -1; 972 struct mlx5_dev_spawn_data *list = NULL; 973 struct mlx5_dev_config dev_config; 974 unsigned int dev_config_vf; 975 int ret, err; 976 uint32_t restore; 977 978 if (rte_eal_process_type() == RTE_PROC_SECONDARY) { 979 DRV_LOG(ERR, "Secondary process is not supported on Windows."); 980 return -ENOTSUP; 981 } 982 ret = mlx5_init_once(); 983 if (ret) { 984 DRV_LOG(ERR, "unable to init PMD global data: %s", 985 strerror(rte_errno)); 986 return -rte_errno; 987 } 988 errno = 0; 989 devx_bdf_devs = mlx5_glue->get_device_list(&ret); 990 orig_devx_bdf_devs = devx_bdf_devs; 991 if (!devx_bdf_devs) { 992 rte_errno = errno ? errno : ENOSYS; 993 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?"); 994 return -rte_errno; 995 } 996 /* 997 * First scan the list of all Infiniband devices to find 998 * matching ones, gathering into the list. 999 */ 1000 struct devx_device_bdf *devx_bdf_match[ret + 1]; 1001 1002 while (ret-- > 0) { 1003 err = mlx5_match_devx_devices_to_addr(devx_bdf_devs, 1004 &pci_dev->addr); 1005 if (!err) { 1006 devx_bdf_devs++; 1007 continue; 1008 } 1009 if (err != 1) { 1010 ret = -err; 1011 goto exit; 1012 } 1013 devx_bdf_match[nd++] = devx_bdf_devs; 1014 } 1015 devx_bdf_match[nd] = NULL; 1016 if (!nd) { 1017 /* No device matches, just complain and bail out. */ 1018 DRV_LOG(WARNING, 1019 "no DevX device matches PCI device " PCI_PRI_FMT "," 1020 " is DevX Configured?", 1021 pci_dev->addr.domain, pci_dev->addr.bus, 1022 pci_dev->addr.devid, pci_dev->addr.function); 1023 rte_errno = ENOENT; 1024 ret = -rte_errno; 1025 goto exit; 1026 } 1027 /* 1028 * Now we can determine the maximal 1029 * amount of devices to be spawned. 1030 */ 1031 list = mlx5_malloc(MLX5_MEM_ZERO, 1032 sizeof(struct mlx5_dev_spawn_data), 1033 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY); 1034 if (!list) { 1035 DRV_LOG(ERR, "spawn data array allocation failure"); 1036 rte_errno = ENOMEM; 1037 ret = -rte_errno; 1038 goto exit; 1039 } 1040 memset(&list[ns].info, 0, sizeof(list[ns].info)); 1041 list[ns].max_port = 1; 1042 list[ns].phys_port = 1; 1043 list[ns].phys_dev = devx_bdf_match[ns]; 1044 list[ns].eth_dev = NULL; 1045 list[ns].pci_dev = pci_dev; 1046 list[ns].pf_bond = bd; 1047 list[ns].ifindex = -1; /* Spawn will assign */ 1048 list[ns].info = 1049 (struct mlx5_switch_info){ 1050 .master = 0, 1051 .representor = 0, 1052 .name_type = MLX5_PHYS_PORT_NAME_TYPE_UPLINK, 1053 .port_name = 0, 1054 .switch_id = 0, 1055 }; 1056 /* Device specific configuration. */ 1057 switch (pci_dev->id.device_id) { 1058 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF: 1059 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF: 1060 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: 1061 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: 1062 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF: 1063 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF: 1064 case PCI_DEVICE_ID_MELLANOX_CONNECTXVF: 1065 dev_config_vf = 1; 1066 break; 1067 default: 1068 dev_config_vf = 0; 1069 break; 1070 } 1071 /* Default configuration. */ 1072 memset(&dev_config, 0, sizeof(struct mlx5_dev_config)); 1073 dev_config.vf = dev_config_vf; 1074 dev_config.mps = 0; 1075 dev_config.dbnc = MLX5_ARG_UNSET; 1076 dev_config.rx_vec_en = 1; 1077 dev_config.txq_inline_max = MLX5_ARG_UNSET; 1078 dev_config.txq_inline_min = MLX5_ARG_UNSET; 1079 dev_config.txq_inline_mpw = MLX5_ARG_UNSET; 1080 dev_config.txqs_inline = MLX5_ARG_UNSET; 1081 dev_config.vf_nl_en = 0; 1082 dev_config.mr_ext_memseg_en = 1; 1083 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN; 1084 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS; 1085 dev_config.dv_esw_en = 0; 1086 dev_config.dv_flow_en = 1; 1087 dev_config.decap_en = 0; 1088 dev_config.log_hp_size = MLX5_ARG_UNSET; 1089 list[ns].eth_dev = mlx5_dev_spawn(&pci_dev->device, 1090 &list[ns], 1091 &dev_config); 1092 if (!list[ns].eth_dev) 1093 goto exit; 1094 restore = list[ns].eth_dev->data->dev_flags; 1095 rte_eth_copy_pci_info(list[ns].eth_dev, pci_dev); 1096 /* Restore non-PCI flags cleared by the above call. */ 1097 list[ns].eth_dev->data->dev_flags |= restore; 1098 rte_eth_dev_probing_finish(list[ns].eth_dev); 1099 ret = 0; 1100 exit: 1101 /* 1102 * Do the routine cleanup: 1103 * - free allocated spawn data array 1104 * - free the device list 1105 */ 1106 if (list) 1107 mlx5_free(list); 1108 MLX5_ASSERT(orig_devx_bdf_devs); 1109 mlx5_glue->free_device_list(orig_devx_bdf_devs); 1110 return ret; 1111 } 1112 1113 /** 1114 * Set the reg_mr and dereg_mr call backs 1115 * 1116 * @param reg_mr_cb[out] 1117 * Pointer to reg_mr func 1118 * @param dereg_mr_cb[out] 1119 * Pointer to dereg_mr func 1120 * 1121 */ 1122 void 1123 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb, 1124 mlx5_dereg_mr_t *dereg_mr_cb) 1125 { 1126 *reg_mr_cb = mlx5_os_reg_mr; 1127 *dereg_mr_cb = mlx5_os_dereg_mr; 1128 } 1129 1130 /** 1131 * Extract pdn of PD object using DevX 1132 * 1133 * @param[in] pd 1134 * Pointer to the DevX PD object. 1135 * @param[out] pdn 1136 * Pointer to the PD object number variable. 1137 * 1138 * @return 1139 * 0 on success, error value otherwise. 1140 */ 1141 int 1142 mlx5_os_get_pdn(void *pd, uint32_t *pdn) 1143 { 1144 if (!pd) 1145 return -EINVAL; 1146 1147 *pdn = ((struct mlx5_pd *)pd)->pdn; 1148 return 0; 1149 } 1150 1151 const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0}; 1152