1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox Technologies, Ltd 4 */ 5 6 #include <unistd.h> 7 8 #include <rte_ether.h> 9 #include <rte_ethdev_driver.h> 10 #include <rte_interrupts.h> 11 #include <rte_alarm.h> 12 13 #include "mlx5.h" 14 #include "mlx5_rxtx.h" 15 #include "mlx5_utils.h" 16 17 /** 18 * Stop traffic on Tx queues. 19 * 20 * @param dev 21 * Pointer to Ethernet device structure. 22 */ 23 static void 24 mlx5_txq_stop(struct rte_eth_dev *dev) 25 { 26 struct priv *priv = dev->data->dev_private; 27 unsigned int i; 28 29 for (i = 0; i != priv->txqs_n; ++i) 30 mlx5_txq_release(dev, i); 31 } 32 33 /** 34 * Start traffic on Tx queues. 35 * 36 * @param dev 37 * Pointer to Ethernet device structure. 38 * 39 * @return 40 * 0 on success, a negative errno value otherwise and rte_errno is set. 41 */ 42 static int 43 mlx5_txq_start(struct rte_eth_dev *dev) 44 { 45 struct priv *priv = dev->data->dev_private; 46 unsigned int i; 47 int ret; 48 49 /* Add memory regions to Tx queues. */ 50 for (i = 0; i != priv->txqs_n; ++i) { 51 struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i); 52 53 if (!txq_ctrl) 54 continue; 55 txq_alloc_elts(txq_ctrl); 56 txq_ctrl->ibv = mlx5_txq_ibv_new(dev, i); 57 if (!txq_ctrl->ibv) { 58 rte_errno = ENOMEM; 59 goto error; 60 } 61 } 62 ret = mlx5_tx_uar_remap(dev, priv->ctx->cmd_fd); 63 if (ret) 64 goto error; 65 return 0; 66 error: 67 ret = rte_errno; /* Save rte_errno before cleanup. */ 68 mlx5_txq_stop(dev); 69 rte_errno = ret; /* Restore rte_errno. */ 70 return -rte_errno; 71 } 72 73 /** 74 * Stop traffic on Rx queues. 75 * 76 * @param dev 77 * Pointer to Ethernet device structure. 78 */ 79 static void 80 mlx5_rxq_stop(struct rte_eth_dev *dev) 81 { 82 struct priv *priv = dev->data->dev_private; 83 unsigned int i; 84 85 for (i = 0; i != priv->rxqs_n; ++i) 86 mlx5_rxq_release(dev, i); 87 } 88 89 /** 90 * Start traffic on Rx queues. 91 * 92 * @param dev 93 * Pointer to Ethernet device structure. 94 * 95 * @return 96 * 0 on success, a negative errno value otherwise and rte_errno is set. 97 */ 98 static int 99 mlx5_rxq_start(struct rte_eth_dev *dev) 100 { 101 struct priv *priv = dev->data->dev_private; 102 unsigned int i; 103 int ret = 0; 104 105 /* Allocate/reuse/resize mempool for Multi-Packet RQ. */ 106 if (mlx5_mprq_alloc_mp(dev)) 107 goto error; 108 for (i = 0; i != priv->rxqs_n; ++i) { 109 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_get(dev, i); 110 struct rte_mempool *mp; 111 112 if (!rxq_ctrl) 113 continue; 114 /* Pre-register Rx mempool. */ 115 mp = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ? 116 rxq_ctrl->rxq.mprq_mp : rxq_ctrl->rxq.mp; 117 DRV_LOG(DEBUG, 118 "port %u Rx queue %u registering" 119 " mp %s having %u chunks", 120 dev->data->port_id, rxq_ctrl->idx, 121 mp->name, mp->nb_mem_chunks); 122 mlx5_mr_update_mp(dev, &rxq_ctrl->rxq.mr_ctrl, mp); 123 ret = rxq_alloc_elts(rxq_ctrl); 124 if (ret) 125 goto error; 126 rxq_ctrl->ibv = mlx5_rxq_ibv_new(dev, i); 127 if (!rxq_ctrl->ibv) 128 goto error; 129 } 130 return 0; 131 error: 132 ret = rte_errno; /* Save rte_errno before cleanup. */ 133 mlx5_rxq_stop(dev); 134 rte_errno = ret; /* Restore rte_errno. */ 135 return -rte_errno; 136 } 137 138 /** 139 * DPDK callback to start the device. 140 * 141 * Simulate device start by attaching all configured flows. 142 * 143 * @param dev 144 * Pointer to Ethernet device structure. 145 * 146 * @return 147 * 0 on success, a negative errno value otherwise and rte_errno is set. 148 */ 149 int 150 mlx5_dev_start(struct rte_eth_dev *dev) 151 { 152 struct priv *priv = dev->data->dev_private; 153 int ret; 154 155 dev->data->dev_started = 1; 156 DRV_LOG(DEBUG, "port %u allocating and configuring hash Rx queues", 157 dev->data->port_id); 158 ret = mlx5_txq_start(dev); 159 if (ret) { 160 DRV_LOG(ERR, "port %u Tx queue allocation failed: %s", 161 dev->data->port_id, strerror(rte_errno)); 162 goto error; 163 } 164 ret = mlx5_rxq_start(dev); 165 if (ret) { 166 DRV_LOG(ERR, "port %u Rx queue allocation failed: %s", 167 dev->data->port_id, strerror(rte_errno)); 168 goto error; 169 } 170 if (rte_log_get_level(mlx5_logtype) == RTE_LOG_DEBUG) 171 mlx5_mr_dump_dev(dev); 172 ret = mlx5_rx_intr_vec_enable(dev); 173 if (ret) { 174 DRV_LOG(ERR, "port %u Rx interrupt vector creation failed", 175 dev->data->port_id); 176 goto error; 177 } 178 mlx5_xstats_init(dev); 179 ret = mlx5_traffic_enable(dev); 180 if (ret) { 181 DRV_LOG(DEBUG, "port %u failed to set defaults flows", 182 dev->data->port_id); 183 goto error; 184 } 185 ret = mlx5_flow_start(dev, &priv->flows); 186 if (ret) { 187 DRV_LOG(DEBUG, "port %u failed to set flows", 188 dev->data->port_id); 189 goto error; 190 } 191 dev->tx_pkt_burst = mlx5_select_tx_function(dev); 192 dev->rx_pkt_burst = mlx5_select_rx_function(dev); 193 mlx5_dev_interrupt_handler_install(dev); 194 return 0; 195 error: 196 ret = rte_errno; /* Save rte_errno before cleanup. */ 197 /* Rollback. */ 198 dev->data->dev_started = 0; 199 mlx5_flow_stop(dev, &priv->flows); 200 mlx5_traffic_disable(dev); 201 mlx5_txq_stop(dev); 202 mlx5_rxq_stop(dev); 203 rte_errno = ret; /* Restore rte_errno. */ 204 return -rte_errno; 205 } 206 207 /** 208 * DPDK callback to stop the device. 209 * 210 * Simulate device stop by detaching all configured flows. 211 * 212 * @param dev 213 * Pointer to Ethernet device structure. 214 */ 215 void 216 mlx5_dev_stop(struct rte_eth_dev *dev) 217 { 218 struct priv *priv = dev->data->dev_private; 219 220 dev->data->dev_started = 0; 221 /* Prevent crashes when queues are still in use. */ 222 dev->rx_pkt_burst = removed_rx_burst; 223 dev->tx_pkt_burst = removed_tx_burst; 224 rte_wmb(); 225 usleep(1000 * priv->rxqs_n); 226 DRV_LOG(DEBUG, "port %u cleaning up and destroying hash Rx queues", 227 dev->data->port_id); 228 mlx5_flow_stop(dev, &priv->flows); 229 mlx5_traffic_disable(dev); 230 mlx5_rx_intr_vec_disable(dev); 231 mlx5_dev_interrupt_handler_uninstall(dev); 232 mlx5_txq_stop(dev); 233 mlx5_rxq_stop(dev); 234 } 235 236 /** 237 * Enable traffic flows configured by control plane 238 * 239 * @param dev 240 * Pointer to Ethernet device private data. 241 * @param dev 242 * Pointer to Ethernet device structure. 243 * 244 * @return 245 * 0 on success, a negative errno value otherwise and rte_errno is set. 246 */ 247 int 248 mlx5_traffic_enable(struct rte_eth_dev *dev) 249 { 250 struct priv *priv = dev->data->dev_private; 251 struct rte_flow_item_eth bcast = { 252 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 253 }; 254 struct rte_flow_item_eth ipv6_multi_spec = { 255 .dst.addr_bytes = "\x33\x33\x00\x00\x00\x00", 256 }; 257 struct rte_flow_item_eth ipv6_multi_mask = { 258 .dst.addr_bytes = "\xff\xff\x00\x00\x00\x00", 259 }; 260 struct rte_flow_item_eth unicast = { 261 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 262 }; 263 struct rte_flow_item_eth unicast_mask = { 264 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 265 }; 266 const unsigned int vlan_filter_n = priv->vlan_filter_n; 267 const struct ether_addr cmp = { 268 .addr_bytes = "\x00\x00\x00\x00\x00\x00", 269 }; 270 unsigned int i; 271 unsigned int j; 272 int ret; 273 274 if (priv->isolated) 275 return 0; 276 if (dev->data->promiscuous) { 277 struct rte_flow_item_eth promisc = { 278 .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00", 279 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 280 .type = 0, 281 }; 282 283 ret = mlx5_ctrl_flow(dev, &promisc, &promisc); 284 if (ret) 285 goto error; 286 } 287 if (dev->data->all_multicast) { 288 struct rte_flow_item_eth multicast = { 289 .dst.addr_bytes = "\x01\x00\x00\x00\x00\x00", 290 .src.addr_bytes = "\x00\x00\x00\x00\x00\x00", 291 .type = 0, 292 }; 293 294 ret = mlx5_ctrl_flow(dev, &multicast, &multicast); 295 if (ret) 296 goto error; 297 } else { 298 /* Add broadcast/multicast flows. */ 299 for (i = 0; i != vlan_filter_n; ++i) { 300 uint16_t vlan = priv->vlan_filter[i]; 301 302 struct rte_flow_item_vlan vlan_spec = { 303 .tci = rte_cpu_to_be_16(vlan), 304 }; 305 struct rte_flow_item_vlan vlan_mask = { 306 .tci = 0xffff, 307 }; 308 309 ret = mlx5_ctrl_flow_vlan(dev, &bcast, &bcast, 310 &vlan_spec, &vlan_mask); 311 if (ret) 312 goto error; 313 ret = mlx5_ctrl_flow_vlan(dev, &ipv6_multi_spec, 314 &ipv6_multi_mask, 315 &vlan_spec, &vlan_mask); 316 if (ret) 317 goto error; 318 } 319 if (!vlan_filter_n) { 320 ret = mlx5_ctrl_flow(dev, &bcast, &bcast); 321 if (ret) 322 goto error; 323 ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec, 324 &ipv6_multi_mask); 325 if (ret) 326 goto error; 327 } 328 } 329 /* Add MAC address flows. */ 330 for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) { 331 struct ether_addr *mac = &dev->data->mac_addrs[i]; 332 333 if (!memcmp(mac, &cmp, sizeof(*mac))) 334 continue; 335 memcpy(&unicast.dst.addr_bytes, 336 mac->addr_bytes, 337 ETHER_ADDR_LEN); 338 for (j = 0; j != vlan_filter_n; ++j) { 339 uint16_t vlan = priv->vlan_filter[j]; 340 341 struct rte_flow_item_vlan vlan_spec = { 342 .tci = rte_cpu_to_be_16(vlan), 343 }; 344 struct rte_flow_item_vlan vlan_mask = { 345 .tci = 0xffff, 346 }; 347 348 ret = mlx5_ctrl_flow_vlan(dev, &unicast, 349 &unicast_mask, 350 &vlan_spec, 351 &vlan_mask); 352 if (ret) 353 goto error; 354 } 355 if (!vlan_filter_n) { 356 ret = mlx5_ctrl_flow(dev, &unicast, &unicast_mask); 357 if (ret) 358 goto error; 359 } 360 } 361 return 0; 362 error: 363 ret = rte_errno; /* Save rte_errno before cleanup. */ 364 mlx5_flow_list_flush(dev, &priv->ctrl_flows); 365 rte_errno = ret; /* Restore rte_errno. */ 366 return -rte_errno; 367 } 368 369 370 /** 371 * Disable traffic flows configured by control plane 372 * 373 * @param dev 374 * Pointer to Ethernet device private data. 375 */ 376 void 377 mlx5_traffic_disable(struct rte_eth_dev *dev) 378 { 379 struct priv *priv = dev->data->dev_private; 380 381 mlx5_flow_list_flush(dev, &priv->ctrl_flows); 382 } 383 384 /** 385 * Restart traffic flows configured by control plane 386 * 387 * @param dev 388 * Pointer to Ethernet device private data. 389 * 390 * @return 391 * 0 on success, a negative errno value otherwise and rte_errno is set. 392 */ 393 int 394 mlx5_traffic_restart(struct rte_eth_dev *dev) 395 { 396 if (dev->data->dev_started) { 397 mlx5_traffic_disable(dev); 398 return mlx5_traffic_enable(dev); 399 } 400 return 0; 401 } 402