1 /*- 2 * BSD LICENSE 3 * 4 * Copyright 2015 6WIND S.A. 5 * Copyright 2015 Mellanox. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of 6WIND S.A. nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef RTE_PMD_MLX5_RXTX_H_ 35 #define RTE_PMD_MLX5_RXTX_H_ 36 37 #include <stddef.h> 38 #include <stdint.h> 39 40 /* Verbs header. */ 41 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 42 #ifdef PEDANTIC 43 #pragma GCC diagnostic ignored "-pedantic" 44 #endif 45 #include <infiniband/verbs.h> 46 #ifdef PEDANTIC 47 #pragma GCC diagnostic error "-pedantic" 48 #endif 49 50 /* DPDK headers don't like -pedantic. */ 51 #ifdef PEDANTIC 52 #pragma GCC diagnostic ignored "-pedantic" 53 #endif 54 #include <rte_mbuf.h> 55 #include <rte_mempool.h> 56 #ifdef PEDANTIC 57 #pragma GCC diagnostic error "-pedantic" 58 #endif 59 60 #include "mlx5_utils.h" 61 #include "mlx5.h" 62 #include "mlx5_autoconf.h" 63 #include "mlx5_defs.h" 64 65 struct mlx5_rxq_stats { 66 unsigned int idx; /**< Mapping index. */ 67 #ifdef MLX5_PMD_SOFT_COUNTERS 68 uint64_t ipackets; /**< Total of successfully received packets. */ 69 uint64_t ibytes; /**< Total of successfully received bytes. */ 70 #endif 71 uint64_t idropped; /**< Total of packets dropped when RX ring full. */ 72 uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */ 73 }; 74 75 struct mlx5_txq_stats { 76 unsigned int idx; /**< Mapping index. */ 77 #ifdef MLX5_PMD_SOFT_COUNTERS 78 uint64_t opackets; /**< Total of successfully sent packets. */ 79 uint64_t obytes; /**< Total of successfully sent bytes. */ 80 #endif 81 uint64_t odropped; /**< Total of packets not sent when TX ring full. */ 82 }; 83 84 /* RX element (scattered packets). */ 85 struct rxq_elt_sp { 86 struct ibv_sge sges[MLX5_PMD_SGE_WR_N]; /* Scatter/Gather Elements. */ 87 struct rte_mbuf *bufs[MLX5_PMD_SGE_WR_N]; /* SGEs buffers. */ 88 }; 89 90 /* RX element. */ 91 struct rxq_elt { 92 struct ibv_sge sge; /* Scatter/Gather Element. */ 93 struct rte_mbuf *buf; /* SGE buffer. */ 94 }; 95 96 /* Flow director queue structure. */ 97 struct fdir_queue { 98 struct ibv_qp *qp; /* Associated RX QP. */ 99 struct ibv_exp_rwq_ind_table *ind_table; /* Indirection table. */ 100 }; 101 102 struct priv; 103 104 /* RX queue descriptor. */ 105 struct rxq { 106 struct priv *priv; /* Back pointer to private data. */ 107 struct rte_mempool *mp; /* Memory Pool for allocations. */ 108 struct ibv_cq *cq; /* Completion Queue. */ 109 struct ibv_exp_wq *wq; /* Work Queue. */ 110 int32_t (*poll)(); /* Verbs poll function. */ 111 int32_t (*recv)(); /* Verbs receive function. */ 112 unsigned int port_id; /* Port ID for incoming packets. */ 113 unsigned int elts_n; /* (*elts)[] length. */ 114 unsigned int elts_head; /* Current index in (*elts)[]. */ 115 unsigned int sp:1; /* Use scattered RX elements. */ 116 unsigned int csum:1; /* Enable checksum offloading. */ 117 unsigned int csum_l2tun:1; /* Same for L2 tunnels. */ 118 unsigned int vlan_strip:1; /* Enable VLAN stripping. */ 119 unsigned int crc_present:1; /* CRC must be subtracted. */ 120 union { 121 struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */ 122 struct rxq_elt (*no_sp)[]; /* RX elements. */ 123 } elts; 124 uint32_t mb_len; /* Length of a mp-issued mbuf. */ 125 unsigned int socket; /* CPU socket ID for allocations. */ 126 struct mlx5_rxq_stats stats; /* RX queue counters. */ 127 struct ibv_exp_res_domain *rd; /* Resource Domain. */ 128 struct fdir_queue fdir_queue; /* Flow director queue. */ 129 struct ibv_mr *mr; /* Memory Region (for mp). */ 130 struct ibv_exp_wq_family *if_wq; /* WQ burst interface. */ 131 #ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS 132 struct ibv_exp_cq_family_v1 *if_cq; /* CQ interface. */ 133 #else /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */ 134 struct ibv_exp_cq_family *if_cq; /* CQ interface. */ 135 #endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */ 136 }; 137 138 /* Hash RX queue types. */ 139 enum hash_rxq_type { 140 HASH_RXQ_TCPV4, 141 HASH_RXQ_UDPV4, 142 HASH_RXQ_IPV4, 143 #ifdef HAVE_FLOW_SPEC_IPV6 144 HASH_RXQ_TCPV6, 145 HASH_RXQ_UDPV6, 146 HASH_RXQ_IPV6, 147 #endif /* HAVE_FLOW_SPEC_IPV6 */ 148 HASH_RXQ_ETH, 149 }; 150 151 /* Flow structure with Ethernet specification. It is packed to prevent padding 152 * between attr and spec as this layout is expected by libibverbs. */ 153 struct flow_attr_spec_eth { 154 struct ibv_exp_flow_attr attr; 155 struct ibv_exp_flow_spec_eth spec; 156 } __attribute__((packed)); 157 158 /* Define a struct flow_attr_spec_eth object as an array of at least 159 * "size" bytes. Room after the first index is normally used to store 160 * extra flow specifications. */ 161 #define FLOW_ATTR_SPEC_ETH(name, size) \ 162 struct flow_attr_spec_eth name \ 163 [((size) / sizeof(struct flow_attr_spec_eth)) + \ 164 !!((size) % sizeof(struct flow_attr_spec_eth))] 165 166 /* Initialization data for hash RX queue. */ 167 struct hash_rxq_init { 168 uint64_t hash_fields; /* Fields that participate in the hash. */ 169 uint64_t dpdk_rss_hf; /* Matching DPDK RSS hash fields. */ 170 unsigned int flow_priority; /* Flow priority to use. */ 171 union { 172 struct { 173 enum ibv_exp_flow_spec_type type; 174 uint16_t size; 175 } hdr; 176 struct ibv_exp_flow_spec_tcp_udp tcp_udp; 177 struct ibv_exp_flow_spec_ipv4 ipv4; 178 #ifdef HAVE_FLOW_SPEC_IPV6 179 struct ibv_exp_flow_spec_ipv6 ipv6; 180 #endif /* HAVE_FLOW_SPEC_IPV6 */ 181 struct ibv_exp_flow_spec_eth eth; 182 } flow_spec; /* Flow specification template. */ 183 const struct hash_rxq_init *underlayer; /* Pointer to underlayer. */ 184 }; 185 186 /* Initialization data for indirection table. */ 187 struct ind_table_init { 188 unsigned int max_size; /* Maximum number of WQs. */ 189 /* Hash RX queues using this table. */ 190 unsigned int hash_types; 191 unsigned int hash_types_n; 192 }; 193 194 /* Initialization data for special flows. */ 195 struct special_flow_init { 196 uint8_t dst_mac_val[6]; 197 uint8_t dst_mac_mask[6]; 198 unsigned int hash_types; 199 unsigned int per_vlan:1; 200 }; 201 202 enum hash_rxq_flow_type { 203 HASH_RXQ_FLOW_TYPE_PROMISC, 204 HASH_RXQ_FLOW_TYPE_ALLMULTI, 205 HASH_RXQ_FLOW_TYPE_BROADCAST, 206 HASH_RXQ_FLOW_TYPE_IPV6MULTI, 207 HASH_RXQ_FLOW_TYPE_MAC, 208 }; 209 210 #ifndef NDEBUG 211 static inline const char * 212 hash_rxq_flow_type_str(enum hash_rxq_flow_type flow_type) 213 { 214 switch (flow_type) { 215 case HASH_RXQ_FLOW_TYPE_PROMISC: 216 return "promiscuous"; 217 case HASH_RXQ_FLOW_TYPE_ALLMULTI: 218 return "allmulticast"; 219 case HASH_RXQ_FLOW_TYPE_BROADCAST: 220 return "broadcast"; 221 case HASH_RXQ_FLOW_TYPE_IPV6MULTI: 222 return "IPv6 multicast"; 223 case HASH_RXQ_FLOW_TYPE_MAC: 224 return "MAC"; 225 } 226 return NULL; 227 } 228 #endif /* NDEBUG */ 229 230 struct hash_rxq { 231 struct priv *priv; /* Back pointer to private data. */ 232 struct ibv_qp *qp; /* Hash RX QP. */ 233 enum hash_rxq_type type; /* Hash RX queue type. */ 234 /* MAC flow steering rules, one per VLAN ID. */ 235 struct ibv_exp_flow *mac_flow[MLX5_MAX_MAC_ADDRESSES][MLX5_MAX_VLAN_IDS]; 236 struct ibv_exp_flow *special_flow 237 [MLX5_MAX_SPECIAL_FLOWS][MLX5_MAX_VLAN_IDS]; 238 }; 239 240 /* TX element. */ 241 struct txq_elt { 242 struct rte_mbuf *buf; 243 }; 244 245 /* Linear buffer type. It is used when transmitting buffers with too many 246 * segments that do not fit the hardware queue (see max_send_sge). 247 * Extra segments are copied (linearized) in such buffers, replacing the 248 * last SGE during TX. 249 * The size is arbitrary but large enough to hold a jumbo frame with 250 * 8 segments considering mbuf.buf_len is about 2048 bytes. */ 251 typedef uint8_t linear_t[16384]; 252 253 /* TX queue descriptor. */ 254 struct txq { 255 struct priv *priv; /* Back pointer to private data. */ 256 int32_t (*poll_cnt)(struct ibv_cq *cq, uint32_t max); 257 int (*send_pending)(); 258 #ifdef HAVE_VERBS_VLAN_INSERTION 259 int (*send_pending_vlan)(); 260 #endif 261 #if MLX5_PMD_MAX_INLINE > 0 262 int (*send_pending_inline)(); 263 #ifdef HAVE_VERBS_VLAN_INSERTION 264 int (*send_pending_inline_vlan)(); 265 #endif 266 #endif 267 #if MLX5_PMD_SGE_WR_N > 1 268 int (*send_pending_sg_list)(); 269 #ifdef HAVE_VERBS_VLAN_INSERTION 270 int (*send_pending_sg_list_vlan)(); 271 #endif 272 #endif 273 int (*send_flush)(struct ibv_qp *qp); 274 struct ibv_cq *cq; /* Completion Queue. */ 275 struct ibv_qp *qp; /* Queue Pair. */ 276 struct txq_elt (*elts)[]; /* TX elements. */ 277 #if MLX5_PMD_MAX_INLINE > 0 278 uint32_t max_inline; /* Max inline send size <= MLX5_PMD_MAX_INLINE. */ 279 #endif 280 unsigned int elts_n; /* (*elts)[] length. */ 281 unsigned int elts_head; /* Current index in (*elts)[]. */ 282 unsigned int elts_tail; /* First element awaiting completion. */ 283 unsigned int elts_comp; /* Number of completion requests. */ 284 unsigned int elts_comp_cd; /* Countdown for next completion request. */ 285 unsigned int elts_comp_cd_init; /* Initial value for countdown. */ 286 struct { 287 const struct rte_mempool *mp; /* Cached Memory Pool. */ 288 struct ibv_mr *mr; /* Memory Region (for mp). */ 289 uint32_t lkey; /* mr->lkey */ 290 } mp2mr[MLX5_PMD_TX_MP_CACHE]; /* MP to MR translation table. */ 291 struct mlx5_txq_stats stats; /* TX queue counters. */ 292 /* Elements used only for init part are here. */ 293 linear_t (*elts_linear)[]; /* Linearized buffers. */ 294 struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */ 295 #ifdef HAVE_VERBS_VLAN_INSERTION 296 struct ibv_exp_qp_burst_family_v1 *if_qp; /* QP burst interface. */ 297 #else 298 struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */ 299 #endif 300 struct ibv_exp_cq_family *if_cq; /* CQ interface. */ 301 struct ibv_exp_res_domain *rd; /* Resource Domain. */ 302 unsigned int socket; /* CPU socket ID for allocations. */ 303 }; 304 305 /* mlx5_rxq.c */ 306 307 extern const struct hash_rxq_init hash_rxq_init[]; 308 extern const unsigned int hash_rxq_init_n; 309 310 extern uint8_t rss_hash_default_key[]; 311 extern const size_t rss_hash_default_key_len; 312 313 size_t priv_flow_attr(struct priv *, struct ibv_exp_flow_attr *, 314 size_t, enum hash_rxq_type); 315 int priv_create_hash_rxqs(struct priv *); 316 void priv_destroy_hash_rxqs(struct priv *); 317 int priv_allow_flow_type(struct priv *, enum hash_rxq_flow_type); 318 int priv_rehash_flows(struct priv *); 319 void rxq_cleanup(struct rxq *); 320 int rxq_rehash(struct rte_eth_dev *, struct rxq *); 321 int rxq_setup(struct rte_eth_dev *, struct rxq *, uint16_t, unsigned int, 322 const struct rte_eth_rxconf *, struct rte_mempool *); 323 int mlx5_rx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int, 324 const struct rte_eth_rxconf *, struct rte_mempool *); 325 void mlx5_rx_queue_release(void *); 326 uint16_t mlx5_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts, 327 uint16_t pkts_n); 328 329 330 /* mlx5_txq.c */ 331 332 void txq_cleanup(struct txq *); 333 int txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc, 334 unsigned int socket, const struct rte_eth_txconf *conf); 335 336 int mlx5_tx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int, 337 const struct rte_eth_txconf *); 338 void mlx5_tx_queue_release(void *); 339 uint16_t mlx5_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts, 340 uint16_t pkts_n); 341 342 /* mlx5_rxtx.c */ 343 344 struct ibv_mr *mlx5_mp2mr(struct ibv_pd *, const struct rte_mempool *); 345 void txq_mp2mr_iter(const struct rte_mempool *, void *); 346 uint16_t mlx5_tx_burst(void *, struct rte_mbuf **, uint16_t); 347 uint16_t mlx5_rx_burst_sp(void *, struct rte_mbuf **, uint16_t); 348 uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t); 349 uint16_t removed_tx_burst(void *, struct rte_mbuf **, uint16_t); 350 uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t); 351 352 #endif /* RTE_PMD_MLX5_RXTX_H_ */ 353