1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2018 Mellanox Technologies, Ltd 3 */ 4 5 #ifndef RTE_PMD_MLX5_FLOW_H_ 6 #define RTE_PMD_MLX5_FLOW_H_ 7 8 #include <netinet/in.h> 9 #include <sys/queue.h> 10 #include <stdalign.h> 11 #include <stdint.h> 12 #include <string.h> 13 14 /* Verbs header. */ 15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */ 16 #ifdef PEDANTIC 17 #pragma GCC diagnostic ignored "-Wpedantic" 18 #endif 19 #include <infiniband/verbs.h> 20 #ifdef PEDANTIC 21 #pragma GCC diagnostic error "-Wpedantic" 22 #endif 23 24 /* Pattern outer Layer bits. */ 25 #define MLX5_FLOW_LAYER_OUTER_L2 (1u << 0) 26 #define MLX5_FLOW_LAYER_OUTER_L3_IPV4 (1u << 1) 27 #define MLX5_FLOW_LAYER_OUTER_L3_IPV6 (1u << 2) 28 #define MLX5_FLOW_LAYER_OUTER_L4_UDP (1u << 3) 29 #define MLX5_FLOW_LAYER_OUTER_L4_TCP (1u << 4) 30 #define MLX5_FLOW_LAYER_OUTER_VLAN (1u << 5) 31 32 /* Pattern inner Layer bits. */ 33 #define MLX5_FLOW_LAYER_INNER_L2 (1u << 6) 34 #define MLX5_FLOW_LAYER_INNER_L3_IPV4 (1u << 7) 35 #define MLX5_FLOW_LAYER_INNER_L3_IPV6 (1u << 8) 36 #define MLX5_FLOW_LAYER_INNER_L4_UDP (1u << 9) 37 #define MLX5_FLOW_LAYER_INNER_L4_TCP (1u << 10) 38 #define MLX5_FLOW_LAYER_INNER_VLAN (1u << 11) 39 40 /* Pattern tunnel Layer bits. */ 41 #define MLX5_FLOW_LAYER_VXLAN (1u << 12) 42 #define MLX5_FLOW_LAYER_VXLAN_GPE (1u << 13) 43 #define MLX5_FLOW_LAYER_GRE (1u << 14) 44 #define MLX5_FLOW_LAYER_MPLS (1u << 15) 45 46 /* General pattern items bits. */ 47 #define MLX5_FLOW_ITEM_METADATA (1u << 16) 48 49 /* Outer Masks. */ 50 #define MLX5_FLOW_LAYER_OUTER_L3 \ 51 (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6) 52 #define MLX5_FLOW_LAYER_OUTER_L4 \ 53 (MLX5_FLOW_LAYER_OUTER_L4_UDP | MLX5_FLOW_LAYER_OUTER_L4_TCP) 54 #define MLX5_FLOW_LAYER_OUTER \ 55 (MLX5_FLOW_LAYER_OUTER_L2 | MLX5_FLOW_LAYER_OUTER_L3 | \ 56 MLX5_FLOW_LAYER_OUTER_L4) 57 58 /* Tunnel Masks. */ 59 #define MLX5_FLOW_LAYER_TUNNEL \ 60 (MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \ 61 MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_MPLS) 62 63 /* Inner Masks. */ 64 #define MLX5_FLOW_LAYER_INNER_L3 \ 65 (MLX5_FLOW_LAYER_INNER_L3_IPV4 | MLX5_FLOW_LAYER_INNER_L3_IPV6) 66 #define MLX5_FLOW_LAYER_INNER_L4 \ 67 (MLX5_FLOW_LAYER_INNER_L4_UDP | MLX5_FLOW_LAYER_INNER_L4_TCP) 68 #define MLX5_FLOW_LAYER_INNER \ 69 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3 | \ 70 MLX5_FLOW_LAYER_INNER_L4) 71 72 /* Actions */ 73 #define MLX5_FLOW_ACTION_DROP (1u << 0) 74 #define MLX5_FLOW_ACTION_QUEUE (1u << 1) 75 #define MLX5_FLOW_ACTION_RSS (1u << 2) 76 #define MLX5_FLOW_ACTION_FLAG (1u << 3) 77 #define MLX5_FLOW_ACTION_MARK (1u << 4) 78 #define MLX5_FLOW_ACTION_COUNT (1u << 5) 79 #define MLX5_FLOW_ACTION_PORT_ID (1u << 6) 80 #define MLX5_FLOW_ACTION_OF_POP_VLAN (1u << 7) 81 #define MLX5_FLOW_ACTION_OF_PUSH_VLAN (1u << 8) 82 #define MLX5_FLOW_ACTION_OF_SET_VLAN_VID (1u << 9) 83 #define MLX5_FLOW_ACTION_OF_SET_VLAN_PCP (1u << 10) 84 #define MLX5_FLOW_ACTION_SET_IPV4_SRC (1u << 11) 85 #define MLX5_FLOW_ACTION_SET_IPV4_DST (1u << 12) 86 #define MLX5_FLOW_ACTION_SET_IPV6_SRC (1u << 13) 87 #define MLX5_FLOW_ACTION_SET_IPV6_DST (1u << 14) 88 #define MLX5_FLOW_ACTION_SET_TP_SRC (1u << 15) 89 #define MLX5_FLOW_ACTION_SET_TP_DST (1u << 16) 90 #define MLX5_FLOW_ACTION_JUMP (1u << 17) 91 #define MLX5_FLOW_ACTION_SET_TTL (1u << 18) 92 #define MLX5_FLOW_ACTION_DEC_TTL (1u << 19) 93 #define MLX5_FLOW_ACTION_SET_MAC_SRC (1u << 20) 94 #define MLX5_FLOW_ACTION_SET_MAC_DST (1u << 21) 95 96 #define MLX5_FLOW_FATE_ACTIONS \ 97 (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS) 98 99 #ifndef IPPROTO_MPLS 100 #define IPPROTO_MPLS 137 101 #endif 102 103 /* UDP port numbers for VxLAN. */ 104 #define MLX5_UDP_PORT_VXLAN 4789 105 #define MLX5_UDP_PORT_VXLAN_GPE 4790 106 107 /* Priority reserved for default flows. */ 108 #define MLX5_FLOW_PRIO_RSVD ((uint32_t)-1) 109 110 /* 111 * Number of sub priorities. 112 * For each kind of pattern matching i.e. L2, L3, L4 to have a correct 113 * matching on the NIC (firmware dependent) L4 most have the higher priority 114 * followed by L3 and ending with L2. 115 */ 116 #define MLX5_PRIORITY_MAP_L2 2 117 #define MLX5_PRIORITY_MAP_L3 1 118 #define MLX5_PRIORITY_MAP_L4 0 119 #define MLX5_PRIORITY_MAP_MAX 3 120 121 /* Valid layer type for IPV4 RSS. */ 122 #define MLX5_IPV4_LAYER_TYPES \ 123 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | \ 124 ETH_RSS_NONFRAG_IPV4_TCP | ETH_RSS_NONFRAG_IPV4_UDP | \ 125 ETH_RSS_NONFRAG_IPV4_OTHER) 126 127 /* IBV hash source bits for IPV4. */ 128 #define MLX5_IPV4_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV4 | IBV_RX_HASH_DST_IPV4) 129 130 /* Valid layer type for IPV6 RSS. */ 131 #define MLX5_IPV6_LAYER_TYPES \ 132 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | ETH_RSS_NONFRAG_IPV6_TCP | \ 133 ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_EX | ETH_RSS_IPV6_TCP_EX | \ 134 ETH_RSS_IPV6_UDP_EX | ETH_RSS_NONFRAG_IPV6_OTHER) 135 136 /* IBV hash source bits for IPV6. */ 137 #define MLX5_IPV6_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV6 | IBV_RX_HASH_DST_IPV6) 138 139 /* Max number of actions per DV flow. */ 140 #define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8 141 142 enum mlx5_flow_drv_type { 143 MLX5_FLOW_TYPE_MIN, 144 MLX5_FLOW_TYPE_DV, 145 MLX5_FLOW_TYPE_TCF, 146 MLX5_FLOW_TYPE_VERBS, 147 MLX5_FLOW_TYPE_MAX, 148 }; 149 150 /* Matcher PRM representation */ 151 struct mlx5_flow_dv_match_params { 152 size_t size; 153 /**< Size of match value. Do NOT split size and key! */ 154 uint32_t buf[MLX5_ST_SZ_DW(fte_match_param)]; 155 /**< Matcher value. This value is used as the mask or as a key. */ 156 }; 157 158 #define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8 159 160 /* Matcher structure. */ 161 struct mlx5_flow_dv_matcher { 162 LIST_ENTRY(mlx5_flow_dv_matcher) next; 163 /* Pointer to the next element. */ 164 rte_atomic32_t refcnt; /**< Reference counter. */ 165 void *matcher_object; /**< Pointer to DV matcher */ 166 uint16_t crc; /**< CRC of key. */ 167 uint16_t priority; /**< Priority of matcher. */ 168 uint8_t egress; /**< Egress matcher. */ 169 struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */ 170 }; 171 172 /* DV flows structure. */ 173 struct mlx5_flow_dv { 174 uint64_t hash_fields; /**< Fields that participate in the hash. */ 175 struct mlx5_hrxq *hrxq; /**< Hash Rx queues. */ 176 /* Flow DV api: */ 177 struct mlx5_flow_dv_matcher *matcher; /**< Cache to matcher. */ 178 struct mlx5_flow_dv_match_params value; 179 /**< Holds the value that the packet is compared to. */ 180 struct ibv_flow *flow; /**< Installed flow. */ 181 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 182 struct mlx5dv_flow_action_attr actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS]; 183 /**< Action list. */ 184 #endif 185 int actions_n; /**< number of actions. */ 186 }; 187 188 /** Linux TC flower driver for E-Switch flow. */ 189 struct mlx5_flow_tcf { 190 struct nlmsghdr *nlh; 191 struct tcmsg *tcm; 192 }; 193 194 /* Verbs specification header. */ 195 struct ibv_spec_header { 196 enum ibv_flow_spec_type type; 197 uint16_t size; 198 }; 199 200 /** Handles information leading to a drop fate. */ 201 struct mlx5_flow_verbs { 202 LIST_ENTRY(mlx5_flow_verbs) next; 203 unsigned int size; /**< Size of the attribute. */ 204 struct { 205 struct ibv_flow_attr *attr; 206 /**< Pointer to the Specification buffer. */ 207 uint8_t *specs; /**< Pointer to the specifications. */ 208 }; 209 struct ibv_flow *flow; /**< Verbs flow pointer. */ 210 struct mlx5_hrxq *hrxq; /**< Hash Rx queue object. */ 211 uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */ 212 }; 213 214 /** Device flow structure. */ 215 struct mlx5_flow { 216 LIST_ENTRY(mlx5_flow) next; 217 struct rte_flow *flow; /**< Pointer to the main flow. */ 218 uint64_t layers; 219 /**< Bit-fields of present layers, see MLX5_FLOW_LAYER_*. */ 220 union { 221 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 222 struct mlx5_flow_dv dv; 223 #endif 224 struct mlx5_flow_tcf tcf; 225 struct mlx5_flow_verbs verbs; 226 }; 227 }; 228 229 /* Counters information. */ 230 struct mlx5_flow_counter { 231 LIST_ENTRY(mlx5_flow_counter) next; /**< Pointer to the next counter. */ 232 uint32_t shared:1; /**< Share counter ID with other flow rules. */ 233 uint32_t ref_cnt:31; /**< Reference counter. */ 234 uint32_t id; /**< Counter ID. */ 235 #if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) 236 struct ibv_counter_set *cs; /**< Holds the counters for the rule. */ 237 #elif defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) 238 struct ibv_counters *cs; /**< Holds the counters for the rule. */ 239 #endif 240 uint64_t hits; /**< Number of packets matched by the rule. */ 241 uint64_t bytes; /**< Number of bytes matched by the rule. */ 242 }; 243 244 /* Flow structure. */ 245 struct rte_flow { 246 TAILQ_ENTRY(rte_flow) next; /**< Pointer to the next flow structure. */ 247 enum mlx5_flow_drv_type drv_type; /**< Drvier type. */ 248 struct mlx5_flow_counter *counter; /**< Holds flow counter. */ 249 struct rte_flow_action_rss rss;/**< RSS context. */ 250 uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */ 251 uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */ 252 LIST_HEAD(dev_flows, mlx5_flow) dev_flows; 253 /**< Device flows that are part of the flow. */ 254 uint64_t actions; 255 /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */ 256 }; 257 typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev, 258 const struct rte_flow_attr *attr, 259 const struct rte_flow_item items[], 260 const struct rte_flow_action actions[], 261 struct rte_flow_error *error); 262 typedef struct mlx5_flow *(*mlx5_flow_prepare_t) 263 (const struct rte_flow_attr *attr, const struct rte_flow_item items[], 264 const struct rte_flow_action actions[], uint64_t *item_flags, 265 uint64_t *action_flags, struct rte_flow_error *error); 266 typedef int (*mlx5_flow_translate_t)(struct rte_eth_dev *dev, 267 struct mlx5_flow *dev_flow, 268 const struct rte_flow_attr *attr, 269 const struct rte_flow_item items[], 270 const struct rte_flow_action actions[], 271 struct rte_flow_error *error); 272 typedef int (*mlx5_flow_apply_t)(struct rte_eth_dev *dev, struct rte_flow *flow, 273 struct rte_flow_error *error); 274 typedef void (*mlx5_flow_remove_t)(struct rte_eth_dev *dev, 275 struct rte_flow *flow); 276 typedef void (*mlx5_flow_destroy_t)(struct rte_eth_dev *dev, 277 struct rte_flow *flow); 278 typedef int (*mlx5_flow_query_t)(struct rte_eth_dev *dev, 279 struct rte_flow *flow, 280 const struct rte_flow_action *actions, 281 void *data, 282 struct rte_flow_error *error); 283 struct mlx5_flow_driver_ops { 284 mlx5_flow_validate_t validate; 285 mlx5_flow_prepare_t prepare; 286 mlx5_flow_translate_t translate; 287 mlx5_flow_apply_t apply; 288 mlx5_flow_remove_t remove; 289 mlx5_flow_destroy_t destroy; 290 mlx5_flow_query_t query; 291 }; 292 293 /* mlx5_flow.c */ 294 295 uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, int tunnel, 296 uint64_t layer_types, 297 uint64_t hash_fields); 298 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority, 299 uint32_t subpriority); 300 int mlx5_flow_validate_action_count(struct rte_eth_dev *dev, 301 const struct rte_flow_attr *attr, 302 struct rte_flow_error *error); 303 int mlx5_flow_validate_action_drop(uint64_t action_flags, 304 const struct rte_flow_attr *attr, 305 struct rte_flow_error *error); 306 int mlx5_flow_validate_action_flag(uint64_t action_flags, 307 const struct rte_flow_attr *attr, 308 struct rte_flow_error *error); 309 int mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 310 uint64_t action_flags, 311 const struct rte_flow_attr *attr, 312 struct rte_flow_error *error); 313 int mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 314 uint64_t action_flags, 315 struct rte_eth_dev *dev, 316 const struct rte_flow_attr *attr, 317 struct rte_flow_error *error); 318 int mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 319 uint64_t action_flags, 320 struct rte_eth_dev *dev, 321 const struct rte_flow_attr *attr, 322 struct rte_flow_error *error); 323 int mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 324 const struct rte_flow_attr *attributes, 325 struct rte_flow_error *error); 326 int mlx5_flow_item_acceptable(const struct rte_flow_item *item, 327 const uint8_t *mask, 328 const uint8_t *nic_mask, 329 unsigned int size, 330 struct rte_flow_error *error); 331 int mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 332 uint64_t item_flags, 333 struct rte_flow_error *error); 334 int mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 335 uint64_t item_flags, 336 uint8_t target_protocol, 337 struct rte_flow_error *error); 338 int mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 339 int64_t item_flags, 340 struct rte_flow_error *error); 341 int mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 342 uint64_t item_flags, 343 struct rte_flow_error *error); 344 int mlx5_flow_validate_item_mpls(const struct rte_flow_item *item, 345 uint64_t item_flags, 346 uint8_t target_protocol, 347 struct rte_flow_error *error); 348 int mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 349 uint64_t item_flags, 350 uint8_t target_protocol, 351 const struct rte_flow_item_tcp *flow_mask, 352 struct rte_flow_error *error); 353 int mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 354 uint64_t item_flags, 355 uint8_t target_protocol, 356 struct rte_flow_error *error); 357 int mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 358 int64_t item_flags, 359 struct rte_flow_error *error); 360 int mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 361 uint64_t item_flags, 362 struct rte_flow_error *error); 363 int mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 364 uint64_t item_flags, 365 struct rte_eth_dev *dev, 366 struct rte_flow_error *error); 367 368 /* mlx5_flow_tcf.c */ 369 370 int mlx5_flow_tcf_init(struct mlx5_flow_tcf_context *ctx, 371 unsigned int ifindex, struct rte_flow_error *error); 372 struct mlx5_flow_tcf_context *mlx5_flow_tcf_context_create(void); 373 void mlx5_flow_tcf_context_destroy(struct mlx5_flow_tcf_context *ctx); 374 375 #endif /* RTE_PMD_MLX5_FLOW_H_ */ 376