1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox. 4 */ 5 6 #define _GNU_SOURCE 7 8 #include <stddef.h> 9 #include <assert.h> 10 #include <inttypes.h> 11 #include <unistd.h> 12 #include <stdint.h> 13 #include <stdio.h> 14 #include <string.h> 15 #include <stdlib.h> 16 #include <errno.h> 17 #include <dirent.h> 18 #include <net/if.h> 19 #include <sys/ioctl.h> 20 #include <sys/socket.h> 21 #include <sys/utsname.h> 22 #include <netinet/in.h> 23 #include <linux/ethtool.h> 24 #include <linux/sockios.h> 25 #include <linux/version.h> 26 #include <fcntl.h> 27 #include <stdalign.h> 28 #include <sys/un.h> 29 30 #include <rte_atomic.h> 31 #include <rte_ethdev_driver.h> 32 #include <rte_bus_pci.h> 33 #include <rte_mbuf.h> 34 #include <rte_common.h> 35 #include <rte_interrupts.h> 36 #include <rte_alarm.h> 37 #include <rte_malloc.h> 38 39 #include "mlx5.h" 40 #include "mlx5_glue.h" 41 #include "mlx5_rxtx.h" 42 #include "mlx5_utils.h" 43 44 /* Add defines in case the running kernel is not the same as user headers. */ 45 #ifndef ETHTOOL_GLINKSETTINGS 46 struct ethtool_link_settings { 47 uint32_t cmd; 48 uint32_t speed; 49 uint8_t duplex; 50 uint8_t port; 51 uint8_t phy_address; 52 uint8_t autoneg; 53 uint8_t mdio_support; 54 uint8_t eth_to_mdix; 55 uint8_t eth_tp_mdix_ctrl; 56 int8_t link_mode_masks_nwords; 57 uint32_t reserved[8]; 58 uint32_t link_mode_masks[]; 59 }; 60 61 #define ETHTOOL_GLINKSETTINGS 0x0000004c 62 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5 63 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6 64 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17 65 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18 66 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19 67 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20 68 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21 69 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22 70 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23 71 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24 72 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25 73 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26 74 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27 75 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28 76 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29 77 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30 78 #endif 79 #ifndef HAVE_ETHTOOL_LINK_MODE_25G 80 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31 81 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32 82 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33 83 #endif 84 #ifndef HAVE_ETHTOOL_LINK_MODE_50G 85 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34 86 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35 87 #endif 88 #ifndef HAVE_ETHTOOL_LINK_MODE_100G 89 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36 90 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37 91 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38 92 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39 93 #endif 94 95 /** 96 * Get interface name from private structure. 97 * 98 * @param[in] priv 99 * Pointer to private structure. 100 * @param[out] ifname 101 * Interface name output buffer. 102 * 103 * @return 104 * 0 on success, -1 on failure and errno is set. 105 */ 106 int 107 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE]) 108 { 109 DIR *dir; 110 struct dirent *dent; 111 unsigned int dev_type = 0; 112 unsigned int dev_port_prev = ~0u; 113 char match[IF_NAMESIZE] = ""; 114 115 { 116 MKSTR(path, "%s/device/net", priv->ibdev_path); 117 118 dir = opendir(path); 119 if (dir == NULL) 120 return -1; 121 } 122 while ((dent = readdir(dir)) != NULL) { 123 char *name = dent->d_name; 124 FILE *file; 125 unsigned int dev_port; 126 int r; 127 128 if ((name[0] == '.') && 129 ((name[1] == '\0') || 130 ((name[1] == '.') && (name[2] == '\0')))) 131 continue; 132 133 MKSTR(path, "%s/device/net/%s/%s", 134 priv->ibdev_path, name, 135 (dev_type ? "dev_id" : "dev_port")); 136 137 file = fopen(path, "rb"); 138 if (file == NULL) { 139 if (errno != ENOENT) 140 continue; 141 /* 142 * Switch to dev_id when dev_port does not exist as 143 * is the case with Linux kernel versions < 3.15. 144 */ 145 try_dev_id: 146 match[0] = '\0'; 147 if (dev_type) 148 break; 149 dev_type = 1; 150 dev_port_prev = ~0u; 151 rewinddir(dir); 152 continue; 153 } 154 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port); 155 fclose(file); 156 if (r != 1) 157 continue; 158 /* 159 * Switch to dev_id when dev_port returns the same value for 160 * all ports. May happen when using a MOFED release older than 161 * 3.0 with a Linux kernel >= 3.15. 162 */ 163 if (dev_port == dev_port_prev) 164 goto try_dev_id; 165 dev_port_prev = dev_port; 166 if (dev_port == (priv->port - 1u)) 167 snprintf(match, sizeof(match), "%s", name); 168 } 169 closedir(dir); 170 if (match[0] == '\0') 171 return -1; 172 strncpy(*ifname, match, sizeof(*ifname)); 173 return 0; 174 } 175 176 /** 177 * Perform ifreq ioctl() on associated Ethernet device. 178 * 179 * @param[in] priv 180 * Pointer to private structure. 181 * @param req 182 * Request number to pass to ioctl(). 183 * @param[out] ifr 184 * Interface request structure output buffer. 185 * 186 * @return 187 * 0 on success, -1 on failure and errno is set. 188 */ 189 int 190 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr) 191 { 192 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP); 193 int ret = -1; 194 195 if (sock == -1) 196 return ret; 197 if (priv_get_ifname(priv, &ifr->ifr_name) == 0) 198 ret = ioctl(sock, req, ifr); 199 close(sock); 200 return ret; 201 } 202 203 /** 204 * Get device MTU. 205 * 206 * @param priv 207 * Pointer to private structure. 208 * @param[out] mtu 209 * MTU value output buffer. 210 * 211 * @return 212 * 0 on success, -1 on failure and errno is set. 213 */ 214 int 215 priv_get_mtu(struct priv *priv, uint16_t *mtu) 216 { 217 struct ifreq request; 218 int ret = priv_ifreq(priv, SIOCGIFMTU, &request); 219 220 if (ret) 221 return ret; 222 *mtu = request.ifr_mtu; 223 return 0; 224 } 225 226 /** 227 * Set device MTU. 228 * 229 * @param priv 230 * Pointer to private structure. 231 * @param mtu 232 * MTU value to set. 233 * 234 * @return 235 * 0 on success, -1 on failure and errno is set. 236 */ 237 static int 238 priv_set_mtu(struct priv *priv, uint16_t mtu) 239 { 240 struct ifreq request = { .ifr_mtu = mtu, }; 241 242 return priv_ifreq(priv, SIOCSIFMTU, &request); 243 } 244 245 /** 246 * Set device flags. 247 * 248 * @param priv 249 * Pointer to private structure. 250 * @param keep 251 * Bitmask for flags that must remain untouched. 252 * @param flags 253 * Bitmask for flags to modify. 254 * 255 * @return 256 * 0 on success, -1 on failure and errno is set. 257 */ 258 int 259 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags) 260 { 261 struct ifreq request; 262 int ret = priv_ifreq(priv, SIOCGIFFLAGS, &request); 263 264 if (ret) 265 return ret; 266 request.ifr_flags &= keep; 267 request.ifr_flags |= flags & ~keep; 268 return priv_ifreq(priv, SIOCSIFFLAGS, &request); 269 } 270 271 /** 272 * DPDK callback for Ethernet device configuration. 273 * 274 * @param dev 275 * Pointer to Ethernet device structure. 276 * 277 * @return 278 * 0 on success, negative errno value on failure. 279 */ 280 int 281 mlx5_dev_configure(struct rte_eth_dev *dev) 282 { 283 struct priv *priv = dev->data->dev_private; 284 unsigned int rxqs_n = dev->data->nb_rx_queues; 285 unsigned int txqs_n = dev->data->nb_tx_queues; 286 unsigned int i; 287 unsigned int j; 288 unsigned int reta_idx_n; 289 const uint8_t use_app_rss_key = 290 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key; 291 uint64_t supp_tx_offloads = mlx5_priv_get_tx_port_offloads(priv); 292 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads; 293 uint64_t supp_rx_offloads = 294 (mlx5_priv_get_rx_port_offloads(priv) | 295 mlx5_priv_get_rx_queue_offloads(priv)); 296 uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads; 297 298 if ((tx_offloads & supp_tx_offloads) != tx_offloads) { 299 ERROR("Some Tx offloads are not supported " 300 "requested 0x%" PRIx64 " supported 0x%" PRIx64, 301 tx_offloads, supp_tx_offloads); 302 return ENOTSUP; 303 } 304 if ((rx_offloads & supp_rx_offloads) != rx_offloads) { 305 ERROR("Some Rx offloads are not supported " 306 "requested 0x%" PRIx64 " supported 0x%" PRIx64, 307 rx_offloads, supp_rx_offloads); 308 return ENOTSUP; 309 } 310 if (use_app_rss_key && 311 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len != 312 rss_hash_default_key_len)) { 313 /* MLX5 RSS only support 40bytes key. */ 314 return EINVAL; 315 } 316 priv->rss_conf.rss_key = 317 rte_realloc(priv->rss_conf.rss_key, 318 rss_hash_default_key_len, 0); 319 if (!priv->rss_conf.rss_key) { 320 ERROR("cannot allocate RSS hash key memory (%u)", rxqs_n); 321 return ENOMEM; 322 } 323 memcpy(priv->rss_conf.rss_key, 324 use_app_rss_key ? 325 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key : 326 rss_hash_default_key, 327 rss_hash_default_key_len); 328 priv->rss_conf.rss_key_len = rss_hash_default_key_len; 329 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; 330 priv->rxqs = (void *)dev->data->rx_queues; 331 priv->txqs = (void *)dev->data->tx_queues; 332 if (txqs_n != priv->txqs_n) { 333 INFO("%p: TX queues number update: %u -> %u", 334 (void *)dev, priv->txqs_n, txqs_n); 335 priv->txqs_n = txqs_n; 336 } 337 if (rxqs_n > priv->config.ind_table_max_size) { 338 ERROR("cannot handle this many RX queues (%u)", rxqs_n); 339 return EINVAL; 340 } 341 if (rxqs_n == priv->rxqs_n) 342 return 0; 343 INFO("%p: RX queues number update: %u -> %u", 344 (void *)dev, priv->rxqs_n, rxqs_n); 345 priv->rxqs_n = rxqs_n; 346 /* If the requested number of RX queues is not a power of two, use the 347 * maximum indirection table size for better balancing. 348 * The result is always rounded to the next power of two. */ 349 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ? 350 priv->config.ind_table_max_size : 351 rxqs_n)); 352 if (priv_rss_reta_index_resize(priv, reta_idx_n)) 353 return ENOMEM; 354 /* When the number of RX queues is not a power of two, the remaining 355 * table entries are padded with reused WQs and hashes are not spread 356 * uniformly. */ 357 for (i = 0, j = 0; (i != reta_idx_n); ++i) { 358 (*priv->reta_idx)[i] = j; 359 if (++j == rxqs_n) 360 j = 0; 361 } 362 return 0; 363 364 } 365 366 /** 367 * DPDK callback to get information about the device. 368 * 369 * @param dev 370 * Pointer to Ethernet device structure. 371 * @param[out] info 372 * Info structure output buffer. 373 */ 374 void 375 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 376 { 377 struct priv *priv = dev->data->dev_private; 378 struct mlx5_dev_config *config = &priv->config; 379 unsigned int max; 380 char ifname[IF_NAMESIZE]; 381 382 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev); 383 /* FIXME: we should ask the device for these values. */ 384 info->min_rx_bufsize = 32; 385 info->max_rx_pktlen = 65536; 386 /* 387 * Since we need one CQ per QP, the limit is the minimum number 388 * between the two values. 389 */ 390 max = RTE_MIN(priv->device_attr.orig_attr.max_cq, 391 priv->device_attr.orig_attr.max_qp); 392 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */ 393 if (max >= 65535) 394 max = 65535; 395 info->max_rx_queues = max; 396 info->max_tx_queues = max; 397 info->max_mac_addrs = RTE_DIM(priv->mac); 398 info->rx_queue_offload_capa = 399 mlx5_priv_get_rx_queue_offloads(priv); 400 info->rx_offload_capa = (mlx5_priv_get_rx_port_offloads(priv) | 401 info->rx_queue_offload_capa); 402 info->tx_offload_capa = mlx5_priv_get_tx_port_offloads(priv); 403 if (priv_get_ifname(priv, &ifname) == 0) 404 info->if_index = if_nametoindex(ifname); 405 info->reta_size = priv->reta_idx_n ? 406 priv->reta_idx_n : config->ind_table_max_size; 407 info->hash_key_size = priv->rss_conf.rss_key_len; 408 info->speed_capa = priv->link_speed_capa; 409 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK; 410 } 411 412 /** 413 * Get supported packet types. 414 * 415 * @param dev 416 * Pointer to Ethernet device structure. 417 * 418 * @return 419 * A pointer to the supported Packet types array. 420 */ 421 const uint32_t * 422 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev) 423 { 424 static const uint32_t ptypes[] = { 425 /* refers to rxq_cq_to_pkt_type() */ 426 RTE_PTYPE_L2_ETHER, 427 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 428 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 429 RTE_PTYPE_L4_NONFRAG, 430 RTE_PTYPE_L4_FRAG, 431 RTE_PTYPE_L4_TCP, 432 RTE_PTYPE_L4_UDP, 433 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN, 434 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN, 435 RTE_PTYPE_INNER_L4_NONFRAG, 436 RTE_PTYPE_INNER_L4_FRAG, 437 RTE_PTYPE_INNER_L4_TCP, 438 RTE_PTYPE_INNER_L4_UDP, 439 RTE_PTYPE_UNKNOWN 440 }; 441 442 if (dev->rx_pkt_burst == mlx5_rx_burst || 443 dev->rx_pkt_burst == mlx5_rx_burst_vec) 444 return ptypes; 445 return NULL; 446 } 447 448 /** 449 * DPDK callback to retrieve physical link information. 450 * 451 * @param dev 452 * Pointer to Ethernet device structure. 453 * 454 * @return 455 * 0 on success, -1 on error. 456 */ 457 static int 458 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev) 459 { 460 struct priv *priv = dev->data->dev_private; 461 struct ethtool_cmd edata = { 462 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */ 463 }; 464 struct ifreq ifr; 465 struct rte_eth_link dev_link; 466 int link_speed = 0; 467 468 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) { 469 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno)); 470 return -1; 471 } 472 memset(&dev_link, 0, sizeof(dev_link)); 473 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) && 474 (ifr.ifr_flags & IFF_RUNNING)); 475 ifr.ifr_data = (void *)&edata; 476 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) { 477 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s", 478 strerror(errno)); 479 return -1; 480 } 481 link_speed = ethtool_cmd_speed(&edata); 482 if (link_speed == -1) 483 dev_link.link_speed = 0; 484 else 485 dev_link.link_speed = link_speed; 486 priv->link_speed_capa = 0; 487 if (edata.supported & SUPPORTED_Autoneg) 488 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 489 if (edata.supported & (SUPPORTED_1000baseT_Full | 490 SUPPORTED_1000baseKX_Full)) 491 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 492 if (edata.supported & SUPPORTED_10000baseKR_Full) 493 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 494 if (edata.supported & (SUPPORTED_40000baseKR4_Full | 495 SUPPORTED_40000baseCR4_Full | 496 SUPPORTED_40000baseSR4_Full | 497 SUPPORTED_40000baseLR4_Full)) 498 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 499 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ? 500 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 501 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 502 ETH_LINK_SPEED_FIXED); 503 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) { 504 /* Link status changed. */ 505 dev->data->dev_link = dev_link; 506 return 0; 507 } 508 /* Link status is still the same. */ 509 return -1; 510 } 511 512 /** 513 * Retrieve physical link information (unlocked version using new ioctl). 514 * 515 * @param dev 516 * Pointer to Ethernet device structure. 517 * 518 * @return 519 * 0 on success, -1 on error. 520 */ 521 static int 522 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev) 523 { 524 struct priv *priv = dev->data->dev_private; 525 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS }; 526 struct ifreq ifr; 527 struct rte_eth_link dev_link; 528 uint64_t sc; 529 530 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) { 531 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno)); 532 return -1; 533 } 534 memset(&dev_link, 0, sizeof(dev_link)); 535 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) && 536 (ifr.ifr_flags & IFF_RUNNING)); 537 ifr.ifr_data = (void *)&gcmd; 538 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) { 539 DEBUG("ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS) failed: %s", 540 strerror(errno)); 541 return -1; 542 } 543 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords; 544 545 alignas(struct ethtool_link_settings) 546 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) + 547 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3]; 548 struct ethtool_link_settings *ecmd = (void *)data; 549 550 *ecmd = gcmd; 551 ifr.ifr_data = (void *)ecmd; 552 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) { 553 DEBUG("ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS) failed: %s", 554 strerror(errno)); 555 return -1; 556 } 557 dev_link.link_speed = ecmd->speed; 558 sc = ecmd->link_mode_masks[0] | 559 ((uint64_t)ecmd->link_mode_masks[1] << 32); 560 priv->link_speed_capa = 0; 561 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT)) 562 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 563 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) | 564 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT))) 565 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 566 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) | 567 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) | 568 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT))) 569 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 570 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) | 571 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT))) 572 priv->link_speed_capa |= ETH_LINK_SPEED_20G; 573 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) | 574 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) | 575 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) | 576 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT))) 577 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 578 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) | 579 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) | 580 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) | 581 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT))) 582 priv->link_speed_capa |= ETH_LINK_SPEED_56G; 583 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) | 584 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) | 585 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT))) 586 priv->link_speed_capa |= ETH_LINK_SPEED_25G; 587 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) | 588 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT))) 589 priv->link_speed_capa |= ETH_LINK_SPEED_50G; 590 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) | 591 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) | 592 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) | 593 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT))) 594 priv->link_speed_capa |= ETH_LINK_SPEED_100G; 595 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ? 596 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 597 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 598 ETH_LINK_SPEED_FIXED); 599 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) { 600 /* Link status changed. */ 601 dev->data->dev_link = dev_link; 602 return 0; 603 } 604 /* Link status is still the same. */ 605 return -1; 606 } 607 608 /** 609 * Enable receiving and transmitting traffic. 610 * 611 * @param priv 612 * Pointer to private structure. 613 */ 614 static void 615 priv_link_start(struct priv *priv) 616 { 617 struct rte_eth_dev *dev = priv->dev; 618 int err; 619 620 dev->tx_pkt_burst = priv_select_tx_function(priv, dev); 621 dev->rx_pkt_burst = priv_select_rx_function(priv, dev); 622 err = priv_dev_traffic_enable(priv, dev); 623 if (err) 624 ERROR("%p: error occurred while configuring control flows: %s", 625 (void *)priv, strerror(err)); 626 err = priv_flow_start(priv, &priv->flows); 627 if (err) 628 ERROR("%p: error occurred while configuring flows: %s", 629 (void *)priv, strerror(err)); 630 } 631 632 /** 633 * Disable receiving and transmitting traffic. 634 * 635 * @param priv 636 * Pointer to private structure. 637 */ 638 static void 639 priv_link_stop(struct priv *priv) 640 { 641 struct rte_eth_dev *dev = priv->dev; 642 643 priv_flow_stop(priv, &priv->flows); 644 priv_dev_traffic_disable(priv, dev); 645 dev->rx_pkt_burst = removed_rx_burst; 646 dev->tx_pkt_burst = removed_tx_burst; 647 } 648 649 /** 650 * Retrieve physical link information and update rx/tx_pkt_burst callbacks 651 * accordingly. 652 * 653 * @param priv 654 * Pointer to private structure. 655 * @param wait_to_complete 656 * Wait for request completion (ignored). 657 */ 658 int 659 priv_link_update(struct priv *priv, int wait_to_complete __rte_unused) 660 { 661 struct rte_eth_dev *dev = priv->dev; 662 struct utsname utsname; 663 int ver[3]; 664 int ret; 665 struct rte_eth_link dev_link = dev->data->dev_link; 666 667 if (uname(&utsname) == -1 || 668 sscanf(utsname.release, "%d.%d.%d", 669 &ver[0], &ver[1], &ver[2]) != 3 || 670 KERNEL_VERSION(ver[0], ver[1], ver[2]) < KERNEL_VERSION(4, 9, 0)) 671 ret = mlx5_link_update_unlocked_gset(dev); 672 else 673 ret = mlx5_link_update_unlocked_gs(dev); 674 /* If lsc interrupt is disabled, should always be ready for traffic. */ 675 if (!dev->data->dev_conf.intr_conf.lsc) { 676 priv_link_start(priv); 677 return ret; 678 } 679 /* Re-select burst callbacks only if link status has been changed. */ 680 if (!ret && dev_link.link_status != dev->data->dev_link.link_status) { 681 if (dev->data->dev_link.link_status == ETH_LINK_UP) 682 priv_link_start(priv); 683 else 684 priv_link_stop(priv); 685 } 686 return ret; 687 } 688 689 /** 690 * Querying the link status till it changes to the desired state. 691 * Number of query attempts is bounded by MLX5_MAX_LINK_QUERY_ATTEMPTS. 692 * 693 * @param priv 694 * Pointer to private structure. 695 * @param status 696 * Link desired status. 697 * 698 * @return 699 * 0 on success, negative errno value on failure. 700 */ 701 int 702 priv_force_link_status_change(struct priv *priv, int status) 703 { 704 int try = 0; 705 706 while (try < MLX5_MAX_LINK_QUERY_ATTEMPTS) { 707 priv_link_update(priv, 0); 708 if (priv->dev->data->dev_link.link_status == status) 709 return 0; 710 try++; 711 sleep(1); 712 } 713 return -EAGAIN; 714 } 715 716 /** 717 * DPDK callback to retrieve physical link information. 718 * 719 * @param dev 720 * Pointer to Ethernet device structure. 721 * @param wait_to_complete 722 * Wait for request completion (ignored). 723 * 724 * @return 725 * 0 on success, -1 on error. 726 */ 727 int 728 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused) 729 { 730 struct priv *priv = dev->data->dev_private; 731 int ret; 732 733 ret = priv_link_update(priv, wait_to_complete); 734 return ret; 735 } 736 737 /** 738 * DPDK callback to change the MTU. 739 * 740 * @param dev 741 * Pointer to Ethernet device structure. 742 * @param in_mtu 743 * New MTU. 744 * 745 * @return 746 * 0 on success, negative errno value on failure. 747 */ 748 int 749 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 750 { 751 struct priv *priv = dev->data->dev_private; 752 uint16_t kern_mtu; 753 int ret = 0; 754 755 ret = priv_get_mtu(priv, &kern_mtu); 756 if (ret) 757 goto out; 758 /* Set kernel interface MTU first. */ 759 ret = priv_set_mtu(priv, mtu); 760 if (ret) 761 goto out; 762 ret = priv_get_mtu(priv, &kern_mtu); 763 if (ret) 764 goto out; 765 if (kern_mtu == mtu) { 766 priv->mtu = mtu; 767 DEBUG("adapter port %u MTU set to %u", priv->port, mtu); 768 } 769 return 0; 770 out: 771 ret = errno; 772 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu, 773 strerror(ret)); 774 assert(ret >= 0); 775 return -ret; 776 } 777 778 /** 779 * DPDK callback to get flow control status. 780 * 781 * @param dev 782 * Pointer to Ethernet device structure. 783 * @param[out] fc_conf 784 * Flow control output buffer. 785 * 786 * @return 787 * 0 on success, negative errno value on failure. 788 */ 789 int 790 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 791 { 792 struct priv *priv = dev->data->dev_private; 793 struct ifreq ifr; 794 struct ethtool_pauseparam ethpause = { 795 .cmd = ETHTOOL_GPAUSEPARAM 796 }; 797 int ret; 798 799 ifr.ifr_data = (void *)ðpause; 800 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) { 801 ret = errno; 802 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)" 803 " failed: %s", 804 strerror(ret)); 805 goto out; 806 } 807 fc_conf->autoneg = ethpause.autoneg; 808 if (ethpause.rx_pause && ethpause.tx_pause) 809 fc_conf->mode = RTE_FC_FULL; 810 else if (ethpause.rx_pause) 811 fc_conf->mode = RTE_FC_RX_PAUSE; 812 else if (ethpause.tx_pause) 813 fc_conf->mode = RTE_FC_TX_PAUSE; 814 else 815 fc_conf->mode = RTE_FC_NONE; 816 ret = 0; 817 out: 818 assert(ret >= 0); 819 return -ret; 820 } 821 822 /** 823 * DPDK callback to modify flow control parameters. 824 * 825 * @param dev 826 * Pointer to Ethernet device structure. 827 * @param[in] fc_conf 828 * Flow control parameters. 829 * 830 * @return 831 * 0 on success, negative errno value on failure. 832 */ 833 int 834 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 835 { 836 struct priv *priv = dev->data->dev_private; 837 struct ifreq ifr; 838 struct ethtool_pauseparam ethpause = { 839 .cmd = ETHTOOL_SPAUSEPARAM 840 }; 841 int ret; 842 843 ifr.ifr_data = (void *)ðpause; 844 ethpause.autoneg = fc_conf->autoneg; 845 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 846 (fc_conf->mode & RTE_FC_RX_PAUSE)) 847 ethpause.rx_pause = 1; 848 else 849 ethpause.rx_pause = 0; 850 851 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 852 (fc_conf->mode & RTE_FC_TX_PAUSE)) 853 ethpause.tx_pause = 1; 854 else 855 ethpause.tx_pause = 0; 856 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) { 857 ret = errno; 858 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)" 859 " failed: %s", 860 strerror(ret)); 861 goto out; 862 } 863 ret = 0; 864 out: 865 assert(ret >= 0); 866 return -ret; 867 } 868 869 /** 870 * Get PCI information from struct ibv_device. 871 * 872 * @param device 873 * Pointer to Ethernet device structure. 874 * @param[out] pci_addr 875 * PCI bus address output buffer. 876 * 877 * @return 878 * 0 on success, -1 on failure and errno is set. 879 */ 880 int 881 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device, 882 struct rte_pci_addr *pci_addr) 883 { 884 FILE *file; 885 char line[32]; 886 MKSTR(path, "%s/device/uevent", device->ibdev_path); 887 888 file = fopen(path, "rb"); 889 if (file == NULL) 890 return -1; 891 while (fgets(line, sizeof(line), file) == line) { 892 size_t len = strlen(line); 893 int ret; 894 895 /* Truncate long lines. */ 896 if (len == (sizeof(line) - 1)) 897 while (line[(len - 1)] != '\n') { 898 ret = fgetc(file); 899 if (ret == EOF) 900 break; 901 line[(len - 1)] = ret; 902 } 903 /* Extract information. */ 904 if (sscanf(line, 905 "PCI_SLOT_NAME=" 906 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", 907 &pci_addr->domain, 908 &pci_addr->bus, 909 &pci_addr->devid, 910 &pci_addr->function) == 4) { 911 ret = 0; 912 break; 913 } 914 } 915 fclose(file); 916 return 0; 917 } 918 919 /** 920 * Update the link status. 921 * 922 * @param priv 923 * Pointer to private structure. 924 * 925 * @return 926 * Zero if the callback process can be called immediately. 927 */ 928 static int 929 priv_link_status_update(struct priv *priv) 930 { 931 struct rte_eth_link *link = &priv->dev->data->dev_link; 932 933 priv_link_update(priv, 0); 934 if (((link->link_speed == 0) && link->link_status) || 935 ((link->link_speed != 0) && !link->link_status)) { 936 /* 937 * Inconsistent status. Event likely occurred before the 938 * kernel netdevice exposes the new status. 939 */ 940 if (!priv->pending_alarm) { 941 priv->pending_alarm = 1; 942 rte_eal_alarm_set(MLX5_ALARM_TIMEOUT_US, 943 mlx5_dev_link_status_handler, 944 priv->dev); 945 } 946 return 1; 947 } else if (unlikely(priv->pending_alarm)) { 948 /* Link interrupt occurred while alarm is already scheduled. */ 949 priv->pending_alarm = 0; 950 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, priv->dev); 951 } 952 return 0; 953 } 954 955 /** 956 * Device status handler. 957 * 958 * @param priv 959 * Pointer to private structure. 960 * @param events 961 * Pointer to event flags holder. 962 * 963 * @return 964 * Events bitmap of callback process which can be called immediately. 965 */ 966 static uint32_t 967 priv_dev_status_handler(struct priv *priv) 968 { 969 struct ibv_async_event event; 970 uint32_t ret = 0; 971 972 /* Read all message and acknowledge them. */ 973 for (;;) { 974 if (mlx5_glue->get_async_event(priv->ctx, &event)) 975 break; 976 if ((event.event_type == IBV_EVENT_PORT_ACTIVE || 977 event.event_type == IBV_EVENT_PORT_ERR) && 978 (priv->dev->data->dev_conf.intr_conf.lsc == 1)) 979 ret |= (1 << RTE_ETH_EVENT_INTR_LSC); 980 else if (event.event_type == IBV_EVENT_DEVICE_FATAL && 981 priv->dev->data->dev_conf.intr_conf.rmv == 1) 982 ret |= (1 << RTE_ETH_EVENT_INTR_RMV); 983 else 984 DEBUG("event type %d on port %d not handled", 985 event.event_type, event.element.port_num); 986 mlx5_glue->ack_async_event(&event); 987 } 988 if (ret & (1 << RTE_ETH_EVENT_INTR_LSC)) 989 if (priv_link_status_update(priv)) 990 ret &= ~(1 << RTE_ETH_EVENT_INTR_LSC); 991 return ret; 992 } 993 994 /** 995 * Handle delayed link status event. 996 * 997 * @param arg 998 * Registered argument. 999 */ 1000 void 1001 mlx5_dev_link_status_handler(void *arg) 1002 { 1003 struct rte_eth_dev *dev = arg; 1004 struct priv *priv = dev->data->dev_private; 1005 int ret; 1006 1007 priv->pending_alarm = 0; 1008 ret = priv_link_status_update(priv); 1009 if (!ret) 1010 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); 1011 } 1012 1013 /** 1014 * Handle interrupts from the NIC. 1015 * 1016 * @param[in] intr_handle 1017 * Interrupt handler. 1018 * @param cb_arg 1019 * Callback argument. 1020 */ 1021 void 1022 mlx5_dev_interrupt_handler(void *cb_arg) 1023 { 1024 struct rte_eth_dev *dev = cb_arg; 1025 struct priv *priv = dev->data->dev_private; 1026 uint32_t events; 1027 1028 events = priv_dev_status_handler(priv); 1029 if (events & (1 << RTE_ETH_EVENT_INTR_LSC)) 1030 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); 1031 if (events & (1 << RTE_ETH_EVENT_INTR_RMV)) 1032 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL); 1033 } 1034 1035 /** 1036 * Handle interrupts from the socket. 1037 * 1038 * @param cb_arg 1039 * Callback argument. 1040 */ 1041 static void 1042 mlx5_dev_handler_socket(void *cb_arg) 1043 { 1044 struct rte_eth_dev *dev = cb_arg; 1045 struct priv *priv = dev->data->dev_private; 1046 1047 priv_socket_handle(priv); 1048 } 1049 1050 /** 1051 * Uninstall interrupt handler. 1052 * 1053 * @param priv 1054 * Pointer to private structure. 1055 * @param dev 1056 * Pointer to the rte_eth_dev structure. 1057 */ 1058 void 1059 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev) 1060 { 1061 if (dev->data->dev_conf.intr_conf.lsc || 1062 dev->data->dev_conf.intr_conf.rmv) 1063 rte_intr_callback_unregister(&priv->intr_handle, 1064 mlx5_dev_interrupt_handler, dev); 1065 if (priv->primary_socket) 1066 rte_intr_callback_unregister(&priv->intr_handle_socket, 1067 mlx5_dev_handler_socket, dev); 1068 if (priv->pending_alarm) { 1069 priv->pending_alarm = 0; 1070 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, dev); 1071 } 1072 priv->intr_handle.fd = 0; 1073 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN; 1074 priv->intr_handle_socket.fd = 0; 1075 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN; 1076 } 1077 1078 /** 1079 * Install interrupt handler. 1080 * 1081 * @param priv 1082 * Pointer to private structure. 1083 * @param dev 1084 * Pointer to the rte_eth_dev structure. 1085 */ 1086 void 1087 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev) 1088 { 1089 int rc, flags; 1090 1091 assert(priv->ctx->async_fd > 0); 1092 flags = fcntl(priv->ctx->async_fd, F_GETFL); 1093 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK); 1094 if (rc < 0) { 1095 INFO("failed to change file descriptor async event queue"); 1096 dev->data->dev_conf.intr_conf.lsc = 0; 1097 dev->data->dev_conf.intr_conf.rmv = 0; 1098 } 1099 if (dev->data->dev_conf.intr_conf.lsc || 1100 dev->data->dev_conf.intr_conf.rmv) { 1101 priv->intr_handle.fd = priv->ctx->async_fd; 1102 priv->intr_handle.type = RTE_INTR_HANDLE_EXT; 1103 rte_intr_callback_register(&priv->intr_handle, 1104 mlx5_dev_interrupt_handler, dev); 1105 } 1106 rc = priv_socket_init(priv); 1107 if (!rc && priv->primary_socket) { 1108 priv->intr_handle_socket.fd = priv->primary_socket; 1109 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT; 1110 rte_intr_callback_register(&priv->intr_handle_socket, 1111 mlx5_dev_handler_socket, dev); 1112 } 1113 } 1114 1115 /** 1116 * Change the link state (UP / DOWN). 1117 * 1118 * @param priv 1119 * Pointer to private data structure. 1120 * @param up 1121 * Nonzero for link up, otherwise link down. 1122 * 1123 * @return 1124 * 0 on success, errno value on failure. 1125 */ 1126 static int 1127 priv_dev_set_link(struct priv *priv, int up) 1128 { 1129 return priv_set_flags(priv, ~IFF_UP, up ? IFF_UP : ~IFF_UP); 1130 } 1131 1132 /** 1133 * DPDK callback to bring the link DOWN. 1134 * 1135 * @param dev 1136 * Pointer to Ethernet device structure. 1137 * 1138 * @return 1139 * 0 on success, errno value on failure. 1140 */ 1141 int 1142 mlx5_set_link_down(struct rte_eth_dev *dev) 1143 { 1144 struct priv *priv = dev->data->dev_private; 1145 int err; 1146 1147 err = priv_dev_set_link(priv, 0); 1148 return err; 1149 } 1150 1151 /** 1152 * DPDK callback to bring the link UP. 1153 * 1154 * @param dev 1155 * Pointer to Ethernet device structure. 1156 * 1157 * @return 1158 * 0 on success, errno value on failure. 1159 */ 1160 int 1161 mlx5_set_link_up(struct rte_eth_dev *dev) 1162 { 1163 struct priv *priv = dev->data->dev_private; 1164 int err; 1165 1166 err = priv_dev_set_link(priv, 1); 1167 return err; 1168 } 1169 1170 /** 1171 * Configure the TX function to use. 1172 * 1173 * @param priv 1174 * Pointer to private data structure. 1175 * @param dev 1176 * Pointer to rte_eth_dev structure. 1177 * 1178 * @return 1179 * Pointer to selected Tx burst function. 1180 */ 1181 eth_tx_burst_t 1182 priv_select_tx_function(struct priv *priv, struct rte_eth_dev *dev) 1183 { 1184 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst; 1185 struct mlx5_dev_config *config = &priv->config; 1186 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads; 1187 int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO | 1188 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 1189 DEV_TX_OFFLOAD_GRE_TNL_TSO)); 1190 int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT); 1191 1192 assert(priv != NULL); 1193 /* Select appropriate TX function. */ 1194 if (vlan_insert || tso) 1195 return tx_pkt_burst; 1196 if (config->mps == MLX5_MPW_ENHANCED) { 1197 if (priv_check_vec_tx_support(priv, dev) > 0) { 1198 if (priv_check_raw_vec_tx_support(priv, dev) > 0) 1199 tx_pkt_burst = mlx5_tx_burst_raw_vec; 1200 else 1201 tx_pkt_burst = mlx5_tx_burst_vec; 1202 DEBUG("selected Enhanced MPW TX vectorized function"); 1203 } else { 1204 tx_pkt_burst = mlx5_tx_burst_empw; 1205 DEBUG("selected Enhanced MPW TX function"); 1206 } 1207 } else if (config->mps && (config->txq_inline > 0)) { 1208 tx_pkt_burst = mlx5_tx_burst_mpw_inline; 1209 DEBUG("selected MPW inline TX function"); 1210 } else if (config->mps) { 1211 tx_pkt_burst = mlx5_tx_burst_mpw; 1212 DEBUG("selected MPW TX function"); 1213 } 1214 return tx_pkt_burst; 1215 } 1216 1217 /** 1218 * Configure the RX function to use. 1219 * 1220 * @param priv 1221 * Pointer to private data structure. 1222 * @param dev 1223 * Pointer to rte_eth_dev structure. 1224 * 1225 * @return 1226 * Pointer to selected Rx burst function. 1227 */ 1228 eth_rx_burst_t 1229 priv_select_rx_function(struct priv *priv, __rte_unused struct rte_eth_dev *dev) 1230 { 1231 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst; 1232 1233 assert(priv != NULL); 1234 if (priv_check_vec_rx_support(priv) > 0) { 1235 rx_pkt_burst = mlx5_rx_burst_vec; 1236 DEBUG("selected RX vectorized function"); 1237 } 1238 return rx_pkt_burst; 1239 } 1240 1241 /** 1242 * Check if mlx5 device was removed. 1243 * 1244 * @param dev 1245 * Pointer to Ethernet device structure. 1246 * 1247 * @return 1248 * 1 when device is removed, otherwise 0. 1249 */ 1250 int 1251 mlx5_is_removed(struct rte_eth_dev *dev) 1252 { 1253 struct ibv_device_attr device_attr; 1254 struct priv *priv = dev->data->dev_private; 1255 1256 if (mlx5_glue->query_device(priv->ctx, &device_attr) == EIO) 1257 return 1; 1258 return 0; 1259 } 1260