1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <inttypes.h> 8 #include <unistd.h> 9 #include <stdbool.h> 10 #include <stdint.h> 11 #include <stdio.h> 12 #include <string.h> 13 #include <stdlib.h> 14 #include <errno.h> 15 #include <dirent.h> 16 #include <net/if.h> 17 #include <sys/ioctl.h> 18 #include <sys/socket.h> 19 #include <netinet/in.h> 20 #include <linux/ethtool.h> 21 #include <linux/sockios.h> 22 #include <fcntl.h> 23 #include <stdalign.h> 24 #include <sys/un.h> 25 #include <time.h> 26 27 #include <rte_atomic.h> 28 #include <rte_ethdev_driver.h> 29 #include <rte_bus_pci.h> 30 #include <rte_mbuf.h> 31 #include <rte_common.h> 32 #include <rte_interrupts.h> 33 #include <rte_malloc.h> 34 #include <rte_string_fns.h> 35 #include <rte_rwlock.h> 36 #include <rte_cycles.h> 37 38 #include <mlx5_glue.h> 39 #include <mlx5_devx_cmds.h> 40 #include <mlx5_common.h> 41 42 #include "mlx5.h" 43 #include "mlx5_rxtx.h" 44 #include "mlx5_utils.h" 45 46 /* Supported speed values found in /usr/include/linux/ethtool.h */ 47 #ifndef HAVE_SUPPORTED_40000baseKR4_Full 48 #define SUPPORTED_40000baseKR4_Full (1 << 23) 49 #endif 50 #ifndef HAVE_SUPPORTED_40000baseCR4_Full 51 #define SUPPORTED_40000baseCR4_Full (1 << 24) 52 #endif 53 #ifndef HAVE_SUPPORTED_40000baseSR4_Full 54 #define SUPPORTED_40000baseSR4_Full (1 << 25) 55 #endif 56 #ifndef HAVE_SUPPORTED_40000baseLR4_Full 57 #define SUPPORTED_40000baseLR4_Full (1 << 26) 58 #endif 59 #ifndef HAVE_SUPPORTED_56000baseKR4_Full 60 #define SUPPORTED_56000baseKR4_Full (1 << 27) 61 #endif 62 #ifndef HAVE_SUPPORTED_56000baseCR4_Full 63 #define SUPPORTED_56000baseCR4_Full (1 << 28) 64 #endif 65 #ifndef HAVE_SUPPORTED_56000baseSR4_Full 66 #define SUPPORTED_56000baseSR4_Full (1 << 29) 67 #endif 68 #ifndef HAVE_SUPPORTED_56000baseLR4_Full 69 #define SUPPORTED_56000baseLR4_Full (1 << 30) 70 #endif 71 72 /* Add defines in case the running kernel is not the same as user headers. */ 73 #ifndef ETHTOOL_GLINKSETTINGS 74 struct ethtool_link_settings { 75 uint32_t cmd; 76 uint32_t speed; 77 uint8_t duplex; 78 uint8_t port; 79 uint8_t phy_address; 80 uint8_t autoneg; 81 uint8_t mdio_support; 82 uint8_t eth_to_mdix; 83 uint8_t eth_tp_mdix_ctrl; 84 int8_t link_mode_masks_nwords; 85 uint32_t reserved[8]; 86 uint32_t link_mode_masks[]; 87 }; 88 89 #define ETHTOOL_GLINKSETTINGS 0x0000004c 90 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5 91 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6 92 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17 93 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18 94 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19 95 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20 96 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21 97 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22 98 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23 99 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24 100 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25 101 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26 102 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27 103 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28 104 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29 105 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30 106 #endif 107 #ifndef HAVE_ETHTOOL_LINK_MODE_25G 108 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31 109 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32 110 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33 111 #endif 112 #ifndef HAVE_ETHTOOL_LINK_MODE_50G 113 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34 114 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35 115 #endif 116 #ifndef HAVE_ETHTOOL_LINK_MODE_100G 117 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36 118 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37 119 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38 120 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39 121 #endif 122 123 /** 124 * Get master interface name from private structure. 125 * 126 * @param[in] dev 127 * Pointer to Ethernet device. 128 * @param[out] ifname 129 * Interface name output buffer. 130 * 131 * @return 132 * 0 on success, a negative errno value otherwise and rte_errno is set. 133 */ 134 int 135 mlx5_get_master_ifname(const char *ibdev_path, char (*ifname)[IF_NAMESIZE]) 136 { 137 DIR *dir; 138 struct dirent *dent; 139 unsigned int dev_type = 0; 140 unsigned int dev_port_prev = ~0u; 141 char match[IF_NAMESIZE] = ""; 142 143 MLX5_ASSERT(ibdev_path); 144 { 145 MKSTR(path, "%s/device/net", ibdev_path); 146 147 dir = opendir(path); 148 if (dir == NULL) { 149 rte_errno = errno; 150 return -rte_errno; 151 } 152 } 153 while ((dent = readdir(dir)) != NULL) { 154 char *name = dent->d_name; 155 FILE *file; 156 unsigned int dev_port; 157 int r; 158 159 if ((name[0] == '.') && 160 ((name[1] == '\0') || 161 ((name[1] == '.') && (name[2] == '\0')))) 162 continue; 163 164 MKSTR(path, "%s/device/net/%s/%s", 165 ibdev_path, name, 166 (dev_type ? "dev_id" : "dev_port")); 167 168 file = fopen(path, "rb"); 169 if (file == NULL) { 170 if (errno != ENOENT) 171 continue; 172 /* 173 * Switch to dev_id when dev_port does not exist as 174 * is the case with Linux kernel versions < 3.15. 175 */ 176 try_dev_id: 177 match[0] = '\0'; 178 if (dev_type) 179 break; 180 dev_type = 1; 181 dev_port_prev = ~0u; 182 rewinddir(dir); 183 continue; 184 } 185 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port); 186 fclose(file); 187 if (r != 1) 188 continue; 189 /* 190 * Switch to dev_id when dev_port returns the same value for 191 * all ports. May happen when using a MOFED release older than 192 * 3.0 with a Linux kernel >= 3.15. 193 */ 194 if (dev_port == dev_port_prev) 195 goto try_dev_id; 196 dev_port_prev = dev_port; 197 if (dev_port == 0) 198 strlcpy(match, name, sizeof(match)); 199 } 200 closedir(dir); 201 if (match[0] == '\0') { 202 rte_errno = ENOENT; 203 return -rte_errno; 204 } 205 strncpy(*ifname, match, sizeof(*ifname)); 206 return 0; 207 } 208 209 /** 210 * Get interface name from private structure. 211 * 212 * This is a port representor-aware version of mlx5_get_master_ifname(). 213 * 214 * @param[in] dev 215 * Pointer to Ethernet device. 216 * @param[out] ifname 217 * Interface name output buffer. 218 * 219 * @return 220 * 0 on success, a negative errno value otherwise and rte_errno is set. 221 */ 222 int 223 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]) 224 { 225 struct mlx5_priv *priv = dev->data->dev_private; 226 unsigned int ifindex; 227 228 MLX5_ASSERT(priv); 229 MLX5_ASSERT(priv->sh); 230 ifindex = mlx5_ifindex(dev); 231 if (!ifindex) { 232 if (!priv->representor) 233 return mlx5_get_master_ifname(priv->sh->ibdev_path, 234 ifname); 235 rte_errno = ENXIO; 236 return -rte_errno; 237 } 238 if (if_indextoname(ifindex, &(*ifname)[0])) 239 return 0; 240 rte_errno = errno; 241 return -rte_errno; 242 } 243 244 /** 245 * Get the interface index from device name. 246 * 247 * @param[in] dev 248 * Pointer to Ethernet device. 249 * 250 * @return 251 * Nonzero interface index on success, zero otherwise and rte_errno is set. 252 */ 253 unsigned int 254 mlx5_ifindex(const struct rte_eth_dev *dev) 255 { 256 struct mlx5_priv *priv = dev->data->dev_private; 257 unsigned int ifindex; 258 259 MLX5_ASSERT(priv); 260 MLX5_ASSERT(priv->if_index); 261 ifindex = priv->if_index; 262 if (!ifindex) 263 rte_errno = ENXIO; 264 return ifindex; 265 } 266 267 /** 268 * Perform ifreq ioctl() on associated Ethernet device. 269 * 270 * @param[in] dev 271 * Pointer to Ethernet device. 272 * @param req 273 * Request number to pass to ioctl(). 274 * @param[out] ifr 275 * Interface request structure output buffer. 276 * 277 * @return 278 * 0 on success, a negative errno value otherwise and rte_errno is set. 279 */ 280 int 281 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr) 282 { 283 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP); 284 int ret = 0; 285 286 if (sock == -1) { 287 rte_errno = errno; 288 return -rte_errno; 289 } 290 ret = mlx5_get_ifname(dev, &ifr->ifr_name); 291 if (ret) 292 goto error; 293 ret = ioctl(sock, req, ifr); 294 if (ret == -1) { 295 rte_errno = errno; 296 goto error; 297 } 298 close(sock); 299 return 0; 300 error: 301 close(sock); 302 return -rte_errno; 303 } 304 305 /** 306 * Get device MTU. 307 * 308 * @param dev 309 * Pointer to Ethernet device. 310 * @param[out] mtu 311 * MTU value output buffer. 312 * 313 * @return 314 * 0 on success, a negative errno value otherwise and rte_errno is set. 315 */ 316 int 317 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu) 318 { 319 struct ifreq request; 320 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request); 321 322 if (ret) 323 return ret; 324 *mtu = request.ifr_mtu; 325 return 0; 326 } 327 328 /** 329 * Set device MTU. 330 * 331 * @param dev 332 * Pointer to Ethernet device. 333 * @param mtu 334 * MTU value to set. 335 * 336 * @return 337 * 0 on success, a negative errno value otherwise and rte_errno is set. 338 */ 339 static int 340 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 341 { 342 struct ifreq request = { .ifr_mtu = mtu, }; 343 344 return mlx5_ifreq(dev, SIOCSIFMTU, &request); 345 } 346 347 /** 348 * Set device flags. 349 * 350 * @param dev 351 * Pointer to Ethernet device. 352 * @param keep 353 * Bitmask for flags that must remain untouched. 354 * @param flags 355 * Bitmask for flags to modify. 356 * 357 * @return 358 * 0 on success, a negative errno value otherwise and rte_errno is set. 359 */ 360 int 361 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags) 362 { 363 struct ifreq request; 364 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request); 365 366 if (ret) 367 return ret; 368 request.ifr_flags &= keep; 369 request.ifr_flags |= flags & ~keep; 370 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request); 371 } 372 373 /** 374 * DPDK callback for Ethernet device configuration. 375 * 376 * @param dev 377 * Pointer to Ethernet device structure. 378 * 379 * @return 380 * 0 on success, a negative errno value otherwise and rte_errno is set. 381 */ 382 int 383 mlx5_dev_configure(struct rte_eth_dev *dev) 384 { 385 struct mlx5_priv *priv = dev->data->dev_private; 386 unsigned int rxqs_n = dev->data->nb_rx_queues; 387 unsigned int txqs_n = dev->data->nb_tx_queues; 388 const uint8_t use_app_rss_key = 389 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key; 390 int ret = 0; 391 392 if (use_app_rss_key && 393 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len != 394 MLX5_RSS_HASH_KEY_LEN)) { 395 DRV_LOG(ERR, "port %u RSS key len must be %s Bytes long", 396 dev->data->port_id, RTE_STR(MLX5_RSS_HASH_KEY_LEN)); 397 rte_errno = EINVAL; 398 return -rte_errno; 399 } 400 priv->rss_conf.rss_key = 401 rte_realloc(priv->rss_conf.rss_key, 402 MLX5_RSS_HASH_KEY_LEN, 0); 403 if (!priv->rss_conf.rss_key) { 404 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)", 405 dev->data->port_id, rxqs_n); 406 rte_errno = ENOMEM; 407 return -rte_errno; 408 } 409 410 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 411 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 412 413 memcpy(priv->rss_conf.rss_key, 414 use_app_rss_key ? 415 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key : 416 rss_hash_default_key, 417 MLX5_RSS_HASH_KEY_LEN); 418 priv->rss_conf.rss_key_len = MLX5_RSS_HASH_KEY_LEN; 419 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; 420 priv->rxqs = (void *)dev->data->rx_queues; 421 priv->txqs = (void *)dev->data->tx_queues; 422 if (txqs_n != priv->txqs_n) { 423 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u", 424 dev->data->port_id, priv->txqs_n, txqs_n); 425 priv->txqs_n = txqs_n; 426 } 427 if (rxqs_n > priv->config.ind_table_max_size) { 428 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)", 429 dev->data->port_id, rxqs_n); 430 rte_errno = EINVAL; 431 return -rte_errno; 432 } 433 if (rxqs_n != priv->rxqs_n) { 434 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u", 435 dev->data->port_id, priv->rxqs_n, rxqs_n); 436 priv->rxqs_n = rxqs_n; 437 } 438 priv->skip_default_rss_reta = 0; 439 ret = mlx5_proc_priv_init(dev); 440 if (ret) 441 return ret; 442 return 0; 443 } 444 445 /** 446 * Configure default RSS reta. 447 * 448 * @param dev 449 * Pointer to Ethernet device structure. 450 * 451 * @return 452 * 0 on success, a negative errno value otherwise and rte_errno is set. 453 */ 454 int 455 mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev) 456 { 457 struct mlx5_priv *priv = dev->data->dev_private; 458 unsigned int rxqs_n = dev->data->nb_rx_queues; 459 unsigned int i; 460 unsigned int j; 461 unsigned int reta_idx_n; 462 int ret = 0; 463 unsigned int *rss_queue_arr = NULL; 464 unsigned int rss_queue_n = 0; 465 466 if (priv->skip_default_rss_reta) 467 return ret; 468 rss_queue_arr = rte_malloc("", rxqs_n * sizeof(unsigned int), 0); 469 if (!rss_queue_arr) { 470 DRV_LOG(ERR, "port %u cannot allocate RSS queue list (%u)", 471 dev->data->port_id, rxqs_n); 472 rte_errno = ENOMEM; 473 return -rte_errno; 474 } 475 for (i = 0, j = 0; i < rxqs_n; i++) { 476 struct mlx5_rxq_data *rxq_data; 477 struct mlx5_rxq_ctrl *rxq_ctrl; 478 479 rxq_data = (*priv->rxqs)[i]; 480 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq); 481 if (rxq_ctrl && rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) 482 rss_queue_arr[j++] = i; 483 } 484 rss_queue_n = j; 485 if (rss_queue_n > priv->config.ind_table_max_size) { 486 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)", 487 dev->data->port_id, rss_queue_n); 488 rte_errno = EINVAL; 489 rte_free(rss_queue_arr); 490 return -rte_errno; 491 } 492 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u", 493 dev->data->port_id, priv->rxqs_n, rxqs_n); 494 priv->rxqs_n = rxqs_n; 495 /* 496 * If the requested number of RX queues is not a power of two, 497 * use the maximum indirection table size for better balancing. 498 * The result is always rounded to the next power of two. 499 */ 500 reta_idx_n = (1 << log2above((rss_queue_n & (rss_queue_n - 1)) ? 501 priv->config.ind_table_max_size : 502 rss_queue_n)); 503 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n); 504 if (ret) { 505 rte_free(rss_queue_arr); 506 return ret; 507 } 508 /* 509 * When the number of RX queues is not a power of two, 510 * the remaining table entries are padded with reused WQs 511 * and hashes are not spread uniformly. 512 */ 513 for (i = 0, j = 0; (i != reta_idx_n); ++i) { 514 (*priv->reta_idx)[i] = rss_queue_arr[j]; 515 if (++j == rss_queue_n) 516 j = 0; 517 } 518 rte_free(rss_queue_arr); 519 return ret; 520 } 521 522 /** 523 * Sets default tuning parameters. 524 * 525 * @param dev 526 * Pointer to Ethernet device. 527 * @param[out] info 528 * Info structure output buffer. 529 */ 530 static void 531 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 532 { 533 struct mlx5_priv *priv = dev->data->dev_private; 534 535 /* Minimum CPU utilization. */ 536 info->default_rxportconf.ring_size = 256; 537 info->default_txportconf.ring_size = 256; 538 info->default_rxportconf.burst_size = MLX5_RX_DEFAULT_BURST; 539 info->default_txportconf.burst_size = MLX5_TX_DEFAULT_BURST; 540 if (priv->link_speed_capa & ETH_LINK_SPEED_100G) { 541 info->default_rxportconf.nb_queues = 16; 542 info->default_txportconf.nb_queues = 16; 543 if (dev->data->nb_rx_queues > 2 || 544 dev->data->nb_tx_queues > 2) { 545 /* Max Throughput. */ 546 info->default_rxportconf.ring_size = 2048; 547 info->default_txportconf.ring_size = 2048; 548 } 549 } else { 550 info->default_rxportconf.nb_queues = 8; 551 info->default_txportconf.nb_queues = 8; 552 if (dev->data->nb_rx_queues > 2 || 553 dev->data->nb_tx_queues > 2) { 554 /* Max Throughput. */ 555 info->default_rxportconf.ring_size = 4096; 556 info->default_txportconf.ring_size = 4096; 557 } 558 } 559 } 560 561 /** 562 * Sets tx mbuf limiting parameters. 563 * 564 * @param dev 565 * Pointer to Ethernet device. 566 * @param[out] info 567 * Info structure output buffer. 568 */ 569 static void 570 mlx5_set_txlimit_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 571 { 572 struct mlx5_priv *priv = dev->data->dev_private; 573 struct mlx5_dev_config *config = &priv->config; 574 unsigned int inlen; 575 uint16_t nb_max; 576 577 inlen = (config->txq_inline_max == MLX5_ARG_UNSET) ? 578 MLX5_SEND_DEF_INLINE_LEN : 579 (unsigned int)config->txq_inline_max; 580 MLX5_ASSERT(config->txq_inline_min >= 0); 581 inlen = RTE_MAX(inlen, (unsigned int)config->txq_inline_min); 582 inlen = RTE_MIN(inlen, MLX5_WQE_SIZE_MAX + 583 MLX5_ESEG_MIN_INLINE_SIZE - 584 MLX5_WQE_CSEG_SIZE - 585 MLX5_WQE_ESEG_SIZE - 586 MLX5_WQE_DSEG_SIZE * 2); 587 nb_max = (MLX5_WQE_SIZE_MAX + 588 MLX5_ESEG_MIN_INLINE_SIZE - 589 MLX5_WQE_CSEG_SIZE - 590 MLX5_WQE_ESEG_SIZE - 591 MLX5_WQE_DSEG_SIZE - 592 inlen) / MLX5_WSEG_SIZE; 593 info->tx_desc_lim.nb_seg_max = nb_max; 594 info->tx_desc_lim.nb_mtu_seg_max = nb_max; 595 } 596 597 /** 598 * DPDK callback to get information about the device. 599 * 600 * @param dev 601 * Pointer to Ethernet device structure. 602 * @param[out] info 603 * Info structure output buffer. 604 */ 605 int 606 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 607 { 608 struct mlx5_priv *priv = dev->data->dev_private; 609 struct mlx5_dev_config *config = &priv->config; 610 unsigned int max; 611 612 /* FIXME: we should ask the device for these values. */ 613 info->min_rx_bufsize = 32; 614 info->max_rx_pktlen = 65536; 615 info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE; 616 /* 617 * Since we need one CQ per QP, the limit is the minimum number 618 * between the two values. 619 */ 620 max = RTE_MIN(priv->sh->device_attr.orig_attr.max_cq, 621 priv->sh->device_attr.orig_attr.max_qp); 622 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */ 623 if (max >= 65535) 624 max = 65535; 625 info->max_rx_queues = max; 626 info->max_tx_queues = max; 627 info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES; 628 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev); 629 info->rx_offload_capa = (mlx5_get_rx_port_offloads() | 630 info->rx_queue_offload_capa); 631 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev); 632 info->if_index = mlx5_ifindex(dev); 633 info->reta_size = priv->reta_idx_n ? 634 priv->reta_idx_n : config->ind_table_max_size; 635 info->hash_key_size = MLX5_RSS_HASH_KEY_LEN; 636 info->speed_capa = priv->link_speed_capa; 637 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK; 638 mlx5_set_default_params(dev, info); 639 mlx5_set_txlimit_params(dev, info); 640 info->switch_info.name = dev->data->name; 641 info->switch_info.domain_id = priv->domain_id; 642 info->switch_info.port_id = priv->representor_id; 643 if (priv->representor) { 644 uint16_t port_id; 645 646 if (priv->pf_bond >= 0) { 647 /* 648 * Switch port ID is opaque value with driver defined 649 * format. Push the PF index in bonding configurations 650 * in upper four bits of port ID. If we get too many 651 * representors (more than 4K) or PFs (more than 15) 652 * this approach must be reconsidered. 653 */ 654 if ((info->switch_info.port_id >> 655 MLX5_PORT_ID_BONDING_PF_SHIFT) || 656 priv->pf_bond > MLX5_PORT_ID_BONDING_PF_MASK) { 657 DRV_LOG(ERR, "can't update switch port ID" 658 " for bonding device"); 659 MLX5_ASSERT(false); 660 return -ENODEV; 661 } 662 info->switch_info.port_id |= 663 priv->pf_bond << MLX5_PORT_ID_BONDING_PF_SHIFT; 664 } 665 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 666 struct mlx5_priv *opriv = 667 rte_eth_devices[port_id].data->dev_private; 668 669 if (!opriv || 670 opriv->representor || 671 opriv->sh != priv->sh || 672 opriv->domain_id != priv->domain_id) 673 continue; 674 /* 675 * Override switch name with that of the master 676 * device. 677 */ 678 info->switch_info.name = opriv->dev_data->name; 679 break; 680 } 681 } 682 return 0; 683 } 684 685 /** 686 * Get device current raw clock counter 687 * 688 * @param dev 689 * Pointer to Ethernet device structure. 690 * @param[out] time 691 * Current raw clock counter of the device. 692 * 693 * @return 694 * 0 if the clock has correctly been read 695 * The value of errno in case of error 696 */ 697 int 698 mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock) 699 { 700 struct mlx5_priv *priv = dev->data->dev_private; 701 struct ibv_context *ctx = priv->sh->ctx; 702 struct ibv_values_ex values; 703 int err = 0; 704 705 values.comp_mask = IBV_VALUES_MASK_RAW_CLOCK; 706 err = mlx5_glue->query_rt_values_ex(ctx, &values); 707 if (err != 0) { 708 DRV_LOG(WARNING, "Could not query the clock !"); 709 return err; 710 } 711 *clock = values.raw_clock.tv_nsec; 712 return 0; 713 } 714 715 /** 716 * Get firmware version of a device. 717 * 718 * @param dev 719 * Ethernet device port. 720 * @param fw_ver 721 * String output allocated by caller. 722 * @param fw_size 723 * Size of the output string, including terminating null byte. 724 * 725 * @return 726 * 0 on success, or the size of the non truncated string if too big. 727 */ 728 int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size) 729 { 730 struct mlx5_priv *priv = dev->data->dev_private; 731 struct ibv_device_attr *attr = &priv->sh->device_attr.orig_attr; 732 size_t size = strnlen(attr->fw_ver, sizeof(attr->fw_ver)) + 1; 733 734 if (fw_size < size) 735 return size; 736 if (fw_ver != NULL) 737 strlcpy(fw_ver, attr->fw_ver, fw_size); 738 return 0; 739 } 740 741 /** 742 * Get supported packet types. 743 * 744 * @param dev 745 * Pointer to Ethernet device structure. 746 * 747 * @return 748 * A pointer to the supported Packet types array. 749 */ 750 const uint32_t * 751 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev) 752 { 753 static const uint32_t ptypes[] = { 754 /* refers to rxq_cq_to_pkt_type() */ 755 RTE_PTYPE_L2_ETHER, 756 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 757 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 758 RTE_PTYPE_L4_NONFRAG, 759 RTE_PTYPE_L4_FRAG, 760 RTE_PTYPE_L4_TCP, 761 RTE_PTYPE_L4_UDP, 762 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN, 763 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN, 764 RTE_PTYPE_INNER_L4_NONFRAG, 765 RTE_PTYPE_INNER_L4_FRAG, 766 RTE_PTYPE_INNER_L4_TCP, 767 RTE_PTYPE_INNER_L4_UDP, 768 RTE_PTYPE_UNKNOWN 769 }; 770 771 if (dev->rx_pkt_burst == mlx5_rx_burst || 772 dev->rx_pkt_burst == mlx5_rx_burst_mprq || 773 dev->rx_pkt_burst == mlx5_rx_burst_vec) 774 return ptypes; 775 return NULL; 776 } 777 778 /** 779 * Retrieve the master device for representor in the same switch domain. 780 * 781 * @param dev 782 * Pointer to representor Ethernet device structure. 783 * 784 * @return 785 * Master device structure on success, NULL otherwise. 786 */ 787 788 static struct rte_eth_dev * 789 mlx5_find_master_dev(struct rte_eth_dev *dev) 790 { 791 struct mlx5_priv *priv; 792 uint16_t port_id; 793 uint16_t domain_id; 794 795 priv = dev->data->dev_private; 796 domain_id = priv->domain_id; 797 MLX5_ASSERT(priv->representor); 798 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) { 799 struct mlx5_priv *opriv = 800 rte_eth_devices[port_id].data->dev_private; 801 if (opriv && 802 opriv->master && 803 opriv->domain_id == domain_id && 804 opriv->sh == priv->sh) 805 return &rte_eth_devices[port_id]; 806 } 807 return NULL; 808 } 809 810 /** 811 * DPDK callback to retrieve physical link information. 812 * 813 * @param dev 814 * Pointer to Ethernet device structure. 815 * @param[out] link 816 * Storage for current link status. 817 * 818 * @return 819 * 0 on success, a negative errno value otherwise and rte_errno is set. 820 */ 821 static int 822 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev, 823 struct rte_eth_link *link) 824 { 825 struct mlx5_priv *priv = dev->data->dev_private; 826 struct ethtool_cmd edata = { 827 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */ 828 }; 829 struct ifreq ifr; 830 struct rte_eth_link dev_link; 831 int link_speed = 0; 832 int ret; 833 834 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 835 if (ret) { 836 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s", 837 dev->data->port_id, strerror(rte_errno)); 838 return ret; 839 } 840 dev_link = (struct rte_eth_link) { 841 .link_status = ((ifr.ifr_flags & IFF_UP) && 842 (ifr.ifr_flags & IFF_RUNNING)), 843 }; 844 ifr = (struct ifreq) { 845 .ifr_data = (void *)&edata, 846 }; 847 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 848 if (ret) { 849 if (ret == -ENOTSUP && priv->representor) { 850 struct rte_eth_dev *master; 851 852 /* 853 * For representors we can try to inherit link 854 * settings from the master device. Actually 855 * link settings do not make a lot of sense 856 * for representors due to missing physical 857 * link. The old kernel drivers supported 858 * emulated settings query for representors, 859 * the new ones do not, so we have to add 860 * this code for compatibility issues. 861 */ 862 master = mlx5_find_master_dev(dev); 863 if (master) { 864 ifr = (struct ifreq) { 865 .ifr_data = (void *)&edata, 866 }; 867 ret = mlx5_ifreq(master, SIOCETHTOOL, &ifr); 868 } 869 } 870 if (ret) { 871 DRV_LOG(WARNING, 872 "port %u ioctl(SIOCETHTOOL," 873 " ETHTOOL_GSET) failed: %s", 874 dev->data->port_id, strerror(rte_errno)); 875 return ret; 876 } 877 } 878 link_speed = ethtool_cmd_speed(&edata); 879 if (link_speed == -1) 880 dev_link.link_speed = ETH_SPEED_NUM_NONE; 881 else 882 dev_link.link_speed = link_speed; 883 priv->link_speed_capa = 0; 884 if (edata.supported & SUPPORTED_Autoneg) 885 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 886 if (edata.supported & (SUPPORTED_1000baseT_Full | 887 SUPPORTED_1000baseKX_Full)) 888 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 889 if (edata.supported & SUPPORTED_10000baseKR_Full) 890 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 891 if (edata.supported & (SUPPORTED_40000baseKR4_Full | 892 SUPPORTED_40000baseCR4_Full | 893 SUPPORTED_40000baseSR4_Full | 894 SUPPORTED_40000baseLR4_Full)) 895 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 896 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ? 897 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 898 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 899 ETH_LINK_SPEED_FIXED); 900 if (((dev_link.link_speed && !dev_link.link_status) || 901 (!dev_link.link_speed && dev_link.link_status))) { 902 rte_errno = EAGAIN; 903 return -rte_errno; 904 } 905 *link = dev_link; 906 return 0; 907 } 908 909 /** 910 * Retrieve physical link information (unlocked version using new ioctl). 911 * 912 * @param dev 913 * Pointer to Ethernet device structure. 914 * @param[out] link 915 * Storage for current link status. 916 * 917 * @return 918 * 0 on success, a negative errno value otherwise and rte_errno is set. 919 */ 920 static int 921 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, 922 struct rte_eth_link *link) 923 924 { 925 struct mlx5_priv *priv = dev->data->dev_private; 926 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS }; 927 struct ifreq ifr; 928 struct rte_eth_link dev_link; 929 struct rte_eth_dev *master = NULL; 930 uint64_t sc; 931 int ret; 932 933 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 934 if (ret) { 935 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s", 936 dev->data->port_id, strerror(rte_errno)); 937 return ret; 938 } 939 dev_link = (struct rte_eth_link) { 940 .link_status = ((ifr.ifr_flags & IFF_UP) && 941 (ifr.ifr_flags & IFF_RUNNING)), 942 }; 943 ifr = (struct ifreq) { 944 .ifr_data = (void *)&gcmd, 945 }; 946 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 947 if (ret) { 948 if (ret == -ENOTSUP && priv->representor) { 949 /* 950 * For representors we can try to inherit link 951 * settings from the master device. Actually 952 * link settings do not make a lot of sense 953 * for representors due to missing physical 954 * link. The old kernel drivers supported 955 * emulated settings query for representors, 956 * the new ones do not, so we have to add 957 * this code for compatibility issues. 958 */ 959 master = mlx5_find_master_dev(dev); 960 if (master) { 961 ifr = (struct ifreq) { 962 .ifr_data = (void *)&gcmd, 963 }; 964 ret = mlx5_ifreq(master, SIOCETHTOOL, &ifr); 965 } 966 } 967 if (ret) { 968 DRV_LOG(DEBUG, 969 "port %u ioctl(SIOCETHTOOL," 970 " ETHTOOL_GLINKSETTINGS) failed: %s", 971 dev->data->port_id, strerror(rte_errno)); 972 return ret; 973 } 974 975 } 976 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords; 977 978 alignas(struct ethtool_link_settings) 979 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) + 980 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3]; 981 struct ethtool_link_settings *ecmd = (void *)data; 982 983 *ecmd = gcmd; 984 ifr.ifr_data = (void *)ecmd; 985 ret = mlx5_ifreq(master ? master : dev, SIOCETHTOOL, &ifr); 986 if (ret) { 987 DRV_LOG(DEBUG, 988 "port %u ioctl(SIOCETHTOOL," 989 "ETHTOOL_GLINKSETTINGS) failed: %s", 990 dev->data->port_id, strerror(rte_errno)); 991 return ret; 992 } 993 dev_link.link_speed = (ecmd->speed == UINT32_MAX) ? ETH_SPEED_NUM_NONE : 994 ecmd->speed; 995 sc = ecmd->link_mode_masks[0] | 996 ((uint64_t)ecmd->link_mode_masks[1] << 32); 997 priv->link_speed_capa = 0; 998 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT)) 999 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 1000 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) | 1001 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT))) 1002 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 1003 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) | 1004 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) | 1005 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT))) 1006 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 1007 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) | 1008 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT))) 1009 priv->link_speed_capa |= ETH_LINK_SPEED_20G; 1010 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) | 1011 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) | 1012 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) | 1013 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT))) 1014 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 1015 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) | 1016 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) | 1017 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) | 1018 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT))) 1019 priv->link_speed_capa |= ETH_LINK_SPEED_56G; 1020 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) | 1021 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) | 1022 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT))) 1023 priv->link_speed_capa |= ETH_LINK_SPEED_25G; 1024 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) | 1025 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT))) 1026 priv->link_speed_capa |= ETH_LINK_SPEED_50G; 1027 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) | 1028 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) | 1029 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) | 1030 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT))) 1031 priv->link_speed_capa |= ETH_LINK_SPEED_100G; 1032 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ? 1033 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 1034 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 1035 ETH_LINK_SPEED_FIXED); 1036 if (((dev_link.link_speed && !dev_link.link_status) || 1037 (!dev_link.link_speed && dev_link.link_status))) { 1038 rte_errno = EAGAIN; 1039 return -rte_errno; 1040 } 1041 *link = dev_link; 1042 return 0; 1043 } 1044 1045 /** 1046 * DPDK callback to retrieve physical link information. 1047 * 1048 * @param dev 1049 * Pointer to Ethernet device structure. 1050 * @param wait_to_complete 1051 * Wait for request completion. 1052 * 1053 * @return 1054 * 0 if link status was not updated, positive if it was, a negative errno 1055 * value otherwise and rte_errno is set. 1056 */ 1057 int 1058 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete) 1059 { 1060 int ret; 1061 struct rte_eth_link dev_link; 1062 time_t start_time = time(NULL); 1063 int retry = MLX5_GET_LINK_STATUS_RETRY_COUNT; 1064 1065 do { 1066 ret = mlx5_link_update_unlocked_gs(dev, &dev_link); 1067 if (ret == -ENOTSUP) 1068 ret = mlx5_link_update_unlocked_gset(dev, &dev_link); 1069 if (ret == 0) 1070 break; 1071 /* Handle wait to complete situation. */ 1072 if ((wait_to_complete || retry) && ret == -EAGAIN) { 1073 if (abs((int)difftime(time(NULL), start_time)) < 1074 MLX5_LINK_STATUS_TIMEOUT) { 1075 usleep(0); 1076 continue; 1077 } else { 1078 rte_errno = EBUSY; 1079 return -rte_errno; 1080 } 1081 } else if (ret < 0) { 1082 return ret; 1083 } 1084 } while (wait_to_complete || retry-- > 0); 1085 ret = !!memcmp(&dev->data->dev_link, &dev_link, 1086 sizeof(struct rte_eth_link)); 1087 dev->data->dev_link = dev_link; 1088 return ret; 1089 } 1090 1091 /** 1092 * DPDK callback to change the MTU. 1093 * 1094 * @param dev 1095 * Pointer to Ethernet device structure. 1096 * @param in_mtu 1097 * New MTU. 1098 * 1099 * @return 1100 * 0 on success, a negative errno value otherwise and rte_errno is set. 1101 */ 1102 int 1103 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1104 { 1105 struct mlx5_priv *priv = dev->data->dev_private; 1106 uint16_t kern_mtu = 0; 1107 int ret; 1108 1109 ret = mlx5_get_mtu(dev, &kern_mtu); 1110 if (ret) 1111 return ret; 1112 /* Set kernel interface MTU first. */ 1113 ret = mlx5_set_mtu(dev, mtu); 1114 if (ret) 1115 return ret; 1116 ret = mlx5_get_mtu(dev, &kern_mtu); 1117 if (ret) 1118 return ret; 1119 if (kern_mtu == mtu) { 1120 priv->mtu = mtu; 1121 DRV_LOG(DEBUG, "port %u adapter MTU set to %u", 1122 dev->data->port_id, mtu); 1123 return 0; 1124 } 1125 rte_errno = EAGAIN; 1126 return -rte_errno; 1127 } 1128 1129 /** 1130 * DPDK callback to get flow control status. 1131 * 1132 * @param dev 1133 * Pointer to Ethernet device structure. 1134 * @param[out] fc_conf 1135 * Flow control output buffer. 1136 * 1137 * @return 1138 * 0 on success, a negative errno value otherwise and rte_errno is set. 1139 */ 1140 int 1141 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1142 { 1143 struct ifreq ifr; 1144 struct ethtool_pauseparam ethpause = { 1145 .cmd = ETHTOOL_GPAUSEPARAM 1146 }; 1147 int ret; 1148 1149 ifr.ifr_data = (void *)ðpause; 1150 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1151 if (ret) { 1152 DRV_LOG(WARNING, 1153 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:" 1154 " %s", 1155 dev->data->port_id, strerror(rte_errno)); 1156 return ret; 1157 } 1158 fc_conf->autoneg = ethpause.autoneg; 1159 if (ethpause.rx_pause && ethpause.tx_pause) 1160 fc_conf->mode = RTE_FC_FULL; 1161 else if (ethpause.rx_pause) 1162 fc_conf->mode = RTE_FC_RX_PAUSE; 1163 else if (ethpause.tx_pause) 1164 fc_conf->mode = RTE_FC_TX_PAUSE; 1165 else 1166 fc_conf->mode = RTE_FC_NONE; 1167 return 0; 1168 } 1169 1170 /** 1171 * DPDK callback to modify flow control parameters. 1172 * 1173 * @param dev 1174 * Pointer to Ethernet device structure. 1175 * @param[in] fc_conf 1176 * Flow control parameters. 1177 * 1178 * @return 1179 * 0 on success, a negative errno value otherwise and rte_errno is set. 1180 */ 1181 int 1182 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1183 { 1184 struct ifreq ifr; 1185 struct ethtool_pauseparam ethpause = { 1186 .cmd = ETHTOOL_SPAUSEPARAM 1187 }; 1188 int ret; 1189 1190 ifr.ifr_data = (void *)ðpause; 1191 ethpause.autoneg = fc_conf->autoneg; 1192 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 1193 (fc_conf->mode & RTE_FC_RX_PAUSE)) 1194 ethpause.rx_pause = 1; 1195 else 1196 ethpause.rx_pause = 0; 1197 1198 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 1199 (fc_conf->mode & RTE_FC_TX_PAUSE)) 1200 ethpause.tx_pause = 1; 1201 else 1202 ethpause.tx_pause = 0; 1203 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1204 if (ret) { 1205 DRV_LOG(WARNING, 1206 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)" 1207 " failed: %s", 1208 dev->data->port_id, strerror(rte_errno)); 1209 return ret; 1210 } 1211 return 0; 1212 } 1213 1214 /** 1215 * Handle asynchronous removal event for entire multiport device. 1216 * 1217 * @param sh 1218 * Infiniband device shared context. 1219 */ 1220 static void 1221 mlx5_dev_interrupt_device_fatal(struct mlx5_ibv_shared *sh) 1222 { 1223 uint32_t i; 1224 1225 for (i = 0; i < sh->max_port; ++i) { 1226 struct rte_eth_dev *dev; 1227 1228 if (sh->port[i].ih_port_id >= RTE_MAX_ETHPORTS) { 1229 /* 1230 * Or not existing port either no 1231 * handler installed for this port. 1232 */ 1233 continue; 1234 } 1235 dev = &rte_eth_devices[sh->port[i].ih_port_id]; 1236 MLX5_ASSERT(dev); 1237 if (dev->data->dev_conf.intr_conf.rmv) 1238 _rte_eth_dev_callback_process 1239 (dev, RTE_ETH_EVENT_INTR_RMV, NULL); 1240 } 1241 } 1242 1243 /** 1244 * Handle shared asynchronous events the NIC (removal event 1245 * and link status change). Supports multiport IB device. 1246 * 1247 * @param cb_arg 1248 * Callback argument. 1249 */ 1250 void 1251 mlx5_dev_interrupt_handler(void *cb_arg) 1252 { 1253 struct mlx5_ibv_shared *sh = cb_arg; 1254 struct ibv_async_event event; 1255 1256 /* Read all message from the IB device and acknowledge them. */ 1257 for (;;) { 1258 struct rte_eth_dev *dev; 1259 uint32_t tmp; 1260 1261 if (mlx5_glue->get_async_event(sh->ctx, &event)) 1262 break; 1263 /* Retrieve and check IB port index. */ 1264 tmp = (uint32_t)event.element.port_num; 1265 if (!tmp && event.event_type == IBV_EVENT_DEVICE_FATAL) { 1266 /* 1267 * The DEVICE_FATAL event is called once for 1268 * entire device without port specifying. 1269 * We should notify all existing ports. 1270 */ 1271 mlx5_glue->ack_async_event(&event); 1272 mlx5_dev_interrupt_device_fatal(sh); 1273 continue; 1274 } 1275 MLX5_ASSERT(tmp && (tmp <= sh->max_port)); 1276 if (!tmp) { 1277 /* Unsupported devive level event. */ 1278 mlx5_glue->ack_async_event(&event); 1279 DRV_LOG(DEBUG, 1280 "unsupported common event (type %d)", 1281 event.event_type); 1282 continue; 1283 } 1284 if (tmp > sh->max_port) { 1285 /* Invalid IB port index. */ 1286 mlx5_glue->ack_async_event(&event); 1287 DRV_LOG(DEBUG, 1288 "cannot handle an event (type %d)" 1289 "due to invalid IB port index (%u)", 1290 event.event_type, tmp); 1291 continue; 1292 } 1293 if (sh->port[tmp - 1].ih_port_id >= RTE_MAX_ETHPORTS) { 1294 /* No handler installed. */ 1295 mlx5_glue->ack_async_event(&event); 1296 DRV_LOG(DEBUG, 1297 "cannot handle an event (type %d)" 1298 "due to no handler installed for port %u", 1299 event.event_type, tmp); 1300 continue; 1301 } 1302 /* Retrieve ethernet device descriptor. */ 1303 tmp = sh->port[tmp - 1].ih_port_id; 1304 dev = &rte_eth_devices[tmp]; 1305 MLX5_ASSERT(dev); 1306 if ((event.event_type == IBV_EVENT_PORT_ACTIVE || 1307 event.event_type == IBV_EVENT_PORT_ERR) && 1308 dev->data->dev_conf.intr_conf.lsc) { 1309 mlx5_glue->ack_async_event(&event); 1310 if (mlx5_link_update(dev, 0) == -EAGAIN) { 1311 usleep(0); 1312 continue; 1313 } 1314 _rte_eth_dev_callback_process 1315 (dev, RTE_ETH_EVENT_INTR_LSC, NULL); 1316 continue; 1317 } 1318 DRV_LOG(DEBUG, 1319 "port %u cannot handle an unknown event (type %d)", 1320 dev->data->port_id, event.event_type); 1321 mlx5_glue->ack_async_event(&event); 1322 } 1323 } 1324 1325 /* 1326 * Unregister callback handler safely. The handler may be active 1327 * while we are trying to unregister it, in this case code -EAGAIN 1328 * is returned by rte_intr_callback_unregister(). This routine checks 1329 * the return code and tries to unregister handler again. 1330 * 1331 * @param handle 1332 * interrupt handle 1333 * @param cb_fn 1334 * pointer to callback routine 1335 * @cb_arg 1336 * opaque callback parameter 1337 */ 1338 void 1339 mlx5_intr_callback_unregister(const struct rte_intr_handle *handle, 1340 rte_intr_callback_fn cb_fn, void *cb_arg) 1341 { 1342 /* 1343 * Try to reduce timeout management overhead by not calling 1344 * the timer related routines on the first iteration. If the 1345 * unregistering succeeds on first call there will be no 1346 * timer calls at all. 1347 */ 1348 uint64_t twait = 0; 1349 uint64_t start = 0; 1350 1351 do { 1352 int ret; 1353 1354 ret = rte_intr_callback_unregister(handle, cb_fn, cb_arg); 1355 if (ret >= 0) 1356 return; 1357 if (ret != -EAGAIN) { 1358 DRV_LOG(INFO, "failed to unregister interrupt" 1359 " handler (error: %d)", ret); 1360 MLX5_ASSERT(false); 1361 return; 1362 } 1363 if (twait) { 1364 struct timespec onems; 1365 1366 /* Wait one millisecond and try again. */ 1367 onems.tv_sec = 0; 1368 onems.tv_nsec = NS_PER_S / MS_PER_S; 1369 nanosleep(&onems, 0); 1370 /* Check whether one second elapsed. */ 1371 if ((rte_get_timer_cycles() - start) <= twait) 1372 continue; 1373 } else { 1374 /* 1375 * We get the amount of timer ticks for one second. 1376 * If this amount elapsed it means we spent one 1377 * second in waiting. This branch is executed once 1378 * on first iteration. 1379 */ 1380 twait = rte_get_timer_hz(); 1381 MLX5_ASSERT(twait); 1382 } 1383 /* 1384 * Timeout elapsed, show message (once a second) and retry. 1385 * We have no other acceptable option here, if we ignore 1386 * the unregistering return code the handler will not 1387 * be unregistered, fd will be closed and we may get the 1388 * crush. Hanging and messaging in the loop seems not to be 1389 * the worst choice. 1390 */ 1391 DRV_LOG(INFO, "Retrying to unregister interrupt handler"); 1392 start = rte_get_timer_cycles(); 1393 } while (true); 1394 } 1395 1396 /** 1397 * Handle DEVX interrupts from the NIC. 1398 * This function is probably called from the DPDK host thread. 1399 * 1400 * @param cb_arg 1401 * Callback argument. 1402 */ 1403 void 1404 mlx5_dev_interrupt_handler_devx(void *cb_arg) 1405 { 1406 #ifndef HAVE_IBV_DEVX_ASYNC 1407 (void)cb_arg; 1408 return; 1409 #else 1410 struct mlx5_ibv_shared *sh = cb_arg; 1411 union { 1412 struct mlx5dv_devx_async_cmd_hdr cmd_resp; 1413 uint8_t buf[MLX5_ST_SZ_BYTES(query_flow_counter_out) + 1414 MLX5_ST_SZ_BYTES(traffic_counter) + 1415 sizeof(struct mlx5dv_devx_async_cmd_hdr)]; 1416 } out; 1417 uint8_t *buf = out.buf + sizeof(out.cmd_resp); 1418 1419 while (!mlx5_glue->devx_get_async_cmd_comp(sh->devx_comp, 1420 &out.cmd_resp, 1421 sizeof(out.buf))) 1422 mlx5_flow_async_pool_query_handle 1423 (sh, (uint64_t)out.cmd_resp.wr_id, 1424 mlx5_devx_get_out_command_status(buf)); 1425 #endif /* HAVE_IBV_DEVX_ASYNC */ 1426 } 1427 1428 /** 1429 * Uninstall shared asynchronous device events handler. 1430 * This function is implemented to support event sharing 1431 * between multiple ports of single IB device. 1432 * 1433 * @param dev 1434 * Pointer to Ethernet device. 1435 */ 1436 static void 1437 mlx5_dev_shared_handler_uninstall(struct rte_eth_dev *dev) 1438 { 1439 struct mlx5_priv *priv = dev->data->dev_private; 1440 struct mlx5_ibv_shared *sh = priv->sh; 1441 1442 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1443 return; 1444 pthread_mutex_lock(&sh->intr_mutex); 1445 MLX5_ASSERT(priv->ibv_port); 1446 MLX5_ASSERT(priv->ibv_port <= sh->max_port); 1447 MLX5_ASSERT(dev->data->port_id < RTE_MAX_ETHPORTS); 1448 if (sh->port[priv->ibv_port - 1].ih_port_id >= RTE_MAX_ETHPORTS) 1449 goto exit; 1450 MLX5_ASSERT(sh->port[priv->ibv_port - 1].ih_port_id == 1451 (uint32_t)dev->data->port_id); 1452 MLX5_ASSERT(sh->intr_cnt); 1453 sh->port[priv->ibv_port - 1].ih_port_id = RTE_MAX_ETHPORTS; 1454 if (!sh->intr_cnt || --sh->intr_cnt) 1455 goto exit; 1456 mlx5_intr_callback_unregister(&sh->intr_handle, 1457 mlx5_dev_interrupt_handler, sh); 1458 sh->intr_handle.fd = 0; 1459 sh->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN; 1460 exit: 1461 pthread_mutex_unlock(&sh->intr_mutex); 1462 } 1463 1464 /** 1465 * Uninstall devx shared asynchronous device events handler. 1466 * This function is implemeted to support event sharing 1467 * between multiple ports of single IB device. 1468 * 1469 * @param dev 1470 * Pointer to Ethernet device. 1471 */ 1472 static void 1473 mlx5_dev_shared_handler_devx_uninstall(struct rte_eth_dev *dev) 1474 { 1475 struct mlx5_priv *priv = dev->data->dev_private; 1476 struct mlx5_ibv_shared *sh = priv->sh; 1477 1478 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1479 return; 1480 pthread_mutex_lock(&sh->intr_mutex); 1481 MLX5_ASSERT(priv->ibv_port); 1482 MLX5_ASSERT(priv->ibv_port <= sh->max_port); 1483 MLX5_ASSERT(dev->data->port_id < RTE_MAX_ETHPORTS); 1484 if (sh->port[priv->ibv_port - 1].devx_ih_port_id >= RTE_MAX_ETHPORTS) 1485 goto exit; 1486 MLX5_ASSERT(sh->port[priv->ibv_port - 1].devx_ih_port_id == 1487 (uint32_t)dev->data->port_id); 1488 sh->port[priv->ibv_port - 1].devx_ih_port_id = RTE_MAX_ETHPORTS; 1489 if (!sh->devx_intr_cnt || --sh->devx_intr_cnt) 1490 goto exit; 1491 if (sh->intr_handle_devx.fd) { 1492 rte_intr_callback_unregister(&sh->intr_handle_devx, 1493 mlx5_dev_interrupt_handler_devx, 1494 sh); 1495 sh->intr_handle_devx.fd = 0; 1496 sh->intr_handle_devx.type = RTE_INTR_HANDLE_UNKNOWN; 1497 } 1498 if (sh->devx_comp) { 1499 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp); 1500 sh->devx_comp = NULL; 1501 } 1502 exit: 1503 pthread_mutex_unlock(&sh->intr_mutex); 1504 } 1505 1506 /** 1507 * Install shared asynchronous device events handler. 1508 * This function is implemented to support event sharing 1509 * between multiple ports of single IB device. 1510 * 1511 * @param dev 1512 * Pointer to Ethernet device. 1513 */ 1514 static void 1515 mlx5_dev_shared_handler_install(struct rte_eth_dev *dev) 1516 { 1517 struct mlx5_priv *priv = dev->data->dev_private; 1518 struct mlx5_ibv_shared *sh = priv->sh; 1519 int ret; 1520 int flags; 1521 1522 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1523 return; 1524 pthread_mutex_lock(&sh->intr_mutex); 1525 MLX5_ASSERT(priv->ibv_port); 1526 MLX5_ASSERT(priv->ibv_port <= sh->max_port); 1527 MLX5_ASSERT(dev->data->port_id < RTE_MAX_ETHPORTS); 1528 if (sh->port[priv->ibv_port - 1].ih_port_id < RTE_MAX_ETHPORTS) { 1529 /* The handler is already installed for this port. */ 1530 MLX5_ASSERT(sh->intr_cnt); 1531 goto exit; 1532 } 1533 if (sh->intr_cnt) { 1534 sh->port[priv->ibv_port - 1].ih_port_id = 1535 (uint32_t)dev->data->port_id; 1536 sh->intr_cnt++; 1537 goto exit; 1538 } 1539 /* No shared handler installed. */ 1540 MLX5_ASSERT(sh->ctx->async_fd > 0); 1541 flags = fcntl(sh->ctx->async_fd, F_GETFL); 1542 ret = fcntl(sh->ctx->async_fd, F_SETFL, flags | O_NONBLOCK); 1543 if (ret) { 1544 DRV_LOG(INFO, "failed to change file descriptor async event" 1545 " queue"); 1546 /* Indicate there will be no interrupts. */ 1547 dev->data->dev_conf.intr_conf.lsc = 0; 1548 dev->data->dev_conf.intr_conf.rmv = 0; 1549 } else { 1550 sh->intr_handle.fd = sh->ctx->async_fd; 1551 sh->intr_handle.type = RTE_INTR_HANDLE_EXT; 1552 rte_intr_callback_register(&sh->intr_handle, 1553 mlx5_dev_interrupt_handler, sh); 1554 sh->intr_cnt++; 1555 sh->port[priv->ibv_port - 1].ih_port_id = 1556 (uint32_t)dev->data->port_id; 1557 } 1558 exit: 1559 pthread_mutex_unlock(&sh->intr_mutex); 1560 } 1561 1562 /** 1563 * Install devx shared asyncronous device events handler. 1564 * This function is implemeted to support event sharing 1565 * between multiple ports of single IB device. 1566 * 1567 * @param dev 1568 * Pointer to Ethernet device. 1569 */ 1570 static void 1571 mlx5_dev_shared_handler_devx_install(struct rte_eth_dev *dev) 1572 { 1573 struct mlx5_priv *priv = dev->data->dev_private; 1574 struct mlx5_ibv_shared *sh = priv->sh; 1575 1576 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1577 return; 1578 pthread_mutex_lock(&sh->intr_mutex); 1579 MLX5_ASSERT(priv->ibv_port); 1580 MLX5_ASSERT(priv->ibv_port <= sh->max_port); 1581 MLX5_ASSERT(dev->data->port_id < RTE_MAX_ETHPORTS); 1582 if (sh->port[priv->ibv_port - 1].devx_ih_port_id < RTE_MAX_ETHPORTS) { 1583 /* The handler is already installed for this port. */ 1584 MLX5_ASSERT(sh->devx_intr_cnt); 1585 goto exit; 1586 } 1587 if (sh->devx_intr_cnt) { 1588 sh->devx_intr_cnt++; 1589 sh->port[priv->ibv_port - 1].devx_ih_port_id = 1590 (uint32_t)dev->data->port_id; 1591 goto exit; 1592 } 1593 if (priv->config.devx) { 1594 #ifndef HAVE_IBV_DEVX_ASYNC 1595 goto exit; 1596 #else 1597 sh->devx_comp = mlx5_glue->devx_create_cmd_comp(sh->ctx); 1598 if (sh->devx_comp) { 1599 int flags = fcntl(sh->devx_comp->fd, F_GETFL); 1600 int ret = fcntl(sh->devx_comp->fd, F_SETFL, 1601 flags | O_NONBLOCK); 1602 1603 if (ret) { 1604 DRV_LOG(INFO, "failed to change file descriptor" 1605 " devx async event queue"); 1606 } else { 1607 sh->intr_handle_devx.fd = sh->devx_comp->fd; 1608 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT; 1609 rte_intr_callback_register 1610 (&sh->intr_handle_devx, 1611 mlx5_dev_interrupt_handler_devx, sh); 1612 sh->devx_intr_cnt++; 1613 sh->port[priv->ibv_port - 1].devx_ih_port_id = 1614 (uint32_t)dev->data->port_id; 1615 } 1616 } 1617 #endif /* HAVE_IBV_DEVX_ASYNC */ 1618 } 1619 exit: 1620 pthread_mutex_unlock(&sh->intr_mutex); 1621 } 1622 1623 /** 1624 * Uninstall interrupt handler. 1625 * 1626 * @param dev 1627 * Pointer to Ethernet device. 1628 */ 1629 void 1630 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev) 1631 { 1632 mlx5_dev_shared_handler_uninstall(dev); 1633 } 1634 1635 /** 1636 * Install interrupt handler. 1637 * 1638 * @param dev 1639 * Pointer to Ethernet device. 1640 */ 1641 void 1642 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev) 1643 { 1644 mlx5_dev_shared_handler_install(dev); 1645 } 1646 1647 /** 1648 * Devx uninstall interrupt handler. 1649 * 1650 * @param dev 1651 * Pointer to Ethernet device. 1652 */ 1653 void 1654 mlx5_dev_interrupt_handler_devx_uninstall(struct rte_eth_dev *dev) 1655 { 1656 mlx5_dev_shared_handler_devx_uninstall(dev); 1657 } 1658 1659 /** 1660 * Devx install interrupt handler. 1661 * 1662 * @param dev 1663 * Pointer to Ethernet device. 1664 */ 1665 void 1666 mlx5_dev_interrupt_handler_devx_install(struct rte_eth_dev *dev) 1667 { 1668 mlx5_dev_shared_handler_devx_install(dev); 1669 } 1670 1671 /** 1672 * DPDK callback to bring the link DOWN. 1673 * 1674 * @param dev 1675 * Pointer to Ethernet device structure. 1676 * 1677 * @return 1678 * 0 on success, a negative errno value otherwise and rte_errno is set. 1679 */ 1680 int 1681 mlx5_set_link_down(struct rte_eth_dev *dev) 1682 { 1683 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP); 1684 } 1685 1686 /** 1687 * DPDK callback to bring the link UP. 1688 * 1689 * @param dev 1690 * Pointer to Ethernet device structure. 1691 * 1692 * @return 1693 * 0 on success, a negative errno value otherwise and rte_errno is set. 1694 */ 1695 int 1696 mlx5_set_link_up(struct rte_eth_dev *dev) 1697 { 1698 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP); 1699 } 1700 1701 /** 1702 * Configure the RX function to use. 1703 * 1704 * @param dev 1705 * Pointer to private data structure. 1706 * 1707 * @return 1708 * Pointer to selected Rx burst function. 1709 */ 1710 eth_rx_burst_t 1711 mlx5_select_rx_function(struct rte_eth_dev *dev) 1712 { 1713 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst; 1714 1715 MLX5_ASSERT(dev != NULL); 1716 if (mlx5_check_vec_rx_support(dev) > 0) { 1717 rx_pkt_burst = mlx5_rx_burst_vec; 1718 DRV_LOG(DEBUG, "port %u selected Rx vectorized function", 1719 dev->data->port_id); 1720 } else if (mlx5_mprq_enabled(dev)) { 1721 rx_pkt_burst = mlx5_rx_burst_mprq; 1722 } 1723 return rx_pkt_burst; 1724 } 1725 1726 /** 1727 * Check if mlx5 device was removed. 1728 * 1729 * @param dev 1730 * Pointer to Ethernet device structure. 1731 * 1732 * @return 1733 * 1 when device is removed, otherwise 0. 1734 */ 1735 int 1736 mlx5_is_removed(struct rte_eth_dev *dev) 1737 { 1738 struct ibv_device_attr device_attr; 1739 struct mlx5_priv *priv = dev->data->dev_private; 1740 1741 if (mlx5_glue->query_device(priv->sh->ctx, &device_attr) == EIO) 1742 return 1; 1743 return 0; 1744 } 1745 1746 /** 1747 * Get the E-Switch parameters by port id. 1748 * 1749 * @param[in] port 1750 * Device port id. 1751 * @param[in] valid 1752 * Device port id is valid, skip check. This flag is useful 1753 * when trials are performed from probing and device is not 1754 * flagged as valid yet (in attaching process). 1755 * @param[out] es_domain_id 1756 * E-Switch domain id. 1757 * @param[out] es_port_id 1758 * The port id of the port in the E-Switch. 1759 * 1760 * @return 1761 * pointer to device private data structure containing data needed 1762 * on success, NULL otherwise and rte_errno is set. 1763 */ 1764 struct mlx5_priv * 1765 mlx5_port_to_eswitch_info(uint16_t port, bool valid) 1766 { 1767 struct rte_eth_dev *dev; 1768 struct mlx5_priv *priv; 1769 1770 if (port >= RTE_MAX_ETHPORTS) { 1771 rte_errno = EINVAL; 1772 return NULL; 1773 } 1774 if (!valid && !rte_eth_dev_is_valid_port(port)) { 1775 rte_errno = ENODEV; 1776 return NULL; 1777 } 1778 dev = &rte_eth_devices[port]; 1779 priv = dev->data->dev_private; 1780 if (!(priv->representor || priv->master)) { 1781 rte_errno = EINVAL; 1782 return NULL; 1783 } 1784 return priv; 1785 } 1786 1787 /** 1788 * Get the E-Switch parameters by device instance. 1789 * 1790 * @param[in] port 1791 * Device port id. 1792 * @param[out] es_domain_id 1793 * E-Switch domain id. 1794 * @param[out] es_port_id 1795 * The port id of the port in the E-Switch. 1796 * 1797 * @return 1798 * pointer to device private data structure containing data needed 1799 * on success, NULL otherwise and rte_errno is set. 1800 */ 1801 struct mlx5_priv * 1802 mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev) 1803 { 1804 struct mlx5_priv *priv; 1805 1806 priv = dev->data->dev_private; 1807 if (!(priv->representor || priv->master)) { 1808 rte_errno = EINVAL; 1809 return NULL; 1810 } 1811 return priv; 1812 } 1813 1814 /** 1815 * Get switch information associated with network interface. 1816 * 1817 * @param ifindex 1818 * Network interface index. 1819 * @param[out] info 1820 * Switch information object, populated in case of success. 1821 * 1822 * @return 1823 * 0 on success, a negative errno value otherwise and rte_errno is set. 1824 */ 1825 int 1826 mlx5_sysfs_switch_info(unsigned int ifindex, struct mlx5_switch_info *info) 1827 { 1828 char ifname[IF_NAMESIZE]; 1829 char port_name[IF_NAMESIZE]; 1830 FILE *file; 1831 struct mlx5_switch_info data = { 1832 .master = 0, 1833 .representor = 0, 1834 .name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET, 1835 .port_name = 0, 1836 .switch_id = 0, 1837 }; 1838 DIR *dir; 1839 bool port_switch_id_set = false; 1840 bool device_dir = false; 1841 char c; 1842 int ret; 1843 1844 if (!if_indextoname(ifindex, ifname)) { 1845 rte_errno = errno; 1846 return -rte_errno; 1847 } 1848 1849 MKSTR(phys_port_name, "/sys/class/net/%s/phys_port_name", 1850 ifname); 1851 MKSTR(phys_switch_id, "/sys/class/net/%s/phys_switch_id", 1852 ifname); 1853 MKSTR(pci_device, "/sys/class/net/%s/device", 1854 ifname); 1855 1856 file = fopen(phys_port_name, "rb"); 1857 if (file != NULL) { 1858 ret = fscanf(file, "%s", port_name); 1859 fclose(file); 1860 if (ret == 1) 1861 mlx5_translate_port_name(port_name, &data); 1862 } 1863 file = fopen(phys_switch_id, "rb"); 1864 if (file == NULL) { 1865 rte_errno = errno; 1866 return -rte_errno; 1867 } 1868 port_switch_id_set = 1869 fscanf(file, "%" SCNx64 "%c", &data.switch_id, &c) == 2 && 1870 c == '\n'; 1871 fclose(file); 1872 dir = opendir(pci_device); 1873 if (dir != NULL) { 1874 closedir(dir); 1875 device_dir = true; 1876 } 1877 if (port_switch_id_set) { 1878 /* We have some E-Switch configuration. */ 1879 mlx5_sysfs_check_switch_info(device_dir, &data); 1880 } 1881 *info = data; 1882 MLX5_ASSERT(!(data.master && data.representor)); 1883 if (data.master && data.representor) { 1884 DRV_LOG(ERR, "ifindex %u device is recognized as master" 1885 " and as representor", ifindex); 1886 rte_errno = ENODEV; 1887 return -rte_errno; 1888 } 1889 return 0; 1890 } 1891 1892 /** 1893 * Analyze gathered port parameters via sysfs to recognize master 1894 * and representor devices for E-Switch configuration. 1895 * 1896 * @param[in] device_dir 1897 * flag of presence of "device" directory under port device key. 1898 * @param[inout] switch_info 1899 * Port information, including port name as a number and port name 1900 * type if recognized 1901 * 1902 * @return 1903 * master and representor flags are set in switch_info according to 1904 * recognized parameters (if any). 1905 */ 1906 void 1907 mlx5_sysfs_check_switch_info(bool device_dir, 1908 struct mlx5_switch_info *switch_info) 1909 { 1910 switch (switch_info->name_type) { 1911 case MLX5_PHYS_PORT_NAME_TYPE_UNKNOWN: 1912 /* 1913 * Name is not recognized, assume the master, 1914 * check the device directory presence. 1915 */ 1916 switch_info->master = device_dir; 1917 break; 1918 case MLX5_PHYS_PORT_NAME_TYPE_NOTSET: 1919 /* 1920 * Name is not set, this assumes the legacy naming 1921 * schema for master, just check if there is 1922 * a device directory. 1923 */ 1924 switch_info->master = device_dir; 1925 break; 1926 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 1927 /* New uplink naming schema recognized. */ 1928 switch_info->master = 1; 1929 break; 1930 case MLX5_PHYS_PORT_NAME_TYPE_LEGACY: 1931 /* Legacy representors naming schema. */ 1932 switch_info->representor = !device_dir; 1933 break; 1934 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 1935 /* New representors naming schema. */ 1936 switch_info->representor = 1; 1937 break; 1938 } 1939 } 1940 1941 /** 1942 * DPDK callback to retrieve plug-in module EEPROM information (type and size). 1943 * 1944 * @param dev 1945 * Pointer to Ethernet device structure. 1946 * @param[out] modinfo 1947 * Storage for plug-in module EEPROM information. 1948 * 1949 * @return 1950 * 0 on success, a negative errno value otherwise and rte_errno is set. 1951 */ 1952 int 1953 mlx5_get_module_info(struct rte_eth_dev *dev, 1954 struct rte_eth_dev_module_info *modinfo) 1955 { 1956 struct ethtool_modinfo info = { 1957 .cmd = ETHTOOL_GMODULEINFO, 1958 }; 1959 struct ifreq ifr = (struct ifreq) { 1960 .ifr_data = (void *)&info, 1961 }; 1962 int ret = 0; 1963 1964 if (!dev || !modinfo) { 1965 DRV_LOG(WARNING, "missing argument, cannot get module info"); 1966 rte_errno = EINVAL; 1967 return -rte_errno; 1968 } 1969 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1970 if (ret) { 1971 DRV_LOG(WARNING, "port %u ioctl(SIOCETHTOOL) failed: %s", 1972 dev->data->port_id, strerror(rte_errno)); 1973 return ret; 1974 } 1975 modinfo->type = info.type; 1976 modinfo->eeprom_len = info.eeprom_len; 1977 return ret; 1978 } 1979 1980 /** 1981 * DPDK callback to retrieve plug-in module EEPROM data. 1982 * 1983 * @param dev 1984 * Pointer to Ethernet device structure. 1985 * @param[out] info 1986 * Storage for plug-in module EEPROM data. 1987 * 1988 * @return 1989 * 0 on success, a negative errno value otherwise and rte_errno is set. 1990 */ 1991 int mlx5_get_module_eeprom(struct rte_eth_dev *dev, 1992 struct rte_dev_eeprom_info *info) 1993 { 1994 struct ethtool_eeprom *eeprom; 1995 struct ifreq ifr; 1996 int ret = 0; 1997 1998 if (!dev || !info) { 1999 DRV_LOG(WARNING, "missing argument, cannot get module eeprom"); 2000 rte_errno = EINVAL; 2001 return -rte_errno; 2002 } 2003 eeprom = rte_calloc(__func__, 1, 2004 (sizeof(struct ethtool_eeprom) + info->length), 0); 2005 if (!eeprom) { 2006 DRV_LOG(WARNING, "port %u cannot allocate memory for " 2007 "eeprom data", dev->data->port_id); 2008 rte_errno = ENOMEM; 2009 return -rte_errno; 2010 } 2011 eeprom->cmd = ETHTOOL_GMODULEEEPROM; 2012 eeprom->offset = info->offset; 2013 eeprom->len = info->length; 2014 ifr = (struct ifreq) { 2015 .ifr_data = (void *)eeprom, 2016 }; 2017 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 2018 if (ret) 2019 DRV_LOG(WARNING, "port %u ioctl(SIOCETHTOOL) failed: %s", 2020 dev->data->port_id, strerror(rte_errno)); 2021 else 2022 rte_memcpy(info->data, eeprom->data, info->length); 2023 rte_free(eeprom); 2024 return ret; 2025 } 2026 2027 /** 2028 * DPDK callback to retrieve hairpin capabilities. 2029 * 2030 * @param dev 2031 * Pointer to Ethernet device structure. 2032 * @param[out] cap 2033 * Storage for hairpin capability data. 2034 * 2035 * @return 2036 * 0 on success, a negative errno value otherwise and rte_errno is set. 2037 */ 2038 int mlx5_hairpin_cap_get(struct rte_eth_dev *dev, 2039 struct rte_eth_hairpin_cap *cap) 2040 { 2041 struct mlx5_priv *priv = dev->data->dev_private; 2042 2043 if (priv->sh->devx == 0) { 2044 rte_errno = ENOTSUP; 2045 return -rte_errno; 2046 } 2047 cap->max_nb_queues = UINT16_MAX; 2048 cap->max_rx_2_tx = 1; 2049 cap->max_tx_2_rx = 1; 2050 cap->max_nb_desc = 8192; 2051 return 0; 2052 } 2053