1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <unistd.h> 8 #include <string.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <errno.h> 12 13 #include <ethdev_driver.h> 14 #include <rte_bus_pci.h> 15 #include <rte_mbuf.h> 16 #include <rte_common.h> 17 #include <rte_interrupts.h> 18 #include <rte_malloc.h> 19 #include <rte_string_fns.h> 20 #include <rte_rwlock.h> 21 #include <rte_cycles.h> 22 23 #include <mlx5_malloc.h> 24 25 #include "mlx5_rxtx.h" 26 #include "mlx5_rx.h" 27 #include "mlx5_tx.h" 28 #include "mlx5_autoconf.h" 29 #include "mlx5_devx.h" 30 #include "rte_pmd_mlx5.h" 31 32 /** 33 * Get the interface index from device name. 34 * 35 * @param[in] dev 36 * Pointer to Ethernet device. 37 * 38 * @return 39 * Nonzero interface index on success, zero otherwise and rte_errno is set. 40 */ 41 unsigned int 42 mlx5_ifindex(const struct rte_eth_dev *dev) 43 { 44 struct mlx5_priv *priv = dev->data->dev_private; 45 unsigned int ifindex; 46 47 MLX5_ASSERT(priv); 48 MLX5_ASSERT(priv->if_index); 49 if (priv->master && priv->sh->bond.ifindex > 0) 50 ifindex = priv->sh->bond.ifindex; 51 else 52 ifindex = priv->if_index; 53 if (!ifindex) 54 rte_errno = ENXIO; 55 return ifindex; 56 } 57 58 /** 59 * DPDK callback for Ethernet device configuration. 60 * 61 * @param dev 62 * Pointer to Ethernet device structure. 63 * 64 * @return 65 * 0 on success, a negative errno value otherwise and rte_errno is set. 66 */ 67 int 68 mlx5_dev_configure(struct rte_eth_dev *dev) 69 { 70 struct mlx5_priv *priv = dev->data->dev_private; 71 unsigned int rxqs_n = dev->data->nb_rx_queues; 72 unsigned int txqs_n = dev->data->nb_tx_queues; 73 const uint8_t use_app_rss_key = 74 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key; 75 int ret = 0; 76 77 if (use_app_rss_key && 78 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len != 79 MLX5_RSS_HASH_KEY_LEN)) { 80 DRV_LOG(ERR, "port %u RSS key len must be %s Bytes long", 81 dev->data->port_id, RTE_STR(MLX5_RSS_HASH_KEY_LEN)); 82 rte_errno = EINVAL; 83 return -rte_errno; 84 } 85 priv->rss_conf.rss_key = mlx5_realloc(priv->rss_conf.rss_key, 86 MLX5_MEM_RTE, 87 MLX5_RSS_HASH_KEY_LEN, 0, 88 SOCKET_ID_ANY); 89 if (!priv->rss_conf.rss_key) { 90 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)", 91 dev->data->port_id, rxqs_n); 92 rte_errno = ENOMEM; 93 return -rte_errno; 94 } 95 96 if ((dev->data->dev_conf.txmode.offloads & 97 RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) && 98 rte_mbuf_dyn_tx_timestamp_register(NULL, NULL) != 0) { 99 DRV_LOG(ERR, "port %u cannot register Tx timestamp field/flag", 100 dev->data->port_id); 101 return -rte_errno; 102 } 103 memcpy(priv->rss_conf.rss_key, 104 use_app_rss_key ? 105 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key : 106 rss_hash_default_key, 107 MLX5_RSS_HASH_KEY_LEN); 108 priv->rss_conf.rss_key_len = MLX5_RSS_HASH_KEY_LEN; 109 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; 110 priv->rxq_privs = mlx5_realloc(priv->rxq_privs, 111 MLX5_MEM_RTE | MLX5_MEM_ZERO, 112 sizeof(void *) * rxqs_n, 0, 113 SOCKET_ID_ANY); 114 if (rxqs_n && priv->rxq_privs == NULL) { 115 DRV_LOG(ERR, "port %u cannot allocate rxq private data", 116 dev->data->port_id); 117 rte_errno = ENOMEM; 118 return -rte_errno; 119 } 120 priv->txqs = (void *)dev->data->tx_queues; 121 if (txqs_n != priv->txqs_n) { 122 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u", 123 dev->data->port_id, priv->txqs_n, txqs_n); 124 priv->txqs_n = txqs_n; 125 } 126 if (rxqs_n > priv->sh->dev_cap.ind_table_max_size) { 127 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)", 128 dev->data->port_id, rxqs_n); 129 rte_errno = EINVAL; 130 return -rte_errno; 131 } 132 if (priv->ext_rxqs && rxqs_n >= MLX5_EXTERNAL_RX_QUEUE_ID_MIN) { 133 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u), " 134 "the maximal number of internal Rx queues is %u", 135 dev->data->port_id, rxqs_n, 136 MLX5_EXTERNAL_RX_QUEUE_ID_MIN - 1); 137 rte_errno = EINVAL; 138 return -rte_errno; 139 } 140 if (rxqs_n != priv->rxqs_n) { 141 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u", 142 dev->data->port_id, priv->rxqs_n, rxqs_n); 143 priv->rxqs_n = rxqs_n; 144 } 145 priv->skip_default_rss_reta = 0; 146 ret = mlx5_proc_priv_init(dev); 147 if (ret) 148 return ret; 149 return 0; 150 } 151 152 /** 153 * Configure default RSS reta. 154 * 155 * @param dev 156 * Pointer to Ethernet device structure. 157 * 158 * @return 159 * 0 on success, a negative errno value otherwise and rte_errno is set. 160 */ 161 int 162 mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev) 163 { 164 struct mlx5_priv *priv = dev->data->dev_private; 165 unsigned int rxqs_n = dev->data->nb_rx_queues; 166 unsigned int i; 167 unsigned int j; 168 unsigned int reta_idx_n; 169 int ret = 0; 170 unsigned int *rss_queue_arr = NULL; 171 unsigned int rss_queue_n = 0; 172 173 if (priv->skip_default_rss_reta) 174 return ret; 175 rss_queue_arr = mlx5_malloc(0, rxqs_n * sizeof(unsigned int), 0, 176 SOCKET_ID_ANY); 177 if (!rss_queue_arr) { 178 DRV_LOG(ERR, "port %u cannot allocate RSS queue list (%u)", 179 dev->data->port_id, rxqs_n); 180 rte_errno = ENOMEM; 181 return -rte_errno; 182 } 183 for (i = 0, j = 0; i < rxqs_n; i++) { 184 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, i); 185 186 if (rxq_ctrl && !rxq_ctrl->is_hairpin) 187 rss_queue_arr[j++] = i; 188 } 189 rss_queue_n = j; 190 if (rss_queue_n > priv->sh->dev_cap.ind_table_max_size) { 191 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)", 192 dev->data->port_id, rss_queue_n); 193 rte_errno = EINVAL; 194 mlx5_free(rss_queue_arr); 195 return -rte_errno; 196 } 197 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u", 198 dev->data->port_id, priv->rxqs_n, rxqs_n); 199 priv->rxqs_n = rxqs_n; 200 /* 201 * If the requested number of RX queues is not a power of two, 202 * use the maximum indirection table size for better balancing. 203 * The result is always rounded to the next power of two. 204 */ 205 reta_idx_n = (1 << log2above((rss_queue_n & (rss_queue_n - 1)) ? 206 priv->sh->dev_cap.ind_table_max_size : 207 rss_queue_n)); 208 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n); 209 if (ret) { 210 mlx5_free(rss_queue_arr); 211 return ret; 212 } 213 /* 214 * When the number of RX queues is not a power of two, 215 * the remaining table entries are padded with reused WQs 216 * and hashes are not spread uniformly. 217 */ 218 for (i = 0, j = 0; (i != reta_idx_n); ++i) { 219 (*priv->reta_idx)[i] = rss_queue_arr[j]; 220 if (++j == rss_queue_n) 221 j = 0; 222 } 223 mlx5_free(rss_queue_arr); 224 return ret; 225 } 226 227 /** 228 * Sets default tuning parameters. 229 * 230 * @param dev 231 * Pointer to Ethernet device. 232 * @param[out] info 233 * Info structure output buffer. 234 */ 235 static void 236 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 237 { 238 struct mlx5_priv *priv = dev->data->dev_private; 239 240 /* Minimum CPU utilization. */ 241 info->default_rxportconf.ring_size = 256; 242 info->default_txportconf.ring_size = 256; 243 info->default_rxportconf.burst_size = MLX5_RX_DEFAULT_BURST; 244 info->default_txportconf.burst_size = MLX5_TX_DEFAULT_BURST; 245 if ((priv->link_speed_capa & RTE_ETH_LINK_SPEED_200G) | 246 (priv->link_speed_capa & RTE_ETH_LINK_SPEED_100G)) { 247 info->default_rxportconf.nb_queues = 16; 248 info->default_txportconf.nb_queues = 16; 249 if (dev->data->nb_rx_queues > 2 || 250 dev->data->nb_tx_queues > 2) { 251 /* Max Throughput. */ 252 info->default_rxportconf.ring_size = 2048; 253 info->default_txportconf.ring_size = 2048; 254 } 255 } else { 256 info->default_rxportconf.nb_queues = 8; 257 info->default_txportconf.nb_queues = 8; 258 if (dev->data->nb_rx_queues > 2 || 259 dev->data->nb_tx_queues > 2) { 260 /* Max Throughput. */ 261 info->default_rxportconf.ring_size = 4096; 262 info->default_txportconf.ring_size = 4096; 263 } 264 } 265 } 266 267 /** 268 * Sets tx mbuf limiting parameters. 269 * 270 * @param dev 271 * Pointer to Ethernet device. 272 * @param[out] info 273 * Info structure output buffer. 274 */ 275 static void 276 mlx5_set_txlimit_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 277 { 278 struct mlx5_priv *priv = dev->data->dev_private; 279 struct mlx5_port_config *config = &priv->config; 280 unsigned int inlen; 281 uint16_t nb_max; 282 283 inlen = (config->txq_inline_max == MLX5_ARG_UNSET) ? 284 MLX5_SEND_DEF_INLINE_LEN : 285 (unsigned int)config->txq_inline_max; 286 MLX5_ASSERT(config->txq_inline_min >= 0); 287 inlen = RTE_MAX(inlen, (unsigned int)config->txq_inline_min); 288 inlen = RTE_MIN(inlen, MLX5_WQE_SIZE_MAX + 289 MLX5_ESEG_MIN_INLINE_SIZE - 290 MLX5_WQE_CSEG_SIZE - 291 MLX5_WQE_ESEG_SIZE - 292 MLX5_WQE_DSEG_SIZE * 2); 293 nb_max = (MLX5_WQE_SIZE_MAX + 294 MLX5_ESEG_MIN_INLINE_SIZE - 295 MLX5_WQE_CSEG_SIZE - 296 MLX5_WQE_ESEG_SIZE - 297 MLX5_WQE_DSEG_SIZE - 298 inlen) / MLX5_WSEG_SIZE; 299 info->tx_desc_lim.nb_seg_max = nb_max; 300 info->tx_desc_lim.nb_mtu_seg_max = nb_max; 301 } 302 303 /** 304 * DPDK callback to get information about the device. 305 * 306 * @param dev 307 * Pointer to Ethernet device structure. 308 * @param[out] info 309 * Info structure output buffer. 310 */ 311 int 312 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 313 { 314 struct mlx5_priv *priv = dev->data->dev_private; 315 unsigned int max; 316 317 /* FIXME: we should ask the device for these values. */ 318 info->min_rx_bufsize = 32; 319 info->max_rx_pktlen = 65536; 320 info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE; 321 /* 322 * Since we need one CQ per QP, the limit is the minimum number 323 * between the two values. 324 */ 325 max = RTE_MIN(priv->sh->dev_cap.max_cq, priv->sh->dev_cap.max_qp); 326 /* max_rx_queues is uint16_t. */ 327 max = RTE_MIN(max, (unsigned int)UINT16_MAX); 328 info->max_rx_queues = max; 329 info->max_tx_queues = max; 330 info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES; 331 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev); 332 info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG; 333 info->rx_seg_capa.multi_pools = !priv->config.mprq.enabled; 334 info->rx_seg_capa.offset_allowed = !priv->config.mprq.enabled; 335 info->rx_seg_capa.offset_align_log2 = 0; 336 info->rx_offload_capa = (mlx5_get_rx_port_offloads() | 337 info->rx_queue_offload_capa); 338 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev); 339 info->dev_capa = RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP; 340 info->if_index = mlx5_ifindex(dev); 341 info->reta_size = priv->reta_idx_n ? 342 priv->reta_idx_n : priv->sh->dev_cap.ind_table_max_size; 343 info->hash_key_size = MLX5_RSS_HASH_KEY_LEN; 344 info->speed_capa = priv->link_speed_capa; 345 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK; 346 mlx5_set_default_params(dev, info); 347 mlx5_set_txlimit_params(dev, info); 348 if (priv->sh->cdev->config.hca_attr.mem_rq_rmp && 349 priv->obj_ops.rxq_obj_new == devx_obj_ops.rxq_obj_new) 350 info->dev_capa |= RTE_ETH_DEV_CAPA_RXQ_SHARE; 351 info->switch_info.name = dev->data->name; 352 info->switch_info.domain_id = priv->domain_id; 353 info->switch_info.port_id = priv->representor_id; 354 info->switch_info.rx_domain = 0; /* No sub Rx domains. */ 355 if (priv->representor) { 356 uint16_t port_id; 357 358 MLX5_ETH_FOREACH_DEV(port_id, dev->device) { 359 struct mlx5_priv *opriv = 360 rte_eth_devices[port_id].data->dev_private; 361 362 if (!opriv || 363 opriv->representor || 364 opriv->sh != priv->sh || 365 opriv->domain_id != priv->domain_id) 366 continue; 367 /* 368 * Override switch name with that of the master 369 * device. 370 */ 371 info->switch_info.name = opriv->dev_data->name; 372 break; 373 } 374 } 375 return 0; 376 } 377 378 /** 379 * Calculate representor ID from port switch info. 380 * 381 * Uint16 representor ID bits definition: 382 * pf: 2 383 * type: 2 384 * vf/sf: 12 385 * 386 * @param info 387 * Port switch info. 388 * @param hpf_type 389 * Use this type if port is HPF. 390 * 391 * @return 392 * Encoded representor ID. 393 */ 394 uint16_t 395 mlx5_representor_id_encode(const struct mlx5_switch_info *info, 396 enum rte_eth_representor_type hpf_type) 397 { 398 enum rte_eth_representor_type type = RTE_ETH_REPRESENTOR_VF; 399 uint16_t repr = info->port_name; 400 401 if (info->representor == 0) 402 return UINT16_MAX; 403 if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFSF) 404 type = RTE_ETH_REPRESENTOR_SF; 405 if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF) { 406 type = hpf_type; 407 repr = UINT16_MAX; 408 } 409 return MLX5_REPRESENTOR_ID(info->pf_num, type, repr); 410 } 411 412 /** 413 * DPDK callback to get information about representor. 414 * 415 * Representor ID bits definition: 416 * vf/sf: 12 417 * type: 2 418 * pf: 2 419 * 420 * @param dev 421 * Pointer to Ethernet device structure. 422 * @param[out] info 423 * Nullable info structure output buffer. 424 * 425 * @return 426 * negative on error, or the number of representor ranges. 427 */ 428 int 429 mlx5_representor_info_get(struct rte_eth_dev *dev, 430 struct rte_eth_representor_info *info) 431 { 432 struct mlx5_priv *priv = dev->data->dev_private; 433 int n_type = 4; /* Representor types, VF, HPF@VF, SF and HPF@SF. */ 434 int n_pf = 2; /* Number of PFs. */ 435 int i = 0, pf; 436 int n_entries; 437 438 if (info == NULL) 439 goto out; 440 441 n_entries = n_type * n_pf; 442 if ((uint32_t)n_entries > info->nb_ranges_alloc) 443 n_entries = info->nb_ranges_alloc; 444 445 info->controller = 0; 446 info->pf = priv->pf_bond >= 0 ? priv->pf_bond : 0; 447 for (pf = 0; pf < n_pf; ++pf) { 448 /* VF range. */ 449 info->ranges[i].type = RTE_ETH_REPRESENTOR_VF; 450 info->ranges[i].controller = 0; 451 info->ranges[i].pf = pf; 452 info->ranges[i].vf = 0; 453 info->ranges[i].id_base = 454 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0); 455 info->ranges[i].id_end = 456 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1); 457 snprintf(info->ranges[i].name, 458 sizeof(info->ranges[i].name), "pf%dvf", pf); 459 i++; 460 if (i == n_entries) 461 break; 462 /* HPF range of VF type. */ 463 info->ranges[i].type = RTE_ETH_REPRESENTOR_VF; 464 info->ranges[i].controller = 0; 465 info->ranges[i].pf = pf; 466 info->ranges[i].vf = UINT16_MAX; 467 info->ranges[i].id_base = 468 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1); 469 info->ranges[i].id_end = 470 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1); 471 snprintf(info->ranges[i].name, 472 sizeof(info->ranges[i].name), "pf%dvf", pf); 473 i++; 474 if (i == n_entries) 475 break; 476 /* SF range. */ 477 info->ranges[i].type = RTE_ETH_REPRESENTOR_SF; 478 info->ranges[i].controller = 0; 479 info->ranges[i].pf = pf; 480 info->ranges[i].vf = 0; 481 info->ranges[i].id_base = 482 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0); 483 info->ranges[i].id_end = 484 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1); 485 snprintf(info->ranges[i].name, 486 sizeof(info->ranges[i].name), "pf%dsf", pf); 487 i++; 488 if (i == n_entries) 489 break; 490 /* HPF range of SF type. */ 491 info->ranges[i].type = RTE_ETH_REPRESENTOR_SF; 492 info->ranges[i].controller = 0; 493 info->ranges[i].pf = pf; 494 info->ranges[i].vf = UINT16_MAX; 495 info->ranges[i].id_base = 496 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1); 497 info->ranges[i].id_end = 498 MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1); 499 snprintf(info->ranges[i].name, 500 sizeof(info->ranges[i].name), "pf%dsf", pf); 501 i++; 502 if (i == n_entries) 503 break; 504 } 505 info->nb_ranges = i; 506 out: 507 return n_type * n_pf; 508 } 509 510 /** 511 * Get firmware version of a device. 512 * 513 * @param dev 514 * Ethernet device port. 515 * @param fw_ver 516 * String output allocated by caller. 517 * @param fw_size 518 * Size of the output string, including terminating null byte. 519 * 520 * @return 521 * 0 on success, or the size of the non truncated string if too big. 522 */ 523 int 524 mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size) 525 { 526 struct mlx5_priv *priv = dev->data->dev_private; 527 struct mlx5_dev_cap *attr = &priv->sh->dev_cap; 528 size_t size = strnlen(attr->fw_ver, sizeof(attr->fw_ver)) + 1; 529 530 if (fw_size < size) 531 return size; 532 if (fw_ver != NULL) 533 strlcpy(fw_ver, attr->fw_ver, fw_size); 534 return 0; 535 } 536 537 /** 538 * Get supported packet types. 539 * 540 * @param dev 541 * Pointer to Ethernet device structure. 542 * 543 * @return 544 * A pointer to the supported Packet types array. 545 */ 546 const uint32_t * 547 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev) 548 { 549 static const uint32_t ptypes[] = { 550 /* refers to rxq_cq_to_pkt_type() */ 551 RTE_PTYPE_L2_ETHER, 552 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 553 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 554 RTE_PTYPE_L4_NONFRAG, 555 RTE_PTYPE_L4_FRAG, 556 RTE_PTYPE_L4_TCP, 557 RTE_PTYPE_L4_UDP, 558 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN, 559 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN, 560 RTE_PTYPE_INNER_L4_NONFRAG, 561 RTE_PTYPE_INNER_L4_FRAG, 562 RTE_PTYPE_INNER_L4_TCP, 563 RTE_PTYPE_INNER_L4_UDP, 564 RTE_PTYPE_UNKNOWN 565 }; 566 567 if (dev->rx_pkt_burst == mlx5_rx_burst || 568 dev->rx_pkt_burst == mlx5_rx_burst_mprq || 569 dev->rx_pkt_burst == mlx5_rx_burst_vec || 570 dev->rx_pkt_burst == mlx5_rx_burst_mprq_vec) 571 return ptypes; 572 return NULL; 573 } 574 575 /** 576 * DPDK callback to change the MTU. 577 * 578 * @param dev 579 * Pointer to Ethernet device structure. 580 * @param in_mtu 581 * New MTU. 582 * 583 * @return 584 * 0 on success, a negative errno value otherwise and rte_errno is set. 585 */ 586 int 587 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 588 { 589 struct mlx5_priv *priv = dev->data->dev_private; 590 uint16_t kern_mtu = 0; 591 int ret; 592 593 ret = mlx5_get_mtu(dev, &kern_mtu); 594 if (ret) 595 return ret; 596 /* Set kernel interface MTU first. */ 597 ret = mlx5_set_mtu(dev, mtu); 598 if (ret) 599 return ret; 600 ret = mlx5_get_mtu(dev, &kern_mtu); 601 if (ret) 602 return ret; 603 if (kern_mtu == mtu) { 604 priv->mtu = mtu; 605 DRV_LOG(DEBUG, "port %u adapter MTU set to %u", 606 dev->data->port_id, mtu); 607 return 0; 608 } 609 rte_errno = EAGAIN; 610 return -rte_errno; 611 } 612 613 /** 614 * Configure the RX function to use. 615 * 616 * @param dev 617 * Pointer to private data structure. 618 * 619 * @return 620 * Pointer to selected Rx burst function. 621 */ 622 eth_rx_burst_t 623 mlx5_select_rx_function(struct rte_eth_dev *dev) 624 { 625 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst; 626 627 MLX5_ASSERT(dev != NULL); 628 if (mlx5_check_vec_rx_support(dev) > 0) { 629 if (mlx5_mprq_enabled(dev)) { 630 rx_pkt_burst = mlx5_rx_burst_mprq_vec; 631 DRV_LOG(DEBUG, "port %u selected vectorized" 632 " MPRQ Rx function", dev->data->port_id); 633 } else { 634 rx_pkt_burst = mlx5_rx_burst_vec; 635 DRV_LOG(DEBUG, "port %u selected vectorized" 636 " SPRQ Rx function", dev->data->port_id); 637 } 638 } else if (mlx5_mprq_enabled(dev)) { 639 rx_pkt_burst = mlx5_rx_burst_mprq; 640 DRV_LOG(DEBUG, "port %u selected MPRQ Rx function", 641 dev->data->port_id); 642 } else { 643 DRV_LOG(DEBUG, "port %u selected SPRQ Rx function", 644 dev->data->port_id); 645 } 646 return rx_pkt_burst; 647 } 648 649 /** 650 * Get the E-Switch parameters by port id. 651 * 652 * @param[in] port 653 * Device port id. 654 * @param[in] valid 655 * Device port id is valid, skip check. This flag is useful 656 * when trials are performed from probing and device is not 657 * flagged as valid yet (in attaching process). 658 * @param[out] es_domain_id 659 * E-Switch domain id. 660 * @param[out] es_port_id 661 * The port id of the port in the E-Switch. 662 * 663 * @return 664 * pointer to device private data structure containing data needed 665 * on success, NULL otherwise and rte_errno is set. 666 */ 667 struct mlx5_priv * 668 mlx5_port_to_eswitch_info(uint16_t port, bool valid) 669 { 670 struct rte_eth_dev *dev; 671 struct mlx5_priv *priv; 672 673 if (port >= RTE_MAX_ETHPORTS) { 674 rte_errno = EINVAL; 675 return NULL; 676 } 677 if (!valid && !rte_eth_dev_is_valid_port(port)) { 678 rte_errno = ENODEV; 679 return NULL; 680 } 681 dev = &rte_eth_devices[port]; 682 priv = dev->data->dev_private; 683 if (!priv->sh->esw_mode) { 684 rte_errno = EINVAL; 685 return NULL; 686 } 687 return priv; 688 } 689 690 /** 691 * Get the E-Switch parameters by device instance. 692 * 693 * @param[in] port 694 * Device port id. 695 * @param[out] es_domain_id 696 * E-Switch domain id. 697 * @param[out] es_port_id 698 * The port id of the port in the E-Switch. 699 * 700 * @return 701 * pointer to device private data structure containing data needed 702 * on success, NULL otherwise and rte_errno is set. 703 */ 704 struct mlx5_priv * 705 mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev) 706 { 707 struct mlx5_priv *priv; 708 709 priv = dev->data->dev_private; 710 if (!priv->sh->esw_mode) { 711 rte_errno = EINVAL; 712 return NULL; 713 } 714 return priv; 715 } 716 717 /** 718 * DPDK callback to retrieve hairpin capabilities. 719 * 720 * @param dev 721 * Pointer to Ethernet device structure. 722 * @param[out] cap 723 * Storage for hairpin capability data. 724 * 725 * @return 726 * 0 on success, a negative errno value otherwise and rte_errno is set. 727 */ 728 int 729 mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap) 730 { 731 struct mlx5_priv *priv = dev->data->dev_private; 732 733 if (!mlx5_devx_obj_ops_en(priv->sh)) { 734 rte_errno = ENOTSUP; 735 return -rte_errno; 736 } 737 cap->max_nb_queues = UINT16_MAX; 738 cap->max_rx_2_tx = 1; 739 cap->max_tx_2_rx = 1; 740 cap->max_nb_desc = 8192; 741 return 0; 742 } 743