1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox Technologies, Ltd 4 */ 5 6 #define _GNU_SOURCE 7 8 #include <stddef.h> 9 #include <assert.h> 10 #include <inttypes.h> 11 #include <unistd.h> 12 #include <stdint.h> 13 #include <stdio.h> 14 #include <string.h> 15 #include <stdlib.h> 16 #include <errno.h> 17 #include <dirent.h> 18 #include <net/if.h> 19 #include <sys/ioctl.h> 20 #include <sys/socket.h> 21 #include <netinet/in.h> 22 #include <linux/ethtool.h> 23 #include <linux/sockios.h> 24 #include <fcntl.h> 25 #include <stdalign.h> 26 #include <sys/un.h> 27 #include <time.h> 28 29 #include <rte_atomic.h> 30 #include <rte_ethdev_driver.h> 31 #include <rte_bus_pci.h> 32 #include <rte_mbuf.h> 33 #include <rte_common.h> 34 #include <rte_interrupts.h> 35 #include <rte_malloc.h> 36 #include <rte_string_fns.h> 37 #include <rte_rwlock.h> 38 39 #include "mlx5.h" 40 #include "mlx5_glue.h" 41 #include "mlx5_rxtx.h" 42 #include "mlx5_utils.h" 43 44 /* Add defines in case the running kernel is not the same as user headers. */ 45 #ifndef ETHTOOL_GLINKSETTINGS 46 struct ethtool_link_settings { 47 uint32_t cmd; 48 uint32_t speed; 49 uint8_t duplex; 50 uint8_t port; 51 uint8_t phy_address; 52 uint8_t autoneg; 53 uint8_t mdio_support; 54 uint8_t eth_to_mdix; 55 uint8_t eth_tp_mdix_ctrl; 56 int8_t link_mode_masks_nwords; 57 uint32_t reserved[8]; 58 uint32_t link_mode_masks[]; 59 }; 60 61 #define ETHTOOL_GLINKSETTINGS 0x0000004c 62 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5 63 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6 64 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17 65 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18 66 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19 67 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20 68 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21 69 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22 70 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23 71 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24 72 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25 73 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26 74 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27 75 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28 76 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29 77 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30 78 #endif 79 #ifndef HAVE_ETHTOOL_LINK_MODE_25G 80 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31 81 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32 82 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33 83 #endif 84 #ifndef HAVE_ETHTOOL_LINK_MODE_50G 85 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34 86 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35 87 #endif 88 #ifndef HAVE_ETHTOOL_LINK_MODE_100G 89 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36 90 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37 91 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38 92 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39 93 #endif 94 95 /** 96 * Get interface name from private structure. 97 * 98 * @param[in] dev 99 * Pointer to Ethernet device. 100 * @param[out] ifname 101 * Interface name output buffer. 102 * 103 * @return 104 * 0 on success, a negative errno value otherwise and rte_errno is set. 105 */ 106 int 107 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]) 108 { 109 struct priv *priv = dev->data->dev_private; 110 DIR *dir; 111 struct dirent *dent; 112 unsigned int dev_type = 0; 113 unsigned int dev_port_prev = ~0u; 114 char match[IF_NAMESIZE] = ""; 115 116 { 117 MKSTR(path, "%s/device/net", priv->ibdev_path); 118 119 dir = opendir(path); 120 if (dir == NULL) { 121 rte_errno = errno; 122 return -rte_errno; 123 } 124 } 125 while ((dent = readdir(dir)) != NULL) { 126 char *name = dent->d_name; 127 FILE *file; 128 unsigned int dev_port; 129 int r; 130 131 if ((name[0] == '.') && 132 ((name[1] == '\0') || 133 ((name[1] == '.') && (name[2] == '\0')))) 134 continue; 135 136 MKSTR(path, "%s/device/net/%s/%s", 137 priv->ibdev_path, name, 138 (dev_type ? "dev_id" : "dev_port")); 139 140 file = fopen(path, "rb"); 141 if (file == NULL) { 142 if (errno != ENOENT) 143 continue; 144 /* 145 * Switch to dev_id when dev_port does not exist as 146 * is the case with Linux kernel versions < 3.15. 147 */ 148 try_dev_id: 149 match[0] = '\0'; 150 if (dev_type) 151 break; 152 dev_type = 1; 153 dev_port_prev = ~0u; 154 rewinddir(dir); 155 continue; 156 } 157 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port); 158 fclose(file); 159 if (r != 1) 160 continue; 161 /* 162 * Switch to dev_id when dev_port returns the same value for 163 * all ports. May happen when using a MOFED release older than 164 * 3.0 with a Linux kernel >= 3.15. 165 */ 166 if (dev_port == dev_port_prev) 167 goto try_dev_id; 168 dev_port_prev = dev_port; 169 if (dev_port == (priv->port - 1u)) 170 strlcpy(match, name, sizeof(match)); 171 } 172 closedir(dir); 173 if (match[0] == '\0') { 174 rte_errno = ENOENT; 175 return -rte_errno; 176 } 177 strncpy(*ifname, match, sizeof(*ifname)); 178 return 0; 179 } 180 181 /** 182 * Get the interface index from device name. 183 * 184 * @param[in] dev 185 * Pointer to Ethernet device. 186 * 187 * @return 188 * Interface index on success, a negative errno value otherwise and 189 * rte_errno is set. 190 */ 191 int 192 mlx5_ifindex(const struct rte_eth_dev *dev) 193 { 194 char ifname[IF_NAMESIZE]; 195 unsigned int ret; 196 197 ret = mlx5_get_ifname(dev, &ifname); 198 if (ret) 199 return ret; 200 ret = if_nametoindex(ifname); 201 if (ret == 0) { 202 rte_errno = errno; 203 return -rte_errno; 204 } 205 return ret; 206 } 207 208 /** 209 * Perform ifreq ioctl() on associated Ethernet device. 210 * 211 * @param[in] dev 212 * Pointer to Ethernet device. 213 * @param req 214 * Request number to pass to ioctl(). 215 * @param[out] ifr 216 * Interface request structure output buffer. 217 * 218 * @return 219 * 0 on success, a negative errno value otherwise and rte_errno is set. 220 */ 221 int 222 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr) 223 { 224 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP); 225 int ret = 0; 226 227 if (sock == -1) { 228 rte_errno = errno; 229 return -rte_errno; 230 } 231 ret = mlx5_get_ifname(dev, &ifr->ifr_name); 232 if (ret) 233 goto error; 234 ret = ioctl(sock, req, ifr); 235 if (ret == -1) { 236 rte_errno = errno; 237 goto error; 238 } 239 close(sock); 240 return 0; 241 error: 242 close(sock); 243 return -rte_errno; 244 } 245 246 /** 247 * Get device MTU. 248 * 249 * @param dev 250 * Pointer to Ethernet device. 251 * @param[out] mtu 252 * MTU value output buffer. 253 * 254 * @return 255 * 0 on success, a negative errno value otherwise and rte_errno is set. 256 */ 257 int 258 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu) 259 { 260 struct ifreq request; 261 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request); 262 263 if (ret) 264 return ret; 265 *mtu = request.ifr_mtu; 266 return 0; 267 } 268 269 /** 270 * Set device MTU. 271 * 272 * @param dev 273 * Pointer to Ethernet device. 274 * @param mtu 275 * MTU value to set. 276 * 277 * @return 278 * 0 on success, a negative errno value otherwise and rte_errno is set. 279 */ 280 static int 281 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 282 { 283 struct ifreq request = { .ifr_mtu = mtu, }; 284 285 return mlx5_ifreq(dev, SIOCSIFMTU, &request); 286 } 287 288 /** 289 * Set device flags. 290 * 291 * @param dev 292 * Pointer to Ethernet device. 293 * @param keep 294 * Bitmask for flags that must remain untouched. 295 * @param flags 296 * Bitmask for flags to modify. 297 * 298 * @return 299 * 0 on success, a negative errno value otherwise and rte_errno is set. 300 */ 301 int 302 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags) 303 { 304 struct ifreq request; 305 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request); 306 307 if (ret) 308 return ret; 309 request.ifr_flags &= keep; 310 request.ifr_flags |= flags & ~keep; 311 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request); 312 } 313 314 /** 315 * DPDK callback for Ethernet device configuration. 316 * 317 * @param dev 318 * Pointer to Ethernet device structure. 319 * 320 * @return 321 * 0 on success, a negative errno value otherwise and rte_errno is set. 322 */ 323 int 324 mlx5_dev_configure(struct rte_eth_dev *dev) 325 { 326 struct priv *priv = dev->data->dev_private; 327 unsigned int rxqs_n = dev->data->nb_rx_queues; 328 unsigned int txqs_n = dev->data->nb_tx_queues; 329 unsigned int i; 330 unsigned int j; 331 unsigned int reta_idx_n; 332 const uint8_t use_app_rss_key = 333 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key; 334 int ret = 0; 335 336 if (use_app_rss_key && 337 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len != 338 rss_hash_default_key_len)) { 339 DRV_LOG(ERR, "port %u RSS key len must be %zu Bytes long", 340 dev->data->port_id, rss_hash_default_key_len); 341 rte_errno = EINVAL; 342 return -rte_errno; 343 } 344 priv->rss_conf.rss_key = 345 rte_realloc(priv->rss_conf.rss_key, 346 rss_hash_default_key_len, 0); 347 if (!priv->rss_conf.rss_key) { 348 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)", 349 dev->data->port_id, rxqs_n); 350 rte_errno = ENOMEM; 351 return -rte_errno; 352 } 353 memcpy(priv->rss_conf.rss_key, 354 use_app_rss_key ? 355 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key : 356 rss_hash_default_key, 357 rss_hash_default_key_len); 358 priv->rss_conf.rss_key_len = rss_hash_default_key_len; 359 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; 360 priv->rxqs = (void *)dev->data->rx_queues; 361 priv->txqs = (void *)dev->data->tx_queues; 362 if (txqs_n != priv->txqs_n) { 363 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u", 364 dev->data->port_id, priv->txqs_n, txqs_n); 365 priv->txqs_n = txqs_n; 366 } 367 if (rxqs_n > priv->config.ind_table_max_size) { 368 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)", 369 dev->data->port_id, rxqs_n); 370 rte_errno = EINVAL; 371 return -rte_errno; 372 } 373 if (rxqs_n == priv->rxqs_n) 374 return 0; 375 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u", 376 dev->data->port_id, priv->rxqs_n, rxqs_n); 377 priv->rxqs_n = rxqs_n; 378 /* If the requested number of RX queues is not a power of two, use the 379 * maximum indirection table size for better balancing. 380 * The result is always rounded to the next power of two. */ 381 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ? 382 priv->config.ind_table_max_size : 383 rxqs_n)); 384 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n); 385 if (ret) 386 return ret; 387 /* When the number of RX queues is not a power of two, the remaining 388 * table entries are padded with reused WQs and hashes are not spread 389 * uniformly. */ 390 for (i = 0, j = 0; (i != reta_idx_n); ++i) { 391 (*priv->reta_idx)[i] = j; 392 if (++j == rxqs_n) 393 j = 0; 394 } 395 return 0; 396 } 397 398 /** 399 * Sets default tuning parameters. 400 * 401 * @param dev 402 * Pointer to Ethernet device. 403 * @param[out] info 404 * Info structure output buffer. 405 */ 406 static void 407 mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 408 { 409 struct priv *priv = dev->data->dev_private; 410 411 /* Minimum CPU utilization. */ 412 info->default_rxportconf.ring_size = 256; 413 info->default_txportconf.ring_size = 256; 414 info->default_rxportconf.burst_size = 64; 415 info->default_txportconf.burst_size = 64; 416 if (priv->link_speed_capa & ETH_LINK_SPEED_100G) { 417 info->default_rxportconf.nb_queues = 16; 418 info->default_txportconf.nb_queues = 16; 419 if (dev->data->nb_rx_queues > 2 || 420 dev->data->nb_tx_queues > 2) { 421 /* Max Throughput. */ 422 info->default_rxportconf.ring_size = 2048; 423 info->default_txportconf.ring_size = 2048; 424 } 425 } else { 426 info->default_rxportconf.nb_queues = 8; 427 info->default_txportconf.nb_queues = 8; 428 if (dev->data->nb_rx_queues > 2 || 429 dev->data->nb_tx_queues > 2) { 430 /* Max Throughput. */ 431 info->default_rxportconf.ring_size = 4096; 432 info->default_txportconf.ring_size = 4096; 433 } 434 } 435 } 436 437 /** 438 * DPDK callback to get information about the device. 439 * 440 * @param dev 441 * Pointer to Ethernet device structure. 442 * @param[out] info 443 * Info structure output buffer. 444 */ 445 void 446 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 447 { 448 struct priv *priv = dev->data->dev_private; 449 struct mlx5_dev_config *config = &priv->config; 450 unsigned int max; 451 char ifname[IF_NAMESIZE]; 452 453 /* FIXME: we should ask the device for these values. */ 454 info->min_rx_bufsize = 32; 455 info->max_rx_pktlen = 65536; 456 /* 457 * Since we need one CQ per QP, the limit is the minimum number 458 * between the two values. 459 */ 460 max = RTE_MIN(priv->device_attr.orig_attr.max_cq, 461 priv->device_attr.orig_attr.max_qp); 462 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */ 463 if (max >= 65535) 464 max = 65535; 465 info->max_rx_queues = max; 466 info->max_tx_queues = max; 467 info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES; 468 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev); 469 info->rx_offload_capa = (mlx5_get_rx_port_offloads() | 470 info->rx_queue_offload_capa); 471 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev); 472 if (mlx5_get_ifname(dev, &ifname) == 0) 473 info->if_index = if_nametoindex(ifname); 474 info->reta_size = priv->reta_idx_n ? 475 priv->reta_idx_n : config->ind_table_max_size; 476 info->hash_key_size = rss_hash_default_key_len; 477 info->speed_capa = priv->link_speed_capa; 478 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK; 479 mlx5_set_default_params(dev, info); 480 } 481 482 /** 483 * Get supported packet types. 484 * 485 * @param dev 486 * Pointer to Ethernet device structure. 487 * 488 * @return 489 * A pointer to the supported Packet types array. 490 */ 491 const uint32_t * 492 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev) 493 { 494 static const uint32_t ptypes[] = { 495 /* refers to rxq_cq_to_pkt_type() */ 496 RTE_PTYPE_L2_ETHER, 497 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 498 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 499 RTE_PTYPE_L4_NONFRAG, 500 RTE_PTYPE_L4_FRAG, 501 RTE_PTYPE_L4_TCP, 502 RTE_PTYPE_L4_UDP, 503 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN, 504 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN, 505 RTE_PTYPE_INNER_L4_NONFRAG, 506 RTE_PTYPE_INNER_L4_FRAG, 507 RTE_PTYPE_INNER_L4_TCP, 508 RTE_PTYPE_INNER_L4_UDP, 509 RTE_PTYPE_UNKNOWN 510 }; 511 512 if (dev->rx_pkt_burst == mlx5_rx_burst || 513 dev->rx_pkt_burst == mlx5_rx_burst_mprq || 514 dev->rx_pkt_burst == mlx5_rx_burst_vec) 515 return ptypes; 516 return NULL; 517 } 518 519 /** 520 * DPDK callback to retrieve physical link information. 521 * 522 * @param dev 523 * Pointer to Ethernet device structure. 524 * @param[out] link 525 * Storage for current link status. 526 * 527 * @return 528 * 0 on success, a negative errno value otherwise and rte_errno is set. 529 */ 530 static int 531 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev, 532 struct rte_eth_link *link) 533 { 534 struct priv *priv = dev->data->dev_private; 535 struct ethtool_cmd edata = { 536 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */ 537 }; 538 struct ifreq ifr; 539 struct rte_eth_link dev_link; 540 int link_speed = 0; 541 int ret; 542 543 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 544 if (ret) { 545 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s", 546 dev->data->port_id, strerror(rte_errno)); 547 return ret; 548 } 549 memset(&dev_link, 0, sizeof(dev_link)); 550 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) && 551 (ifr.ifr_flags & IFF_RUNNING)); 552 ifr.ifr_data = (void *)&edata; 553 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 554 if (ret) { 555 DRV_LOG(WARNING, 556 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s", 557 dev->data->port_id, strerror(rte_errno)); 558 return ret; 559 } 560 link_speed = ethtool_cmd_speed(&edata); 561 if (link_speed == -1) 562 dev_link.link_speed = ETH_SPEED_NUM_NONE; 563 else 564 dev_link.link_speed = link_speed; 565 priv->link_speed_capa = 0; 566 if (edata.supported & SUPPORTED_Autoneg) 567 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 568 if (edata.supported & (SUPPORTED_1000baseT_Full | 569 SUPPORTED_1000baseKX_Full)) 570 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 571 if (edata.supported & SUPPORTED_10000baseKR_Full) 572 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 573 if (edata.supported & (SUPPORTED_40000baseKR4_Full | 574 SUPPORTED_40000baseCR4_Full | 575 SUPPORTED_40000baseSR4_Full | 576 SUPPORTED_40000baseLR4_Full)) 577 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 578 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ? 579 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 580 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 581 ETH_LINK_SPEED_FIXED); 582 if ((dev_link.link_speed && !dev_link.link_status) || 583 (!dev_link.link_speed && dev_link.link_status)) { 584 rte_errno = EAGAIN; 585 return -rte_errno; 586 } 587 *link = dev_link; 588 return 0; 589 } 590 591 /** 592 * Retrieve physical link information (unlocked version using new ioctl). 593 * 594 * @param dev 595 * Pointer to Ethernet device structure. 596 * @param[out] link 597 * Storage for current link status. 598 * 599 * @return 600 * 0 on success, a negative errno value otherwise and rte_errno is set. 601 */ 602 static int 603 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, 604 struct rte_eth_link *link) 605 606 { 607 struct priv *priv = dev->data->dev_private; 608 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS }; 609 struct ifreq ifr; 610 struct rte_eth_link dev_link; 611 uint64_t sc; 612 int ret; 613 614 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 615 if (ret) { 616 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s", 617 dev->data->port_id, strerror(rte_errno)); 618 return ret; 619 } 620 memset(&dev_link, 0, sizeof(dev_link)); 621 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) && 622 (ifr.ifr_flags & IFF_RUNNING)); 623 ifr.ifr_data = (void *)&gcmd; 624 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 625 if (ret) { 626 DRV_LOG(DEBUG, 627 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)" 628 " failed: %s", 629 dev->data->port_id, strerror(rte_errno)); 630 return ret; 631 } 632 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords; 633 634 alignas(struct ethtool_link_settings) 635 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) + 636 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3]; 637 struct ethtool_link_settings *ecmd = (void *)data; 638 639 *ecmd = gcmd; 640 ifr.ifr_data = (void *)ecmd; 641 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 642 if (ret) { 643 DRV_LOG(DEBUG, 644 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)" 645 " failed: %s", 646 dev->data->port_id, strerror(rte_errno)); 647 return ret; 648 } 649 dev_link.link_speed = ecmd->speed; 650 sc = ecmd->link_mode_masks[0] | 651 ((uint64_t)ecmd->link_mode_masks[1] << 32); 652 priv->link_speed_capa = 0; 653 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT)) 654 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 655 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) | 656 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT))) 657 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 658 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) | 659 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) | 660 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT))) 661 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 662 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) | 663 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT))) 664 priv->link_speed_capa |= ETH_LINK_SPEED_20G; 665 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) | 666 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) | 667 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) | 668 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT))) 669 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 670 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) | 671 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) | 672 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) | 673 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT))) 674 priv->link_speed_capa |= ETH_LINK_SPEED_56G; 675 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) | 676 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) | 677 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT))) 678 priv->link_speed_capa |= ETH_LINK_SPEED_25G; 679 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) | 680 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT))) 681 priv->link_speed_capa |= ETH_LINK_SPEED_50G; 682 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) | 683 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) | 684 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) | 685 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT))) 686 priv->link_speed_capa |= ETH_LINK_SPEED_100G; 687 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ? 688 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 689 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 690 ETH_LINK_SPEED_FIXED); 691 if ((dev_link.link_speed && !dev_link.link_status) || 692 (!dev_link.link_speed && dev_link.link_status)) { 693 rte_errno = EAGAIN; 694 return -rte_errno; 695 } 696 *link = dev_link; 697 return 0; 698 } 699 700 /** 701 * DPDK callback to retrieve physical link information. 702 * 703 * @param dev 704 * Pointer to Ethernet device structure. 705 * @param wait_to_complete 706 * Wait for request completion. 707 * 708 * @return 709 * 0 if link status was not updated, positive if it was, a negative errno 710 * value otherwise and rte_errno is set. 711 */ 712 int 713 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete) 714 { 715 int ret; 716 struct rte_eth_link dev_link; 717 time_t start_time = time(NULL); 718 719 do { 720 ret = mlx5_link_update_unlocked_gs(dev, &dev_link); 721 if (ret) 722 ret = mlx5_link_update_unlocked_gset(dev, &dev_link); 723 if (ret == 0) 724 break; 725 /* Handle wait to complete situation. */ 726 if (wait_to_complete && ret == -EAGAIN) { 727 if (abs((int)difftime(time(NULL), start_time)) < 728 MLX5_LINK_STATUS_TIMEOUT) { 729 usleep(0); 730 continue; 731 } else { 732 rte_errno = EBUSY; 733 return -rte_errno; 734 } 735 } else if (ret < 0) { 736 return ret; 737 } 738 } while (wait_to_complete); 739 ret = !!memcmp(&dev->data->dev_link, &dev_link, 740 sizeof(struct rte_eth_link)); 741 dev->data->dev_link = dev_link; 742 return ret; 743 } 744 745 /** 746 * DPDK callback to change the MTU. 747 * 748 * @param dev 749 * Pointer to Ethernet device structure. 750 * @param in_mtu 751 * New MTU. 752 * 753 * @return 754 * 0 on success, a negative errno value otherwise and rte_errno is set. 755 */ 756 int 757 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 758 { 759 struct priv *priv = dev->data->dev_private; 760 uint16_t kern_mtu = 0; 761 int ret; 762 763 ret = mlx5_get_mtu(dev, &kern_mtu); 764 if (ret) 765 return ret; 766 /* Set kernel interface MTU first. */ 767 ret = mlx5_set_mtu(dev, mtu); 768 if (ret) 769 return ret; 770 ret = mlx5_get_mtu(dev, &kern_mtu); 771 if (ret) 772 return ret; 773 if (kern_mtu == mtu) { 774 priv->mtu = mtu; 775 DRV_LOG(DEBUG, "port %u adapter MTU set to %u", 776 dev->data->port_id, mtu); 777 return 0; 778 } 779 rte_errno = EAGAIN; 780 return -rte_errno; 781 } 782 783 /** 784 * DPDK callback to get flow control status. 785 * 786 * @param dev 787 * Pointer to Ethernet device structure. 788 * @param[out] fc_conf 789 * Flow control output buffer. 790 * 791 * @return 792 * 0 on success, a negative errno value otherwise and rte_errno is set. 793 */ 794 int 795 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 796 { 797 struct ifreq ifr; 798 struct ethtool_pauseparam ethpause = { 799 .cmd = ETHTOOL_GPAUSEPARAM 800 }; 801 int ret; 802 803 ifr.ifr_data = (void *)ðpause; 804 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 805 if (ret) { 806 DRV_LOG(WARNING, 807 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:" 808 " %s", 809 dev->data->port_id, strerror(rte_errno)); 810 return ret; 811 } 812 fc_conf->autoneg = ethpause.autoneg; 813 if (ethpause.rx_pause && ethpause.tx_pause) 814 fc_conf->mode = RTE_FC_FULL; 815 else if (ethpause.rx_pause) 816 fc_conf->mode = RTE_FC_RX_PAUSE; 817 else if (ethpause.tx_pause) 818 fc_conf->mode = RTE_FC_TX_PAUSE; 819 else 820 fc_conf->mode = RTE_FC_NONE; 821 return 0; 822 } 823 824 /** 825 * DPDK callback to modify flow control parameters. 826 * 827 * @param dev 828 * Pointer to Ethernet device structure. 829 * @param[in] fc_conf 830 * Flow control parameters. 831 * 832 * @return 833 * 0 on success, a negative errno value otherwise and rte_errno is set. 834 */ 835 int 836 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 837 { 838 struct ifreq ifr; 839 struct ethtool_pauseparam ethpause = { 840 .cmd = ETHTOOL_SPAUSEPARAM 841 }; 842 int ret; 843 844 ifr.ifr_data = (void *)ðpause; 845 ethpause.autoneg = fc_conf->autoneg; 846 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 847 (fc_conf->mode & RTE_FC_RX_PAUSE)) 848 ethpause.rx_pause = 1; 849 else 850 ethpause.rx_pause = 0; 851 852 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 853 (fc_conf->mode & RTE_FC_TX_PAUSE)) 854 ethpause.tx_pause = 1; 855 else 856 ethpause.tx_pause = 0; 857 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 858 if (ret) { 859 DRV_LOG(WARNING, 860 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)" 861 " failed: %s", 862 dev->data->port_id, strerror(rte_errno)); 863 return ret; 864 } 865 return 0; 866 } 867 868 /** 869 * Get PCI information from struct ibv_device. 870 * 871 * @param device 872 * Pointer to Ethernet device structure. 873 * @param[out] pci_addr 874 * PCI bus address output buffer. 875 * 876 * @return 877 * 0 on success, a negative errno value otherwise and rte_errno is set. 878 */ 879 int 880 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device, 881 struct rte_pci_addr *pci_addr) 882 { 883 FILE *file; 884 char line[32]; 885 MKSTR(path, "%s/device/uevent", device->ibdev_path); 886 887 file = fopen(path, "rb"); 888 if (file == NULL) { 889 rte_errno = errno; 890 return -rte_errno; 891 } 892 while (fgets(line, sizeof(line), file) == line) { 893 size_t len = strlen(line); 894 int ret; 895 896 /* Truncate long lines. */ 897 if (len == (sizeof(line) - 1)) 898 while (line[(len - 1)] != '\n') { 899 ret = fgetc(file); 900 if (ret == EOF) 901 break; 902 line[(len - 1)] = ret; 903 } 904 /* Extract information. */ 905 if (sscanf(line, 906 "PCI_SLOT_NAME=" 907 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", 908 &pci_addr->domain, 909 &pci_addr->bus, 910 &pci_addr->devid, 911 &pci_addr->function) == 4) { 912 ret = 0; 913 break; 914 } 915 } 916 fclose(file); 917 return 0; 918 } 919 920 /** 921 * Device status handler. 922 * 923 * @param dev 924 * Pointer to Ethernet device. 925 * @param events 926 * Pointer to event flags holder. 927 * 928 * @return 929 * Events bitmap of callback process which can be called immediately. 930 */ 931 static uint32_t 932 mlx5_dev_status_handler(struct rte_eth_dev *dev) 933 { 934 struct priv *priv = dev->data->dev_private; 935 struct ibv_async_event event; 936 uint32_t ret = 0; 937 938 if (mlx5_link_update(dev, 0) == -EAGAIN) { 939 usleep(0); 940 return 0; 941 } 942 /* Read all message and acknowledge them. */ 943 for (;;) { 944 if (mlx5_glue->get_async_event(priv->ctx, &event)) 945 break; 946 if ((event.event_type == IBV_EVENT_PORT_ACTIVE || 947 event.event_type == IBV_EVENT_PORT_ERR) && 948 (dev->data->dev_conf.intr_conf.lsc == 1)) 949 ret |= (1 << RTE_ETH_EVENT_INTR_LSC); 950 else if (event.event_type == IBV_EVENT_DEVICE_FATAL && 951 dev->data->dev_conf.intr_conf.rmv == 1) 952 ret |= (1 << RTE_ETH_EVENT_INTR_RMV); 953 else 954 DRV_LOG(DEBUG, 955 "port %u event type %d on not handled", 956 dev->data->port_id, event.event_type); 957 mlx5_glue->ack_async_event(&event); 958 } 959 return ret; 960 } 961 962 /** 963 * Handle interrupts from the NIC. 964 * 965 * @param[in] intr_handle 966 * Interrupt handler. 967 * @param cb_arg 968 * Callback argument. 969 */ 970 void 971 mlx5_dev_interrupt_handler(void *cb_arg) 972 { 973 struct rte_eth_dev *dev = cb_arg; 974 uint32_t events; 975 976 events = mlx5_dev_status_handler(dev); 977 if (events & (1 << RTE_ETH_EVENT_INTR_LSC)) 978 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); 979 if (events & (1 << RTE_ETH_EVENT_INTR_RMV)) 980 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL); 981 } 982 983 /** 984 * Handle interrupts from the socket. 985 * 986 * @param cb_arg 987 * Callback argument. 988 */ 989 static void 990 mlx5_dev_handler_socket(void *cb_arg) 991 { 992 struct rte_eth_dev *dev = cb_arg; 993 994 mlx5_socket_handle(dev); 995 } 996 997 /** 998 * Uninstall interrupt handler. 999 * 1000 * @param dev 1001 * Pointer to Ethernet device. 1002 */ 1003 void 1004 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev) 1005 { 1006 struct priv *priv = dev->data->dev_private; 1007 1008 if (dev->data->dev_conf.intr_conf.lsc || 1009 dev->data->dev_conf.intr_conf.rmv) 1010 rte_intr_callback_unregister(&priv->intr_handle, 1011 mlx5_dev_interrupt_handler, dev); 1012 if (priv->primary_socket) 1013 rte_intr_callback_unregister(&priv->intr_handle_socket, 1014 mlx5_dev_handler_socket, dev); 1015 priv->intr_handle.fd = 0; 1016 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN; 1017 priv->intr_handle_socket.fd = 0; 1018 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN; 1019 } 1020 1021 /** 1022 * Install interrupt handler. 1023 * 1024 * @param dev 1025 * Pointer to Ethernet device. 1026 */ 1027 void 1028 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev) 1029 { 1030 struct priv *priv = dev->data->dev_private; 1031 int ret; 1032 int flags; 1033 1034 assert(priv->ctx->async_fd > 0); 1035 flags = fcntl(priv->ctx->async_fd, F_GETFL); 1036 ret = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK); 1037 if (ret) { 1038 DRV_LOG(INFO, 1039 "port %u failed to change file descriptor async event" 1040 " queue", 1041 dev->data->port_id); 1042 dev->data->dev_conf.intr_conf.lsc = 0; 1043 dev->data->dev_conf.intr_conf.rmv = 0; 1044 } 1045 if (dev->data->dev_conf.intr_conf.lsc || 1046 dev->data->dev_conf.intr_conf.rmv) { 1047 priv->intr_handle.fd = priv->ctx->async_fd; 1048 priv->intr_handle.type = RTE_INTR_HANDLE_EXT; 1049 rte_intr_callback_register(&priv->intr_handle, 1050 mlx5_dev_interrupt_handler, dev); 1051 } 1052 ret = mlx5_socket_init(dev); 1053 if (ret) 1054 DRV_LOG(ERR, "port %u cannot initialise socket: %s", 1055 dev->data->port_id, strerror(rte_errno)); 1056 else if (priv->primary_socket) { 1057 priv->intr_handle_socket.fd = priv->primary_socket; 1058 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT; 1059 rte_intr_callback_register(&priv->intr_handle_socket, 1060 mlx5_dev_handler_socket, dev); 1061 } 1062 } 1063 1064 /** 1065 * DPDK callback to bring the link DOWN. 1066 * 1067 * @param dev 1068 * Pointer to Ethernet device structure. 1069 * 1070 * @return 1071 * 0 on success, a negative errno value otherwise and rte_errno is set. 1072 */ 1073 int 1074 mlx5_set_link_down(struct rte_eth_dev *dev) 1075 { 1076 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP); 1077 } 1078 1079 /** 1080 * DPDK callback to bring the link UP. 1081 * 1082 * @param dev 1083 * Pointer to Ethernet device structure. 1084 * 1085 * @return 1086 * 0 on success, a negative errno value otherwise and rte_errno is set. 1087 */ 1088 int 1089 mlx5_set_link_up(struct rte_eth_dev *dev) 1090 { 1091 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP); 1092 } 1093 1094 /** 1095 * Configure the TX function to use. 1096 * 1097 * @param dev 1098 * Pointer to private data structure. 1099 * 1100 * @return 1101 * Pointer to selected Tx burst function. 1102 */ 1103 eth_tx_burst_t 1104 mlx5_select_tx_function(struct rte_eth_dev *dev) 1105 { 1106 struct priv *priv = dev->data->dev_private; 1107 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst; 1108 struct mlx5_dev_config *config = &priv->config; 1109 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads; 1110 int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO | 1111 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 1112 DEV_TX_OFFLOAD_GRE_TNL_TSO | 1113 DEV_TX_OFFLOAD_IP_TNL_TSO | 1114 DEV_TX_OFFLOAD_UDP_TNL_TSO)); 1115 int swp = !!(tx_offloads & (DEV_TX_OFFLOAD_IP_TNL_TSO | 1116 DEV_TX_OFFLOAD_UDP_TNL_TSO | 1117 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM)); 1118 int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT); 1119 1120 assert(priv != NULL); 1121 /* Select appropriate TX function. */ 1122 if (vlan_insert || tso || swp) 1123 return tx_pkt_burst; 1124 if (config->mps == MLX5_MPW_ENHANCED) { 1125 if (mlx5_check_vec_tx_support(dev) > 0) { 1126 if (mlx5_check_raw_vec_tx_support(dev) > 0) 1127 tx_pkt_burst = mlx5_tx_burst_raw_vec; 1128 else 1129 tx_pkt_burst = mlx5_tx_burst_vec; 1130 DRV_LOG(DEBUG, 1131 "port %u selected enhanced MPW Tx vectorized" 1132 " function", 1133 dev->data->port_id); 1134 } else { 1135 tx_pkt_burst = mlx5_tx_burst_empw; 1136 DRV_LOG(DEBUG, 1137 "port %u selected enhanced MPW Tx function", 1138 dev->data->port_id); 1139 } 1140 } else if (config->mps && (config->txq_inline > 0)) { 1141 tx_pkt_burst = mlx5_tx_burst_mpw_inline; 1142 DRV_LOG(DEBUG, "port %u selected MPW inline Tx function", 1143 dev->data->port_id); 1144 } else if (config->mps) { 1145 tx_pkt_burst = mlx5_tx_burst_mpw; 1146 DRV_LOG(DEBUG, "port %u selected MPW Tx function", 1147 dev->data->port_id); 1148 } 1149 return tx_pkt_burst; 1150 } 1151 1152 /** 1153 * Configure the RX function to use. 1154 * 1155 * @param dev 1156 * Pointer to private data structure. 1157 * 1158 * @return 1159 * Pointer to selected Rx burst function. 1160 */ 1161 eth_rx_burst_t 1162 mlx5_select_rx_function(struct rte_eth_dev *dev) 1163 { 1164 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst; 1165 1166 assert(dev != NULL); 1167 if (mlx5_check_vec_rx_support(dev) > 0) { 1168 rx_pkt_burst = mlx5_rx_burst_vec; 1169 DRV_LOG(DEBUG, "port %u selected Rx vectorized function", 1170 dev->data->port_id); 1171 } else if (mlx5_mprq_enabled(dev)) { 1172 rx_pkt_burst = mlx5_rx_burst_mprq; 1173 } 1174 return rx_pkt_burst; 1175 } 1176 1177 /** 1178 * Check if mlx5 device was removed. 1179 * 1180 * @param dev 1181 * Pointer to Ethernet device structure. 1182 * 1183 * @return 1184 * 1 when device is removed, otherwise 0. 1185 */ 1186 int 1187 mlx5_is_removed(struct rte_eth_dev *dev) 1188 { 1189 struct ibv_device_attr device_attr; 1190 struct priv *priv = dev->data->dev_private; 1191 1192 if (mlx5_glue->query_device(priv->ctx, &device_attr) == EIO) 1193 return 1; 1194 return 0; 1195 } 1196