1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox. 4 */ 5 6 #define _GNU_SOURCE 7 8 #include <stddef.h> 9 #include <assert.h> 10 #include <inttypes.h> 11 #include <unistd.h> 12 #include <stdint.h> 13 #include <stdio.h> 14 #include <string.h> 15 #include <stdlib.h> 16 #include <errno.h> 17 #include <dirent.h> 18 #include <net/if.h> 19 #include <sys/ioctl.h> 20 #include <sys/socket.h> 21 #include <sys/utsname.h> 22 #include <netinet/in.h> 23 #include <linux/ethtool.h> 24 #include <linux/sockios.h> 25 #include <linux/version.h> 26 #include <fcntl.h> 27 #include <stdalign.h> 28 #include <sys/un.h> 29 30 #include <rte_atomic.h> 31 #include <rte_ethdev_driver.h> 32 #include <rte_bus_pci.h> 33 #include <rte_mbuf.h> 34 #include <rte_common.h> 35 #include <rte_interrupts.h> 36 #include <rte_alarm.h> 37 #include <rte_malloc.h> 38 39 #include "mlx5.h" 40 #include "mlx5_glue.h" 41 #include "mlx5_rxtx.h" 42 #include "mlx5_utils.h" 43 44 /* Add defines in case the running kernel is not the same as user headers. */ 45 #ifndef ETHTOOL_GLINKSETTINGS 46 struct ethtool_link_settings { 47 uint32_t cmd; 48 uint32_t speed; 49 uint8_t duplex; 50 uint8_t port; 51 uint8_t phy_address; 52 uint8_t autoneg; 53 uint8_t mdio_support; 54 uint8_t eth_to_mdix; 55 uint8_t eth_tp_mdix_ctrl; 56 int8_t link_mode_masks_nwords; 57 uint32_t reserved[8]; 58 uint32_t link_mode_masks[]; 59 }; 60 61 #define ETHTOOL_GLINKSETTINGS 0x0000004c 62 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5 63 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6 64 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17 65 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18 66 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19 67 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20 68 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21 69 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22 70 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23 71 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24 72 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25 73 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26 74 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27 75 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28 76 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29 77 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30 78 #endif 79 #ifndef HAVE_ETHTOOL_LINK_MODE_25G 80 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31 81 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32 82 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33 83 #endif 84 #ifndef HAVE_ETHTOOL_LINK_MODE_50G 85 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34 86 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35 87 #endif 88 #ifndef HAVE_ETHTOOL_LINK_MODE_100G 89 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36 90 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37 91 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38 92 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39 93 #endif 94 95 /** 96 * Get interface name from private structure. 97 * 98 * @param[in] dev 99 * Pointer to Ethernet device. 100 * @param[out] ifname 101 * Interface name output buffer. 102 * 103 * @return 104 * 0 on success, a negative errno value otherwise and rte_errno is set. 105 */ 106 int 107 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE]) 108 { 109 struct priv *priv = dev->data->dev_private; 110 DIR *dir; 111 struct dirent *dent; 112 unsigned int dev_type = 0; 113 unsigned int dev_port_prev = ~0u; 114 char match[IF_NAMESIZE] = ""; 115 116 { 117 MKSTR(path, "%s/device/net", priv->ibdev_path); 118 119 dir = opendir(path); 120 if (dir == NULL) { 121 rte_errno = errno; 122 return -rte_errno; 123 } 124 } 125 while ((dent = readdir(dir)) != NULL) { 126 char *name = dent->d_name; 127 FILE *file; 128 unsigned int dev_port; 129 int r; 130 131 if ((name[0] == '.') && 132 ((name[1] == '\0') || 133 ((name[1] == '.') && (name[2] == '\0')))) 134 continue; 135 136 MKSTR(path, "%s/device/net/%s/%s", 137 priv->ibdev_path, name, 138 (dev_type ? "dev_id" : "dev_port")); 139 140 file = fopen(path, "rb"); 141 if (file == NULL) { 142 if (errno != ENOENT) 143 continue; 144 /* 145 * Switch to dev_id when dev_port does not exist as 146 * is the case with Linux kernel versions < 3.15. 147 */ 148 try_dev_id: 149 match[0] = '\0'; 150 if (dev_type) 151 break; 152 dev_type = 1; 153 dev_port_prev = ~0u; 154 rewinddir(dir); 155 continue; 156 } 157 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port); 158 fclose(file); 159 if (r != 1) 160 continue; 161 /* 162 * Switch to dev_id when dev_port returns the same value for 163 * all ports. May happen when using a MOFED release older than 164 * 3.0 with a Linux kernel >= 3.15. 165 */ 166 if (dev_port == dev_port_prev) 167 goto try_dev_id; 168 dev_port_prev = dev_port; 169 if (dev_port == (priv->port - 1u)) 170 snprintf(match, sizeof(match), "%s", name); 171 } 172 closedir(dir); 173 if (match[0] == '\0') { 174 rte_errno = ENOENT; 175 return -rte_errno; 176 } 177 strncpy(*ifname, match, sizeof(*ifname)); 178 return 0; 179 } 180 181 /** 182 * Perform ifreq ioctl() on associated Ethernet device. 183 * 184 * @param[in] dev 185 * Pointer to Ethernet device. 186 * @param req 187 * Request number to pass to ioctl(). 188 * @param[out] ifr 189 * Interface request structure output buffer. 190 * 191 * @return 192 * 0 on success, a negative errno value otherwise and rte_errno is set. 193 */ 194 int 195 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr) 196 { 197 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP); 198 int ret = 0; 199 200 if (sock == -1) { 201 rte_errno = errno; 202 return -rte_errno; 203 } 204 ret = mlx5_get_ifname(dev, &ifr->ifr_name); 205 if (ret) 206 goto error; 207 ret = ioctl(sock, req, ifr); 208 if (ret == -1) { 209 rte_errno = errno; 210 goto error; 211 } 212 close(sock); 213 return 0; 214 error: 215 close(sock); 216 return -rte_errno; 217 } 218 219 /** 220 * Get device MTU. 221 * 222 * @param dev 223 * Pointer to Ethernet device. 224 * @param[out] mtu 225 * MTU value output buffer. 226 * 227 * @return 228 * 0 on success, a negative errno value otherwise and rte_errno is set. 229 */ 230 int 231 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu) 232 { 233 struct ifreq request; 234 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request); 235 236 if (ret) 237 return ret; 238 *mtu = request.ifr_mtu; 239 return 0; 240 } 241 242 /** 243 * Set device MTU. 244 * 245 * @param dev 246 * Pointer to Ethernet device. 247 * @param mtu 248 * MTU value to set. 249 * 250 * @return 251 * 0 on success, a negative errno value otherwise and rte_errno is set. 252 */ 253 static int 254 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 255 { 256 struct ifreq request = { .ifr_mtu = mtu, }; 257 258 return mlx5_ifreq(dev, SIOCSIFMTU, &request); 259 } 260 261 /** 262 * Set device flags. 263 * 264 * @param dev 265 * Pointer to Ethernet device. 266 * @param keep 267 * Bitmask for flags that must remain untouched. 268 * @param flags 269 * Bitmask for flags to modify. 270 * 271 * @return 272 * 0 on success, a negative errno value otherwise and rte_errno is set. 273 */ 274 int 275 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags) 276 { 277 struct ifreq request; 278 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request); 279 280 if (ret) 281 return ret; 282 request.ifr_flags &= keep; 283 request.ifr_flags |= flags & ~keep; 284 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request); 285 } 286 287 /** 288 * DPDK callback for Ethernet device configuration. 289 * 290 * @param dev 291 * Pointer to Ethernet device structure. 292 * 293 * @return 294 * 0 on success, a negative errno value otherwise and rte_errno is set. 295 */ 296 int 297 mlx5_dev_configure(struct rte_eth_dev *dev) 298 { 299 struct priv *priv = dev->data->dev_private; 300 unsigned int rxqs_n = dev->data->nb_rx_queues; 301 unsigned int txqs_n = dev->data->nb_tx_queues; 302 unsigned int i; 303 unsigned int j; 304 unsigned int reta_idx_n; 305 const uint8_t use_app_rss_key = 306 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key; 307 uint64_t supp_tx_offloads = mlx5_get_tx_port_offloads(dev); 308 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads; 309 uint64_t supp_rx_offloads = 310 (mlx5_get_rx_port_offloads() | 311 mlx5_get_rx_queue_offloads(dev)); 312 uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads; 313 int ret = 0; 314 315 if ((tx_offloads & supp_tx_offloads) != tx_offloads) { 316 ERROR("port %u some Tx offloads are not supported " 317 "requested 0x%" PRIx64 " supported 0x%" PRIx64, 318 dev->data->port_id, tx_offloads, supp_tx_offloads); 319 rte_errno = ENOTSUP; 320 return -rte_errno; 321 } 322 if ((rx_offloads & supp_rx_offloads) != rx_offloads) { 323 ERROR("port %u some Rx offloads are not supported " 324 "requested 0x%" PRIx64 " supported 0x%" PRIx64, 325 dev->data->port_id, rx_offloads, supp_rx_offloads); 326 rte_errno = ENOTSUP; 327 return -rte_errno; 328 } 329 if (use_app_rss_key && 330 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len != 331 rss_hash_default_key_len)) { 332 /* MLX5 RSS only support 40bytes key. */ 333 rte_errno = EINVAL; 334 return -rte_errno; 335 } 336 priv->rss_conf.rss_key = 337 rte_realloc(priv->rss_conf.rss_key, 338 rss_hash_default_key_len, 0); 339 if (!priv->rss_conf.rss_key) { 340 ERROR("port %u cannot allocate RSS hash key memory (%u)", 341 dev->data->port_id, rxqs_n); 342 rte_errno = ENOMEM; 343 return -rte_errno; 344 } 345 memcpy(priv->rss_conf.rss_key, 346 use_app_rss_key ? 347 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key : 348 rss_hash_default_key, 349 rss_hash_default_key_len); 350 priv->rss_conf.rss_key_len = rss_hash_default_key_len; 351 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; 352 priv->rxqs = (void *)dev->data->rx_queues; 353 priv->txqs = (void *)dev->data->tx_queues; 354 if (txqs_n != priv->txqs_n) { 355 INFO("port %u Tx queues number update: %u -> %u", 356 dev->data->port_id, priv->txqs_n, txqs_n); 357 priv->txqs_n = txqs_n; 358 } 359 if (rxqs_n > priv->config.ind_table_max_size) { 360 ERROR("port %u cannot handle this many Rx queues (%u)", 361 dev->data->port_id, rxqs_n); 362 rte_errno = EINVAL; 363 return -rte_errno; 364 } 365 if (rxqs_n == priv->rxqs_n) 366 return 0; 367 INFO("port %u Rx queues number update: %u -> %u", 368 dev->data->port_id, priv->rxqs_n, rxqs_n); 369 priv->rxqs_n = rxqs_n; 370 /* If the requested number of RX queues is not a power of two, use the 371 * maximum indirection table size for better balancing. 372 * The result is always rounded to the next power of two. */ 373 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ? 374 priv->config.ind_table_max_size : 375 rxqs_n)); 376 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n); 377 if (ret) 378 return ret; 379 /* When the number of RX queues is not a power of two, the remaining 380 * table entries are padded with reused WQs and hashes are not spread 381 * uniformly. */ 382 for (i = 0, j = 0; (i != reta_idx_n); ++i) { 383 (*priv->reta_idx)[i] = j; 384 if (++j == rxqs_n) 385 j = 0; 386 } 387 return 0; 388 } 389 390 /** 391 * DPDK callback to get information about the device. 392 * 393 * @param dev 394 * Pointer to Ethernet device structure. 395 * @param[out] info 396 * Info structure output buffer. 397 */ 398 void 399 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info) 400 { 401 struct priv *priv = dev->data->dev_private; 402 struct mlx5_dev_config *config = &priv->config; 403 unsigned int max; 404 char ifname[IF_NAMESIZE]; 405 406 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev); 407 /* FIXME: we should ask the device for these values. */ 408 info->min_rx_bufsize = 32; 409 info->max_rx_pktlen = 65536; 410 /* 411 * Since we need one CQ per QP, the limit is the minimum number 412 * between the two values. 413 */ 414 max = RTE_MIN(priv->device_attr.orig_attr.max_cq, 415 priv->device_attr.orig_attr.max_qp); 416 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */ 417 if (max >= 65535) 418 max = 65535; 419 info->max_rx_queues = max; 420 info->max_tx_queues = max; 421 info->max_mac_addrs = RTE_DIM(priv->mac); 422 info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev); 423 info->rx_offload_capa = (mlx5_get_rx_port_offloads() | 424 info->rx_queue_offload_capa); 425 info->tx_offload_capa = mlx5_get_tx_port_offloads(dev); 426 if (mlx5_get_ifname(dev, &ifname) == 0) 427 info->if_index = if_nametoindex(ifname); 428 info->reta_size = priv->reta_idx_n ? 429 priv->reta_idx_n : config->ind_table_max_size; 430 info->hash_key_size = priv->rss_conf.rss_key_len; 431 info->speed_capa = priv->link_speed_capa; 432 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK; 433 } 434 435 /** 436 * Get supported packet types. 437 * 438 * @param dev 439 * Pointer to Ethernet device structure. 440 * 441 * @return 442 * A pointer to the supported Packet types array. 443 */ 444 const uint32_t * 445 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev) 446 { 447 static const uint32_t ptypes[] = { 448 /* refers to rxq_cq_to_pkt_type() */ 449 RTE_PTYPE_L2_ETHER, 450 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 451 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN, 452 RTE_PTYPE_L4_NONFRAG, 453 RTE_PTYPE_L4_FRAG, 454 RTE_PTYPE_L4_TCP, 455 RTE_PTYPE_L4_UDP, 456 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN, 457 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN, 458 RTE_PTYPE_INNER_L4_NONFRAG, 459 RTE_PTYPE_INNER_L4_FRAG, 460 RTE_PTYPE_INNER_L4_TCP, 461 RTE_PTYPE_INNER_L4_UDP, 462 RTE_PTYPE_UNKNOWN 463 }; 464 465 if (dev->rx_pkt_burst == mlx5_rx_burst || 466 dev->rx_pkt_burst == mlx5_rx_burst_vec) 467 return ptypes; 468 return NULL; 469 } 470 471 /** 472 * DPDK callback to retrieve physical link information. 473 * 474 * @param dev 475 * Pointer to Ethernet device structure. 476 * 477 * @return 478 * 0 on success, a negative errno value otherwise and rte_errno is set. 479 */ 480 static int 481 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev) 482 { 483 struct priv *priv = dev->data->dev_private; 484 struct ethtool_cmd edata = { 485 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */ 486 }; 487 struct ifreq ifr; 488 struct rte_eth_link dev_link; 489 int link_speed = 0; 490 int ret; 491 492 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 493 if (ret) { 494 WARN("port %u ioctl(SIOCGIFFLAGS) failed: %s", 495 dev->data->port_id, strerror(rte_errno)); 496 return ret; 497 } 498 memset(&dev_link, 0, sizeof(dev_link)); 499 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) && 500 (ifr.ifr_flags & IFF_RUNNING)); 501 ifr.ifr_data = (void *)&edata; 502 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 503 if (ret) { 504 WARN("port %u ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s", 505 dev->data->port_id, strerror(rte_errno)); 506 return ret; 507 } 508 link_speed = ethtool_cmd_speed(&edata); 509 if (link_speed == -1) 510 dev_link.link_speed = 0; 511 else 512 dev_link.link_speed = link_speed; 513 priv->link_speed_capa = 0; 514 if (edata.supported & SUPPORTED_Autoneg) 515 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 516 if (edata.supported & (SUPPORTED_1000baseT_Full | 517 SUPPORTED_1000baseKX_Full)) 518 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 519 if (edata.supported & SUPPORTED_10000baseKR_Full) 520 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 521 if (edata.supported & (SUPPORTED_40000baseKR4_Full | 522 SUPPORTED_40000baseCR4_Full | 523 SUPPORTED_40000baseSR4_Full | 524 SUPPORTED_40000baseLR4_Full)) 525 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 526 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ? 527 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 528 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 529 ETH_LINK_SPEED_FIXED); 530 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) { 531 /* Link status changed. */ 532 dev->data->dev_link = dev_link; 533 return 0; 534 } 535 /* Link status is still the same. */ 536 rte_errno = EAGAIN; 537 return -rte_errno; 538 } 539 540 /** 541 * Retrieve physical link information (unlocked version using new ioctl). 542 * 543 * @param dev 544 * Pointer to Ethernet device structure. 545 * 546 * @return 547 * 0 on success, a negative errno value otherwise and rte_errno is set. 548 */ 549 static int 550 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev) 551 { 552 struct priv *priv = dev->data->dev_private; 553 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS }; 554 struct ifreq ifr; 555 struct rte_eth_link dev_link; 556 uint64_t sc; 557 int ret; 558 559 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 560 if (ret) { 561 WARN("port %u ioctl(SIOCGIFFLAGS) failed: %s", 562 dev->data->port_id, strerror(rte_errno)); 563 return ret; 564 } 565 memset(&dev_link, 0, sizeof(dev_link)); 566 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) && 567 (ifr.ifr_flags & IFF_RUNNING)); 568 ifr.ifr_data = (void *)&gcmd; 569 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 570 if (ret) { 571 DEBUG("port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)" 572 " failed: %s", dev->data->port_id, strerror(rte_errno)); 573 return ret; 574 } 575 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords; 576 577 alignas(struct ethtool_link_settings) 578 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) + 579 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3]; 580 struct ethtool_link_settings *ecmd = (void *)data; 581 582 *ecmd = gcmd; 583 ifr.ifr_data = (void *)ecmd; 584 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 585 if (ret) { 586 DEBUG("port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)" 587 " failed: %s", dev->data->port_id, strerror(rte_errno)); 588 return ret; 589 } 590 dev_link.link_speed = ecmd->speed; 591 sc = ecmd->link_mode_masks[0] | 592 ((uint64_t)ecmd->link_mode_masks[1] << 32); 593 priv->link_speed_capa = 0; 594 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT)) 595 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG; 596 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) | 597 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT))) 598 priv->link_speed_capa |= ETH_LINK_SPEED_1G; 599 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) | 600 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) | 601 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT))) 602 priv->link_speed_capa |= ETH_LINK_SPEED_10G; 603 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) | 604 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT))) 605 priv->link_speed_capa |= ETH_LINK_SPEED_20G; 606 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) | 607 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) | 608 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) | 609 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT))) 610 priv->link_speed_capa |= ETH_LINK_SPEED_40G; 611 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) | 612 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) | 613 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) | 614 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT))) 615 priv->link_speed_capa |= ETH_LINK_SPEED_56G; 616 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) | 617 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) | 618 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT))) 619 priv->link_speed_capa |= ETH_LINK_SPEED_25G; 620 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) | 621 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT))) 622 priv->link_speed_capa |= ETH_LINK_SPEED_50G; 623 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) | 624 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) | 625 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) | 626 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT))) 627 priv->link_speed_capa |= ETH_LINK_SPEED_100G; 628 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ? 629 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX); 630 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 631 ETH_LINK_SPEED_FIXED); 632 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) { 633 /* Link status changed. */ 634 dev->data->dev_link = dev_link; 635 return 0; 636 } 637 /* Link status is still the same. */ 638 rte_errno = EAGAIN; 639 return -rte_errno; 640 } 641 642 /** 643 * Enable receiving and transmitting traffic. 644 * 645 * @param dev 646 * Pointer to Ethernet device. 647 */ 648 static void 649 mlx5_link_start(struct rte_eth_dev *dev) 650 { 651 struct priv *priv = dev->data->dev_private; 652 int ret; 653 654 dev->tx_pkt_burst = mlx5_select_tx_function(dev); 655 dev->rx_pkt_burst = mlx5_select_rx_function(dev); 656 ret = mlx5_traffic_enable(dev); 657 if (ret) { 658 ERROR("port %u error occurred while configuring control flows:" 659 " %s", dev->data->port_id, strerror(rte_errno)); 660 return; 661 } 662 ret = mlx5_flow_start(dev, &priv->flows); 663 if (ret) 664 ERROR("port %u error occurred while configuring flows: %s", 665 dev->data->port_id, strerror(rte_errno)); 666 } 667 668 /** 669 * Disable receiving and transmitting traffic. 670 * 671 * @param dev 672 * Pointer to Ethernet device. 673 */ 674 static void 675 mlx5_link_stop(struct rte_eth_dev *dev) 676 { 677 struct priv *priv = dev->data->dev_private; 678 679 mlx5_flow_stop(dev, &priv->flows); 680 mlx5_traffic_disable(dev); 681 dev->rx_pkt_burst = removed_rx_burst; 682 dev->tx_pkt_burst = removed_tx_burst; 683 } 684 685 /** 686 * Querying the link status till it changes to the desired state. 687 * Number of query attempts is bounded by MLX5_MAX_LINK_QUERY_ATTEMPTS. 688 * 689 * @param dev 690 * Pointer to Ethernet device. 691 * @param status 692 * Link desired status. 693 * 694 * @return 695 * 0 on success, a negative errno value otherwise and rte_errno is set. 696 */ 697 int 698 mlx5_force_link_status_change(struct rte_eth_dev *dev, int status) 699 { 700 int try = 0; 701 702 while (try < MLX5_MAX_LINK_QUERY_ATTEMPTS) { 703 mlx5_link_update(dev, 0); 704 if (dev->data->dev_link.link_status == status) 705 return 0; 706 try++; 707 sleep(1); 708 } 709 rte_errno = EAGAIN; 710 return -rte_errno; 711 } 712 713 /** 714 * DPDK callback to retrieve physical link information. 715 * 716 * @param dev 717 * Pointer to Ethernet device structure. 718 * @param wait_to_complete 719 * Wait for request completion (ignored). 720 * 721 * @return 722 * 0 on success, a negative errno value otherwise and rte_errno is set. 723 */ 724 int 725 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused) 726 { 727 struct utsname utsname; 728 int ver[3]; 729 int ret; 730 struct rte_eth_link dev_link = dev->data->dev_link; 731 732 if (uname(&utsname) == -1 || 733 sscanf(utsname.release, "%d.%d.%d", 734 &ver[0], &ver[1], &ver[2]) != 3 || 735 KERNEL_VERSION(ver[0], ver[1], ver[2]) < KERNEL_VERSION(4, 9, 0)) 736 ret = mlx5_link_update_unlocked_gset(dev); 737 else 738 ret = mlx5_link_update_unlocked_gs(dev); 739 if (ret) 740 return ret; 741 /* If lsc interrupt is disabled, should always be ready for traffic. */ 742 if (!dev->data->dev_conf.intr_conf.lsc) { 743 mlx5_link_start(dev); 744 return 0; 745 } 746 /* Re-select burst callbacks only if link status has been changed. */ 747 if (!ret && dev_link.link_status != dev->data->dev_link.link_status) { 748 if (dev->data->dev_link.link_status == ETH_LINK_UP) 749 mlx5_link_start(dev); 750 else 751 mlx5_link_stop(dev); 752 } 753 return 0; 754 } 755 756 /** 757 * DPDK callback to change the MTU. 758 * 759 * @param dev 760 * Pointer to Ethernet device structure. 761 * @param in_mtu 762 * New MTU. 763 * 764 * @return 765 * 0 on success, a negative errno value otherwise and rte_errno is set. 766 */ 767 int 768 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 769 { 770 struct priv *priv = dev->data->dev_private; 771 uint16_t kern_mtu = 0; 772 int ret; 773 774 ret = mlx5_get_mtu(dev, &kern_mtu); 775 if (ret) 776 return ret; 777 /* Set kernel interface MTU first. */ 778 ret = mlx5_set_mtu(dev, mtu); 779 if (ret) 780 return ret; 781 ret = mlx5_get_mtu(dev, &kern_mtu); 782 if (ret) 783 return ret; 784 if (kern_mtu == mtu) { 785 priv->mtu = mtu; 786 DEBUG("port %u adapter MTU set to %u", dev->data->port_id, mtu); 787 return 0; 788 } 789 rte_errno = EAGAIN; 790 return -rte_errno; 791 } 792 793 /** 794 * DPDK callback to get flow control status. 795 * 796 * @param dev 797 * Pointer to Ethernet device structure. 798 * @param[out] fc_conf 799 * Flow control output buffer. 800 * 801 * @return 802 * 0 on success, a negative errno value otherwise and rte_errno is set. 803 */ 804 int 805 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 806 { 807 struct ifreq ifr; 808 struct ethtool_pauseparam ethpause = { 809 .cmd = ETHTOOL_GPAUSEPARAM 810 }; 811 int ret; 812 813 ifr.ifr_data = (void *)ðpause; 814 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 815 if (ret) { 816 WARN("port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:" 817 " %s", dev->data->port_id, strerror(rte_errno)); 818 return ret; 819 } 820 fc_conf->autoneg = ethpause.autoneg; 821 if (ethpause.rx_pause && ethpause.tx_pause) 822 fc_conf->mode = RTE_FC_FULL; 823 else if (ethpause.rx_pause) 824 fc_conf->mode = RTE_FC_RX_PAUSE; 825 else if (ethpause.tx_pause) 826 fc_conf->mode = RTE_FC_TX_PAUSE; 827 else 828 fc_conf->mode = RTE_FC_NONE; 829 return 0; 830 } 831 832 /** 833 * DPDK callback to modify flow control parameters. 834 * 835 * @param dev 836 * Pointer to Ethernet device structure. 837 * @param[in] fc_conf 838 * Flow control parameters. 839 * 840 * @return 841 * 0 on success, a negative errno value otherwise and rte_errno is set. 842 */ 843 int 844 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 845 { 846 struct ifreq ifr; 847 struct ethtool_pauseparam ethpause = { 848 .cmd = ETHTOOL_SPAUSEPARAM 849 }; 850 int ret; 851 852 ifr.ifr_data = (void *)ðpause; 853 ethpause.autoneg = fc_conf->autoneg; 854 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 855 (fc_conf->mode & RTE_FC_RX_PAUSE)) 856 ethpause.rx_pause = 1; 857 else 858 ethpause.rx_pause = 0; 859 860 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) || 861 (fc_conf->mode & RTE_FC_TX_PAUSE)) 862 ethpause.tx_pause = 1; 863 else 864 ethpause.tx_pause = 0; 865 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 866 if (ret) { 867 WARN("port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)" 868 " failed: %s", dev->data->port_id, strerror(rte_errno)); 869 return ret; 870 } 871 return 0; 872 } 873 874 /** 875 * Get PCI information from struct ibv_device. 876 * 877 * @param device 878 * Pointer to Ethernet device structure. 879 * @param[out] pci_addr 880 * PCI bus address output buffer. 881 * 882 * @return 883 * 0 on success, a negative errno value otherwise and rte_errno is set. 884 */ 885 int 886 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device, 887 struct rte_pci_addr *pci_addr) 888 { 889 FILE *file; 890 char line[32]; 891 MKSTR(path, "%s/device/uevent", device->ibdev_path); 892 893 file = fopen(path, "rb"); 894 if (file == NULL) { 895 rte_errno = errno; 896 return -rte_errno; 897 } 898 while (fgets(line, sizeof(line), file) == line) { 899 size_t len = strlen(line); 900 int ret; 901 902 /* Truncate long lines. */ 903 if (len == (sizeof(line) - 1)) 904 while (line[(len - 1)] != '\n') { 905 ret = fgetc(file); 906 if (ret == EOF) 907 break; 908 line[(len - 1)] = ret; 909 } 910 /* Extract information. */ 911 if (sscanf(line, 912 "PCI_SLOT_NAME=" 913 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", 914 &pci_addr->domain, 915 &pci_addr->bus, 916 &pci_addr->devid, 917 &pci_addr->function) == 4) { 918 ret = 0; 919 break; 920 } 921 } 922 fclose(file); 923 return 0; 924 } 925 926 /** 927 * Update the link status. 928 * 929 * @param dev 930 * Pointer to Ethernet device. 931 * 932 * @return 933 * Zero if the callback process can be called immediately, negative errno 934 * value otherwise and rte_errno is set. 935 */ 936 static int 937 mlx5_link_status_update(struct rte_eth_dev *dev) 938 { 939 struct priv *priv = dev->data->dev_private; 940 struct rte_eth_link *link = &dev->data->dev_link; 941 int ret; 942 943 ret = mlx5_link_update(dev, 0); 944 if (ret) 945 return ret; 946 if (((link->link_speed == 0) && link->link_status) || 947 ((link->link_speed != 0) && !link->link_status)) { 948 /* 949 * Inconsistent status. Event likely occurred before the 950 * kernel netdevice exposes the new status. 951 */ 952 if (!priv->pending_alarm) { 953 priv->pending_alarm = 1; 954 rte_eal_alarm_set(MLX5_ALARM_TIMEOUT_US, 955 mlx5_dev_link_status_handler, 956 priv->dev); 957 } 958 return 1; 959 } else if (unlikely(priv->pending_alarm)) { 960 /* Link interrupt occurred while alarm is already scheduled. */ 961 priv->pending_alarm = 0; 962 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, priv->dev); 963 } 964 return 0; 965 } 966 967 /** 968 * Device status handler. 969 * 970 * @param dev 971 * Pointer to Ethernet device. 972 * @param events 973 * Pointer to event flags holder. 974 * 975 * @return 976 * Events bitmap of callback process which can be called immediately. 977 */ 978 static uint32_t 979 mlx5_dev_status_handler(struct rte_eth_dev *dev) 980 { 981 struct priv *priv = dev->data->dev_private; 982 struct ibv_async_event event; 983 uint32_t ret = 0; 984 985 /* Read all message and acknowledge them. */ 986 for (;;) { 987 if (mlx5_glue->get_async_event(priv->ctx, &event)) 988 break; 989 if ((event.event_type == IBV_EVENT_PORT_ACTIVE || 990 event.event_type == IBV_EVENT_PORT_ERR) && 991 (dev->data->dev_conf.intr_conf.lsc == 1)) 992 ret |= (1 << RTE_ETH_EVENT_INTR_LSC); 993 else if (event.event_type == IBV_EVENT_DEVICE_FATAL && 994 dev->data->dev_conf.intr_conf.rmv == 1) 995 ret |= (1 << RTE_ETH_EVENT_INTR_RMV); 996 else 997 DEBUG("port %u event type %d on not handled", 998 dev->data->port_id, event.event_type); 999 mlx5_glue->ack_async_event(&event); 1000 } 1001 if (ret & (1 << RTE_ETH_EVENT_INTR_LSC)) 1002 if (mlx5_link_status_update(dev)) 1003 ret &= ~(1 << RTE_ETH_EVENT_INTR_LSC); 1004 return ret; 1005 } 1006 1007 /** 1008 * Handle delayed link status event. 1009 * 1010 * @param arg 1011 * Registered argument. 1012 */ 1013 void 1014 mlx5_dev_link_status_handler(void *arg) 1015 { 1016 struct rte_eth_dev *dev = arg; 1017 struct priv *priv = dev->data->dev_private; 1018 int ret; 1019 1020 priv->pending_alarm = 0; 1021 ret = mlx5_link_status_update(dev); 1022 if (!ret) 1023 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); 1024 } 1025 1026 /** 1027 * Handle interrupts from the NIC. 1028 * 1029 * @param[in] intr_handle 1030 * Interrupt handler. 1031 * @param cb_arg 1032 * Callback argument. 1033 */ 1034 void 1035 mlx5_dev_interrupt_handler(void *cb_arg) 1036 { 1037 struct rte_eth_dev *dev = cb_arg; 1038 uint32_t events; 1039 1040 events = mlx5_dev_status_handler(dev); 1041 if (events & (1 << RTE_ETH_EVENT_INTR_LSC)) 1042 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); 1043 if (events & (1 << RTE_ETH_EVENT_INTR_RMV)) 1044 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL); 1045 } 1046 1047 /** 1048 * Handle interrupts from the socket. 1049 * 1050 * @param cb_arg 1051 * Callback argument. 1052 */ 1053 static void 1054 mlx5_dev_handler_socket(void *cb_arg) 1055 { 1056 struct rte_eth_dev *dev = cb_arg; 1057 1058 mlx5_socket_handle(dev); 1059 } 1060 1061 /** 1062 * Uninstall interrupt handler. 1063 * 1064 * @param dev 1065 * Pointer to Ethernet device. 1066 */ 1067 void 1068 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev) 1069 { 1070 struct priv *priv = dev->data->dev_private; 1071 1072 if (dev->data->dev_conf.intr_conf.lsc || 1073 dev->data->dev_conf.intr_conf.rmv) 1074 rte_intr_callback_unregister(&priv->intr_handle, 1075 mlx5_dev_interrupt_handler, dev); 1076 if (priv->primary_socket) 1077 rte_intr_callback_unregister(&priv->intr_handle_socket, 1078 mlx5_dev_handler_socket, dev); 1079 if (priv->pending_alarm) { 1080 priv->pending_alarm = 0; 1081 rte_eal_alarm_cancel(mlx5_dev_link_status_handler, dev); 1082 } 1083 priv->intr_handle.fd = 0; 1084 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN; 1085 priv->intr_handle_socket.fd = 0; 1086 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN; 1087 } 1088 1089 /** 1090 * Install interrupt handler. 1091 * 1092 * @param dev 1093 * Pointer to Ethernet device. 1094 */ 1095 void 1096 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev) 1097 { 1098 struct priv *priv = dev->data->dev_private; 1099 int ret; 1100 int flags; 1101 1102 assert(priv->ctx->async_fd > 0); 1103 flags = fcntl(priv->ctx->async_fd, F_GETFL); 1104 ret = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK); 1105 if (ret) { 1106 INFO("port %u failed to change file descriptor async event" 1107 " queue", dev->data->port_id); 1108 dev->data->dev_conf.intr_conf.lsc = 0; 1109 dev->data->dev_conf.intr_conf.rmv = 0; 1110 } 1111 if (dev->data->dev_conf.intr_conf.lsc || 1112 dev->data->dev_conf.intr_conf.rmv) { 1113 priv->intr_handle.fd = priv->ctx->async_fd; 1114 priv->intr_handle.type = RTE_INTR_HANDLE_EXT; 1115 rte_intr_callback_register(&priv->intr_handle, 1116 mlx5_dev_interrupt_handler, dev); 1117 } 1118 ret = mlx5_socket_init(dev); 1119 if (ret) 1120 ERROR("port %u cannot initialise socket: %s", 1121 dev->data->port_id, strerror(rte_errno)); 1122 else if (priv->primary_socket) { 1123 priv->intr_handle_socket.fd = priv->primary_socket; 1124 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT; 1125 rte_intr_callback_register(&priv->intr_handle_socket, 1126 mlx5_dev_handler_socket, dev); 1127 } 1128 } 1129 1130 /** 1131 * DPDK callback to bring the link DOWN. 1132 * 1133 * @param dev 1134 * Pointer to Ethernet device structure. 1135 * 1136 * @return 1137 * 0 on success, a negative errno value otherwise and rte_errno is set. 1138 */ 1139 int 1140 mlx5_set_link_down(struct rte_eth_dev *dev) 1141 { 1142 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP); 1143 } 1144 1145 /** 1146 * DPDK callback to bring the link UP. 1147 * 1148 * @param dev 1149 * Pointer to Ethernet device structure. 1150 * 1151 * @return 1152 * 0 on success, a negative errno value otherwise and rte_errno is set. 1153 */ 1154 int 1155 mlx5_set_link_up(struct rte_eth_dev *dev) 1156 { 1157 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP); 1158 } 1159 1160 /** 1161 * Configure the TX function to use. 1162 * 1163 * @param dev 1164 * Pointer to private data structure. 1165 * 1166 * @return 1167 * Pointer to selected Tx burst function. 1168 */ 1169 eth_tx_burst_t 1170 mlx5_select_tx_function(struct rte_eth_dev *dev) 1171 { 1172 struct priv *priv = dev->data->dev_private; 1173 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst; 1174 struct mlx5_dev_config *config = &priv->config; 1175 uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads; 1176 int tso = !!(tx_offloads & (DEV_TX_OFFLOAD_TCP_TSO | 1177 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 1178 DEV_TX_OFFLOAD_GRE_TNL_TSO)); 1179 int vlan_insert = !!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT); 1180 1181 assert(priv != NULL); 1182 /* Select appropriate TX function. */ 1183 if (vlan_insert || tso) 1184 return tx_pkt_burst; 1185 if (config->mps == MLX5_MPW_ENHANCED) { 1186 if (mlx5_check_vec_tx_support(dev) > 0) { 1187 if (mlx5_check_raw_vec_tx_support(dev) > 0) 1188 tx_pkt_burst = mlx5_tx_burst_raw_vec; 1189 else 1190 tx_pkt_burst = mlx5_tx_burst_vec; 1191 DEBUG("port %u selected enhanced MPW Tx vectorized" 1192 " function", dev->data->port_id); 1193 } else { 1194 tx_pkt_burst = mlx5_tx_burst_empw; 1195 DEBUG("port %u selected enhanced MPW Tx function", 1196 dev->data->port_id); 1197 } 1198 } else if (config->mps && (config->txq_inline > 0)) { 1199 tx_pkt_burst = mlx5_tx_burst_mpw_inline; 1200 DEBUG("port %u selected MPW inline Tx function", 1201 dev->data->port_id); 1202 } else if (config->mps) { 1203 tx_pkt_burst = mlx5_tx_burst_mpw; 1204 DEBUG("port %u selected MPW Tx function", dev->data->port_id); 1205 } 1206 return tx_pkt_burst; 1207 } 1208 1209 /** 1210 * Configure the RX function to use. 1211 * 1212 * @param dev 1213 * Pointer to private data structure. 1214 * 1215 * @return 1216 * Pointer to selected Rx burst function. 1217 */ 1218 eth_rx_burst_t 1219 mlx5_select_rx_function(struct rte_eth_dev *dev) 1220 { 1221 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst; 1222 1223 assert(dev != NULL); 1224 if (mlx5_check_vec_rx_support(dev) > 0) { 1225 rx_pkt_burst = mlx5_rx_burst_vec; 1226 DEBUG("port %u selected Rx vectorized function", 1227 dev->data->port_id); 1228 } 1229 return rx_pkt_burst; 1230 } 1231 1232 /** 1233 * Check if mlx5 device was removed. 1234 * 1235 * @param dev 1236 * Pointer to Ethernet device structure. 1237 * 1238 * @return 1239 * 1 when device is removed, otherwise 0. 1240 */ 1241 int 1242 mlx5_is_removed(struct rte_eth_dev *dev) 1243 { 1244 struct ibv_device_attr device_attr; 1245 struct priv *priv = dev->data->dev_private; 1246 1247 if (mlx5_glue->query_device(priv->ctx, &device_attr) == EIO) 1248 return 1; 1249 return 0; 1250 } 1251