1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2015 6WIND S.A. 3 * Copyright 2015 Mellanox Technologies, Ltd 4 */ 5 6 #include <stddef.h> 7 #include <inttypes.h> 8 #include <unistd.h> 9 #include <stdbool.h> 10 #include <stdint.h> 11 #include <stdio.h> 12 #include <string.h> 13 #include <stdlib.h> 14 #include <errno.h> 15 #include <dirent.h> 16 #include <net/if.h> 17 #include <sys/ioctl.h> 18 #include <sys/socket.h> 19 #include <netinet/in.h> 20 #include <linux/ethtool.h> 21 #include <linux/sockios.h> 22 #include <fcntl.h> 23 #include <stdalign.h> 24 #include <sys/un.h> 25 #include <time.h> 26 27 #include <ethdev_driver.h> 28 #include <bus_pci_driver.h> 29 #include <rte_mbuf.h> 30 #include <rte_common.h> 31 #include <rte_eal_paging.h> 32 #include <rte_interrupts.h> 33 #include <rte_malloc.h> 34 #include <rte_string_fns.h> 35 #include <rte_rwlock.h> 36 #include <rte_cycles.h> 37 38 #include <mlx5_glue.h> 39 #include <mlx5_devx_cmds.h> 40 #include <mlx5_common.h> 41 #include <mlx5_malloc.h> 42 #include <mlx5_nl.h> 43 44 #include "mlx5.h" 45 #include "mlx5_rxtx.h" 46 #include "mlx5_utils.h" 47 48 /* Supported speed values found in /usr/include/linux/ethtool.h */ 49 #ifndef HAVE_SUPPORTED_40000baseKR4_Full 50 #define SUPPORTED_40000baseKR4_Full (1 << 23) 51 #endif 52 #ifndef HAVE_SUPPORTED_40000baseCR4_Full 53 #define SUPPORTED_40000baseCR4_Full (1 << 24) 54 #endif 55 #ifndef HAVE_SUPPORTED_40000baseSR4_Full 56 #define SUPPORTED_40000baseSR4_Full (1 << 25) 57 #endif 58 #ifndef HAVE_SUPPORTED_40000baseLR4_Full 59 #define SUPPORTED_40000baseLR4_Full (1 << 26) 60 #endif 61 #ifndef HAVE_SUPPORTED_56000baseKR4_Full 62 #define SUPPORTED_56000baseKR4_Full (1 << 27) 63 #endif 64 #ifndef HAVE_SUPPORTED_56000baseCR4_Full 65 #define SUPPORTED_56000baseCR4_Full (1 << 28) 66 #endif 67 #ifndef HAVE_SUPPORTED_56000baseSR4_Full 68 #define SUPPORTED_56000baseSR4_Full (1 << 29) 69 #endif 70 #ifndef HAVE_SUPPORTED_56000baseLR4_Full 71 #define SUPPORTED_56000baseLR4_Full (1 << 30) 72 #endif 73 74 /* Add defines in case the running kernel is not the same as user headers. */ 75 #ifndef ETHTOOL_GLINKSETTINGS 76 struct ethtool_link_settings { 77 uint32_t cmd; 78 uint32_t speed; 79 uint8_t duplex; 80 uint8_t port; 81 uint8_t phy_address; 82 uint8_t autoneg; 83 uint8_t mdio_support; 84 uint8_t eth_to_mdix; 85 uint8_t eth_tp_mdix_ctrl; 86 int8_t link_mode_masks_nwords; 87 uint32_t reserved[8]; 88 uint32_t link_mode_masks[]; 89 }; 90 91 /* The kernel values can be found in /include/uapi/linux/ethtool.h */ 92 #define ETHTOOL_GLINKSETTINGS 0x0000004c 93 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5 94 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6 95 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17 96 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18 97 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19 98 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20 99 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21 100 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22 101 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23 102 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24 103 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25 104 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26 105 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27 106 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28 107 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29 108 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30 109 #endif 110 #ifndef HAVE_ETHTOOL_LINK_MODE_25G 111 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31 112 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32 113 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33 114 #endif 115 #ifndef HAVE_ETHTOOL_LINK_MODE_50G 116 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34 117 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35 118 #endif 119 #ifndef HAVE_ETHTOOL_LINK_MODE_100G 120 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36 121 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37 122 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38 123 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39 124 #endif 125 #ifndef HAVE_ETHTOOL_LINK_MODE_200G 126 #define ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT 62 127 #define ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT 63 128 #define ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT 0 /* 64 - 64 */ 129 #define ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT 1 /* 65 - 64 */ 130 #define ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT 2 /* 66 - 64 */ 131 #endif 132 133 /* Get interface index from SubFunction device name. */ 134 int 135 mlx5_auxiliary_get_ifindex(const char *sf_name) 136 { 137 char if_name[IF_NAMESIZE] = { 0 }; 138 139 if (mlx5_auxiliary_get_child_name(sf_name, "/net", 140 if_name, sizeof(if_name)) != 0) 141 return -rte_errno; 142 return if_nametoindex(if_name); 143 } 144 145 /** 146 * Get interface name from private structure. 147 * 148 * This is a port representor-aware version of mlx5_get_ifname_sysfs(). 149 * 150 * @param[in] dev 151 * Pointer to Ethernet device. 152 * @param[out] ifname 153 * Interface name output buffer. 154 * 155 * @return 156 * 0 on success, a negative errno value otherwise and rte_errno is set. 157 */ 158 int 159 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[MLX5_NAMESIZE]) 160 { 161 struct mlx5_priv *priv = dev->data->dev_private; 162 unsigned int ifindex; 163 164 MLX5_ASSERT(priv); 165 MLX5_ASSERT(priv->sh); 166 if (priv->master && priv->sh->bond.ifindex > 0) { 167 memcpy(ifname, priv->sh->bond.ifname, MLX5_NAMESIZE); 168 return 0; 169 } 170 ifindex = mlx5_ifindex(dev); 171 if (!ifindex) { 172 if (!priv->representor) 173 return mlx5_get_ifname_sysfs(priv->sh->ibdev_path, 174 *ifname); 175 rte_errno = ENXIO; 176 return -rte_errno; 177 } 178 if (if_indextoname(ifindex, &(*ifname)[0])) 179 return 0; 180 rte_errno = errno; 181 return -rte_errno; 182 } 183 184 /** 185 * Perform ifreq ioctl() on associated netdev ifname. 186 * 187 * @param[in] ifname 188 * Pointer to netdev name. 189 * @param req 190 * Request number to pass to ioctl(). 191 * @param[out] ifr 192 * Interface request structure output buffer. 193 * 194 * @return 195 * 0 on success, a negative errno value otherwise and rte_errno is set. 196 */ 197 static int 198 mlx5_ifreq_by_ifname(const char *ifname, int req, struct ifreq *ifr) 199 { 200 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP); 201 int ret = 0; 202 203 if (sock == -1) { 204 rte_errno = errno; 205 return -rte_errno; 206 } 207 rte_strscpy(ifr->ifr_name, ifname, sizeof(ifr->ifr_name)); 208 ret = ioctl(sock, req, ifr); 209 if (ret == -1) { 210 rte_errno = errno; 211 goto error; 212 } 213 close(sock); 214 return 0; 215 error: 216 close(sock); 217 return -rte_errno; 218 } 219 220 /** 221 * Perform ifreq ioctl() on associated Ethernet device. 222 * 223 * @param[in] dev 224 * Pointer to Ethernet device. 225 * @param req 226 * Request number to pass to ioctl(). 227 * @param[out] ifr 228 * Interface request structure output buffer. 229 * 230 * @return 231 * 0 on success, a negative errno value otherwise and rte_errno is set. 232 */ 233 static int 234 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr) 235 { 236 char ifname[sizeof(ifr->ifr_name)]; 237 int ret; 238 239 ret = mlx5_get_ifname(dev, &ifname); 240 if (ret) 241 return -rte_errno; 242 return mlx5_ifreq_by_ifname(ifname, req, ifr); 243 } 244 245 /** 246 * Get device MTU. 247 * 248 * @param dev 249 * Pointer to Ethernet device. 250 * @param[out] mtu 251 * MTU value output buffer. 252 * 253 * @return 254 * 0 on success, a negative errno value otherwise and rte_errno is set. 255 */ 256 int 257 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu) 258 { 259 struct ifreq request; 260 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request); 261 262 if (ret) 263 return ret; 264 *mtu = request.ifr_mtu; 265 return 0; 266 } 267 268 /** 269 * Set device MTU. 270 * 271 * @param dev 272 * Pointer to Ethernet device. 273 * @param mtu 274 * MTU value to set. 275 * 276 * @return 277 * 0 on success, a negative errno value otherwise and rte_errno is set. 278 */ 279 int 280 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 281 { 282 struct ifreq request = { .ifr_mtu = mtu, }; 283 284 return mlx5_ifreq(dev, SIOCSIFMTU, &request); 285 } 286 287 /** 288 * Set device flags. 289 * 290 * @param dev 291 * Pointer to Ethernet device. 292 * @param keep 293 * Bitmask for flags that must remain untouched. 294 * @param flags 295 * Bitmask for flags to modify. 296 * 297 * @return 298 * 0 on success, a negative errno value otherwise and rte_errno is set. 299 */ 300 static int 301 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags) 302 { 303 struct ifreq request; 304 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request); 305 306 if (ret) 307 return ret; 308 request.ifr_flags &= keep; 309 request.ifr_flags |= flags & ~keep; 310 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request); 311 } 312 313 /** 314 * Get device current raw clock counter 315 * 316 * @param dev 317 * Pointer to Ethernet device structure. 318 * @param[out] time 319 * Current raw clock counter of the device. 320 * 321 * @return 322 * 0 if the clock has correctly been read 323 * The value of errno in case of error 324 */ 325 int 326 mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock) 327 { 328 struct mlx5_priv *priv = dev->data->dev_private; 329 struct ibv_context *ctx = priv->sh->cdev->ctx; 330 struct ibv_values_ex values; 331 int err = 0; 332 333 values.comp_mask = IBV_VALUES_MASK_RAW_CLOCK; 334 err = mlx5_glue->query_rt_values_ex(ctx, &values); 335 if (err != 0) { 336 DRV_LOG(WARNING, "Could not query the clock !"); 337 return err; 338 } 339 *clock = values.raw_clock.tv_nsec; 340 return 0; 341 } 342 343 /** 344 * Retrieve the master device for representor in the same switch domain. 345 * 346 * @param dev 347 * Pointer to representor Ethernet device structure. 348 * 349 * @return 350 * Master device structure on success, NULL otherwise. 351 */ 352 static struct rte_eth_dev * 353 mlx5_find_master_dev(struct rte_eth_dev *dev) 354 { 355 struct mlx5_priv *priv; 356 uint16_t port_id; 357 uint16_t domain_id; 358 359 priv = dev->data->dev_private; 360 domain_id = priv->domain_id; 361 MLX5_ASSERT(priv->representor); 362 MLX5_ETH_FOREACH_DEV(port_id, dev->device) { 363 struct mlx5_priv *opriv = 364 rte_eth_devices[port_id].data->dev_private; 365 if (opriv && 366 opriv->master && 367 opriv->domain_id == domain_id && 368 opriv->sh == priv->sh) 369 return &rte_eth_devices[port_id]; 370 } 371 return NULL; 372 } 373 374 /** 375 * DPDK callback to retrieve physical link information. 376 * 377 * @param dev 378 * Pointer to Ethernet device structure. 379 * @param[out] link 380 * Storage for current link status. 381 * 382 * @return 383 * 0 on success, a negative errno value otherwise and rte_errno is set. 384 */ 385 static int 386 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev, 387 struct rte_eth_link *link) 388 { 389 struct mlx5_priv *priv = dev->data->dev_private; 390 struct ethtool_cmd edata = { 391 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */ 392 }; 393 struct ifreq ifr; 394 struct rte_eth_link dev_link; 395 int link_speed = 0; 396 int ret; 397 398 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 399 if (ret) { 400 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s", 401 dev->data->port_id, strerror(rte_errno)); 402 return ret; 403 } 404 dev_link = (struct rte_eth_link) { 405 .link_status = ((ifr.ifr_flags & IFF_UP) && 406 (ifr.ifr_flags & IFF_RUNNING)), 407 }; 408 ifr = (struct ifreq) { 409 .ifr_data = (void *)&edata, 410 }; 411 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 412 if (ret) { 413 if (ret == -ENOTSUP && priv->representor) { 414 struct rte_eth_dev *master; 415 416 /* 417 * For representors we can try to inherit link 418 * settings from the master device. Actually 419 * link settings do not make a lot of sense 420 * for representors due to missing physical 421 * link. The old kernel drivers supported 422 * emulated settings query for representors, 423 * the new ones do not, so we have to add 424 * this code for compatibility issues. 425 */ 426 master = mlx5_find_master_dev(dev); 427 if (master) { 428 ifr = (struct ifreq) { 429 .ifr_data = (void *)&edata, 430 }; 431 ret = mlx5_ifreq(master, SIOCETHTOOL, &ifr); 432 } 433 } 434 if (ret) { 435 DRV_LOG(WARNING, 436 "port %u ioctl(SIOCETHTOOL," 437 " ETHTOOL_GSET) failed: %s", 438 dev->data->port_id, strerror(rte_errno)); 439 return ret; 440 } 441 } 442 link_speed = ethtool_cmd_speed(&edata); 443 if (link_speed == -1) 444 dev_link.link_speed = RTE_ETH_SPEED_NUM_UNKNOWN; 445 else 446 dev_link.link_speed = link_speed; 447 priv->link_speed_capa = 0; 448 if (edata.supported & (SUPPORTED_1000baseT_Full | 449 SUPPORTED_1000baseKX_Full)) 450 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_1G; 451 if (edata.supported & SUPPORTED_10000baseKR_Full) 452 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_10G; 453 if (edata.supported & (SUPPORTED_40000baseKR4_Full | 454 SUPPORTED_40000baseCR4_Full | 455 SUPPORTED_40000baseSR4_Full | 456 SUPPORTED_40000baseLR4_Full)) 457 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_40G; 458 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ? 459 RTE_ETH_LINK_HALF_DUPLEX : RTE_ETH_LINK_FULL_DUPLEX); 460 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 461 RTE_ETH_LINK_SPEED_FIXED); 462 *link = dev_link; 463 return 0; 464 } 465 466 /** 467 * Retrieve physical link information (unlocked version using new ioctl). 468 * 469 * @param dev 470 * Pointer to Ethernet device structure. 471 * @param[out] link 472 * Storage for current link status. 473 * 474 * @return 475 * 0 on success, a negative errno value otherwise and rte_errno is set. 476 */ 477 static int 478 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, 479 struct rte_eth_link *link) 480 481 { 482 struct mlx5_priv *priv = dev->data->dev_private; 483 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS }; 484 struct ifreq ifr; 485 struct rte_eth_link dev_link; 486 struct rte_eth_dev *master = NULL; 487 uint64_t sc; 488 int ret; 489 490 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr); 491 if (ret) { 492 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s", 493 dev->data->port_id, strerror(rte_errno)); 494 return ret; 495 } 496 dev_link = (struct rte_eth_link) { 497 .link_status = ((ifr.ifr_flags & IFF_UP) && 498 (ifr.ifr_flags & IFF_RUNNING)), 499 }; 500 ifr = (struct ifreq) { 501 .ifr_data = (void *)&gcmd, 502 }; 503 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 504 if (ret) { 505 if (ret == -ENOTSUP && priv->representor) { 506 /* 507 * For representors we can try to inherit link 508 * settings from the master device. Actually 509 * link settings do not make a lot of sense 510 * for representors due to missing physical 511 * link. The old kernel drivers supported 512 * emulated settings query for representors, 513 * the new ones do not, so we have to add 514 * this code for compatibility issues. 515 */ 516 master = mlx5_find_master_dev(dev); 517 if (master) { 518 ifr = (struct ifreq) { 519 .ifr_data = (void *)&gcmd, 520 }; 521 ret = mlx5_ifreq(master, SIOCETHTOOL, &ifr); 522 } 523 } 524 if (ret) { 525 DRV_LOG(DEBUG, 526 "port %u ioctl(SIOCETHTOOL," 527 " ETHTOOL_GLINKSETTINGS) failed: %s", 528 dev->data->port_id, strerror(rte_errno)); 529 return ret; 530 } 531 } 532 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords; 533 534 alignas(struct ethtool_link_settings) 535 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) + 536 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3]; 537 struct ethtool_link_settings *ecmd = (void *)data; 538 539 *ecmd = gcmd; 540 ifr.ifr_data = (void *)ecmd; 541 ret = mlx5_ifreq(master ? master : dev, SIOCETHTOOL, &ifr); 542 if (ret) { 543 DRV_LOG(DEBUG, 544 "port %u ioctl(SIOCETHTOOL," 545 "ETHTOOL_GLINKSETTINGS) failed: %s", 546 dev->data->port_id, strerror(rte_errno)); 547 return ret; 548 } 549 dev_link.link_speed = (ecmd->speed == UINT32_MAX) ? 550 RTE_ETH_SPEED_NUM_UNKNOWN : ecmd->speed; 551 sc = ecmd->link_mode_masks[0] | 552 ((uint64_t)ecmd->link_mode_masks[1] << 32); 553 priv->link_speed_capa = 0; 554 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) | 555 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT))) 556 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_1G; 557 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) | 558 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) | 559 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT))) 560 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_10G; 561 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) | 562 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT))) 563 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_20G; 564 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) | 565 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) | 566 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) | 567 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT))) 568 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_40G; 569 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) | 570 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) | 571 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) | 572 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT))) 573 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_56G; 574 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) | 575 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) | 576 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT))) 577 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_25G; 578 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) | 579 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT))) 580 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_50G; 581 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) | 582 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) | 583 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) | 584 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT))) 585 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_100G; 586 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT) | 587 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT))) 588 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_200G; 589 590 sc = ecmd->link_mode_masks[2] | 591 ((uint64_t)ecmd->link_mode_masks[3] << 32); 592 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT) | 593 MLX5_BITSHIFT 594 (ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT) | 595 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT))) 596 priv->link_speed_capa |= RTE_ETH_LINK_SPEED_200G; 597 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ? 598 RTE_ETH_LINK_HALF_DUPLEX : RTE_ETH_LINK_FULL_DUPLEX); 599 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 600 RTE_ETH_LINK_SPEED_FIXED); 601 *link = dev_link; 602 return 0; 603 } 604 605 /** 606 * DPDK callback to retrieve physical link information. 607 * 608 * @param dev 609 * Pointer to Ethernet device structure. 610 * @param wait_to_complete 611 * Wait for request completion. 612 * 613 * @return 614 * 0 if link status was not updated, positive if it was, a negative errno 615 * value otherwise and rte_errno is set. 616 */ 617 int 618 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete) 619 { 620 int ret; 621 struct rte_eth_link dev_link; 622 time_t start_time = time(NULL); 623 int retry = MLX5_GET_LINK_STATUS_RETRY_COUNT; 624 625 do { 626 ret = mlx5_link_update_unlocked_gs(dev, &dev_link); 627 if (ret == -ENOTSUP) 628 ret = mlx5_link_update_unlocked_gset(dev, &dev_link); 629 if (ret == 0) 630 break; 631 /* Handle wait to complete situation. */ 632 if ((wait_to_complete || retry) && ret == -EAGAIN) { 633 if (abs((int)difftime(time(NULL), start_time)) < 634 MLX5_LINK_STATUS_TIMEOUT) { 635 usleep(0); 636 continue; 637 } else { 638 rte_errno = EBUSY; 639 return -rte_errno; 640 } 641 } else if (ret < 0) { 642 return ret; 643 } 644 } while (wait_to_complete || retry-- > 0); 645 ret = !!memcmp(&dev->data->dev_link, &dev_link, 646 sizeof(struct rte_eth_link)); 647 dev->data->dev_link = dev_link; 648 return ret; 649 } 650 651 /** 652 * DPDK callback to get flow control status. 653 * 654 * @param dev 655 * Pointer to Ethernet device structure. 656 * @param[out] fc_conf 657 * Flow control output buffer. 658 * 659 * @return 660 * 0 on success, a negative errno value otherwise and rte_errno is set. 661 */ 662 int 663 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 664 { 665 struct ifreq ifr; 666 struct ethtool_pauseparam ethpause = { 667 .cmd = ETHTOOL_GPAUSEPARAM 668 }; 669 int ret; 670 671 ifr.ifr_data = (void *)ðpause; 672 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 673 if (ret) { 674 DRV_LOG(WARNING, 675 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:" 676 " %s", 677 dev->data->port_id, strerror(rte_errno)); 678 return ret; 679 } 680 fc_conf->autoneg = ethpause.autoneg; 681 if (ethpause.rx_pause && ethpause.tx_pause) 682 fc_conf->mode = RTE_ETH_FC_FULL; 683 else if (ethpause.rx_pause) 684 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; 685 else if (ethpause.tx_pause) 686 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; 687 else 688 fc_conf->mode = RTE_ETH_FC_NONE; 689 return 0; 690 } 691 692 /** 693 * DPDK callback to modify flow control parameters. 694 * 695 * @param dev 696 * Pointer to Ethernet device structure. 697 * @param[in] fc_conf 698 * Flow control parameters. 699 * 700 * @return 701 * 0 on success, a negative errno value otherwise and rte_errno is set. 702 */ 703 int 704 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 705 { 706 struct ifreq ifr; 707 struct ethtool_pauseparam ethpause = { 708 .cmd = ETHTOOL_SPAUSEPARAM 709 }; 710 int ret; 711 712 ifr.ifr_data = (void *)ðpause; 713 ethpause.autoneg = fc_conf->autoneg; 714 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) || 715 (fc_conf->mode & RTE_ETH_FC_RX_PAUSE)) 716 ethpause.rx_pause = 1; 717 else 718 ethpause.rx_pause = 0; 719 720 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) || 721 (fc_conf->mode & RTE_ETH_FC_TX_PAUSE)) 722 ethpause.tx_pause = 1; 723 else 724 ethpause.tx_pause = 0; 725 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 726 if (ret) { 727 DRV_LOG(WARNING, 728 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)" 729 " failed: %s", 730 dev->data->port_id, strerror(rte_errno)); 731 return ret; 732 } 733 return 0; 734 } 735 736 /** 737 * Handle asynchronous removal event for entire multiport device. 738 * 739 * @param sh 740 * Infiniband device shared context. 741 */ 742 static void 743 mlx5_dev_interrupt_device_fatal(struct mlx5_dev_ctx_shared *sh) 744 { 745 uint32_t i; 746 747 for (i = 0; i < sh->max_port; ++i) { 748 struct rte_eth_dev *dev; 749 750 if (sh->port[i].ih_port_id >= RTE_MAX_ETHPORTS) { 751 /* 752 * Or not existing port either no 753 * handler installed for this port. 754 */ 755 continue; 756 } 757 dev = &rte_eth_devices[sh->port[i].ih_port_id]; 758 MLX5_ASSERT(dev); 759 if (dev->data->dev_conf.intr_conf.rmv) 760 rte_eth_dev_callback_process 761 (dev, RTE_ETH_EVENT_INTR_RMV, NULL); 762 } 763 } 764 765 static void 766 mlx5_dev_interrupt_nl_cb(struct nlmsghdr *hdr, void *cb_arg) 767 { 768 struct mlx5_dev_ctx_shared *sh = cb_arg; 769 uint32_t i; 770 uint32_t if_index; 771 772 if (mlx5_nl_parse_link_status_update(hdr, &if_index) < 0) 773 return; 774 for (i = 0; i < sh->max_port; i++) { 775 struct mlx5_dev_shared_port *port = &sh->port[i]; 776 struct rte_eth_dev *dev; 777 struct mlx5_priv *priv; 778 779 if (port->nl_ih_port_id >= RTE_MAX_ETHPORTS) 780 continue; 781 dev = &rte_eth_devices[port->nl_ih_port_id]; 782 /* Probing may initiate an LSC before configuration is done. */ 783 if (dev->data->dev_configured && 784 !dev->data->dev_conf.intr_conf.lsc) 785 break; 786 priv = dev->data->dev_private; 787 if (priv->if_index == if_index) { 788 /* Block logical LSC events. */ 789 uint16_t prev_status = dev->data->dev_link.link_status; 790 791 if (mlx5_link_update(dev, 0) < 0) 792 DRV_LOG(ERR, "Failed to update link status: %s", 793 rte_strerror(rte_errno)); 794 else if (prev_status != dev->data->dev_link.link_status) 795 rte_eth_dev_callback_process 796 (dev, RTE_ETH_EVENT_INTR_LSC, NULL); 797 break; 798 } 799 } 800 } 801 802 void 803 mlx5_dev_interrupt_handler_nl(void *arg) 804 { 805 struct mlx5_dev_ctx_shared *sh = arg; 806 int nlsk_fd = rte_intr_fd_get(sh->intr_handle_nl); 807 808 if (nlsk_fd < 0) 809 return; 810 if (mlx5_nl_read_events(nlsk_fd, mlx5_dev_interrupt_nl_cb, sh) < 0) 811 DRV_LOG(ERR, "Failed to process Netlink events: %s", 812 rte_strerror(rte_errno)); 813 } 814 815 /** 816 * Handle shared asynchronous events the NIC (removal event 817 * and link status change). Supports multiport IB device. 818 * 819 * @param cb_arg 820 * Callback argument. 821 */ 822 void 823 mlx5_dev_interrupt_handler(void *cb_arg) 824 { 825 struct mlx5_dev_ctx_shared *sh = cb_arg; 826 struct ibv_async_event event; 827 828 /* Read all message from the IB device and acknowledge them. */ 829 for (;;) { 830 struct rte_eth_dev *dev; 831 uint32_t tmp; 832 833 if (mlx5_glue->get_async_event(sh->cdev->ctx, &event)) 834 break; 835 /* Retrieve and check IB port index. */ 836 tmp = (uint32_t)event.element.port_num; 837 if (!tmp && event.event_type == IBV_EVENT_DEVICE_FATAL) { 838 /* 839 * The DEVICE_FATAL event is called once for 840 * entire device without port specifying. 841 * We should notify all existing ports. 842 */ 843 mlx5_glue->ack_async_event(&event); 844 mlx5_dev_interrupt_device_fatal(sh); 845 continue; 846 } 847 MLX5_ASSERT(tmp && (tmp <= sh->max_port)); 848 if (!tmp) { 849 /* Unsupported device level event. */ 850 mlx5_glue->ack_async_event(&event); 851 DRV_LOG(DEBUG, 852 "unsupported common event (type %d)", 853 event.event_type); 854 continue; 855 } 856 if (tmp > sh->max_port) { 857 /* Invalid IB port index. */ 858 mlx5_glue->ack_async_event(&event); 859 DRV_LOG(DEBUG, 860 "cannot handle an event (type %d)" 861 "due to invalid IB port index (%u)", 862 event.event_type, tmp); 863 continue; 864 } 865 if (sh->port[tmp - 1].ih_port_id >= RTE_MAX_ETHPORTS) { 866 /* No handler installed. */ 867 mlx5_glue->ack_async_event(&event); 868 DRV_LOG(DEBUG, 869 "cannot handle an event (type %d)" 870 "due to no handler installed for port %u", 871 event.event_type, tmp); 872 continue; 873 } 874 /* Retrieve ethernet device descriptor. */ 875 tmp = sh->port[tmp - 1].ih_port_id; 876 dev = &rte_eth_devices[tmp]; 877 MLX5_ASSERT(dev); 878 DRV_LOG(DEBUG, 879 "port %u cannot handle an unknown event (type %d)", 880 dev->data->port_id, event.event_type); 881 mlx5_glue->ack_async_event(&event); 882 } 883 } 884 885 /** 886 * Handle DEVX interrupts from the NIC. 887 * This function is probably called from the DPDK host thread. 888 * 889 * @param cb_arg 890 * Callback argument. 891 */ 892 void 893 mlx5_dev_interrupt_handler_devx(void *cb_arg) 894 { 895 #ifndef HAVE_IBV_DEVX_ASYNC 896 (void)cb_arg; 897 return; 898 #else 899 struct mlx5_dev_ctx_shared *sh = cb_arg; 900 union { 901 struct mlx5dv_devx_async_cmd_hdr cmd_resp; 902 uint8_t buf[MLX5_ST_SZ_BYTES(query_flow_counter_out) + 903 MLX5_ST_SZ_BYTES(traffic_counter) + 904 sizeof(struct mlx5dv_devx_async_cmd_hdr)]; 905 } out; 906 uint8_t *buf = out.buf + sizeof(out.cmd_resp); 907 908 while (!mlx5_glue->devx_get_async_cmd_comp(sh->devx_comp, 909 &out.cmd_resp, 910 sizeof(out.buf))) 911 mlx5_flow_async_pool_query_handle 912 (sh, (uint64_t)out.cmd_resp.wr_id, 913 mlx5_devx_get_out_command_status(buf)); 914 #endif /* HAVE_IBV_DEVX_ASYNC */ 915 } 916 917 /** 918 * DPDK callback to bring the link DOWN. 919 * 920 * @param dev 921 * Pointer to Ethernet device structure. 922 * 923 * @return 924 * 0 on success, a negative errno value otherwise and rte_errno is set. 925 */ 926 int 927 mlx5_set_link_down(struct rte_eth_dev *dev) 928 { 929 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP); 930 } 931 932 /** 933 * DPDK callback to bring the link UP. 934 * 935 * @param dev 936 * Pointer to Ethernet device structure. 937 * 938 * @return 939 * 0 on success, a negative errno value otherwise and rte_errno is set. 940 */ 941 int 942 mlx5_set_link_up(struct rte_eth_dev *dev) 943 { 944 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP); 945 } 946 947 /** 948 * Check if mlx5 device was removed. 949 * 950 * @param dev 951 * Pointer to Ethernet device structure. 952 * 953 * @return 954 * 1 when device is removed, otherwise 0. 955 */ 956 int 957 mlx5_is_removed(struct rte_eth_dev *dev) 958 { 959 struct ibv_device_attr device_attr; 960 struct mlx5_priv *priv = dev->data->dev_private; 961 962 if (mlx5_glue->query_device(priv->sh->cdev->ctx, &device_attr) == EIO) 963 return 1; 964 return 0; 965 } 966 967 /** 968 * Analyze gathered port parameters via sysfs to recognize master 969 * and representor devices for E-Switch configuration. 970 * 971 * @param[in] device_dir 972 * flag of presence of "device" directory under port device key. 973 * @param[inout] switch_info 974 * Port information, including port name as a number and port name 975 * type if recognized 976 * 977 * @return 978 * master and representor flags are set in switch_info according to 979 * recognized parameters (if any). 980 */ 981 static void 982 mlx5_sysfs_check_switch_info(bool device_dir, 983 struct mlx5_switch_info *switch_info) 984 { 985 switch (switch_info->name_type) { 986 case MLX5_PHYS_PORT_NAME_TYPE_UNKNOWN: 987 /* 988 * Name is not recognized, assume the master, 989 * check the device directory presence. 990 */ 991 switch_info->master = device_dir; 992 break; 993 case MLX5_PHYS_PORT_NAME_TYPE_NOTSET: 994 /* 995 * Name is not set, this assumes the legacy naming 996 * schema for master, just check if there is 997 * a device directory. 998 */ 999 switch_info->master = device_dir; 1000 break; 1001 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: 1002 /* New uplink naming schema recognized. */ 1003 switch_info->master = 1; 1004 break; 1005 case MLX5_PHYS_PORT_NAME_TYPE_LEGACY: 1006 /* Legacy representors naming schema. */ 1007 switch_info->representor = !device_dir; 1008 break; 1009 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF: 1010 /* Fallthrough */ 1011 case MLX5_PHYS_PORT_NAME_TYPE_PFVF: 1012 /* Fallthrough */ 1013 case MLX5_PHYS_PORT_NAME_TYPE_PFSF: 1014 /* New representors naming schema. */ 1015 switch_info->representor = 1; 1016 break; 1017 default: 1018 switch_info->master = device_dir; 1019 break; 1020 } 1021 } 1022 1023 /** 1024 * Get switch information associated with network interface. 1025 * 1026 * @param ifindex 1027 * Network interface index. 1028 * @param[out] info 1029 * Switch information object, populated in case of success. 1030 * 1031 * @return 1032 * 0 on success, a negative errno value otherwise and rte_errno is set. 1033 */ 1034 int 1035 mlx5_sysfs_switch_info(unsigned int ifindex, struct mlx5_switch_info *info) 1036 { 1037 char ifname[IF_NAMESIZE]; 1038 char *port_name = NULL; 1039 size_t port_name_size = 0; 1040 FILE *file; 1041 struct mlx5_switch_info data = { 1042 .master = 0, 1043 .representor = 0, 1044 .name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET, 1045 .port_name = 0, 1046 .switch_id = 0, 1047 }; 1048 DIR *dir; 1049 bool port_switch_id_set = false; 1050 bool device_dir = false; 1051 char c; 1052 ssize_t line_size; 1053 1054 if (!if_indextoname(ifindex, ifname)) { 1055 rte_errno = errno; 1056 return -rte_errno; 1057 } 1058 1059 MKSTR(phys_port_name, "/sys/class/net/%s/phys_port_name", 1060 ifname); 1061 MKSTR(phys_switch_id, "/sys/class/net/%s/phys_switch_id", 1062 ifname); 1063 MKSTR(pci_device, "/sys/class/net/%s/device", 1064 ifname); 1065 1066 file = fopen(phys_port_name, "rb"); 1067 if (file != NULL) { 1068 char *tail_nl; 1069 1070 line_size = getline(&port_name, &port_name_size, file); 1071 if (line_size < 0) { 1072 fclose(file); 1073 rte_errno = errno; 1074 return -rte_errno; 1075 } else if (line_size > 0) { 1076 /* Remove tailing newline character. */ 1077 tail_nl = strchr(port_name, '\n'); 1078 if (tail_nl) 1079 *tail_nl = '\0'; 1080 mlx5_translate_port_name(port_name, &data); 1081 } 1082 free(port_name); 1083 fclose(file); 1084 } 1085 file = fopen(phys_switch_id, "rb"); 1086 if (file == NULL) { 1087 rte_errno = errno; 1088 return -rte_errno; 1089 } 1090 port_switch_id_set = 1091 fscanf(file, "%" SCNx64 "%c", &data.switch_id, &c) == 2 && 1092 c == '\n'; 1093 fclose(file); 1094 dir = opendir(pci_device); 1095 if (dir != NULL) { 1096 closedir(dir); 1097 device_dir = true; 1098 } 1099 if (port_switch_id_set) { 1100 /* We have some E-Switch configuration. */ 1101 mlx5_sysfs_check_switch_info(device_dir, &data); 1102 } 1103 *info = data; 1104 MLX5_ASSERT(!(data.master && data.representor)); 1105 if (data.master && data.representor) { 1106 DRV_LOG(ERR, "ifindex %u device is recognized as master" 1107 " and as representor", ifindex); 1108 rte_errno = ENODEV; 1109 return -rte_errno; 1110 } 1111 return 0; 1112 } 1113 1114 /** 1115 * Get bond information associated with network interface. 1116 * 1117 * @param pf_ifindex 1118 * Network interface index of bond slave interface 1119 * @param[out] ifindex 1120 * Pointer to bond ifindex. 1121 * @param[out] ifname 1122 * Pointer to bond ifname. 1123 * 1124 * @return 1125 * 0 on success, a negative errno value otherwise and rte_errno is set. 1126 */ 1127 int 1128 mlx5_sysfs_bond_info(unsigned int pf_ifindex, unsigned int *ifindex, 1129 char *ifname) 1130 { 1131 char name[IF_NAMESIZE]; 1132 FILE *file; 1133 unsigned int index; 1134 int ret; 1135 1136 if (!if_indextoname(pf_ifindex, name) || !strlen(name)) { 1137 rte_errno = errno; 1138 return -rte_errno; 1139 } 1140 MKSTR(bond_if, "/sys/class/net/%s/master/ifindex", name); 1141 /* read bond ifindex */ 1142 file = fopen(bond_if, "rb"); 1143 if (file == NULL) { 1144 rte_errno = errno; 1145 return -rte_errno; 1146 } 1147 ret = fscanf(file, "%u", &index); 1148 fclose(file); 1149 if (ret <= 0) { 1150 rte_errno = errno; 1151 return -rte_errno; 1152 } 1153 if (ifindex) 1154 *ifindex = index; 1155 1156 /* read bond device name from symbol link */ 1157 if (ifname) { 1158 if (!if_indextoname(index, ifname)) { 1159 rte_errno = errno; 1160 return -rte_errno; 1161 } 1162 } 1163 return 0; 1164 } 1165 1166 /** 1167 * DPDK callback to retrieve plug-in module EEPROM information (type and size). 1168 * 1169 * @param dev 1170 * Pointer to Ethernet device structure. 1171 * @param[out] modinfo 1172 * Storage for plug-in module EEPROM information. 1173 * 1174 * @return 1175 * 0 on success, a negative errno value otherwise and rte_errno is set. 1176 */ 1177 int 1178 mlx5_get_module_info(struct rte_eth_dev *dev, 1179 struct rte_eth_dev_module_info *modinfo) 1180 { 1181 struct ethtool_modinfo info = { 1182 .cmd = ETHTOOL_GMODULEINFO, 1183 }; 1184 struct ifreq ifr = (struct ifreq) { 1185 .ifr_data = (void *)&info, 1186 }; 1187 int ret = 0; 1188 1189 if (!dev) { 1190 DRV_LOG(WARNING, "missing argument, cannot get module info"); 1191 rte_errno = EINVAL; 1192 return -rte_errno; 1193 } 1194 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1195 if (ret) { 1196 DRV_LOG(WARNING, "port %u ioctl(SIOCETHTOOL) failed: %s", 1197 dev->data->port_id, strerror(rte_errno)); 1198 return ret; 1199 } 1200 modinfo->type = info.type; 1201 modinfo->eeprom_len = info.eeprom_len; 1202 return ret; 1203 } 1204 1205 /** 1206 * DPDK callback to retrieve plug-in module EEPROM data. 1207 * 1208 * @param dev 1209 * Pointer to Ethernet device structure. 1210 * @param[out] info 1211 * Storage for plug-in module EEPROM data. 1212 * 1213 * @return 1214 * 0 on success, a negative errno value otherwise and rte_errno is set. 1215 */ 1216 int mlx5_get_module_eeprom(struct rte_eth_dev *dev, 1217 struct rte_dev_eeprom_info *info) 1218 { 1219 struct ethtool_eeprom *eeprom; 1220 struct ifreq ifr; 1221 int ret = 0; 1222 1223 if (!dev) { 1224 DRV_LOG(WARNING, "missing argument, cannot get module eeprom"); 1225 rte_errno = EINVAL; 1226 return -rte_errno; 1227 } 1228 eeprom = mlx5_malloc(MLX5_MEM_ZERO, 1229 (sizeof(struct ethtool_eeprom) + info->length), 0, 1230 SOCKET_ID_ANY); 1231 if (!eeprom) { 1232 DRV_LOG(WARNING, "port %u cannot allocate memory for " 1233 "eeprom data", dev->data->port_id); 1234 rte_errno = ENOMEM; 1235 return -rte_errno; 1236 } 1237 eeprom->cmd = ETHTOOL_GMODULEEEPROM; 1238 eeprom->offset = info->offset; 1239 eeprom->len = info->length; 1240 ifr = (struct ifreq) { 1241 .ifr_data = (void *)eeprom, 1242 }; 1243 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1244 if (ret) 1245 DRV_LOG(WARNING, "port %u ioctl(SIOCETHTOOL) failed: %s", 1246 dev->data->port_id, strerror(rte_errno)); 1247 else 1248 rte_memcpy(info->data, eeprom->data, info->length); 1249 mlx5_free(eeprom); 1250 return ret; 1251 } 1252 1253 /** 1254 * Read device counters table. 1255 * 1256 * @param dev 1257 * Pointer to Ethernet device. 1258 * @param[in] pf 1259 * PF index in case of bonding device, -1 otherwise 1260 * @param[out] stats 1261 * Counters table output buffer. 1262 * 1263 * @return 1264 * 0 on success and stats is filled, negative errno value otherwise and 1265 * rte_errno is set. 1266 */ 1267 static int 1268 _mlx5_os_read_dev_counters(struct rte_eth_dev *dev, int pf, uint64_t *stats) 1269 { 1270 struct mlx5_priv *priv = dev->data->dev_private; 1271 struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl; 1272 unsigned int i; 1273 struct ifreq ifr; 1274 unsigned int stats_sz = xstats_ctrl->stats_n * sizeof(uint64_t); 1275 unsigned char et_stat_buf[sizeof(struct ethtool_stats) + stats_sz]; 1276 struct ethtool_stats *et_stats = (struct ethtool_stats *)et_stat_buf; 1277 int ret; 1278 1279 et_stats->cmd = ETHTOOL_GSTATS; 1280 et_stats->n_stats = xstats_ctrl->stats_n; 1281 ifr.ifr_data = (caddr_t)et_stats; 1282 if (pf >= 0) 1283 ret = mlx5_ifreq_by_ifname(priv->sh->bond.ports[pf].ifname, 1284 SIOCETHTOOL, &ifr); 1285 else 1286 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1287 if (ret) { 1288 DRV_LOG(WARNING, 1289 "port %u unable to read statistic values from device", 1290 dev->data->port_id); 1291 return ret; 1292 } 1293 for (i = 0; i != xstats_ctrl->mlx5_stats_n; ++i) { 1294 if (xstats_ctrl->info[i].dev) 1295 continue; 1296 stats[i] += (uint64_t) 1297 et_stats->data[xstats_ctrl->dev_table_idx[i]]; 1298 } 1299 return 0; 1300 } 1301 1302 /** 1303 * Read device counters. 1304 * 1305 * @param dev 1306 * Pointer to Ethernet device. 1307 * @param[out] stats 1308 * Counters table output buffer. 1309 * 1310 * @return 1311 * 0 on success and stats is filled, negative errno value otherwise and 1312 * rte_errno is set. 1313 */ 1314 int 1315 mlx5_os_read_dev_counters(struct rte_eth_dev *dev, uint64_t *stats) 1316 { 1317 struct mlx5_priv *priv = dev->data->dev_private; 1318 struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl; 1319 int ret = 0, i; 1320 1321 memset(stats, 0, sizeof(*stats) * xstats_ctrl->mlx5_stats_n); 1322 /* Read ifreq counters. */ 1323 if (priv->master && priv->pf_bond >= 0) { 1324 /* Sum xstats from bonding device member ports. */ 1325 for (i = 0; i < priv->sh->bond.n_port; i++) { 1326 ret = _mlx5_os_read_dev_counters(dev, i, stats); 1327 if (ret) 1328 return ret; 1329 } 1330 } else { 1331 ret = _mlx5_os_read_dev_counters(dev, -1, stats); 1332 if (ret) 1333 return ret; 1334 } 1335 /* Read IB counters. */ 1336 for (i = 0; i != xstats_ctrl->mlx5_stats_n; ++i) { 1337 if (!xstats_ctrl->info[i].dev) 1338 continue; 1339 /* return last xstats counter if fail to read. */ 1340 if (mlx5_os_read_dev_stat(priv, xstats_ctrl->info[i].ctr_name, 1341 &stats[i]) == 0) 1342 xstats_ctrl->xstats[i] = stats[i]; 1343 else 1344 stats[i] = xstats_ctrl->xstats[i]; 1345 } 1346 return ret; 1347 } 1348 1349 /** 1350 * Query the number of statistics provided by ETHTOOL. 1351 * 1352 * @param dev 1353 * Pointer to Ethernet device. 1354 * 1355 * @return 1356 * Number of statistics on success, negative errno value otherwise and 1357 * rte_errno is set. 1358 */ 1359 int 1360 mlx5_os_get_stats_n(struct rte_eth_dev *dev) 1361 { 1362 struct mlx5_priv *priv = dev->data->dev_private; 1363 struct ethtool_drvinfo drvinfo; 1364 struct ifreq ifr; 1365 int ret; 1366 1367 drvinfo.cmd = ETHTOOL_GDRVINFO; 1368 ifr.ifr_data = (caddr_t)&drvinfo; 1369 if (priv->master && priv->pf_bond >= 0) 1370 /* Bonding PF. */ 1371 ret = mlx5_ifreq_by_ifname(priv->sh->bond.ports[0].ifname, 1372 SIOCETHTOOL, &ifr); 1373 else 1374 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1375 if (ret) { 1376 DRV_LOG(WARNING, "port %u unable to query number of statistics", 1377 dev->data->port_id); 1378 return ret; 1379 } 1380 return drvinfo.n_stats; 1381 } 1382 1383 static const struct mlx5_counter_ctrl mlx5_counters_init[] = { 1384 { 1385 .dpdk_name = "rx_unicast_bytes", 1386 .ctr_name = "rx_vport_unicast_bytes", 1387 }, 1388 { 1389 .dpdk_name = "rx_multicast_bytes", 1390 .ctr_name = "rx_vport_multicast_bytes", 1391 }, 1392 { 1393 .dpdk_name = "rx_broadcast_bytes", 1394 .ctr_name = "rx_vport_broadcast_bytes", 1395 }, 1396 { 1397 .dpdk_name = "rx_unicast_packets", 1398 .ctr_name = "rx_vport_unicast_packets", 1399 }, 1400 { 1401 .dpdk_name = "rx_multicast_packets", 1402 .ctr_name = "rx_vport_multicast_packets", 1403 }, 1404 { 1405 .dpdk_name = "rx_broadcast_packets", 1406 .ctr_name = "rx_vport_broadcast_packets", 1407 }, 1408 { 1409 .dpdk_name = "tx_unicast_bytes", 1410 .ctr_name = "tx_vport_unicast_bytes", 1411 }, 1412 { 1413 .dpdk_name = "tx_multicast_bytes", 1414 .ctr_name = "tx_vport_multicast_bytes", 1415 }, 1416 { 1417 .dpdk_name = "tx_broadcast_bytes", 1418 .ctr_name = "tx_vport_broadcast_bytes", 1419 }, 1420 { 1421 .dpdk_name = "tx_unicast_packets", 1422 .ctr_name = "tx_vport_unicast_packets", 1423 }, 1424 { 1425 .dpdk_name = "tx_multicast_packets", 1426 .ctr_name = "tx_vport_multicast_packets", 1427 }, 1428 { 1429 .dpdk_name = "tx_broadcast_packets", 1430 .ctr_name = "tx_vport_broadcast_packets", 1431 }, 1432 { 1433 .dpdk_name = "rx_wqe_errors", 1434 .ctr_name = "rx_wqe_err", 1435 }, 1436 { 1437 .dpdk_name = "rx_phy_crc_errors", 1438 .ctr_name = "rx_crc_errors_phy", 1439 }, 1440 { 1441 .dpdk_name = "rx_phy_in_range_len_errors", 1442 .ctr_name = "rx_in_range_len_errors_phy", 1443 }, 1444 { 1445 .dpdk_name = "rx_phy_symbol_errors", 1446 .ctr_name = "rx_symbol_err_phy", 1447 }, 1448 { 1449 .dpdk_name = "tx_phy_errors", 1450 .ctr_name = "tx_errors_phy", 1451 }, 1452 { 1453 .dpdk_name = "rx_out_of_buffer", 1454 .ctr_name = "out_of_buffer", 1455 .dev = 1, 1456 }, 1457 { 1458 .dpdk_name = "tx_phy_packets", 1459 .ctr_name = "tx_packets_phy", 1460 }, 1461 { 1462 .dpdk_name = "rx_phy_packets", 1463 .ctr_name = "rx_packets_phy", 1464 }, 1465 { 1466 .dpdk_name = "tx_phy_discard_packets", 1467 .ctr_name = "tx_discards_phy", 1468 }, 1469 { 1470 .dpdk_name = "rx_phy_discard_packets", 1471 .ctr_name = "rx_discards_phy", 1472 }, 1473 { 1474 .dpdk_name = "rx_prio0_buf_discard_packets", 1475 .ctr_name = "rx_prio0_buf_discard", 1476 }, 1477 { 1478 .dpdk_name = "rx_prio1_buf_discard_packets", 1479 .ctr_name = "rx_prio1_buf_discard", 1480 }, 1481 { 1482 .dpdk_name = "rx_prio2_buf_discard_packets", 1483 .ctr_name = "rx_prio2_buf_discard", 1484 }, 1485 { 1486 .dpdk_name = "rx_prio3_buf_discard_packets", 1487 .ctr_name = "rx_prio3_buf_discard", 1488 }, 1489 { 1490 .dpdk_name = "rx_prio4_buf_discard_packets", 1491 .ctr_name = "rx_prio4_buf_discard", 1492 }, 1493 { 1494 .dpdk_name = "rx_prio5_buf_discard_packets", 1495 .ctr_name = "rx_prio5_buf_discard", 1496 }, 1497 { 1498 .dpdk_name = "rx_prio6_buf_discard_packets", 1499 .ctr_name = "rx_prio6_buf_discard", 1500 }, 1501 { 1502 .dpdk_name = "rx_prio7_buf_discard_packets", 1503 .ctr_name = "rx_prio7_buf_discard", 1504 }, 1505 { 1506 .dpdk_name = "rx_prio0_cong_discard_packets", 1507 .ctr_name = "rx_prio0_cong_discard", 1508 }, 1509 { 1510 .dpdk_name = "rx_prio1_cong_discard_packets", 1511 .ctr_name = "rx_prio1_cong_discard", 1512 }, 1513 { 1514 .dpdk_name = "rx_prio2_cong_discard_packets", 1515 .ctr_name = "rx_prio2_cong_discard", 1516 }, 1517 { 1518 .dpdk_name = "rx_prio3_cong_discard_packets", 1519 .ctr_name = "rx_prio3_cong_discard", 1520 }, 1521 { 1522 .dpdk_name = "rx_prio4_cong_discard_packets", 1523 .ctr_name = "rx_prio4_cong_discard", 1524 }, 1525 { 1526 .dpdk_name = "rx_prio5_cong_discard_packets", 1527 .ctr_name = "rx_prio5_cong_discard", 1528 }, 1529 { 1530 .dpdk_name = "rx_prio6_cong_discard_packets", 1531 .ctr_name = "rx_prio6_cong_discard", 1532 }, 1533 { 1534 .dpdk_name = "rx_prio7_cong_discard_packets", 1535 .ctr_name = "rx_prio7_cong_discard", 1536 }, 1537 { 1538 .dpdk_name = "tx_phy_bytes", 1539 .ctr_name = "tx_bytes_phy", 1540 }, 1541 { 1542 .dpdk_name = "rx_phy_bytes", 1543 .ctr_name = "rx_bytes_phy", 1544 }, 1545 /* Representor only */ 1546 { 1547 .dpdk_name = "rx_vport_packets", 1548 .ctr_name = "vport_rx_packets", 1549 }, 1550 { 1551 .dpdk_name = "rx_vport_bytes", 1552 .ctr_name = "vport_rx_bytes", 1553 }, 1554 { 1555 .dpdk_name = "tx_vport_packets", 1556 .ctr_name = "vport_tx_packets", 1557 }, 1558 { 1559 .dpdk_name = "tx_vport_bytes", 1560 .ctr_name = "vport_tx_bytes", 1561 }, 1562 }; 1563 1564 static const unsigned int xstats_n = RTE_DIM(mlx5_counters_init); 1565 1566 /** 1567 * Init the structures to read device counters. 1568 * 1569 * @param dev 1570 * Pointer to Ethernet device. 1571 */ 1572 void 1573 mlx5_os_stats_init(struct rte_eth_dev *dev) 1574 { 1575 struct mlx5_priv *priv = dev->data->dev_private; 1576 struct mlx5_xstats_ctrl *xstats_ctrl = &priv->xstats_ctrl; 1577 struct mlx5_stats_ctrl *stats_ctrl = &priv->stats_ctrl; 1578 unsigned int i; 1579 unsigned int j; 1580 struct ifreq ifr; 1581 struct ethtool_gstrings *strings = NULL; 1582 unsigned int dev_stats_n; 1583 unsigned int str_sz; 1584 int ret; 1585 1586 /* So that it won't aggregate for each init. */ 1587 xstats_ctrl->mlx5_stats_n = 0; 1588 ret = mlx5_os_get_stats_n(dev); 1589 if (ret < 0) { 1590 DRV_LOG(WARNING, "port %u no extended statistics available", 1591 dev->data->port_id); 1592 return; 1593 } 1594 dev_stats_n = ret; 1595 /* Allocate memory to grab stat names and values. */ 1596 str_sz = dev_stats_n * ETH_GSTRING_LEN; 1597 strings = (struct ethtool_gstrings *) 1598 mlx5_malloc(0, str_sz + sizeof(struct ethtool_gstrings), 0, 1599 SOCKET_ID_ANY); 1600 if (!strings) { 1601 DRV_LOG(WARNING, "port %u unable to allocate memory for xstats", 1602 dev->data->port_id); 1603 return; 1604 } 1605 strings->cmd = ETHTOOL_GSTRINGS; 1606 strings->string_set = ETH_SS_STATS; 1607 strings->len = dev_stats_n; 1608 ifr.ifr_data = (caddr_t)strings; 1609 if (priv->master && priv->pf_bond >= 0) 1610 /* Bonding master. */ 1611 ret = mlx5_ifreq_by_ifname(priv->sh->bond.ports[0].ifname, 1612 SIOCETHTOOL, &ifr); 1613 else 1614 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1615 if (ret) { 1616 DRV_LOG(WARNING, "port %u unable to get statistic names", 1617 dev->data->port_id); 1618 goto free; 1619 } 1620 for (i = 0; i != dev_stats_n; ++i) { 1621 const char *curr_string = (const char *) 1622 &strings->data[i * ETH_GSTRING_LEN]; 1623 1624 for (j = 0; j != xstats_n; ++j) { 1625 if (!strcmp(mlx5_counters_init[j].ctr_name, 1626 curr_string)) { 1627 unsigned int idx = xstats_ctrl->mlx5_stats_n++; 1628 1629 xstats_ctrl->dev_table_idx[idx] = i; 1630 xstats_ctrl->info[idx] = mlx5_counters_init[j]; 1631 break; 1632 } 1633 } 1634 } 1635 /* Add dev counters. */ 1636 MLX5_ASSERT(xstats_ctrl->mlx5_stats_n <= MLX5_MAX_XSTATS); 1637 for (i = 0; i != xstats_n; ++i) { 1638 if (mlx5_counters_init[i].dev) { 1639 unsigned int idx = xstats_ctrl->mlx5_stats_n++; 1640 1641 xstats_ctrl->info[idx] = mlx5_counters_init[i]; 1642 xstats_ctrl->hw_stats[idx] = 0; 1643 } 1644 } 1645 xstats_ctrl->stats_n = dev_stats_n; 1646 /* Copy to base at first time. */ 1647 ret = mlx5_os_read_dev_counters(dev, xstats_ctrl->base); 1648 if (ret) 1649 DRV_LOG(ERR, "port %u cannot read device counters: %s", 1650 dev->data->port_id, strerror(rte_errno)); 1651 mlx5_os_read_dev_stat(priv, "out_of_buffer", &stats_ctrl->imissed_base); 1652 stats_ctrl->imissed = 0; 1653 free: 1654 mlx5_free(strings); 1655 } 1656 1657 /** 1658 * Get MAC address by querying netdevice. 1659 * 1660 * @param[in] dev 1661 * Pointer to Ethernet device. 1662 * @param[out] mac 1663 * MAC address output buffer. 1664 * 1665 * @return 1666 * 0 on success, a negative errno value otherwise and rte_errno is set. 1667 */ 1668 int 1669 mlx5_get_mac(struct rte_eth_dev *dev, uint8_t (*mac)[RTE_ETHER_ADDR_LEN]) 1670 { 1671 struct ifreq request; 1672 int ret; 1673 1674 ret = mlx5_ifreq(dev, SIOCGIFHWADDR, &request); 1675 if (ret) 1676 return ret; 1677 memcpy(mac, request.ifr_hwaddr.sa_data, RTE_ETHER_ADDR_LEN); 1678 return 0; 1679 } 1680 1681 /* 1682 * Query dropless_rq private flag value provided by ETHTOOL. 1683 * 1684 * @param dev 1685 * Pointer to Ethernet device. 1686 * 1687 * @return 1688 * - 0 on success, flag is not set. 1689 * - 1 on success, flag is set. 1690 * - negative errno value otherwise and rte_errno is set. 1691 */ 1692 int mlx5_get_flag_dropless_rq(struct rte_eth_dev *dev) 1693 { 1694 struct ethtool_sset_info *sset_info = NULL; 1695 struct ethtool_drvinfo drvinfo; 1696 struct ifreq ifr; 1697 struct ethtool_gstrings *strings = NULL; 1698 struct ethtool_value flags; 1699 const int32_t flag_len = sizeof(flags.data) * CHAR_BIT; 1700 int32_t str_sz; 1701 int32_t len; 1702 int32_t i; 1703 int ret; 1704 1705 sset_info = mlx5_malloc(0, sizeof(struct ethtool_sset_info) + 1706 sizeof(uint32_t), 0, SOCKET_ID_ANY); 1707 if (sset_info == NULL) { 1708 rte_errno = ENOMEM; 1709 return -rte_errno; 1710 } 1711 sset_info->cmd = ETHTOOL_GSSET_INFO; 1712 sset_info->reserved = 0; 1713 sset_info->sset_mask = 1ULL << ETH_SS_PRIV_FLAGS; 1714 ifr.ifr_data = (caddr_t)&sset_info; 1715 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1716 if (!ret) { 1717 const uint32_t *sset_lengths = sset_info->data; 1718 1719 len = sset_info->sset_mask ? sset_lengths[0] : 0; 1720 } else if (ret == -EOPNOTSUPP) { 1721 drvinfo.cmd = ETHTOOL_GDRVINFO; 1722 ifr.ifr_data = (caddr_t)&drvinfo; 1723 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1724 if (ret) { 1725 DRV_LOG(WARNING, "port %u cannot get the driver info", 1726 dev->data->port_id); 1727 goto exit; 1728 } 1729 len = *(uint32_t *)((char *)&drvinfo + 1730 offsetof(struct ethtool_drvinfo, n_priv_flags)); 1731 } else { 1732 DRV_LOG(WARNING, "port %u cannot get the sset info", 1733 dev->data->port_id); 1734 goto exit; 1735 } 1736 if (!len) { 1737 DRV_LOG(WARNING, "port %u does not have private flag", 1738 dev->data->port_id); 1739 rte_errno = EOPNOTSUPP; 1740 ret = -rte_errno; 1741 goto exit; 1742 } else if (len > flag_len) { 1743 DRV_LOG(WARNING, "port %u maximal private flags number is %d", 1744 dev->data->port_id, flag_len); 1745 len = flag_len; 1746 } 1747 str_sz = ETH_GSTRING_LEN * len; 1748 strings = (struct ethtool_gstrings *) 1749 mlx5_malloc(0, str_sz + sizeof(struct ethtool_gstrings), 0, 1750 SOCKET_ID_ANY); 1751 if (!strings) { 1752 DRV_LOG(WARNING, "port %u unable to allocate memory for" 1753 " private flags", dev->data->port_id); 1754 rte_errno = ENOMEM; 1755 ret = -rte_errno; 1756 goto exit; 1757 } 1758 strings->cmd = ETHTOOL_GSTRINGS; 1759 strings->string_set = ETH_SS_PRIV_FLAGS; 1760 strings->len = len; 1761 ifr.ifr_data = (caddr_t)strings; 1762 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1763 if (ret) { 1764 DRV_LOG(WARNING, "port %u unable to get private flags strings", 1765 dev->data->port_id); 1766 goto exit; 1767 } 1768 for (i = 0; i < len; i++) { 1769 strings->data[(i + 1) * ETH_GSTRING_LEN - 1] = 0; 1770 if (!strcmp((const char *)strings->data + i * ETH_GSTRING_LEN, 1771 "dropless_rq")) 1772 break; 1773 } 1774 if (i == len) { 1775 DRV_LOG(WARNING, "port %u does not support dropless_rq", 1776 dev->data->port_id); 1777 rte_errno = EOPNOTSUPP; 1778 ret = -rte_errno; 1779 goto exit; 1780 } 1781 flags.cmd = ETHTOOL_GPFLAGS; 1782 ifr.ifr_data = (caddr_t)&flags; 1783 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr); 1784 if (ret) { 1785 DRV_LOG(WARNING, "port %u unable to get private flags status", 1786 dev->data->port_id); 1787 goto exit; 1788 } 1789 ret = !!(flags.data & (1U << i)); 1790 exit: 1791 mlx5_free(strings); 1792 mlx5_free(sset_info); 1793 return ret; 1794 } 1795 1796 /** 1797 * Unmaps HCA PCI BAR from the current process address space. 1798 * 1799 * @param dev 1800 * Pointer to Ethernet device structure. 1801 */ 1802 void mlx5_txpp_unmap_hca_bar(struct rte_eth_dev *dev) 1803 { 1804 struct mlx5_proc_priv *ppriv = dev->process_private; 1805 1806 if (ppriv && ppriv->hca_bar) { 1807 rte_mem_unmap(ppriv->hca_bar, MLX5_ST_SZ_BYTES(initial_seg)); 1808 ppriv->hca_bar = NULL; 1809 } 1810 } 1811 1812 /** 1813 * Maps HCA PCI BAR to the current process address space. 1814 * Stores pointer in the process private structure allowing 1815 * to read internal and real time counter directly from the HW. 1816 * 1817 * @param dev 1818 * Pointer to Ethernet device structure. 1819 * 1820 * @return 1821 * 0 on success and not NULL pointer to mapped area in process structure. 1822 * negative otherwise and NULL pointer 1823 */ 1824 int mlx5_txpp_map_hca_bar(struct rte_eth_dev *dev) 1825 { 1826 struct mlx5_proc_priv *ppriv = dev->process_private; 1827 char pci_addr[PCI_PRI_STR_SIZE] = { 0 }; 1828 void *base, *expected = NULL; 1829 int fd, ret; 1830 1831 if (!ppriv) { 1832 rte_errno = ENOMEM; 1833 return -rte_errno; 1834 } 1835 if (ppriv->hca_bar) 1836 return 0; 1837 ret = mlx5_dev_to_pci_str(dev->device, pci_addr, sizeof(pci_addr)); 1838 if (ret < 0) 1839 return -rte_errno; 1840 /* Open PCI device resource 0 - HCA initialize segment */ 1841 MKSTR(name, "/sys/bus/pci/devices/%s/resource0", pci_addr); 1842 fd = open(name, O_RDWR | O_SYNC); 1843 if (fd == -1) { 1844 rte_errno = ENOTSUP; 1845 return -ENOTSUP; 1846 } 1847 base = rte_mem_map(NULL, MLX5_ST_SZ_BYTES(initial_seg), 1848 RTE_PROT_READ, RTE_MAP_SHARED, fd, 0); 1849 close(fd); 1850 if (!base) { 1851 rte_errno = ENOTSUP; 1852 return -ENOTSUP; 1853 } 1854 /* Check there is no concurrent mapping in other thread. */ 1855 if (!__atomic_compare_exchange_n(&ppriv->hca_bar, &expected, 1856 base, false, 1857 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 1858 rte_mem_unmap(base, MLX5_ST_SZ_BYTES(initial_seg)); 1859 return 0; 1860 } 1861 1862