17f5e6de5SItamar Gozlan /* SPDX-License-Identifier: BSD-3-Clause 27f5e6de5SItamar Gozlan * Copyright (c) 2023 NVIDIA Corporation & Affiliates 37f5e6de5SItamar Gozlan */ 47f5e6de5SItamar Gozlan 57f5e6de5SItamar Gozlan #ifndef MLX5DR_CRC32_C_ 67f5e6de5SItamar Gozlan #define MLX5DR_CRC32_C_ 77f5e6de5SItamar Gozlan 87f5e6de5SItamar Gozlan /* Ethernet AUTODIN II CRC32 (little-endian) 97f5e6de5SItamar Gozlan * CRC32_POLY 0xedb88320 107f5e6de5SItamar Gozlan */ 117f5e6de5SItamar Gozlan uint32_t mlx5dr_crc32_calc(uint8_t *p, size_t len); 127f5e6de5SItamar Gozlan 13*2acdf09bSHamdan Igbaria /* Standard CRC16 calculation using the crc_tab16 param to indicate 14*2acdf09bSHamdan Igbaria * the pre-calculated polynome hash values. 15*2acdf09bSHamdan Igbaria */ 16*2acdf09bSHamdan Igbaria uint16_t mlx5dr_crc16_calc(uint8_t *p, size_t len, uint16_t crc_tab16[]); 17*2acdf09bSHamdan Igbaria 187f5e6de5SItamar Gozlan #endif /* MLX5DR_CRC32_C_ */ 19