1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2018-2022 Advanced Micro Devices, Inc. 3 */ 4 5 #ifndef _IONIC_RXTX_H_ 6 #define _IONIC_RXTX_H_ 7 8 #include <stdint.h> 9 10 #include "ionic_if.h" 11 12 struct ionic_rx_qcq; 13 struct ionic_tx_qcq; 14 struct rte_eth_dev; 15 struct rte_eth_rxconf; 16 struct rte_eth_rxq_info; 17 struct rte_eth_txconf; 18 struct rte_eth_txq_info; 19 struct rte_mbuf; 20 struct rte_mempool; 21 22 struct ionic_rx_service { 23 /* cb in */ 24 struct rte_mbuf **rx_pkts; 25 /* cb out */ 26 uint16_t nb_rx; 27 }; 28 29 #define IONIC_CSUM_FLAG_MASK (IONIC_RXQ_COMP_CSUM_F_VLAN - 1) 30 31 extern const uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK]; 32 extern const uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK]; 33 34 /* ionic_rxtx.c */ 35 int ionic_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, 36 uint16_t nb_desc, uint32_t socket_id, 37 const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp); 38 void ionic_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid); 39 int ionic_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id); 40 int ionic_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id); 41 42 int ionic_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, 43 uint16_t nb_desc, uint32_t socket_id, 44 const struct rte_eth_txconf *tx_conf); 45 void ionic_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid); 46 int ionic_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); 47 int ionic_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); 48 49 /* Helpers for optimized dev_stop() */ 50 void ionic_dev_rx_queue_stop_firsthalf(struct rte_eth_dev *dev, 51 uint16_t rx_queue_id); 52 void ionic_dev_rx_queue_stop_secondhalf(struct rte_eth_dev *dev, 53 uint16_t rx_queue_id); 54 void ionic_dev_tx_queue_stop_firsthalf(struct rte_eth_dev *dev, 55 uint16_t tx_queue_id); 56 void ionic_dev_tx_queue_stop_secondhalf(struct rte_eth_dev *dev, 57 uint16_t tx_queue_id); 58 59 void ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 60 struct rte_eth_rxq_info *qinfo); 61 void ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, 62 struct rte_eth_txq_info *qinfo); 63 64 int ionic_dev_rx_descriptor_status(void *rx_queue, uint16_t offset); 65 int ionic_dev_tx_descriptor_status(void *tx_queue, uint16_t offset); 66 67 const uint32_t *ionic_dev_supported_ptypes_get(struct rte_eth_dev *dev, 68 size_t *no_of_elements); 69 70 int ionic_tx_tso(struct ionic_tx_qcq *txq, struct rte_mbuf *txm); 71 72 uint16_t ionic_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 73 uint16_t nb_pkts); 74 75 /* ionic_rxtx_simple.c */ 76 uint16_t ionic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, 77 uint16_t nb_pkts); 78 uint16_t ionic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 79 uint16_t nb_pkts); 80 81 int ionic_rx_fill(struct ionic_rx_qcq *rxq); 82 83 /* ionic_rxtx_sg.c */ 84 uint16_t ionic_recv_pkts_sg(void *rx_queue, struct rte_mbuf **rx_pkts, 85 uint16_t nb_pkts); 86 uint16_t ionic_xmit_pkts_sg(void *tx_queue, struct rte_mbuf **tx_pkts, 87 uint16_t nb_pkts); 88 89 int ionic_rx_fill_sg(struct ionic_rx_qcq *rxq); 90 91 static inline void 92 ionic_rxq_flush(struct ionic_queue *q) 93 { 94 struct ionic_rxq_desc *desc_base = q->base; 95 struct ionic_rxq_desc *cmb_desc_base = q->cmb_base; 96 97 if (q->cmb_base) { 98 if (q->head_idx < q->cmb_head_idx) { 99 /* copy [cmb_head, num_descs) */ 100 rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx], 101 (void *)&desc_base[q->cmb_head_idx], 102 (q->num_descs - q->cmb_head_idx) * sizeof(*desc_base)); 103 /* copy [0, head) */ 104 rte_memcpy((void *)&cmb_desc_base[0], 105 (void *)&desc_base[0], 106 q->head_idx * sizeof(*desc_base)); 107 } else { 108 /* copy [cmb_head, head) */ 109 rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx], 110 (void *)&desc_base[q->cmb_head_idx], 111 (q->head_idx - q->cmb_head_idx) * sizeof(*desc_base)); 112 } 113 q->cmb_head_idx = q->head_idx; 114 } 115 116 ionic_q_flush(q); 117 } 118 119 static inline void 120 ionic_txq_flush(struct ionic_queue *q) 121 { 122 struct ionic_txq_desc *desc_base = q->base; 123 struct ionic_txq_desc *cmb_desc_base = q->cmb_base; 124 125 if (q->cmb_base) { 126 if (q->head_idx < q->cmb_head_idx) { 127 /* copy [cmb_head, num_descs) */ 128 rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx], 129 (void *)&desc_base[q->cmb_head_idx], 130 (q->num_descs - q->cmb_head_idx) * sizeof(*desc_base)); 131 /* copy [0, head) */ 132 rte_memcpy((void *)&cmb_desc_base[0], 133 (void *)&desc_base[0], 134 q->head_idx * sizeof(*desc_base)); 135 } else { 136 /* copy [cmb_head, head) */ 137 rte_memcpy((void *)&cmb_desc_base[q->cmb_head_idx], 138 (void *)&desc_base[q->cmb_head_idx], 139 (q->head_idx - q->cmb_head_idx) * sizeof(*desc_base)); 140 } 141 q->cmb_head_idx = q->head_idx; 142 } 143 144 ionic_q_flush(q); 145 } 146 147 #endif /* _IONIC_RXTX_H_ */ 148