1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2018-2022 Advanced Micro Devices, Inc. 3 */ 4 5 #include <stdbool.h> 6 7 #include <rte_memzone.h> 8 9 #include "ionic.h" 10 #include "ionic_ethdev.h" 11 #include "ionic_lif.h" 12 13 static const char * 14 ionic_error_to_str(enum ionic_status_code code) 15 { 16 switch (code) { 17 case IONIC_RC_SUCCESS: 18 return "IONIC_RC_SUCCESS"; 19 case IONIC_RC_EVERSION: 20 return "IONIC_RC_EVERSION"; 21 case IONIC_RC_EOPCODE: 22 return "IONIC_RC_EOPCODE"; 23 case IONIC_RC_EIO: 24 return "IONIC_RC_EIO"; 25 case IONIC_RC_EPERM: 26 return "IONIC_RC_EPERM"; 27 case IONIC_RC_EQID: 28 return "IONIC_RC_EQID"; 29 case IONIC_RC_EQTYPE: 30 return "IONIC_RC_EQTYPE"; 31 case IONIC_RC_ENOENT: 32 return "IONIC_RC_ENOENT"; 33 case IONIC_RC_EINTR: 34 return "IONIC_RC_EINTR"; 35 case IONIC_RC_EAGAIN: 36 return "IONIC_RC_EAGAIN"; 37 case IONIC_RC_ENOMEM: 38 return "IONIC_RC_ENOMEM"; 39 case IONIC_RC_EFAULT: 40 return "IONIC_RC_EFAULT"; 41 case IONIC_RC_EBUSY: 42 return "IONIC_RC_EBUSY"; 43 case IONIC_RC_EEXIST: 44 return "IONIC_RC_EEXIST"; 45 case IONIC_RC_EINVAL: 46 return "IONIC_RC_EINVAL"; 47 case IONIC_RC_ENOSPC: 48 return "IONIC_RC_ENOSPC"; 49 case IONIC_RC_ERANGE: 50 return "IONIC_RC_ERANGE"; 51 case IONIC_RC_BAD_ADDR: 52 return "IONIC_RC_BAD_ADDR"; 53 case IONIC_RC_DEV_CMD: 54 return "IONIC_RC_DEV_CMD"; 55 case IONIC_RC_ERROR: 56 return "IONIC_RC_ERROR"; 57 case IONIC_RC_ERDMA: 58 return "IONIC_RC_ERDMA"; 59 default: 60 return "IONIC_RC_UNKNOWN"; 61 } 62 } 63 64 const char * 65 ionic_opcode_to_str(enum ionic_cmd_opcode opcode) 66 { 67 switch (opcode) { 68 case IONIC_CMD_NOP: 69 return "IONIC_CMD_NOP"; 70 case IONIC_CMD_INIT: 71 return "IONIC_CMD_INIT"; 72 case IONIC_CMD_RESET: 73 return "IONIC_CMD_RESET"; 74 case IONIC_CMD_IDENTIFY: 75 return "IONIC_CMD_IDENTIFY"; 76 case IONIC_CMD_GETATTR: 77 return "IONIC_CMD_GETATTR"; 78 case IONIC_CMD_SETATTR: 79 return "IONIC_CMD_SETATTR"; 80 case IONIC_CMD_PORT_IDENTIFY: 81 return "IONIC_CMD_PORT_IDENTIFY"; 82 case IONIC_CMD_PORT_INIT: 83 return "IONIC_CMD_PORT_INIT"; 84 case IONIC_CMD_PORT_RESET: 85 return "IONIC_CMD_PORT_RESET"; 86 case IONIC_CMD_PORT_GETATTR: 87 return "IONIC_CMD_PORT_GETATTR"; 88 case IONIC_CMD_PORT_SETATTR: 89 return "IONIC_CMD_PORT_SETATTR"; 90 case IONIC_CMD_LIF_INIT: 91 return "IONIC_CMD_LIF_INIT"; 92 case IONIC_CMD_LIF_RESET: 93 return "IONIC_CMD_LIF_RESET"; 94 case IONIC_CMD_LIF_IDENTIFY: 95 return "IONIC_CMD_LIF_IDENTIFY"; 96 case IONIC_CMD_LIF_SETATTR: 97 return "IONIC_CMD_LIF_SETATTR"; 98 case IONIC_CMD_LIF_GETATTR: 99 return "IONIC_CMD_LIF_GETATTR"; 100 case IONIC_CMD_RX_MODE_SET: 101 return "IONIC_CMD_RX_MODE_SET"; 102 case IONIC_CMD_RX_FILTER_ADD: 103 return "IONIC_CMD_RX_FILTER_ADD"; 104 case IONIC_CMD_RX_FILTER_DEL: 105 return "IONIC_CMD_RX_FILTER_DEL"; 106 case IONIC_CMD_Q_INIT: 107 return "IONIC_CMD_Q_INIT"; 108 case IONIC_CMD_Q_CONTROL: 109 return "IONIC_CMD_Q_CONTROL"; 110 case IONIC_CMD_Q_IDENTIFY: 111 return "IONIC_CMD_Q_IDENTIFY"; 112 case IONIC_CMD_RDMA_RESET_LIF: 113 return "IONIC_CMD_RDMA_RESET_LIF"; 114 case IONIC_CMD_RDMA_CREATE_EQ: 115 return "IONIC_CMD_RDMA_CREATE_EQ"; 116 case IONIC_CMD_RDMA_CREATE_CQ: 117 return "IONIC_CMD_RDMA_CREATE_CQ"; 118 case IONIC_CMD_RDMA_CREATE_ADMINQ: 119 return "IONIC_CMD_RDMA_CREATE_ADMINQ"; 120 default: 121 return "DEVCMD_UNKNOWN"; 122 } 123 } 124 125 static int 126 ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout) 127 { 128 const char *name; 129 const char *status; 130 131 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 132 133 if (ctx->comp.comp.status || timeout) { 134 status = ionic_error_to_str(ctx->comp.comp.status); 135 IONIC_PRINT(ERR, "%s (%d) failed: %s (%d)", 136 name, 137 ctx->cmd.cmd.opcode, 138 timeout ? "TIMEOUT" : status, 139 timeout ? -1 : ctx->comp.comp.status); 140 return -EIO; 141 } 142 143 IONIC_PRINT(DEBUG, "%s (%d) succeeded", name, ctx->cmd.cmd.opcode); 144 145 return 0; 146 } 147 148 static bool 149 ionic_adminq_service(struct ionic_cq *cq, uint16_t cq_desc_index, 150 void *cb_arg __rte_unused) 151 { 152 struct ionic_admin_comp *cq_desc_base = cq->base; 153 struct ionic_admin_comp *cq_desc = &cq_desc_base[cq_desc_index]; 154 struct ionic_qcq *qcq = IONIC_CQ_TO_QCQ(cq); 155 struct ionic_queue *q = &qcq->q; 156 struct ionic_admin_ctx *ctx; 157 uint16_t curr_q_tail_idx; 158 uint16_t stop_index; 159 void **info; 160 161 if (!color_match(cq_desc->color, cq->done_color)) 162 return false; 163 164 stop_index = rte_le_to_cpu_16(cq_desc->comp_index); 165 166 do { 167 info = IONIC_INFO_PTR(q, q->tail_idx); 168 169 ctx = info[0]; 170 if (ctx) { 171 memcpy(&ctx->comp, cq_desc, sizeof(*cq_desc)); 172 173 ctx->pending_work = false; /* done */ 174 } 175 176 curr_q_tail_idx = q->tail_idx; 177 q->tail_idx = Q_NEXT_TO_SRVC(q, 1); 178 } while (curr_q_tail_idx != stop_index); 179 180 return true; 181 } 182 183 /** ionic_adminq_post - Post an admin command. 184 * @lif: Handle to lif. 185 * @cmd_ctx: Api admin command context. 186 * 187 * Post the command to an admin queue in the ethernet driver. If this command 188 * succeeds, then the command has been posted, but that does not indicate a 189 * completion. If this command returns success, then the completion callback 190 * will eventually be called. 191 * 192 * Return: zero or negative error status. 193 */ 194 static int 195 ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 196 { 197 struct ionic_queue *q = &lif->adminqcq->qcq.q; 198 struct ionic_admin_cmd *q_desc_base = q->base; 199 struct ionic_admin_cmd *q_desc; 200 void **info; 201 int err = 0; 202 203 rte_spinlock_lock(&lif->adminq_lock); 204 205 if (ionic_q_space_avail(q) < 1) { 206 err = -ENOSPC; 207 goto err_out; 208 } 209 210 q_desc = &q_desc_base[q->head_idx]; 211 212 memcpy(q_desc, &ctx->cmd, sizeof(ctx->cmd)); 213 214 info = IONIC_INFO_PTR(q, q->head_idx); 215 info[0] = ctx; 216 217 q->head_idx = Q_NEXT_TO_POST(q, 1); 218 219 /* Ring doorbell */ 220 rte_wmb(); 221 ionic_q_flush(q); 222 223 err_out: 224 rte_spinlock_unlock(&lif->adminq_lock); 225 226 return err; 227 } 228 229 static int 230 ionic_adminq_wait_for_completion(struct ionic_lif *lif, 231 struct ionic_admin_ctx *ctx, unsigned long max_wait) 232 { 233 struct ionic_queue *q = &lif->adminqcq->qcq.q; 234 unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US; 235 unsigned long step_deadline; 236 unsigned long max_wait_usec = max_wait * 1000000L; 237 unsigned long elapsed_usec = 0; 238 int budget = 8; 239 uint16_t idx; 240 void **info; 241 242 step_deadline = IONIC_ADMINQ_WDOG_MS * 1000 / step_usec; 243 244 while (ctx->pending_work && elapsed_usec < max_wait_usec) { 245 /* 246 * Locking here as adminq is served inline and could be 247 * called from multiple places 248 */ 249 rte_spinlock_lock(&lif->adminq_service_lock); 250 251 ionic_qcq_service(&lif->adminqcq->qcq, budget, 252 ionic_adminq_service, NULL); 253 254 /* 255 * Ring the doorbell again if work is pending after deadline. 256 */ 257 if (ctx->pending_work && !step_deadline) { 258 step_deadline = IONIC_ADMINQ_WDOG_MS * 259 1000 / step_usec; 260 261 rte_spinlock_lock(&lif->adminq_lock); 262 idx = Q_NEXT_TO_POST(q, -1); 263 info = IONIC_INFO_PTR(q, idx); 264 if (info[0] == ctx) 265 ionic_q_flush(q); 266 rte_spinlock_unlock(&lif->adminq_lock); 267 } 268 269 rte_spinlock_unlock(&lif->adminq_service_lock); 270 271 rte_delay_us_block(step_usec); 272 elapsed_usec += step_usec; 273 step_deadline--; 274 } 275 276 return (!ctx->pending_work); 277 } 278 279 int 280 ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 281 { 282 bool done; 283 int err; 284 285 IONIC_PRINT(DEBUG, "Sending %s (%d) via the admin queue", 286 ionic_opcode_to_str(ctx->cmd.cmd.opcode), ctx->cmd.cmd.opcode); 287 288 err = ionic_adminq_post(lif, ctx); 289 if (err) { 290 IONIC_PRINT(ERR, "Failure posting %d to the admin queue (%d)", 291 ctx->cmd.cmd.opcode, err); 292 return err; 293 } 294 295 done = ionic_adminq_wait_for_completion(lif, ctx, 296 IONIC_DEVCMD_TIMEOUT); 297 298 return ionic_adminq_check_err(ctx, !done /* timed out */); 299 } 300 301 static int 302 ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait) 303 { 304 unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US; 305 unsigned long max_wait_usec = max_wait * 1000000L; 306 unsigned long elapsed_usec = 0; 307 int done; 308 309 /* Wait for dev cmd to complete.. but no more than max_wait sec */ 310 311 do { 312 done = ionic_dev_cmd_done(idev); 313 if (done) { 314 IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld usecs", 315 ioread8(&idev->dev_cmd->cmd.cmd.opcode), 316 elapsed_usec); 317 return 0; 318 } 319 320 rte_delay_us_block(step_usec); 321 322 elapsed_usec += step_usec; 323 } while (elapsed_usec < max_wait_usec); 324 325 IONIC_PRINT(ERR, "DEVCMD %d timeout after %ld usecs", 326 ioread8(&idev->dev_cmd->cmd.cmd.opcode), 327 elapsed_usec); 328 329 return -ETIMEDOUT; 330 } 331 332 static int 333 ionic_dev_cmd_check_error(struct ionic_dev *idev) 334 { 335 uint8_t status; 336 337 status = ionic_dev_cmd_status(idev); 338 if (status == IONIC_RC_SUCCESS) 339 return 0; 340 341 return (status == IONIC_RC_EAGAIN) ? -EAGAIN : -EIO; 342 } 343 344 int 345 ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait) 346 { 347 int err; 348 349 err = ionic_dev_cmd_wait(idev, max_wait); 350 351 if (!err) 352 err = ionic_dev_cmd_check_error(idev); 353 354 IONIC_PRINT(DEBUG, "dev_cmd returned %d", err); 355 return err; 356 } 357 358 int 359 ionic_setup(struct ionic_adapter *adapter) 360 { 361 return (*adapter->intf->setup)(adapter); 362 } 363 364 int 365 ionic_identify(struct ionic_adapter *adapter) 366 { 367 struct ionic_dev *idev = &adapter->idev; 368 struct ionic_identity *ident = &adapter->ident; 369 uint32_t drv_size = RTE_DIM(ident->drv.words); 370 uint32_t cmd_size = RTE_DIM(idev->dev_cmd->data); 371 uint32_t dev_size = RTE_DIM(ident->dev.words); 372 uint32_t i, nwords; 373 int err; 374 375 memset(ident, 0, sizeof(*ident)); 376 377 ident->drv.os_type = IONIC_OS_TYPE_LINUX; 378 ident->drv.os_dist = 0; 379 snprintf(ident->drv.os_dist_str, 380 sizeof(ident->drv.os_dist_str), "Unknown"); 381 ident->drv.kernel_ver = 0; 382 snprintf(ident->drv.kernel_ver_str, 383 sizeof(ident->drv.kernel_ver_str), "DPDK"); 384 strncpy(ident->drv.driver_ver_str, IONIC_DRV_VERSION, 385 sizeof(ident->drv.driver_ver_str) - 1); 386 387 nwords = RTE_MIN(drv_size, cmd_size); 388 for (i = 0; i < nwords; i++) 389 iowrite32(ident->drv.words[i], &idev->dev_cmd->data[i]); 390 391 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1); 392 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 393 if (!err) { 394 nwords = RTE_MIN(dev_size, cmd_size); 395 for (i = 0; i < nwords; i++) 396 ident->dev.words[i] = ioread32(&idev->dev_cmd->data[i]); 397 } 398 399 return err; 400 } 401 402 int 403 ionic_init(struct ionic_adapter *adapter) 404 { 405 struct ionic_dev *idev = &adapter->idev; 406 407 ionic_dev_cmd_init(idev); 408 return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 409 } 410 411 int 412 ionic_reset(struct ionic_adapter *adapter) 413 { 414 struct ionic_dev *idev = &adapter->idev; 415 416 ionic_dev_cmd_reset(idev); 417 return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 418 } 419 420 int 421 ionic_port_identify(struct ionic_adapter *adapter) 422 { 423 struct ionic_dev *idev = &adapter->idev; 424 struct ionic_identity *ident = &adapter->ident; 425 uint32_t port_words = RTE_DIM(ident->port.words); 426 uint32_t cmd_words = RTE_DIM(idev->dev_cmd->data); 427 uint32_t i, nwords; 428 int err; 429 430 ionic_dev_cmd_port_identify(idev); 431 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 432 if (!err) { 433 nwords = RTE_MIN(port_words, cmd_words); 434 for (i = 0; i < nwords; i++) 435 ident->port.words[i] = 436 ioread32(&idev->dev_cmd->data[i]); 437 } 438 439 IONIC_PRINT(INFO, "speed %d", 440 rte_le_to_cpu_32(ident->port.config.speed)); 441 IONIC_PRINT(INFO, "mtu %d", 442 rte_le_to_cpu_32(ident->port.config.mtu)); 443 IONIC_PRINT(INFO, "state %d", ident->port.config.state); 444 IONIC_PRINT(INFO, "an_enable %d", ident->port.config.an_enable); 445 IONIC_PRINT(INFO, "fec_type %d", ident->port.config.fec_type); 446 IONIC_PRINT(INFO, "pause_type %d", ident->port.config.pause_type); 447 IONIC_PRINT(INFO, "loopback_mode %d", 448 ident->port.config.loopback_mode); 449 450 return err; 451 } 452 453 static const struct rte_memzone * 454 ionic_memzone_reserve(const char *name, uint32_t len, int socket_id) 455 { 456 const struct rte_memzone *mz; 457 458 mz = rte_memzone_lookup(name); 459 if (mz) 460 return mz; 461 462 mz = rte_memzone_reserve_aligned(name, len, socket_id, 463 RTE_MEMZONE_IOVA_CONTIG, IONIC_ALIGN); 464 return mz; 465 } 466 467 int 468 ionic_port_init(struct ionic_adapter *adapter) 469 { 470 struct ionic_dev *idev = &adapter->idev; 471 struct ionic_identity *ident = &adapter->ident; 472 char z_name[RTE_MEMZONE_NAMESIZE]; 473 uint32_t config_words = RTE_DIM(ident->port.config.words); 474 uint32_t cmd_words = RTE_DIM(idev->dev_cmd->data); 475 uint32_t i, nwords; 476 int err; 477 478 if (idev->port_info) 479 return 0; 480 481 idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), 482 rte_mem_page_size()); 483 484 snprintf(z_name, sizeof(z_name), "%s_port_%s_info", 485 IONIC_DRV_NAME, adapter->name); 486 487 idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz, 488 SOCKET_ID_ANY); 489 if (!idev->port_info_z) { 490 IONIC_PRINT(ERR, "Cannot reserve port info DMA memory"); 491 return -ENOMEM; 492 } 493 494 idev->port_info = idev->port_info_z->addr; 495 idev->port_info_pa = idev->port_info_z->iova; 496 497 nwords = RTE_MIN(config_words, cmd_words); 498 499 for (i = 0; i < nwords; i++) 500 iowrite32(ident->port.config.words[i], &idev->dev_cmd->data[i]); 501 502 idev->port_info->config.state = IONIC_PORT_ADMIN_STATE_UP; 503 ionic_dev_cmd_port_init(idev); 504 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 505 if (err) 506 IONIC_PRINT(ERR, "Failed to init port"); 507 508 return err; 509 } 510 511 int 512 ionic_port_reset(struct ionic_adapter *adapter) 513 { 514 struct ionic_dev *idev = &adapter->idev; 515 int err; 516 517 if (!idev->port_info) 518 return 0; 519 520 ionic_dev_cmd_port_reset(idev); 521 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 522 if (err) { 523 IONIC_PRINT(ERR, "Failed to reset port"); 524 return err; 525 } 526 527 idev->port_info = NULL; 528 idev->port_info_pa = 0; 529 530 return 0; 531 } 532