1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2018-2022 Advanced Micro Devices, Inc. 3 */ 4 5 #include <rte_ethdev.h> 6 #include <ethdev_driver.h> 7 #include <rte_malloc.h> 8 9 #include "ionic_logs.h" 10 #include "ionic.h" 11 #include "ionic_dev.h" 12 #include "ionic_mac_api.h" 13 #include "ionic_lif.h" 14 #include "ionic_ethdev.h" 15 #include "ionic_rxtx.h" 16 17 static int eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params); 18 static int eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev); 19 static int ionic_dev_info_get(struct rte_eth_dev *eth_dev, 20 struct rte_eth_dev_info *dev_info); 21 static int ionic_dev_configure(struct rte_eth_dev *dev); 22 static int ionic_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 23 static int ionic_dev_start(struct rte_eth_dev *dev); 24 static int ionic_dev_stop(struct rte_eth_dev *dev); 25 static int ionic_dev_close(struct rte_eth_dev *dev); 26 static int ionic_dev_set_link_up(struct rte_eth_dev *dev); 27 static int ionic_dev_set_link_down(struct rte_eth_dev *dev); 28 static int ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev, 29 struct rte_eth_fc_conf *fc_conf); 30 static int ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev, 31 struct rte_eth_fc_conf *fc_conf); 32 static int ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask); 33 static int ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev, 34 struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size); 35 static int ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev, 36 struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size); 37 static int ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev, 38 struct rte_eth_rss_conf *rss_conf); 39 static int ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev, 40 struct rte_eth_rss_conf *rss_conf); 41 static int ionic_dev_stats_get(struct rte_eth_dev *eth_dev, 42 struct rte_eth_stats *stats); 43 static int ionic_dev_stats_reset(struct rte_eth_dev *eth_dev); 44 static int ionic_dev_xstats_get(struct rte_eth_dev *dev, 45 struct rte_eth_xstat *xstats, unsigned int n); 46 static int ionic_dev_xstats_get_by_id(struct rte_eth_dev *dev, 47 const uint64_t *ids, uint64_t *values, unsigned int n); 48 static int ionic_dev_xstats_reset(struct rte_eth_dev *dev); 49 static int ionic_dev_xstats_get_names(struct rte_eth_dev *dev, 50 struct rte_eth_xstat_name *xstats_names, unsigned int size); 51 static int ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *dev, 52 const uint64_t *ids, struct rte_eth_xstat_name *xstats_names, 53 unsigned int limit); 54 static int ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev, 55 char *fw_version, size_t fw_size); 56 57 static const struct rte_eth_desc_lim rx_desc_lim = { 58 .nb_max = IONIC_MAX_RING_DESC, 59 .nb_min = IONIC_MIN_RING_DESC, 60 .nb_align = 1, 61 }; 62 63 static const struct rte_eth_desc_lim tx_desc_lim_v1 = { 64 .nb_max = IONIC_MAX_RING_DESC, 65 .nb_min = IONIC_MIN_RING_DESC, 66 .nb_align = 1, 67 .nb_seg_max = IONIC_TX_MAX_SG_ELEMS_V1 + 1, 68 .nb_mtu_seg_max = IONIC_TX_MAX_SG_ELEMS_V1 + 1, 69 }; 70 71 static const struct eth_dev_ops ionic_eth_dev_ops = { 72 .dev_infos_get = ionic_dev_info_get, 73 .dev_configure = ionic_dev_configure, 74 .mtu_set = ionic_dev_mtu_set, 75 .dev_start = ionic_dev_start, 76 .dev_stop = ionic_dev_stop, 77 .dev_close = ionic_dev_close, 78 .link_update = ionic_dev_link_update, 79 .dev_set_link_up = ionic_dev_set_link_up, 80 .dev_set_link_down = ionic_dev_set_link_down, 81 .mac_addr_add = ionic_dev_add_mac, 82 .mac_addr_remove = ionic_dev_remove_mac, 83 .mac_addr_set = ionic_dev_set_mac, 84 .vlan_filter_set = ionic_dev_vlan_filter_set, 85 .promiscuous_enable = ionic_dev_promiscuous_enable, 86 .promiscuous_disable = ionic_dev_promiscuous_disable, 87 .allmulticast_enable = ionic_dev_allmulticast_enable, 88 .allmulticast_disable = ionic_dev_allmulticast_disable, 89 .flow_ctrl_get = ionic_flow_ctrl_get, 90 .flow_ctrl_set = ionic_flow_ctrl_set, 91 .rxq_info_get = ionic_rxq_info_get, 92 .txq_info_get = ionic_txq_info_get, 93 .rx_queue_setup = ionic_dev_rx_queue_setup, 94 .rx_queue_release = ionic_dev_rx_queue_release, 95 .rx_queue_start = ionic_dev_rx_queue_start, 96 .rx_queue_stop = ionic_dev_rx_queue_stop, 97 .tx_queue_setup = ionic_dev_tx_queue_setup, 98 .tx_queue_release = ionic_dev_tx_queue_release, 99 .tx_queue_start = ionic_dev_tx_queue_start, 100 .tx_queue_stop = ionic_dev_tx_queue_stop, 101 .vlan_offload_set = ionic_vlan_offload_set, 102 .reta_update = ionic_dev_rss_reta_update, 103 .reta_query = ionic_dev_rss_reta_query, 104 .rss_hash_conf_get = ionic_dev_rss_hash_conf_get, 105 .rss_hash_update = ionic_dev_rss_hash_update, 106 .stats_get = ionic_dev_stats_get, 107 .stats_reset = ionic_dev_stats_reset, 108 .xstats_get = ionic_dev_xstats_get, 109 .xstats_get_by_id = ionic_dev_xstats_get_by_id, 110 .xstats_reset = ionic_dev_xstats_reset, 111 .xstats_get_names = ionic_dev_xstats_get_names, 112 .xstats_get_names_by_id = ionic_dev_xstats_get_names_by_id, 113 .fw_version_get = ionic_dev_fw_version_get, 114 }; 115 116 struct rte_ionic_xstats_name_off { 117 char name[RTE_ETH_XSTATS_NAME_SIZE]; 118 unsigned int offset; 119 }; 120 121 static const struct rte_ionic_xstats_name_off rte_ionic_xstats_strings[] = { 122 /* RX */ 123 {"rx_ucast_bytes", offsetof(struct ionic_lif_stats, 124 rx_ucast_bytes)}, 125 {"rx_ucast_packets", offsetof(struct ionic_lif_stats, 126 rx_ucast_packets)}, 127 {"rx_mcast_bytes", offsetof(struct ionic_lif_stats, 128 rx_mcast_bytes)}, 129 {"rx_mcast_packets", offsetof(struct ionic_lif_stats, 130 rx_mcast_packets)}, 131 {"rx_bcast_bytes", offsetof(struct ionic_lif_stats, 132 rx_bcast_bytes)}, 133 {"rx_bcast_packets", offsetof(struct ionic_lif_stats, 134 rx_bcast_packets)}, 135 /* RX drops */ 136 {"rx_ucast_drop_bytes", offsetof(struct ionic_lif_stats, 137 rx_ucast_drop_bytes)}, 138 {"rx_ucast_drop_packets", offsetof(struct ionic_lif_stats, 139 rx_ucast_drop_packets)}, 140 {"rx_mcast_drop_bytes", offsetof(struct ionic_lif_stats, 141 rx_mcast_drop_bytes)}, 142 {"rx_mcast_drop_packets", offsetof(struct ionic_lif_stats, 143 rx_mcast_drop_packets)}, 144 {"rx_bcast_drop_bytes", offsetof(struct ionic_lif_stats, 145 rx_bcast_drop_bytes)}, 146 {"rx_bcast_drop_packets", offsetof(struct ionic_lif_stats, 147 rx_bcast_drop_packets)}, 148 {"rx_dma_error", offsetof(struct ionic_lif_stats, 149 rx_dma_error)}, 150 /* TX */ 151 {"tx_ucast_bytes", offsetof(struct ionic_lif_stats, 152 tx_ucast_bytes)}, 153 {"tx_ucast_packets", offsetof(struct ionic_lif_stats, 154 tx_ucast_packets)}, 155 {"tx_mcast_bytes", offsetof(struct ionic_lif_stats, 156 tx_mcast_bytes)}, 157 {"tx_mcast_packets", offsetof(struct ionic_lif_stats, 158 tx_mcast_packets)}, 159 {"tx_bcast_bytes", offsetof(struct ionic_lif_stats, 160 tx_bcast_bytes)}, 161 {"tx_bcast_packets", offsetof(struct ionic_lif_stats, 162 tx_bcast_packets)}, 163 /* TX drops */ 164 {"tx_ucast_drop_bytes", offsetof(struct ionic_lif_stats, 165 tx_ucast_drop_bytes)}, 166 {"tx_ucast_drop_packets", offsetof(struct ionic_lif_stats, 167 tx_ucast_drop_packets)}, 168 {"tx_mcast_drop_bytes", offsetof(struct ionic_lif_stats, 169 tx_mcast_drop_bytes)}, 170 {"tx_mcast_drop_packets", offsetof(struct ionic_lif_stats, 171 tx_mcast_drop_packets)}, 172 {"tx_bcast_drop_bytes", offsetof(struct ionic_lif_stats, 173 tx_bcast_drop_bytes)}, 174 {"tx_bcast_drop_packets", offsetof(struct ionic_lif_stats, 175 tx_bcast_drop_packets)}, 176 {"tx_dma_error", offsetof(struct ionic_lif_stats, 177 tx_dma_error)}, 178 /* Rx Queue/Ring drops */ 179 {"rx_queue_disabled", offsetof(struct ionic_lif_stats, 180 rx_queue_disabled)}, 181 {"rx_queue_empty", offsetof(struct ionic_lif_stats, 182 rx_queue_empty)}, 183 {"rx_queue_error", offsetof(struct ionic_lif_stats, 184 rx_queue_error)}, 185 {"rx_desc_fetch_error", offsetof(struct ionic_lif_stats, 186 rx_desc_fetch_error)}, 187 {"rx_desc_data_error", offsetof(struct ionic_lif_stats, 188 rx_desc_data_error)}, 189 /* Tx Queue/Ring drops */ 190 {"tx_queue_disabled", offsetof(struct ionic_lif_stats, 191 tx_queue_disabled)}, 192 {"tx_queue_error", offsetof(struct ionic_lif_stats, 193 tx_queue_error)}, 194 {"tx_desc_fetch_error", offsetof(struct ionic_lif_stats, 195 tx_desc_fetch_error)}, 196 {"tx_desc_data_error", offsetof(struct ionic_lif_stats, 197 tx_desc_data_error)}, 198 }; 199 200 #define IONIC_NB_HW_STATS RTE_DIM(rte_ionic_xstats_strings) 201 202 static int 203 ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev, 204 char *fw_version, size_t fw_size) 205 { 206 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 207 struct ionic_adapter *adapter = lif->adapter; 208 int ret; 209 210 ret = snprintf(fw_version, fw_size, "%s", 211 adapter->fw_version); 212 if (ret < 0) 213 return -EINVAL; 214 215 ret += 1; /* add the size of '\0' */ 216 if (fw_size < (size_t)ret) 217 return ret; 218 else 219 return 0; 220 } 221 222 /* 223 * Set device link up, enable tx. 224 */ 225 static int 226 ionic_dev_set_link_up(struct rte_eth_dev *eth_dev) 227 { 228 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 229 int err; 230 231 IONIC_PRINT_CALL(); 232 233 err = ionic_lif_start(lif); 234 if (err) 235 IONIC_PRINT(ERR, "Could not start lif to set link up"); 236 237 ionic_dev_link_update(lif->eth_dev, 0); 238 239 return err; 240 } 241 242 /* 243 * Set device link down, disable tx. 244 */ 245 static int 246 ionic_dev_set_link_down(struct rte_eth_dev *eth_dev) 247 { 248 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 249 250 IONIC_PRINT_CALL(); 251 252 ionic_lif_stop(lif); 253 254 ionic_dev_link_update(lif->eth_dev, 0); 255 256 return 0; 257 } 258 259 int 260 ionic_dev_link_update(struct rte_eth_dev *eth_dev, 261 int wait_to_complete __rte_unused) 262 { 263 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 264 struct ionic_adapter *adapter = lif->adapter; 265 struct rte_eth_link link; 266 267 IONIC_PRINT_CALL(); 268 269 /* Initialize */ 270 memset(&link, 0, sizeof(link)); 271 272 if (adapter->idev.port_info->config.an_enable) { 273 link.link_autoneg = RTE_ETH_LINK_AUTONEG; 274 } 275 276 if (!adapter->link_up || 277 !(lif->state & IONIC_LIF_F_UP)) { 278 /* Interface is down */ 279 link.link_status = RTE_ETH_LINK_DOWN; 280 link.link_duplex = RTE_ETH_LINK_HALF_DUPLEX; 281 link.link_speed = RTE_ETH_SPEED_NUM_NONE; 282 } else { 283 /* Interface is up */ 284 link.link_status = RTE_ETH_LINK_UP; 285 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX; 286 switch (adapter->link_speed) { 287 case 10000: 288 link.link_speed = RTE_ETH_SPEED_NUM_10G; 289 break; 290 case 25000: 291 link.link_speed = RTE_ETH_SPEED_NUM_25G; 292 break; 293 case 40000: 294 link.link_speed = RTE_ETH_SPEED_NUM_40G; 295 break; 296 case 50000: 297 link.link_speed = RTE_ETH_SPEED_NUM_50G; 298 break; 299 case 100000: 300 link.link_speed = RTE_ETH_SPEED_NUM_100G; 301 break; 302 default: 303 link.link_speed = RTE_ETH_SPEED_NUM_NONE; 304 break; 305 } 306 } 307 308 return rte_eth_linkstatus_set(eth_dev, &link); 309 } 310 311 /** 312 * Interrupt handler triggered by NIC for handling 313 * specific interrupt. 314 * 315 * @param param 316 * The address of parameter registered before. 317 * 318 * @return 319 * void 320 */ 321 void 322 ionic_dev_interrupt_handler(void *param) 323 { 324 struct ionic_adapter *adapter = (struct ionic_adapter *)param; 325 326 IONIC_PRINT(DEBUG, "->"); 327 328 if (adapter->lif) 329 ionic_notifyq_handler(adapter->lif, -1); 330 } 331 332 static int 333 ionic_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 334 { 335 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 336 337 if (lif->state & IONIC_LIF_F_UP) { 338 IONIC_PRINT(ERR, "Stop %s before setting mtu", lif->name); 339 return -EBUSY; 340 } 341 342 /* Note: mtu check against min/max is done by the API */ 343 IONIC_PRINT(INFO, "Setting mtu %u", mtu); 344 345 /* Update the frame size used by the Rx path */ 346 lif->frame_size = mtu + IONIC_ETH_OVERHEAD; 347 348 return 0; 349 } 350 351 static int 352 ionic_dev_info_get(struct rte_eth_dev *eth_dev, 353 struct rte_eth_dev_info *dev_info) 354 { 355 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 356 struct ionic_adapter *adapter = lif->adapter; 357 struct ionic_identity *ident = &adapter->ident; 358 union ionic_lif_config *cfg = &ident->lif.eth.config; 359 360 IONIC_PRINT_CALL(); 361 362 dev_info->max_rx_queues = (uint16_t) 363 rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_RXQ]); 364 dev_info->max_tx_queues = (uint16_t) 365 rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_TXQ]); 366 367 /* Also add ETHER_CRC_LEN if the adapter is able to keep CRC */ 368 dev_info->min_mtu = RTE_MAX((uint32_t)IONIC_MIN_MTU, 369 rte_le_to_cpu_32(ident->lif.eth.min_mtu)); 370 dev_info->max_mtu = RTE_MIN((uint32_t)IONIC_MAX_MTU, 371 rte_le_to_cpu_32(ident->lif.eth.max_mtu)); 372 dev_info->min_rx_bufsize = dev_info->min_mtu + IONIC_ETH_OVERHEAD; 373 dev_info->max_rx_pktlen = dev_info->max_mtu + IONIC_ETH_OVERHEAD; 374 dev_info->max_lro_pkt_size = 375 eth_dev->data->dev_conf.rxmode.max_lro_pkt_size; 376 377 dev_info->max_mac_addrs = adapter->max_mac_addrs; 378 dev_info->hash_key_size = IONIC_RSS_HASH_KEY_SIZE; 379 dev_info->reta_size = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz); 380 dev_info->flow_type_rss_offloads = IONIC_ETH_RSS_OFFLOAD_ALL; 381 382 dev_info->speed_capa = 383 RTE_ETH_LINK_SPEED_10G | 384 RTE_ETH_LINK_SPEED_25G | 385 RTE_ETH_LINK_SPEED_40G | 386 RTE_ETH_LINK_SPEED_50G | 387 RTE_ETH_LINK_SPEED_100G; 388 389 /* 390 * Per-queue capabilities 391 * RTE does not support disabling a feature on a queue if it is 392 * enabled globally on the device. Thus the driver does not advertise 393 * capabilities like RTE_ETH_TX_OFFLOAD_IPV4_CKSUM as per-queue even 394 * though the driver would be otherwise capable of disabling it on 395 * a per-queue basis. 396 */ 397 398 dev_info->rx_queue_offload_capa = 0; 399 dev_info->tx_queue_offload_capa = RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; 400 401 /* 402 * Per-port capabilities 403 * See ionic_set_features to request and check supported features 404 */ 405 406 dev_info->rx_offload_capa = dev_info->rx_queue_offload_capa | 407 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | 408 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | 409 RTE_ETH_RX_OFFLOAD_TCP_CKSUM | 410 RTE_ETH_RX_OFFLOAD_VLAN_FILTER | 411 RTE_ETH_RX_OFFLOAD_VLAN_STRIP | 412 RTE_ETH_RX_OFFLOAD_SCATTER | 413 RTE_ETH_RX_OFFLOAD_RSS_HASH | 414 0; 415 416 dev_info->tx_offload_capa = dev_info->tx_queue_offload_capa | 417 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | 418 RTE_ETH_TX_OFFLOAD_UDP_CKSUM | 419 RTE_ETH_TX_OFFLOAD_TCP_CKSUM | 420 RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | 421 RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM | 422 RTE_ETH_TX_OFFLOAD_MULTI_SEGS | 423 RTE_ETH_TX_OFFLOAD_TCP_TSO | 424 RTE_ETH_TX_OFFLOAD_VLAN_INSERT | 425 0; 426 427 dev_info->rx_desc_lim = rx_desc_lim; 428 dev_info->tx_desc_lim = tx_desc_lim_v1; 429 430 /* Driver-preferred Rx/Tx parameters */ 431 dev_info->default_rxportconf.burst_size = 32; 432 dev_info->default_txportconf.burst_size = 32; 433 dev_info->default_rxportconf.nb_queues = 1; 434 dev_info->default_txportconf.nb_queues = 1; 435 dev_info->default_rxportconf.ring_size = IONIC_DEF_TXRX_DESC; 436 dev_info->default_txportconf.ring_size = IONIC_DEF_TXRX_DESC; 437 438 dev_info->default_rxconf = (struct rte_eth_rxconf) { 439 /* Packets are always dropped if no desc are available */ 440 .rx_drop_en = 1, 441 }; 442 443 return 0; 444 } 445 446 static int 447 ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev, 448 struct rte_eth_fc_conf *fc_conf) 449 { 450 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 451 struct ionic_adapter *adapter = lif->adapter; 452 struct ionic_dev *idev = &adapter->idev; 453 454 if (idev->port_info) { 455 /* Flow control autoneg not supported */ 456 fc_conf->autoneg = 0; 457 458 if (idev->port_info->config.pause_type) 459 fc_conf->mode = RTE_ETH_FC_FULL; 460 else 461 fc_conf->mode = RTE_ETH_FC_NONE; 462 } 463 464 return 0; 465 } 466 467 static int 468 ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev, 469 struct rte_eth_fc_conf *fc_conf) 470 { 471 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 472 struct ionic_adapter *adapter = lif->adapter; 473 struct ionic_dev *idev = &adapter->idev; 474 uint8_t pause_type = IONIC_PORT_PAUSE_TYPE_NONE; 475 int err; 476 477 if (fc_conf->autoneg) { 478 IONIC_PRINT(WARNING, "Flow control autoneg not supported"); 479 return -ENOTSUP; 480 } 481 482 switch (fc_conf->mode) { 483 case RTE_ETH_FC_NONE: 484 pause_type = IONIC_PORT_PAUSE_TYPE_NONE; 485 break; 486 case RTE_ETH_FC_FULL: 487 pause_type = IONIC_PORT_PAUSE_TYPE_LINK; 488 break; 489 case RTE_ETH_FC_RX_PAUSE: 490 case RTE_ETH_FC_TX_PAUSE: 491 return -ENOTSUP; 492 } 493 494 ionic_dev_cmd_port_pause(idev, pause_type); 495 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 496 if (err) 497 IONIC_PRINT(WARNING, "Failed to configure flow control"); 498 499 return err; 500 } 501 502 static int 503 ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask) 504 { 505 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 506 507 ionic_lif_configure_vlan_offload(lif, mask); 508 509 ionic_lif_set_features(lif); 510 511 return 0; 512 } 513 514 static int 515 ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev, 516 struct rte_eth_rss_reta_entry64 *reta_conf, 517 uint16_t reta_size) 518 { 519 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 520 struct ionic_adapter *adapter = lif->adapter; 521 struct ionic_identity *ident = &adapter->ident; 522 uint32_t i, j, index, num; 523 uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz); 524 525 IONIC_PRINT_CALL(); 526 527 if (!lif->rss_ind_tbl) { 528 IONIC_PRINT(ERR, "RSS RETA not initialized, " 529 "can't update the table"); 530 return -EINVAL; 531 } 532 533 if (reta_size != tbl_sz) { 534 IONIC_PRINT(ERR, "The size of hash lookup table configured " 535 "(%d) does not match the number hardware can support " 536 "(%d)", 537 reta_size, tbl_sz); 538 return -EINVAL; 539 } 540 541 num = tbl_sz / RTE_ETH_RETA_GROUP_SIZE; 542 543 for (i = 0; i < num; i++) { 544 for (j = 0; j < RTE_ETH_RETA_GROUP_SIZE; j++) { 545 if (reta_conf[i].mask & ((uint64_t)1 << j)) { 546 index = (i * RTE_ETH_RETA_GROUP_SIZE) + j; 547 lif->rss_ind_tbl[index] = reta_conf[i].reta[j]; 548 } 549 } 550 } 551 552 return ionic_lif_rss_config(lif, lif->rss_types, NULL, NULL); 553 } 554 555 static int 556 ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev, 557 struct rte_eth_rss_reta_entry64 *reta_conf, 558 uint16_t reta_size) 559 { 560 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 561 struct ionic_adapter *adapter = lif->adapter; 562 struct ionic_identity *ident = &adapter->ident; 563 int i, num; 564 uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz); 565 566 IONIC_PRINT_CALL(); 567 568 if (reta_size != tbl_sz) { 569 IONIC_PRINT(ERR, "The size of hash lookup table configured " 570 "(%d) does not match the number hardware can support " 571 "(%d)", 572 reta_size, tbl_sz); 573 return -EINVAL; 574 } 575 576 if (!lif->rss_ind_tbl) { 577 IONIC_PRINT(ERR, "RSS RETA has not been built yet"); 578 return -EINVAL; 579 } 580 581 num = reta_size / RTE_ETH_RETA_GROUP_SIZE; 582 583 for (i = 0; i < num; i++) { 584 memcpy(reta_conf->reta, 585 &lif->rss_ind_tbl[i * RTE_ETH_RETA_GROUP_SIZE], 586 RTE_ETH_RETA_GROUP_SIZE); 587 reta_conf++; 588 } 589 590 return 0; 591 } 592 593 static int 594 ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev, 595 struct rte_eth_rss_conf *rss_conf) 596 { 597 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 598 uint64_t rss_hf = 0; 599 600 IONIC_PRINT_CALL(); 601 602 if (!lif->rss_ind_tbl) { 603 IONIC_PRINT(NOTICE, "RSS not enabled"); 604 return 0; 605 } 606 607 /* Get key value (if not null, rss_key is 40-byte) */ 608 if (rss_conf->rss_key != NULL && 609 rss_conf->rss_key_len >= IONIC_RSS_HASH_KEY_SIZE) 610 memcpy(rss_conf->rss_key, lif->rss_hash_key, 611 IONIC_RSS_HASH_KEY_SIZE); 612 613 if (lif->rss_types & IONIC_RSS_TYPE_IPV4) 614 rss_hf |= RTE_ETH_RSS_IPV4; 615 if (lif->rss_types & IONIC_RSS_TYPE_IPV4_TCP) 616 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_TCP; 617 if (lif->rss_types & IONIC_RSS_TYPE_IPV4_UDP) 618 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_UDP; 619 if (lif->rss_types & IONIC_RSS_TYPE_IPV6) 620 rss_hf |= RTE_ETH_RSS_IPV6; 621 if (lif->rss_types & IONIC_RSS_TYPE_IPV6_TCP) 622 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_TCP; 623 if (lif->rss_types & IONIC_RSS_TYPE_IPV6_UDP) 624 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_UDP; 625 626 rss_conf->rss_hf = rss_hf; 627 628 return 0; 629 } 630 631 static int 632 ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev, 633 struct rte_eth_rss_conf *rss_conf) 634 { 635 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 636 uint32_t rss_types = 0; 637 uint8_t *key = NULL; 638 639 IONIC_PRINT_CALL(); 640 641 if (rss_conf->rss_key) 642 key = rss_conf->rss_key; 643 644 if ((rss_conf->rss_hf & IONIC_ETH_RSS_OFFLOAD_ALL) == 0) { 645 /* 646 * Can't disable rss through hash flags, 647 * if it is enabled by default during init 648 */ 649 if (lif->rss_ind_tbl) 650 return -EINVAL; 651 } else { 652 /* Can't enable rss if disabled by default during init */ 653 if (!lif->rss_ind_tbl) 654 return -EINVAL; 655 656 if (rss_conf->rss_hf & RTE_ETH_RSS_IPV4) 657 rss_types |= IONIC_RSS_TYPE_IPV4; 658 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP) 659 rss_types |= IONIC_RSS_TYPE_IPV4_TCP; 660 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP) 661 rss_types |= IONIC_RSS_TYPE_IPV4_UDP; 662 if (rss_conf->rss_hf & RTE_ETH_RSS_IPV6) 663 rss_types |= IONIC_RSS_TYPE_IPV6; 664 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP) 665 rss_types |= IONIC_RSS_TYPE_IPV6_TCP; 666 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP) 667 rss_types |= IONIC_RSS_TYPE_IPV6_UDP; 668 669 ionic_lif_rss_config(lif, rss_types, key, NULL); 670 } 671 672 return 0; 673 } 674 675 static int 676 ionic_dev_stats_get(struct rte_eth_dev *eth_dev, 677 struct rte_eth_stats *stats) 678 { 679 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 680 681 ionic_lif_get_stats(lif, stats); 682 683 return 0; 684 } 685 686 static int 687 ionic_dev_stats_reset(struct rte_eth_dev *eth_dev) 688 { 689 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 690 691 IONIC_PRINT_CALL(); 692 693 ionic_lif_reset_stats(lif); 694 695 return 0; 696 } 697 698 static int 699 ionic_dev_xstats_get_names(__rte_unused struct rte_eth_dev *eth_dev, 700 struct rte_eth_xstat_name *xstats_names, 701 __rte_unused unsigned int size) 702 { 703 unsigned int i; 704 705 if (xstats_names != NULL) { 706 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 707 snprintf(xstats_names[i].name, 708 sizeof(xstats_names[i].name), 709 "%s", rte_ionic_xstats_strings[i].name); 710 } 711 } 712 713 return IONIC_NB_HW_STATS; 714 } 715 716 static int 717 ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *eth_dev, 718 const uint64_t *ids, struct rte_eth_xstat_name *xstats_names, 719 unsigned int limit) 720 { 721 struct rte_eth_xstat_name xstats_names_copy[IONIC_NB_HW_STATS]; 722 uint16_t i; 723 724 if (!ids) { 725 if (xstats_names != NULL) { 726 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 727 snprintf(xstats_names[i].name, 728 sizeof(xstats_names[i].name), 729 "%s", rte_ionic_xstats_strings[i].name); 730 } 731 } 732 733 return IONIC_NB_HW_STATS; 734 } 735 736 ionic_dev_xstats_get_names_by_id(eth_dev, NULL, xstats_names_copy, 737 IONIC_NB_HW_STATS); 738 739 for (i = 0; i < limit; i++) { 740 if (ids[i] >= IONIC_NB_HW_STATS) { 741 IONIC_PRINT(ERR, "id value isn't valid"); 742 return -1; 743 } 744 745 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 746 } 747 748 return limit; 749 } 750 751 static int 752 ionic_dev_xstats_get(struct rte_eth_dev *eth_dev, struct rte_eth_xstat *xstats, 753 unsigned int n) 754 { 755 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 756 struct ionic_lif_stats hw_stats; 757 uint16_t i; 758 759 if (n < IONIC_NB_HW_STATS) 760 return IONIC_NB_HW_STATS; 761 762 ionic_lif_get_hw_stats(lif, &hw_stats); 763 764 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 765 xstats[i].value = *(uint64_t *)(((char *)&hw_stats) + 766 rte_ionic_xstats_strings[i].offset); 767 xstats[i].id = i; 768 } 769 770 return IONIC_NB_HW_STATS; 771 } 772 773 static int 774 ionic_dev_xstats_get_by_id(struct rte_eth_dev *eth_dev, const uint64_t *ids, 775 uint64_t *values, unsigned int n) 776 { 777 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 778 struct ionic_lif_stats hw_stats; 779 uint64_t values_copy[IONIC_NB_HW_STATS]; 780 uint16_t i; 781 782 if (!ids) { 783 if (!ids && n < IONIC_NB_HW_STATS) 784 return IONIC_NB_HW_STATS; 785 786 ionic_lif_get_hw_stats(lif, &hw_stats); 787 788 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 789 values[i] = *(uint64_t *)(((char *)&hw_stats) + 790 rte_ionic_xstats_strings[i].offset); 791 } 792 793 return IONIC_NB_HW_STATS; 794 } 795 796 ionic_dev_xstats_get_by_id(eth_dev, NULL, values_copy, 797 IONIC_NB_HW_STATS); 798 799 for (i = 0; i < n; i++) { 800 if (ids[i] >= IONIC_NB_HW_STATS) { 801 IONIC_PRINT(ERR, "id value isn't valid"); 802 return -1; 803 } 804 805 values[i] = values_copy[ids[i]]; 806 } 807 808 return n; 809 } 810 811 static int 812 ionic_dev_xstats_reset(struct rte_eth_dev *eth_dev) 813 { 814 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 815 816 ionic_lif_reset_hw_stats(lif); 817 818 return 0; 819 } 820 821 static int 822 ionic_dev_configure(struct rte_eth_dev *eth_dev) 823 { 824 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 825 826 IONIC_PRINT_CALL(); 827 828 ionic_lif_configure(lif); 829 830 ionic_lif_set_features(lif); 831 832 return 0; 833 } 834 835 static inline uint32_t 836 ionic_parse_link_speeds(uint16_t link_speeds) 837 { 838 if (link_speeds & RTE_ETH_LINK_SPEED_100G) 839 return 100000; 840 else if (link_speeds & RTE_ETH_LINK_SPEED_50G) 841 return 50000; 842 else if (link_speeds & RTE_ETH_LINK_SPEED_40G) 843 return 40000; 844 else if (link_speeds & RTE_ETH_LINK_SPEED_25G) 845 return 25000; 846 else if (link_speeds & RTE_ETH_LINK_SPEED_10G) 847 return 10000; 848 else 849 return 0; 850 } 851 852 /* 853 * Configure device link speed and setup link. 854 * It returns 0 on success. 855 */ 856 static int 857 ionic_dev_start(struct rte_eth_dev *eth_dev) 858 { 859 struct rte_eth_conf *dev_conf = ð_dev->data->dev_conf; 860 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 861 struct ionic_adapter *adapter = lif->adapter; 862 struct ionic_dev *idev = &adapter->idev; 863 uint32_t speed = 0, allowed_speeds; 864 uint8_t an_enable; 865 int err; 866 867 IONIC_PRINT_CALL(); 868 869 allowed_speeds = 870 RTE_ETH_LINK_SPEED_FIXED | 871 RTE_ETH_LINK_SPEED_10G | 872 RTE_ETH_LINK_SPEED_25G | 873 RTE_ETH_LINK_SPEED_40G | 874 RTE_ETH_LINK_SPEED_50G | 875 RTE_ETH_LINK_SPEED_100G; 876 877 if (dev_conf->link_speeds & ~allowed_speeds) { 878 IONIC_PRINT(ERR, "Invalid link setting"); 879 return -EINVAL; 880 } 881 882 if (dev_conf->lpbk_mode) 883 IONIC_PRINT(WARNING, "Loopback mode not supported"); 884 885 lif->frame_size = eth_dev->data->mtu + IONIC_ETH_OVERHEAD; 886 887 err = ionic_lif_change_mtu(lif, eth_dev->data->mtu); 888 if (err) { 889 IONIC_PRINT(ERR, "Cannot set LIF frame size %u: %d", 890 lif->frame_size, err); 891 return err; 892 } 893 894 err = ionic_lif_start(lif); 895 if (err) { 896 IONIC_PRINT(ERR, "Cannot start LIF: %d", err); 897 return err; 898 } 899 900 /* Configure link */ 901 an_enable = (dev_conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) == 0; 902 903 ionic_dev_cmd_port_autoneg(idev, an_enable); 904 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 905 if (err) 906 IONIC_PRINT(WARNING, "Failed to %s autonegotiation", 907 an_enable ? "enable" : "disable"); 908 909 if (!an_enable) 910 speed = ionic_parse_link_speeds(dev_conf->link_speeds); 911 if (speed) { 912 ionic_dev_cmd_port_speed(idev, speed); 913 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 914 if (err) 915 IONIC_PRINT(WARNING, "Failed to set link speed %u", 916 speed); 917 } 918 919 ionic_dev_link_update(eth_dev, 0); 920 921 return 0; 922 } 923 924 /* 925 * Stop device: disable rx and tx functions to allow for reconfiguring. 926 */ 927 static int 928 ionic_dev_stop(struct rte_eth_dev *eth_dev) 929 { 930 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 931 932 IONIC_PRINT_CALL(); 933 934 ionic_lif_stop(lif); 935 936 return 0; 937 } 938 939 /* 940 * Reset and stop device. 941 */ 942 static int 943 ionic_dev_close(struct rte_eth_dev *eth_dev) 944 { 945 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 946 struct ionic_adapter *adapter = lif->adapter; 947 948 IONIC_PRINT_CALL(); 949 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 950 return 0; 951 952 ionic_lif_stop(lif); 953 954 ionic_lif_free_queues(lif); 955 956 IONIC_PRINT(NOTICE, "Removing device %s", eth_dev->device->name); 957 if (adapter->intf->unconfigure_intr) 958 (*adapter->intf->unconfigure_intr)(adapter); 959 960 rte_eth_dev_destroy(eth_dev, eth_ionic_dev_uninit); 961 962 ionic_port_reset(adapter); 963 ionic_reset(adapter); 964 if (adapter->intf->unmap_bars) 965 (*adapter->intf->unmap_bars)(adapter); 966 967 rte_free(adapter); 968 969 return 0; 970 } 971 972 int 973 eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params) 974 { 975 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 976 struct ionic_adapter *adapter = (struct ionic_adapter *)init_params; 977 int err; 978 979 IONIC_PRINT_CALL(); 980 981 eth_dev->dev_ops = &ionic_eth_dev_ops; 982 eth_dev->rx_pkt_burst = &ionic_recv_pkts; 983 eth_dev->tx_pkt_burst = &ionic_xmit_pkts; 984 eth_dev->tx_pkt_prepare = &ionic_prep_pkts; 985 986 /* Multi-process not supported, primary does initialization anyway */ 987 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 988 return 0; 989 990 if (adapter->intf->copy_bus_info) 991 (*adapter->intf->copy_bus_info)(adapter, eth_dev); 992 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 993 994 lif->eth_dev = eth_dev; 995 lif->adapter = adapter; 996 adapter->lif = lif; 997 998 IONIC_PRINT(DEBUG, "Up to %u MAC addresses supported", 999 adapter->max_mac_addrs); 1000 1001 /* Allocate memory for storing MAC addresses */ 1002 eth_dev->data->mac_addrs = rte_zmalloc("ionic", 1003 RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs, 0); 1004 1005 if (eth_dev->data->mac_addrs == NULL) { 1006 IONIC_PRINT(ERR, "Failed to allocate %u bytes needed to " 1007 "store MAC addresses", 1008 RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs); 1009 err = -ENOMEM; 1010 goto err; 1011 } 1012 1013 err = ionic_lif_alloc(lif); 1014 if (err) { 1015 IONIC_PRINT(ERR, "Cannot allocate LIFs: %d, aborting", 1016 err); 1017 goto err; 1018 } 1019 1020 err = ionic_lif_init(lif); 1021 if (err) { 1022 IONIC_PRINT(ERR, "Cannot init LIFs: %d, aborting", err); 1023 goto err_free_lif; 1024 } 1025 1026 /* Copy the MAC address */ 1027 rte_ether_addr_copy((struct rte_ether_addr *)lif->mac_addr, 1028 ð_dev->data->mac_addrs[0]); 1029 1030 IONIC_PRINT(DEBUG, "Port %u initialized", eth_dev->data->port_id); 1031 1032 return 0; 1033 1034 err_free_lif: 1035 ionic_lif_free(lif); 1036 err: 1037 return err; 1038 } 1039 1040 static int 1041 eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev) 1042 { 1043 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 1044 struct ionic_adapter *adapter = lif->adapter; 1045 1046 IONIC_PRINT_CALL(); 1047 1048 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1049 return 0; 1050 1051 adapter->lif = NULL; 1052 1053 ionic_lif_deinit(lif); 1054 ionic_lif_free(lif); 1055 1056 if (!(lif->state & IONIC_LIF_F_FW_RESET)) 1057 ionic_lif_reset(lif); 1058 1059 return 0; 1060 } 1061 1062 int 1063 eth_ionic_dev_probe(void *bus_dev, struct rte_device *rte_dev, 1064 struct ionic_bars *bars, const struct ionic_dev_intf *intf, 1065 uint16_t device_id, uint16_t vendor_id) 1066 { 1067 char name[RTE_ETH_NAME_MAX_LEN]; 1068 struct ionic_adapter *adapter; 1069 struct ionic_hw *hw; 1070 unsigned long i; 1071 int err; 1072 1073 /* Check structs (trigger error at compilation time) */ 1074 ionic_struct_size_checks(); 1075 1076 /* Multi-process not supported */ 1077 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1078 err = -EPERM; 1079 goto err; 1080 } 1081 1082 adapter = rte_zmalloc("ionic", sizeof(*adapter), 0); 1083 if (!adapter) { 1084 IONIC_PRINT(ERR, "OOM"); 1085 err = -ENOMEM; 1086 goto err; 1087 } 1088 1089 adapter->bus_dev = bus_dev; 1090 hw = &adapter->hw; 1091 1092 /* Vendor and Device ID need to be set before init of shared code */ 1093 hw->device_id = device_id; 1094 hw->vendor_id = vendor_id; 1095 1096 err = ionic_init_mac(hw); 1097 if (err != 0) { 1098 IONIC_PRINT(ERR, "Mac init failed: %d", err); 1099 err = -EIO; 1100 goto err_free_adapter; 1101 } 1102 1103 adapter->bars.num_bars = bars->num_bars; 1104 for (i = 0; i < bars->num_bars; i++) { 1105 adapter->bars.bar[i].vaddr = bars->bar[i].vaddr; 1106 adapter->bars.bar[i].bus_addr = bars->bar[i].bus_addr; 1107 adapter->bars.bar[i].len = bars->bar[i].len; 1108 } 1109 1110 if (intf->setup == NULL) { 1111 IONIC_PRINT(ERR, "Device setup function is mandatory"); 1112 goto err_free_adapter; 1113 } 1114 1115 adapter->intf = intf; 1116 1117 /* Discover ionic dev resources */ 1118 err = ionic_setup(adapter); 1119 if (err) { 1120 IONIC_PRINT(ERR, "Cannot setup device: %d, aborting", err); 1121 goto err_free_adapter; 1122 } 1123 1124 err = ionic_identify(adapter); 1125 if (err) { 1126 IONIC_PRINT(ERR, "Cannot identify device: %d, aborting", 1127 err); 1128 goto err_free_adapter; 1129 } 1130 1131 err = ionic_init(adapter); 1132 if (err) { 1133 IONIC_PRINT(ERR, "Cannot init device: %d, aborting", err); 1134 goto err_free_adapter; 1135 } 1136 1137 /* Configure the ports */ 1138 err = ionic_port_identify(adapter); 1139 if (err) { 1140 IONIC_PRINT(ERR, "Cannot identify port: %d, aborting", 1141 err); 1142 goto err_free_adapter; 1143 } 1144 1145 err = ionic_port_init(adapter); 1146 if (err) { 1147 IONIC_PRINT(ERR, "Cannot init port: %d, aborting", err); 1148 goto err_free_adapter; 1149 } 1150 1151 /* Configure LIFs */ 1152 err = ionic_lif_identify(adapter); 1153 if (err) { 1154 IONIC_PRINT(ERR, "Cannot identify lif: %d, aborting", err); 1155 goto err_free_adapter; 1156 } 1157 1158 /* Allocate and init LIFs */ 1159 err = ionic_lifs_size(adapter); 1160 if (err) { 1161 IONIC_PRINT(ERR, "Cannot size LIFs: %d, aborting", err); 1162 goto err_free_adapter; 1163 } 1164 1165 adapter->max_mac_addrs = 1166 rte_le_to_cpu_32(adapter->ident.lif.eth.max_ucast_filters); 1167 1168 if (rte_le_to_cpu_32(adapter->ident.dev.nlifs) != 1) { 1169 IONIC_PRINT(ERR, "Unexpected request for %d LIFs", 1170 rte_le_to_cpu_32(adapter->ident.dev.nlifs)); 1171 goto err_free_adapter; 1172 } 1173 1174 snprintf(name, sizeof(name), "%s_lif", rte_dev->name); 1175 err = rte_eth_dev_create(rte_dev, name, sizeof(struct ionic_lif), 1176 NULL, NULL, eth_ionic_dev_init, adapter); 1177 if (err) { 1178 IONIC_PRINT(ERR, "Cannot create eth device for %s", name); 1179 goto err_free_adapter; 1180 } 1181 1182 if (adapter->intf->configure_intr) { 1183 err = (*adapter->intf->configure_intr)(adapter); 1184 if (err) { 1185 IONIC_PRINT(ERR, "Failed to configure interrupts"); 1186 goto err_free_adapter; 1187 } 1188 } 1189 1190 return 0; 1191 1192 err_free_adapter: 1193 rte_free(adapter); 1194 err: 1195 return err; 1196 } 1197 1198 int 1199 eth_ionic_dev_remove(struct rte_device *rte_dev) 1200 { 1201 char name[RTE_ETH_NAME_MAX_LEN]; 1202 struct rte_eth_dev *eth_dev; 1203 1204 /* Adapter lookup is using the eth_dev name */ 1205 snprintf(name, sizeof(name), "%s_lif", rte_dev->name); 1206 1207 eth_dev = rte_eth_dev_allocated(name); 1208 if (eth_dev) 1209 ionic_dev_close(eth_dev); 1210 else 1211 IONIC_PRINT(DEBUG, "Cannot find device %s", rte_dev->name); 1212 1213 return 0; 1214 } 1215 1216 RTE_LOG_REGISTER_DEFAULT(ionic_logtype, NOTICE); 1217