1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2018-2022 Advanced Micro Devices, Inc. 3 */ 4 5 #include <rte_ethdev.h> 6 #include <ethdev_driver.h> 7 #include <rte_malloc.h> 8 9 #include "ionic_logs.h" 10 #include "ionic.h" 11 #include "ionic_dev.h" 12 #include "ionic_mac_api.h" 13 #include "ionic_lif.h" 14 #include "ionic_ethdev.h" 15 #include "ionic_rxtx.h" 16 17 static int eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params); 18 static int eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev); 19 static int ionic_dev_info_get(struct rte_eth_dev *eth_dev, 20 struct rte_eth_dev_info *dev_info); 21 static int ionic_dev_configure(struct rte_eth_dev *dev); 22 static int ionic_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 23 static int ionic_dev_start(struct rte_eth_dev *dev); 24 static int ionic_dev_stop(struct rte_eth_dev *dev); 25 static int ionic_dev_close(struct rte_eth_dev *dev); 26 static int ionic_dev_set_link_up(struct rte_eth_dev *dev); 27 static int ionic_dev_set_link_down(struct rte_eth_dev *dev); 28 static int ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev, 29 struct rte_eth_fc_conf *fc_conf); 30 static int ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev, 31 struct rte_eth_fc_conf *fc_conf); 32 static int ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask); 33 static int ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev, 34 struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size); 35 static int ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev, 36 struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size); 37 static int ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev, 38 struct rte_eth_rss_conf *rss_conf); 39 static int ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev, 40 struct rte_eth_rss_conf *rss_conf); 41 static int ionic_dev_stats_get(struct rte_eth_dev *eth_dev, 42 struct rte_eth_stats *stats); 43 static int ionic_dev_stats_reset(struct rte_eth_dev *eth_dev); 44 static int ionic_dev_xstats_get(struct rte_eth_dev *dev, 45 struct rte_eth_xstat *xstats, unsigned int n); 46 static int ionic_dev_xstats_get_by_id(struct rte_eth_dev *dev, 47 const uint64_t *ids, uint64_t *values, unsigned int n); 48 static int ionic_dev_xstats_reset(struct rte_eth_dev *dev); 49 static int ionic_dev_xstats_get_names(struct rte_eth_dev *dev, 50 struct rte_eth_xstat_name *xstats_names, unsigned int size); 51 static int ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *dev, 52 const uint64_t *ids, struct rte_eth_xstat_name *xstats_names, 53 unsigned int limit); 54 static int ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev, 55 char *fw_version, size_t fw_size); 56 57 static const struct rte_eth_desc_lim rx_desc_lim = { 58 .nb_max = IONIC_MAX_RING_DESC, 59 .nb_min = IONIC_MIN_RING_DESC, 60 .nb_align = 1, 61 }; 62 63 static const struct rte_eth_desc_lim tx_desc_lim_v1 = { 64 .nb_max = IONIC_MAX_RING_DESC, 65 .nb_min = IONIC_MIN_RING_DESC, 66 .nb_align = 1, 67 .nb_seg_max = IONIC_TX_MAX_SG_ELEMS_V1 + 1, 68 .nb_mtu_seg_max = IONIC_TX_MAX_SG_ELEMS_V1 + 1, 69 }; 70 71 static const struct eth_dev_ops ionic_eth_dev_ops = { 72 .dev_infos_get = ionic_dev_info_get, 73 .dev_supported_ptypes_get = ionic_dev_supported_ptypes_get, 74 .dev_configure = ionic_dev_configure, 75 .mtu_set = ionic_dev_mtu_set, 76 .dev_start = ionic_dev_start, 77 .dev_stop = ionic_dev_stop, 78 .dev_close = ionic_dev_close, 79 .link_update = ionic_dev_link_update, 80 .dev_set_link_up = ionic_dev_set_link_up, 81 .dev_set_link_down = ionic_dev_set_link_down, 82 .mac_addr_add = ionic_dev_add_mac, 83 .mac_addr_remove = ionic_dev_remove_mac, 84 .mac_addr_set = ionic_dev_set_mac, 85 .vlan_filter_set = ionic_dev_vlan_filter_set, 86 .promiscuous_enable = ionic_dev_promiscuous_enable, 87 .promiscuous_disable = ionic_dev_promiscuous_disable, 88 .allmulticast_enable = ionic_dev_allmulticast_enable, 89 .allmulticast_disable = ionic_dev_allmulticast_disable, 90 .flow_ctrl_get = ionic_flow_ctrl_get, 91 .flow_ctrl_set = ionic_flow_ctrl_set, 92 .rxq_info_get = ionic_rxq_info_get, 93 .txq_info_get = ionic_txq_info_get, 94 .rx_queue_setup = ionic_dev_rx_queue_setup, 95 .rx_queue_release = ionic_dev_rx_queue_release, 96 .rx_queue_start = ionic_dev_rx_queue_start, 97 .rx_queue_stop = ionic_dev_rx_queue_stop, 98 .tx_queue_setup = ionic_dev_tx_queue_setup, 99 .tx_queue_release = ionic_dev_tx_queue_release, 100 .tx_queue_start = ionic_dev_tx_queue_start, 101 .tx_queue_stop = ionic_dev_tx_queue_stop, 102 .vlan_offload_set = ionic_vlan_offload_set, 103 .reta_update = ionic_dev_rss_reta_update, 104 .reta_query = ionic_dev_rss_reta_query, 105 .rss_hash_conf_get = ionic_dev_rss_hash_conf_get, 106 .rss_hash_update = ionic_dev_rss_hash_update, 107 .stats_get = ionic_dev_stats_get, 108 .stats_reset = ionic_dev_stats_reset, 109 .xstats_get = ionic_dev_xstats_get, 110 .xstats_get_by_id = ionic_dev_xstats_get_by_id, 111 .xstats_reset = ionic_dev_xstats_reset, 112 .xstats_get_names = ionic_dev_xstats_get_names, 113 .xstats_get_names_by_id = ionic_dev_xstats_get_names_by_id, 114 .fw_version_get = ionic_dev_fw_version_get, 115 }; 116 117 struct rte_ionic_xstats_name_off { 118 char name[RTE_ETH_XSTATS_NAME_SIZE]; 119 unsigned int offset; 120 }; 121 122 static const struct rte_ionic_xstats_name_off rte_ionic_xstats_strings[] = { 123 /* RX */ 124 {"rx_ucast_bytes", offsetof(struct ionic_lif_stats, 125 rx_ucast_bytes)}, 126 {"rx_ucast_packets", offsetof(struct ionic_lif_stats, 127 rx_ucast_packets)}, 128 {"rx_mcast_bytes", offsetof(struct ionic_lif_stats, 129 rx_mcast_bytes)}, 130 {"rx_mcast_packets", offsetof(struct ionic_lif_stats, 131 rx_mcast_packets)}, 132 {"rx_bcast_bytes", offsetof(struct ionic_lif_stats, 133 rx_bcast_bytes)}, 134 {"rx_bcast_packets", offsetof(struct ionic_lif_stats, 135 rx_bcast_packets)}, 136 /* RX drops */ 137 {"rx_ucast_drop_bytes", offsetof(struct ionic_lif_stats, 138 rx_ucast_drop_bytes)}, 139 {"rx_ucast_drop_packets", offsetof(struct ionic_lif_stats, 140 rx_ucast_drop_packets)}, 141 {"rx_mcast_drop_bytes", offsetof(struct ionic_lif_stats, 142 rx_mcast_drop_bytes)}, 143 {"rx_mcast_drop_packets", offsetof(struct ionic_lif_stats, 144 rx_mcast_drop_packets)}, 145 {"rx_bcast_drop_bytes", offsetof(struct ionic_lif_stats, 146 rx_bcast_drop_bytes)}, 147 {"rx_bcast_drop_packets", offsetof(struct ionic_lif_stats, 148 rx_bcast_drop_packets)}, 149 {"rx_dma_error", offsetof(struct ionic_lif_stats, 150 rx_dma_error)}, 151 /* TX */ 152 {"tx_ucast_bytes", offsetof(struct ionic_lif_stats, 153 tx_ucast_bytes)}, 154 {"tx_ucast_packets", offsetof(struct ionic_lif_stats, 155 tx_ucast_packets)}, 156 {"tx_mcast_bytes", offsetof(struct ionic_lif_stats, 157 tx_mcast_bytes)}, 158 {"tx_mcast_packets", offsetof(struct ionic_lif_stats, 159 tx_mcast_packets)}, 160 {"tx_bcast_bytes", offsetof(struct ionic_lif_stats, 161 tx_bcast_bytes)}, 162 {"tx_bcast_packets", offsetof(struct ionic_lif_stats, 163 tx_bcast_packets)}, 164 /* TX drops */ 165 {"tx_ucast_drop_bytes", offsetof(struct ionic_lif_stats, 166 tx_ucast_drop_bytes)}, 167 {"tx_ucast_drop_packets", offsetof(struct ionic_lif_stats, 168 tx_ucast_drop_packets)}, 169 {"tx_mcast_drop_bytes", offsetof(struct ionic_lif_stats, 170 tx_mcast_drop_bytes)}, 171 {"tx_mcast_drop_packets", offsetof(struct ionic_lif_stats, 172 tx_mcast_drop_packets)}, 173 {"tx_bcast_drop_bytes", offsetof(struct ionic_lif_stats, 174 tx_bcast_drop_bytes)}, 175 {"tx_bcast_drop_packets", offsetof(struct ionic_lif_stats, 176 tx_bcast_drop_packets)}, 177 {"tx_dma_error", offsetof(struct ionic_lif_stats, 178 tx_dma_error)}, 179 /* Rx Queue/Ring drops */ 180 {"rx_queue_disabled", offsetof(struct ionic_lif_stats, 181 rx_queue_disabled)}, 182 {"rx_queue_empty", offsetof(struct ionic_lif_stats, 183 rx_queue_empty)}, 184 {"rx_queue_error", offsetof(struct ionic_lif_stats, 185 rx_queue_error)}, 186 {"rx_desc_fetch_error", offsetof(struct ionic_lif_stats, 187 rx_desc_fetch_error)}, 188 {"rx_desc_data_error", offsetof(struct ionic_lif_stats, 189 rx_desc_data_error)}, 190 /* Tx Queue/Ring drops */ 191 {"tx_queue_disabled", offsetof(struct ionic_lif_stats, 192 tx_queue_disabled)}, 193 {"tx_queue_error", offsetof(struct ionic_lif_stats, 194 tx_queue_error)}, 195 {"tx_desc_fetch_error", offsetof(struct ionic_lif_stats, 196 tx_desc_fetch_error)}, 197 {"tx_desc_data_error", offsetof(struct ionic_lif_stats, 198 tx_desc_data_error)}, 199 /* Flexible firmware events */ 200 {"fw_flex_event1", offsetof(struct ionic_lif_stats, flex1)}, 201 {"fw_flex_event2", offsetof(struct ionic_lif_stats, flex2)}, 202 {"fw_flex_event3", offsetof(struct ionic_lif_stats, flex3)}, 203 {"fw_flex_event4", offsetof(struct ionic_lif_stats, flex4)}, 204 {"fw_flex_event5", offsetof(struct ionic_lif_stats, flex5)}, 205 {"fw_flex_event6", offsetof(struct ionic_lif_stats, flex6)}, 206 {"fw_flex_event7", offsetof(struct ionic_lif_stats, flex7)}, 207 {"fw_flex_event8", offsetof(struct ionic_lif_stats, flex8)}, 208 {"fw_flex_event9", offsetof(struct ionic_lif_stats, flex9)}, 209 {"fw_flex_event10", offsetof(struct ionic_lif_stats, flex10)}, 210 {"fw_flex_event11", offsetof(struct ionic_lif_stats, flex11)}, 211 {"fw_flex_event12", offsetof(struct ionic_lif_stats, flex12)}, 212 {"fw_flex_event13", offsetof(struct ionic_lif_stats, flex13)}, 213 {"fw_flex_event14", offsetof(struct ionic_lif_stats, flex14)}, 214 {"fw_flex_event15", offsetof(struct ionic_lif_stats, flex15)}, 215 {"fw_flex_event16", offsetof(struct ionic_lif_stats, flex16)}, 216 {"fw_flex_event17", offsetof(struct ionic_lif_stats, flex17)}, 217 {"fw_flex_event18", offsetof(struct ionic_lif_stats, flex18)}, 218 {"fw_flex_event19", offsetof(struct ionic_lif_stats, flex19)}, 219 {"fw_flex_event20", offsetof(struct ionic_lif_stats, flex20)}, 220 {"fw_flex_event21", offsetof(struct ionic_lif_stats, flex21)}, 221 {"fw_flex_event22", offsetof(struct ionic_lif_stats, flex22)}, 222 {"fw_flex_event23", offsetof(struct ionic_lif_stats, flex23)}, 223 {"fw_flex_event24", offsetof(struct ionic_lif_stats, flex24)}, 224 {"fw_flex_event25", offsetof(struct ionic_lif_stats, flex25)}, 225 {"fw_flex_event26", offsetof(struct ionic_lif_stats, flex26)}, 226 {"fw_flex_event27", offsetof(struct ionic_lif_stats, flex27)}, 227 {"fw_flex_event28", offsetof(struct ionic_lif_stats, flex28)}, 228 {"fw_flex_event29", offsetof(struct ionic_lif_stats, flex29)}, 229 {"fw_flex_event30", offsetof(struct ionic_lif_stats, flex30)}, 230 {"fw_flex_event31", offsetof(struct ionic_lif_stats, flex31)}, 231 {"fw_flex_event32", offsetof(struct ionic_lif_stats, flex32)}, 232 }; 233 234 #define IONIC_NB_HW_STATS RTE_DIM(rte_ionic_xstats_strings) 235 236 static int 237 ionic_dev_fw_version_get(struct rte_eth_dev *eth_dev, 238 char *fw_version, size_t fw_size) 239 { 240 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 241 struct ionic_adapter *adapter = lif->adapter; 242 int ret; 243 244 ret = snprintf(fw_version, fw_size, "%s", 245 adapter->fw_version); 246 if (ret < 0) 247 return -EINVAL; 248 249 ret += 1; /* add the size of '\0' */ 250 if (fw_size < (size_t)ret) 251 return ret; 252 else 253 return 0; 254 } 255 256 /* 257 * Set device link up, enable tx. 258 */ 259 static int 260 ionic_dev_set_link_up(struct rte_eth_dev *eth_dev) 261 { 262 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 263 int err; 264 265 IONIC_PRINT_CALL(); 266 267 err = ionic_lif_start(lif); 268 if (err) 269 IONIC_PRINT(ERR, "Could not start lif to set link up"); 270 271 ionic_dev_link_update(lif->eth_dev, 0); 272 273 return err; 274 } 275 276 /* 277 * Set device link down, disable tx. 278 */ 279 static int 280 ionic_dev_set_link_down(struct rte_eth_dev *eth_dev) 281 { 282 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 283 284 IONIC_PRINT_CALL(); 285 286 ionic_lif_stop(lif); 287 288 ionic_dev_link_update(lif->eth_dev, 0); 289 290 return 0; 291 } 292 293 int 294 ionic_dev_link_update(struct rte_eth_dev *eth_dev, 295 int wait_to_complete __rte_unused) 296 { 297 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 298 struct ionic_adapter *adapter = lif->adapter; 299 struct rte_eth_link link; 300 301 IONIC_PRINT_CALL(); 302 303 /* Initialize */ 304 memset(&link, 0, sizeof(link)); 305 306 if (adapter->idev.port_info->config.an_enable) { 307 link.link_autoneg = RTE_ETH_LINK_AUTONEG; 308 } 309 310 if (!adapter->link_up || 311 !(lif->state & IONIC_LIF_F_UP)) { 312 /* Interface is down */ 313 link.link_status = RTE_ETH_LINK_DOWN; 314 link.link_duplex = RTE_ETH_LINK_HALF_DUPLEX; 315 link.link_speed = RTE_ETH_SPEED_NUM_NONE; 316 } else { 317 /* Interface is up */ 318 link.link_status = RTE_ETH_LINK_UP; 319 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX; 320 switch (adapter->link_speed) { 321 case 1000: 322 link.link_speed = RTE_ETH_SPEED_NUM_1G; 323 break; 324 case 10000: 325 link.link_speed = RTE_ETH_SPEED_NUM_10G; 326 break; 327 case 25000: 328 link.link_speed = RTE_ETH_SPEED_NUM_25G; 329 break; 330 case 40000: 331 link.link_speed = RTE_ETH_SPEED_NUM_40G; 332 break; 333 case 50000: 334 link.link_speed = RTE_ETH_SPEED_NUM_50G; 335 break; 336 case 100000: 337 link.link_speed = RTE_ETH_SPEED_NUM_100G; 338 break; 339 case 200000: 340 link.link_speed = RTE_ETH_SPEED_NUM_200G; 341 break; 342 default: 343 link.link_speed = RTE_ETH_SPEED_NUM_NONE; 344 break; 345 } 346 } 347 348 return rte_eth_linkstatus_set(eth_dev, &link); 349 } 350 351 /** 352 * Interrupt handler triggered by NIC for handling 353 * specific interrupt. 354 * 355 * @param param 356 * The address of parameter registered before. 357 * 358 * @return 359 * void 360 */ 361 void 362 ionic_dev_interrupt_handler(void *param) 363 { 364 struct ionic_adapter *adapter = (struct ionic_adapter *)param; 365 366 IONIC_PRINT(DEBUG, "->"); 367 368 if (adapter->lif) 369 ionic_notifyq_handler(adapter->lif, -1); 370 } 371 372 static int 373 ionic_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu) 374 { 375 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 376 377 if (lif->state & IONIC_LIF_F_UP) { 378 IONIC_PRINT(ERR, "Stop %s before setting mtu", lif->name); 379 return -EBUSY; 380 } 381 382 /* Note: mtu check against min/max is done by the API */ 383 IONIC_PRINT(INFO, "Setting mtu %u", mtu); 384 385 /* Update the frame size used by the Rx path */ 386 lif->frame_size = mtu + IONIC_ETH_OVERHEAD; 387 388 return 0; 389 } 390 391 static int 392 ionic_dev_info_get(struct rte_eth_dev *eth_dev, 393 struct rte_eth_dev_info *dev_info) 394 { 395 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 396 struct ionic_adapter *adapter = lif->adapter; 397 struct ionic_identity *ident = &adapter->ident; 398 union ionic_lif_config *cfg = &ident->lif.eth.config; 399 400 IONIC_PRINT_CALL(); 401 402 dev_info->max_rx_queues = (uint16_t) 403 rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_RXQ]); 404 dev_info->max_tx_queues = (uint16_t) 405 rte_le_to_cpu_32(cfg->queue_count[IONIC_QTYPE_TXQ]); 406 407 /* Also add ETHER_CRC_LEN if the adapter is able to keep CRC */ 408 dev_info->min_mtu = RTE_MAX((uint32_t)IONIC_MIN_MTU, 409 rte_le_to_cpu_32(ident->lif.eth.min_mtu)); 410 dev_info->max_mtu = RTE_MIN((uint32_t)IONIC_MAX_MTU, 411 rte_le_to_cpu_32(ident->lif.eth.max_mtu)); 412 dev_info->min_rx_bufsize = dev_info->min_mtu + IONIC_ETH_OVERHEAD; 413 dev_info->max_rx_pktlen = dev_info->max_mtu + IONIC_ETH_OVERHEAD; 414 dev_info->max_lro_pkt_size = 415 eth_dev->data->dev_conf.rxmode.max_lro_pkt_size; 416 417 dev_info->max_mac_addrs = adapter->max_mac_addrs; 418 dev_info->hash_key_size = IONIC_RSS_HASH_KEY_SIZE; 419 dev_info->reta_size = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz); 420 dev_info->flow_type_rss_offloads = IONIC_ETH_RSS_OFFLOAD_ALL; 421 422 dev_info->speed_capa = 423 RTE_ETH_LINK_SPEED_10G | 424 RTE_ETH_LINK_SPEED_25G | 425 RTE_ETH_LINK_SPEED_40G | 426 RTE_ETH_LINK_SPEED_50G | 427 RTE_ETH_LINK_SPEED_100G; 428 429 /* 430 * Per-queue capabilities 431 * RTE does not support disabling a feature on a queue if it is 432 * enabled globally on the device. Thus the driver does not advertise 433 * capabilities like RTE_ETH_TX_OFFLOAD_IPV4_CKSUM as per-queue even 434 * though the driver would be otherwise capable of disabling it on 435 * a per-queue basis. 436 */ 437 438 dev_info->rx_queue_offload_capa = 0; 439 dev_info->tx_queue_offload_capa = RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; 440 441 /* 442 * Per-port capabilities 443 * See ionic_set_features to request and check supported features 444 */ 445 446 dev_info->rx_offload_capa = dev_info->rx_queue_offload_capa | 447 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | 448 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | 449 RTE_ETH_RX_OFFLOAD_TCP_CKSUM | 450 RTE_ETH_RX_OFFLOAD_VLAN_FILTER | 451 RTE_ETH_RX_OFFLOAD_VLAN_STRIP | 452 RTE_ETH_RX_OFFLOAD_SCATTER | 453 RTE_ETH_RX_OFFLOAD_RSS_HASH | 454 0; 455 456 dev_info->tx_offload_capa = dev_info->tx_queue_offload_capa | 457 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | 458 RTE_ETH_TX_OFFLOAD_UDP_CKSUM | 459 RTE_ETH_TX_OFFLOAD_TCP_CKSUM | 460 RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM | 461 RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM | 462 RTE_ETH_TX_OFFLOAD_MULTI_SEGS | 463 RTE_ETH_TX_OFFLOAD_TCP_TSO | 464 RTE_ETH_TX_OFFLOAD_VLAN_INSERT | 465 0; 466 467 dev_info->rx_desc_lim = rx_desc_lim; 468 dev_info->tx_desc_lim = tx_desc_lim_v1; 469 470 /* Driver-preferred Rx/Tx parameters */ 471 dev_info->default_rxportconf.burst_size = IONIC_DEF_TXRX_BURST; 472 dev_info->default_txportconf.burst_size = IONIC_DEF_TXRX_BURST; 473 dev_info->default_rxportconf.nb_queues = 1; 474 dev_info->default_txportconf.nb_queues = 1; 475 dev_info->default_rxportconf.ring_size = IONIC_DEF_TXRX_DESC; 476 dev_info->default_txportconf.ring_size = IONIC_DEF_TXRX_DESC; 477 478 dev_info->default_rxconf = (struct rte_eth_rxconf) { 479 /* Packets are always dropped if no desc are available */ 480 .rx_drop_en = 1, 481 }; 482 483 return 0; 484 } 485 486 static int 487 ionic_flow_ctrl_get(struct rte_eth_dev *eth_dev, 488 struct rte_eth_fc_conf *fc_conf) 489 { 490 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 491 struct ionic_adapter *adapter = lif->adapter; 492 struct ionic_dev *idev = &adapter->idev; 493 494 if (idev->port_info) { 495 /* Flow control autoneg not supported */ 496 fc_conf->autoneg = 0; 497 498 if (idev->port_info->config.pause_type) 499 fc_conf->mode = RTE_ETH_FC_FULL; 500 else 501 fc_conf->mode = RTE_ETH_FC_NONE; 502 } 503 504 return 0; 505 } 506 507 static int 508 ionic_flow_ctrl_set(struct rte_eth_dev *eth_dev, 509 struct rte_eth_fc_conf *fc_conf) 510 { 511 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 512 struct ionic_adapter *adapter = lif->adapter; 513 struct ionic_dev *idev = &adapter->idev; 514 uint8_t pause_type = IONIC_PORT_PAUSE_TYPE_NONE; 515 int err; 516 517 if (fc_conf->autoneg) { 518 IONIC_PRINT(WARNING, "Flow control autoneg not supported"); 519 return -ENOTSUP; 520 } 521 522 switch (fc_conf->mode) { 523 case RTE_ETH_FC_NONE: 524 pause_type = IONIC_PORT_PAUSE_TYPE_NONE; 525 break; 526 case RTE_ETH_FC_FULL: 527 pause_type = IONIC_PORT_PAUSE_TYPE_LINK; 528 break; 529 case RTE_ETH_FC_RX_PAUSE: 530 case RTE_ETH_FC_TX_PAUSE: 531 return -ENOTSUP; 532 } 533 534 ionic_dev_cmd_port_pause(idev, pause_type); 535 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 536 if (err) 537 IONIC_PRINT(WARNING, "Failed to configure flow control"); 538 539 return err; 540 } 541 542 static int 543 ionic_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask) 544 { 545 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 546 547 ionic_lif_configure_vlan_offload(lif, mask); 548 549 ionic_lif_set_features(lif); 550 551 return 0; 552 } 553 554 static int 555 ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev, 556 struct rte_eth_rss_reta_entry64 *reta_conf, 557 uint16_t reta_size) 558 { 559 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 560 struct ionic_adapter *adapter = lif->adapter; 561 struct ionic_identity *ident = &adapter->ident; 562 uint32_t i, j, index, num; 563 uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz); 564 565 IONIC_PRINT_CALL(); 566 567 if (!lif->rss_ind_tbl) { 568 IONIC_PRINT(ERR, "RSS RETA not initialized, " 569 "can't update the table"); 570 return -EINVAL; 571 } 572 573 if (reta_size != tbl_sz) { 574 IONIC_PRINT(ERR, "The size of hash lookup table configured " 575 "(%d) does not match the number hardware can support " 576 "(%d)", 577 reta_size, tbl_sz); 578 return -EINVAL; 579 } 580 581 num = tbl_sz / RTE_ETH_RETA_GROUP_SIZE; 582 583 for (i = 0; i < num; i++) { 584 for (j = 0; j < RTE_ETH_RETA_GROUP_SIZE; j++) { 585 if (reta_conf[i].mask & ((uint64_t)1 << j)) { 586 index = (i * RTE_ETH_RETA_GROUP_SIZE) + j; 587 lif->rss_ind_tbl[index] = reta_conf[i].reta[j]; 588 } 589 } 590 } 591 592 return ionic_lif_rss_config(lif, lif->rss_types, NULL, NULL); 593 } 594 595 static int 596 ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev, 597 struct rte_eth_rss_reta_entry64 *reta_conf, 598 uint16_t reta_size) 599 { 600 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 601 struct ionic_adapter *adapter = lif->adapter; 602 struct ionic_identity *ident = &adapter->ident; 603 int i, j, num; 604 uint16_t tbl_sz = rte_le_to_cpu_16(ident->lif.eth.rss_ind_tbl_sz); 605 606 IONIC_PRINT_CALL(); 607 608 if (reta_size != tbl_sz) { 609 IONIC_PRINT(ERR, "The size of hash lookup table configured " 610 "(%d) does not match the number hardware can support " 611 "(%d)", 612 reta_size, tbl_sz); 613 return -EINVAL; 614 } 615 616 if (!lif->rss_ind_tbl) { 617 IONIC_PRINT(ERR, "RSS RETA has not been built yet"); 618 return -EINVAL; 619 } 620 621 num = reta_size / RTE_ETH_RETA_GROUP_SIZE; 622 623 for (i = 0; i < num; i++) { 624 for (j = 0; j < RTE_ETH_RETA_GROUP_SIZE; j++) { 625 reta_conf->reta[j] = 626 lif->rss_ind_tbl[(i * RTE_ETH_RETA_GROUP_SIZE) + j]; 627 } 628 reta_conf++; 629 } 630 631 return 0; 632 } 633 634 static int 635 ionic_dev_rss_hash_conf_get(struct rte_eth_dev *eth_dev, 636 struct rte_eth_rss_conf *rss_conf) 637 { 638 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 639 uint64_t rss_hf = 0; 640 641 IONIC_PRINT_CALL(); 642 643 if (!lif->rss_ind_tbl) { 644 IONIC_PRINT(NOTICE, "RSS not enabled"); 645 return 0; 646 } 647 648 /* Get key value (if not null, rss_key is 40-byte) */ 649 if (rss_conf->rss_key != NULL && 650 rss_conf->rss_key_len >= IONIC_RSS_HASH_KEY_SIZE) 651 memcpy(rss_conf->rss_key, lif->rss_hash_key, 652 IONIC_RSS_HASH_KEY_SIZE); 653 654 if (lif->rss_types & IONIC_RSS_TYPE_IPV4) 655 rss_hf |= RTE_ETH_RSS_IPV4; 656 if (lif->rss_types & IONIC_RSS_TYPE_IPV4_TCP) 657 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_TCP; 658 if (lif->rss_types & IONIC_RSS_TYPE_IPV4_UDP) 659 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV4_UDP; 660 if (lif->rss_types & IONIC_RSS_TYPE_IPV6) 661 rss_hf |= RTE_ETH_RSS_IPV6; 662 if (lif->rss_types & IONIC_RSS_TYPE_IPV6_TCP) 663 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_TCP; 664 if (lif->rss_types & IONIC_RSS_TYPE_IPV6_UDP) 665 rss_hf |= RTE_ETH_RSS_NONFRAG_IPV6_UDP; 666 667 rss_conf->rss_hf = rss_hf; 668 669 return 0; 670 } 671 672 static int 673 ionic_dev_rss_hash_update(struct rte_eth_dev *eth_dev, 674 struct rte_eth_rss_conf *rss_conf) 675 { 676 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 677 uint32_t rss_types = 0; 678 uint8_t *key = NULL; 679 680 IONIC_PRINT_CALL(); 681 682 if (rss_conf->rss_key) 683 key = rss_conf->rss_key; 684 685 if ((rss_conf->rss_hf & IONIC_ETH_RSS_OFFLOAD_ALL) == 0) { 686 /* 687 * Can't disable rss through hash flags, 688 * if it is enabled by default during init 689 */ 690 if (lif->rss_ind_tbl) 691 return -EINVAL; 692 } else { 693 /* Can't enable rss if disabled by default during init */ 694 if (!lif->rss_ind_tbl) 695 return -EINVAL; 696 697 if (rss_conf->rss_hf & RTE_ETH_RSS_IPV4) 698 rss_types |= IONIC_RSS_TYPE_IPV4; 699 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP) 700 rss_types |= IONIC_RSS_TYPE_IPV4_TCP; 701 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP) 702 rss_types |= IONIC_RSS_TYPE_IPV4_UDP; 703 if (rss_conf->rss_hf & RTE_ETH_RSS_IPV6) 704 rss_types |= IONIC_RSS_TYPE_IPV6; 705 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP) 706 rss_types |= IONIC_RSS_TYPE_IPV6_TCP; 707 if (rss_conf->rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP) 708 rss_types |= IONIC_RSS_TYPE_IPV6_UDP; 709 710 ionic_lif_rss_config(lif, rss_types, key, NULL); 711 } 712 713 return 0; 714 } 715 716 static int 717 ionic_dev_stats_get(struct rte_eth_dev *eth_dev, 718 struct rte_eth_stats *stats) 719 { 720 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 721 722 ionic_lif_get_stats(lif, stats); 723 724 return 0; 725 } 726 727 static int 728 ionic_dev_stats_reset(struct rte_eth_dev *eth_dev) 729 { 730 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 731 732 IONIC_PRINT_CALL(); 733 734 ionic_lif_reset_stats(lif); 735 736 return 0; 737 } 738 739 static int 740 ionic_dev_xstats_get_names(__rte_unused struct rte_eth_dev *eth_dev, 741 struct rte_eth_xstat_name *xstats_names, 742 __rte_unused unsigned int size) 743 { 744 unsigned int i; 745 746 if (xstats_names != NULL) { 747 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 748 snprintf(xstats_names[i].name, 749 sizeof(xstats_names[i].name), 750 "%s", rte_ionic_xstats_strings[i].name); 751 } 752 } 753 754 return IONIC_NB_HW_STATS; 755 } 756 757 static int 758 ionic_dev_xstats_get_names_by_id(struct rte_eth_dev *eth_dev, 759 const uint64_t *ids, struct rte_eth_xstat_name *xstats_names, 760 unsigned int limit) 761 { 762 struct rte_eth_xstat_name xstats_names_copy[IONIC_NB_HW_STATS]; 763 uint16_t i; 764 765 if (!ids) { 766 if (xstats_names != NULL) { 767 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 768 snprintf(xstats_names[i].name, 769 sizeof(xstats_names[i].name), 770 "%s", rte_ionic_xstats_strings[i].name); 771 } 772 } 773 774 return IONIC_NB_HW_STATS; 775 } 776 777 ionic_dev_xstats_get_names_by_id(eth_dev, NULL, xstats_names_copy, 778 IONIC_NB_HW_STATS); 779 780 for (i = 0; i < limit; i++) { 781 if (ids[i] >= IONIC_NB_HW_STATS) { 782 IONIC_PRINT(ERR, "id value isn't valid"); 783 return -1; 784 } 785 786 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 787 } 788 789 return limit; 790 } 791 792 static int 793 ionic_dev_xstats_get(struct rte_eth_dev *eth_dev, struct rte_eth_xstat *xstats, 794 unsigned int n) 795 { 796 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 797 struct ionic_lif_stats hw_stats; 798 uint16_t i; 799 800 if (n < IONIC_NB_HW_STATS) 801 return IONIC_NB_HW_STATS; 802 803 ionic_lif_get_hw_stats(lif, &hw_stats); 804 805 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 806 xstats[i].value = *(uint64_t *)(((char *)&hw_stats) + 807 rte_ionic_xstats_strings[i].offset); 808 xstats[i].id = i; 809 } 810 811 return IONIC_NB_HW_STATS; 812 } 813 814 static int 815 ionic_dev_xstats_get_by_id(struct rte_eth_dev *eth_dev, const uint64_t *ids, 816 uint64_t *values, unsigned int n) 817 { 818 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 819 struct ionic_lif_stats hw_stats; 820 uint64_t values_copy[IONIC_NB_HW_STATS]; 821 uint16_t i; 822 823 if (!ids) { 824 if (!ids && n < IONIC_NB_HW_STATS) 825 return IONIC_NB_HW_STATS; 826 827 ionic_lif_get_hw_stats(lif, &hw_stats); 828 829 for (i = 0; i < IONIC_NB_HW_STATS; i++) { 830 values[i] = *(uint64_t *)(((char *)&hw_stats) + 831 rte_ionic_xstats_strings[i].offset); 832 } 833 834 return IONIC_NB_HW_STATS; 835 } 836 837 ionic_dev_xstats_get_by_id(eth_dev, NULL, values_copy, 838 IONIC_NB_HW_STATS); 839 840 for (i = 0; i < n; i++) { 841 if (ids[i] >= IONIC_NB_HW_STATS) { 842 IONIC_PRINT(ERR, "id value isn't valid"); 843 return -1; 844 } 845 846 values[i] = values_copy[ids[i]]; 847 } 848 849 return n; 850 } 851 852 static int 853 ionic_dev_xstats_reset(struct rte_eth_dev *eth_dev) 854 { 855 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 856 857 ionic_lif_reset_hw_stats(lif); 858 859 return 0; 860 } 861 862 static int 863 ionic_dev_configure(struct rte_eth_dev *eth_dev) 864 { 865 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 866 867 IONIC_PRINT_CALL(); 868 869 ionic_lif_configure(lif); 870 871 return 0; 872 } 873 874 static inline uint32_t 875 ionic_parse_link_speeds(uint16_t link_speeds) 876 { 877 if (link_speeds & RTE_ETH_LINK_SPEED_100G) 878 return 100000; 879 else if (link_speeds & RTE_ETH_LINK_SPEED_50G) 880 return 50000; 881 else if (link_speeds & RTE_ETH_LINK_SPEED_40G) 882 return 40000; 883 else if (link_speeds & RTE_ETH_LINK_SPEED_25G) 884 return 25000; 885 else if (link_speeds & RTE_ETH_LINK_SPEED_10G) 886 return 10000; 887 else 888 return 0; 889 } 890 891 /* 892 * Configure device link speed and setup link. 893 * It returns 0 on success. 894 */ 895 static int 896 ionic_dev_start(struct rte_eth_dev *eth_dev) 897 { 898 struct rte_eth_conf *dev_conf = ð_dev->data->dev_conf; 899 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 900 struct ionic_adapter *adapter = lif->adapter; 901 struct ionic_dev *idev = &adapter->idev; 902 uint32_t speed = 0, allowed_speeds; 903 uint8_t an_enable; 904 int err; 905 906 IONIC_PRINT_CALL(); 907 908 allowed_speeds = 909 RTE_ETH_LINK_SPEED_FIXED | 910 RTE_ETH_LINK_SPEED_10G | 911 RTE_ETH_LINK_SPEED_25G | 912 RTE_ETH_LINK_SPEED_40G | 913 RTE_ETH_LINK_SPEED_50G | 914 RTE_ETH_LINK_SPEED_100G; 915 916 if (dev_conf->link_speeds & ~allowed_speeds) { 917 IONIC_PRINT(ERR, "Invalid link setting"); 918 return -EINVAL; 919 } 920 921 if (dev_conf->lpbk_mode) 922 IONIC_PRINT(WARNING, "Loopback mode not supported"); 923 924 /* Re-set features in case SG flag was added in rx_queue_setup() */ 925 err = ionic_lif_set_features(lif); 926 if (err) { 927 IONIC_PRINT(ERR, "Cannot set LIF features: %d", err); 928 return err; 929 } 930 931 lif->frame_size = eth_dev->data->mtu + IONIC_ETH_OVERHEAD; 932 933 err = ionic_lif_change_mtu(lif, eth_dev->data->mtu); 934 if (err) { 935 IONIC_PRINT(ERR, "Cannot set LIF frame size %u: %d", 936 lif->frame_size, err); 937 return err; 938 } 939 940 err = ionic_lif_start(lif); 941 if (err) { 942 IONIC_PRINT(ERR, "Cannot start LIF: %d", err); 943 return err; 944 } 945 946 /* Configure link */ 947 an_enable = (dev_conf->link_speeds & RTE_ETH_LINK_SPEED_FIXED) == 0; 948 949 ionic_dev_cmd_port_autoneg(idev, an_enable); 950 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 951 if (err) 952 IONIC_PRINT(WARNING, "Failed to %s autonegotiation", 953 an_enable ? "enable" : "disable"); 954 955 if (!an_enable) 956 speed = ionic_parse_link_speeds(dev_conf->link_speeds); 957 if (speed) { 958 ionic_dev_cmd_port_speed(idev, speed); 959 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 960 if (err) 961 IONIC_PRINT(WARNING, "Failed to set link speed %u", 962 speed); 963 } 964 965 if (lif->hw_features & IONIC_ETH_HW_RX_SG) 966 eth_dev->rx_pkt_burst = &ionic_recv_pkts_sg; 967 else 968 eth_dev->rx_pkt_burst = &ionic_recv_pkts; 969 970 if (lif->hw_features & IONIC_ETH_HW_TX_SG) 971 eth_dev->tx_pkt_burst = &ionic_xmit_pkts_sg; 972 else 973 eth_dev->tx_pkt_burst = &ionic_xmit_pkts; 974 975 eth_dev->tx_pkt_prepare = &ionic_prep_pkts; 976 977 ionic_dev_link_update(eth_dev, 0); 978 979 return 0; 980 } 981 982 /* 983 * Stop device: disable rx and tx functions to allow for reconfiguring. 984 */ 985 static int 986 ionic_dev_stop(struct rte_eth_dev *eth_dev) 987 { 988 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 989 990 IONIC_PRINT_CALL(); 991 992 ionic_lif_stop(lif); 993 994 return 0; 995 } 996 997 /* 998 * Reset and stop device. 999 */ 1000 static int 1001 ionic_dev_close(struct rte_eth_dev *eth_dev) 1002 { 1003 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 1004 struct ionic_adapter *adapter = lif->adapter; 1005 1006 IONIC_PRINT_CALL(); 1007 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1008 return 0; 1009 1010 IONIC_PRINT(NOTICE, "Removing device %s", eth_dev->device->name); 1011 if (adapter->intf->unconfigure_intr) 1012 (*adapter->intf->unconfigure_intr)(adapter); 1013 1014 ionic_reset(adapter); 1015 1016 ionic_lif_free_queues(lif); 1017 ionic_lif_deinit(lif); 1018 ionic_lif_free(lif); /* Does not free LIF object */ 1019 1020 if (adapter->intf->unmap_bars) 1021 (*adapter->intf->unmap_bars)(adapter); 1022 1023 lif->adapter = NULL; 1024 rte_free(adapter); 1025 1026 return 0; 1027 } 1028 1029 int 1030 eth_ionic_dev_init(struct rte_eth_dev *eth_dev, void *init_params) 1031 { 1032 struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev); 1033 struct ionic_adapter *adapter = (struct ionic_adapter *)init_params; 1034 int err; 1035 1036 IONIC_PRINT_CALL(); 1037 1038 eth_dev->dev_ops = &ionic_eth_dev_ops; 1039 eth_dev->rx_descriptor_status = ionic_dev_rx_descriptor_status; 1040 eth_dev->tx_descriptor_status = ionic_dev_tx_descriptor_status; 1041 1042 /* Multi-process not supported, primary does initialization anyway */ 1043 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1044 return 0; 1045 1046 if (adapter->intf->copy_bus_info) 1047 (*adapter->intf->copy_bus_info)(adapter, eth_dev); 1048 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 1049 1050 lif->eth_dev = eth_dev; 1051 lif->adapter = adapter; 1052 adapter->lif = lif; 1053 1054 IONIC_PRINT(DEBUG, "Up to %u MAC addresses supported", 1055 adapter->max_mac_addrs); 1056 1057 /* Allocate memory for storing MAC addresses */ 1058 eth_dev->data->mac_addrs = rte_calloc("ionic", 1059 adapter->max_mac_addrs, 1060 RTE_ETHER_ADDR_LEN, 1061 RTE_CACHE_LINE_SIZE); 1062 if (eth_dev->data->mac_addrs == NULL) { 1063 IONIC_PRINT(ERR, "Failed to allocate %u bytes needed to " 1064 "store MAC addresses", 1065 RTE_ETHER_ADDR_LEN * adapter->max_mac_addrs); 1066 err = -ENOMEM; 1067 goto err; 1068 } 1069 1070 err = ionic_lif_alloc(lif); 1071 if (err) { 1072 IONIC_PRINT(ERR, "Cannot allocate LIFs: %d, aborting", 1073 err); 1074 goto err; 1075 } 1076 1077 err = ionic_lif_init(lif); 1078 if (err) { 1079 IONIC_PRINT(ERR, "Cannot init LIFs: %d, aborting", err); 1080 goto err_free_lif; 1081 } 1082 1083 /* Copy the MAC address */ 1084 rte_ether_addr_copy((struct rte_ether_addr *)lif->mac_addr, 1085 ð_dev->data->mac_addrs[0]); 1086 1087 IONIC_PRINT(DEBUG, "Port %u initialized", eth_dev->data->port_id); 1088 1089 return 0; 1090 1091 err_free_lif: 1092 ionic_lif_free(lif); 1093 err: 1094 return err; 1095 } 1096 1097 static int 1098 eth_ionic_dev_uninit(struct rte_eth_dev *eth_dev) 1099 { 1100 IONIC_PRINT_CALL(); 1101 1102 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1103 return 0; 1104 1105 if (eth_dev->state != RTE_ETH_DEV_UNUSED) 1106 ionic_dev_close(eth_dev); 1107 1108 eth_dev->dev_ops = NULL; 1109 eth_dev->rx_pkt_burst = NULL; 1110 eth_dev->tx_pkt_burst = NULL; 1111 eth_dev->tx_pkt_prepare = NULL; 1112 1113 return 0; 1114 } 1115 1116 int 1117 eth_ionic_dev_probe(void *bus_dev, struct rte_device *rte_dev, 1118 struct ionic_bars *bars, const struct ionic_dev_intf *intf, 1119 uint16_t device_id, uint16_t vendor_id) 1120 { 1121 char name[RTE_ETH_NAME_MAX_LEN]; 1122 struct ionic_adapter *adapter; 1123 struct ionic_hw *hw; 1124 unsigned long i; 1125 int err; 1126 1127 /* Check structs (trigger error at compilation time) */ 1128 ionic_struct_size_checks(); 1129 1130 /* Multi-process not supported */ 1131 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1132 err = -EPERM; 1133 goto err; 1134 } 1135 1136 adapter = rte_zmalloc("ionic", sizeof(*adapter), RTE_CACHE_LINE_SIZE); 1137 if (!adapter) { 1138 IONIC_PRINT(ERR, "OOM"); 1139 err = -ENOMEM; 1140 goto err; 1141 } 1142 1143 adapter->bus_dev = bus_dev; 1144 hw = &adapter->hw; 1145 1146 /* Vendor and Device ID need to be set before init of shared code */ 1147 hw->device_id = device_id; 1148 hw->vendor_id = vendor_id; 1149 1150 err = ionic_init_mac(hw); 1151 if (err != 0) { 1152 IONIC_PRINT(ERR, "Mac init failed: %d", err); 1153 err = -EIO; 1154 goto err_free_adapter; 1155 } 1156 1157 adapter->bars.num_bars = bars->num_bars; 1158 for (i = 0; i < bars->num_bars; i++) { 1159 adapter->bars.bar[i].vaddr = bars->bar[i].vaddr; 1160 adapter->bars.bar[i].bus_addr = bars->bar[i].bus_addr; 1161 adapter->bars.bar[i].len = bars->bar[i].len; 1162 } 1163 1164 if (intf->setup == NULL) { 1165 IONIC_PRINT(ERR, "Device setup function is mandatory"); 1166 goto err_free_adapter; 1167 } 1168 1169 adapter->intf = intf; 1170 1171 /* Parse device arguments */ 1172 if (adapter->intf->devargs) { 1173 err = (*adapter->intf->devargs)(adapter, rte_dev->devargs); 1174 if (err) { 1175 IONIC_PRINT(ERR, "Cannot parse device arguments"); 1176 goto err_free_adapter; 1177 } 1178 } 1179 1180 /* Discover ionic dev resources */ 1181 err = ionic_setup(adapter); 1182 if (err) { 1183 IONIC_PRINT(ERR, "Cannot setup device: %d, aborting", err); 1184 goto err_free_adapter; 1185 } 1186 1187 err = ionic_identify(adapter); 1188 if (err) { 1189 IONIC_PRINT(ERR, "Cannot identify device: %d, aborting", 1190 err); 1191 goto err_free_adapter; 1192 } 1193 1194 err = ionic_init(adapter); 1195 if (err) { 1196 IONIC_PRINT(ERR, "Cannot init device: %d, aborting", err); 1197 goto err_free_adapter; 1198 } 1199 1200 /* Configure the ports */ 1201 err = ionic_port_identify(adapter); 1202 if (err) { 1203 IONIC_PRINT(ERR, "Cannot identify port: %d, aborting", 1204 err); 1205 goto err_free_adapter; 1206 } 1207 1208 err = ionic_port_init(adapter); 1209 if (err) { 1210 IONIC_PRINT(ERR, "Cannot init port: %d, aborting", err); 1211 goto err_free_adapter; 1212 } 1213 1214 /* Configure LIFs */ 1215 err = ionic_lif_identify(adapter); 1216 if (err) { 1217 IONIC_PRINT(ERR, "Cannot identify lif: %d, aborting", err); 1218 goto err_free_adapter; 1219 } 1220 1221 /* Allocate and init LIFs */ 1222 err = ionic_lifs_size(adapter); 1223 if (err) { 1224 IONIC_PRINT(ERR, "Cannot size LIFs: %d, aborting", err); 1225 goto err_free_adapter; 1226 } 1227 1228 adapter->max_mac_addrs = 1229 rte_le_to_cpu_32(adapter->ident.lif.eth.max_ucast_filters); 1230 1231 if (rte_le_to_cpu_32(adapter->ident.dev.nlifs) != 1) { 1232 IONIC_PRINT(ERR, "Unexpected request for %d LIFs", 1233 rte_le_to_cpu_32(adapter->ident.dev.nlifs)); 1234 goto err_free_adapter; 1235 } 1236 1237 snprintf(name, sizeof(name), "%s_lif", rte_dev->name); 1238 err = rte_eth_dev_create(rte_dev, name, sizeof(struct ionic_lif), 1239 NULL, NULL, eth_ionic_dev_init, adapter); 1240 if (err) { 1241 IONIC_PRINT(ERR, "Cannot create eth device for %s", name); 1242 goto err_free_adapter; 1243 } 1244 1245 if (adapter->intf->configure_intr) { 1246 err = (*adapter->intf->configure_intr)(adapter); 1247 if (err) { 1248 IONIC_PRINT(ERR, "Failed to configure interrupts"); 1249 goto err_free_adapter; 1250 } 1251 } 1252 1253 return 0; 1254 1255 err_free_adapter: 1256 rte_free(adapter); 1257 err: 1258 return err; 1259 } 1260 1261 int 1262 eth_ionic_dev_remove(struct rte_device *rte_dev) 1263 { 1264 char name[RTE_ETH_NAME_MAX_LEN]; 1265 struct rte_eth_dev *eth_dev; 1266 int ret = 0; 1267 1268 /* Adapter lookup is using the eth_dev name */ 1269 snprintf(name, sizeof(name), "%s_lif", rte_dev->name); 1270 1271 eth_dev = rte_eth_dev_allocated(name); 1272 if (eth_dev) 1273 ret = rte_eth_dev_destroy(eth_dev, eth_ionic_dev_uninit); 1274 else 1275 IONIC_PRINT(DEBUG, "Cannot find device %s", rte_dev->name); 1276 1277 return ret; 1278 } 1279 1280 RTE_LOG_REGISTER_DEFAULT(ionic_logtype, NOTICE); 1281