1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 2 * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved. 3 */ 4 5 #ifndef _IONIC_DEV_H_ 6 #define _IONIC_DEV_H_ 7 8 #include <stdbool.h> 9 10 #include "ionic_osdep.h" 11 #include "ionic_if.h" 12 #include "ionic_regs.h" 13 14 #define IONIC_MIN_MTU RTE_ETHER_MIN_MTU 15 #define IONIC_MAX_MTU 9194 16 17 #define IONIC_MAX_RING_DESC 32768 18 #define IONIC_MIN_RING_DESC 16 19 #define IONIC_DEF_TXRX_DESC 4096 20 21 #define IONIC_LIFS_MAX 1024 22 23 #define IONIC_DEVCMD_TIMEOUT 5 /* devcmd_timeout */ 24 #define IONIC_DEVCMD_CHECK_PERIOD_US 10 /* devcmd status chk period */ 25 26 #define IONIC_ALIGN 4096 27 28 struct ionic_adapter; 29 30 struct ionic_dev_bar { 31 void __iomem *vaddr; 32 rte_iova_t bus_addr; 33 unsigned long len; 34 }; 35 36 static inline void ionic_struct_size_checks(void) 37 { 38 RTE_BUILD_BUG_ON(sizeof(struct ionic_doorbell) != 8); 39 RTE_BUILD_BUG_ON(sizeof(struct ionic_intr) != 32); 40 RTE_BUILD_BUG_ON(sizeof(struct ionic_intr_status) != 8); 41 42 RTE_BUILD_BUG_ON(sizeof(union ionic_dev_regs) != 4096); 43 RTE_BUILD_BUG_ON(sizeof(union ionic_dev_info_regs) != 2048); 44 RTE_BUILD_BUG_ON(sizeof(union ionic_dev_cmd_regs) != 2048); 45 46 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_stats) != 1024); 47 48 RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_cmd) != 64); 49 RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_comp) != 16); 50 RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_cmd) != 64); 51 RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_comp) != 16); 52 53 /* Device commands */ 54 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_cmd) != 64); 55 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_comp) != 16); 56 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_cmd) != 64); 57 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_comp) != 16); 58 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_cmd) != 64); 59 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_comp) != 16); 60 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_cmd) != 64); 61 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_comp) != 16); 62 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_cmd) != 64); 63 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_comp) != 16); 64 65 /* Port commands */ 66 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_cmd) != 64); 67 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_comp) != 16); 68 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_cmd) != 64); 69 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_comp) != 16); 70 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_cmd) != 64); 71 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_comp) != 16); 72 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_cmd) != 64); 73 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_comp) != 16); 74 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_cmd) != 64); 75 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_comp) != 16); 76 77 /* LIF commands */ 78 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_cmd) != 64); 79 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_comp) != 16); 80 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_reset_cmd) != 64); 81 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_cmd) != 64); 82 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_comp) != 16); 83 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_cmd) != 64); 84 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_comp) != 16); 85 86 RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_cmd) != 64); 87 RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_comp) != 16); 88 RTE_BUILD_BUG_ON(sizeof(struct ionic_q_control_cmd) != 64); 89 90 RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_mode_set_cmd) != 64); 91 RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_cmd) != 64); 92 RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_comp) != 16); 93 94 /* RDMA commands */ 95 RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_reset_cmd) != 64); 96 RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_queue_cmd) != 64); 97 98 /* Events */ 99 RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_cmd) != 4); 100 RTE_BUILD_BUG_ON(sizeof(union ionic_notifyq_comp) != 64); 101 RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_event) != 64); 102 RTE_BUILD_BUG_ON(sizeof(struct ionic_link_change_event) != 64); 103 RTE_BUILD_BUG_ON(sizeof(struct ionic_reset_event) != 64); 104 RTE_BUILD_BUG_ON(sizeof(struct ionic_heartbeat_event) != 64); 105 RTE_BUILD_BUG_ON(sizeof(struct ionic_log_event) != 64); 106 107 /* I/O */ 108 RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_desc) != 16); 109 RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc_v1) != 256); 110 RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_comp) != 16); 111 112 RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_desc) != 16); 113 RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_sg_desc) != 128); 114 RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_comp) != 16); 115 } 116 117 struct ionic_dev { 118 union ionic_dev_info_regs __iomem *dev_info; 119 union ionic_dev_cmd_regs __iomem *dev_cmd; 120 121 struct ionic_doorbell __iomem *db_pages; 122 struct ionic_intr __iomem *intr_ctrl; 123 struct ionic_intr_status __iomem *intr_status; 124 125 struct ionic_port_info *port_info; 126 const struct rte_memzone *port_info_z; 127 rte_iova_t port_info_pa; 128 uint32_t port_info_sz; 129 }; 130 131 struct ionic_queue; 132 struct ionic_desc_info; 133 134 typedef void (*desc_cb)(struct ionic_queue *q, 135 uint32_t q_desc_index, 136 uint32_t cq_desc_index, 137 void *cb_arg, void *service_cb_arg); 138 139 struct ionic_desc_info { 140 desc_cb cb; 141 void *cb_arg; 142 }; 143 144 #define Q_NEXT_TO_POST(_q, _n) (((_q)->head_idx + (_n)) & ((_q)->size_mask)) 145 #define Q_NEXT_TO_SRVC(_q, _n) (((_q)->tail_idx + (_n)) & ((_q)->size_mask)) 146 147 struct ionic_queue { 148 struct ionic_dev *idev; 149 struct ionic_lif *lif; 150 struct ionic_cq *bound_cq; 151 uint32_t index; 152 uint32_t type; 153 uint32_t hw_index; 154 uint32_t hw_type; 155 void *base; 156 void *sg_base; 157 rte_iova_t base_pa; 158 rte_iova_t sg_base_pa; 159 struct ionic_desc_info *info; 160 uint32_t tail_idx; 161 uint32_t head_idx; 162 uint32_t num_descs; 163 uint32_t desc_size; 164 uint32_t sg_desc_size; 165 uint32_t qid; 166 uint32_t qtype; 167 struct ionic_doorbell __iomem *db; 168 }; 169 170 #define IONIC_INTR_NONE (-1) 171 172 struct ionic_intr_info { 173 int index; 174 uint32_t vector; 175 struct ionic_intr __iomem *ctrl; 176 }; 177 178 struct ionic_cq { 179 uint16_t tail_idx; 180 uint16_t num_descs; 181 uint16_t size_mask; 182 bool done_color; 183 void *base; 184 rte_iova_t base_pa; 185 }; 186 187 struct ionic_lif; 188 struct ionic_adapter; 189 struct ionic_qcq; 190 191 void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr, 192 unsigned long index); 193 194 const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode); 195 196 int ionic_dev_setup(struct ionic_adapter *adapter); 197 198 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); 199 uint8_t ionic_dev_cmd_status(struct ionic_dev *idev); 200 bool ionic_dev_cmd_done(struct ionic_dev *idev); 201 void ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem); 202 203 void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver); 204 void ionic_dev_cmd_init(struct ionic_dev *idev); 205 void ionic_dev_cmd_reset(struct ionic_dev *idev); 206 207 void ionic_dev_cmd_port_identify(struct ionic_dev *idev); 208 void ionic_dev_cmd_port_init(struct ionic_dev *idev); 209 void ionic_dev_cmd_port_reset(struct ionic_dev *idev); 210 void ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state); 211 void ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed); 212 void ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu); 213 void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable); 214 void ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type); 215 void ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type); 216 void ionic_dev_cmd_port_loopback(struct ionic_dev *idev, 217 uint8_t loopback_mode); 218 219 void ionic_dev_cmd_queue_identify(struct ionic_dev *idev, 220 uint16_t lif_type, uint8_t qtype, uint8_t qver); 221 222 void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, uint8_t type, 223 uint8_t ver); 224 void ionic_dev_cmd_lif_init(struct ionic_dev *idev, rte_iova_t addr); 225 void ionic_dev_cmd_lif_reset(struct ionic_dev *idev); 226 227 void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq); 228 229 struct ionic_doorbell __iomem *ionic_db_map(struct ionic_lif *lif, 230 struct ionic_queue *q); 231 232 int ionic_cq_init(struct ionic_cq *cq, uint16_t num_descs); 233 void ionic_cq_map(struct ionic_cq *cq, void *base, rte_iova_t base_pa); 234 void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q); 235 typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, uint32_t cq_desc_index, 236 void *cb_arg); 237 uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do, 238 ionic_cq_cb cb, void *cb_arg); 239 240 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev, 241 struct ionic_queue *q, uint32_t index, uint32_t num_descs, 242 size_t desc_size, size_t sg_desc_size); 243 void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa); 244 void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa); 245 void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, desc_cb cb, 246 void *cb_arg); 247 248 static inline uint32_t 249 ionic_q_space_avail(struct ionic_queue *q) 250 { 251 uint32_t avail = q->tail_idx; 252 253 if (q->head_idx >= avail) 254 avail += q->num_descs - q->head_idx - 1; 255 else 256 avail -= q->head_idx + 1; 257 258 return avail; 259 } 260 261 static inline void 262 ionic_q_flush(struct ionic_queue *q) 263 { 264 uint64_t val = IONIC_DBELL_QID(q->hw_index) | q->head_idx; 265 266 rte_write64(rte_cpu_to_le_64(val), q->db); 267 } 268 269 #endif /* _IONIC_DEV_H_ */ 270