15ef51809SAlfredo Cardigliano /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 25ef51809SAlfredo Cardigliano * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved. 35ef51809SAlfredo Cardigliano */ 45ef51809SAlfredo Cardigliano 55ef51809SAlfredo Cardigliano #ifndef _IONIC_DEV_H_ 65ef51809SAlfredo Cardigliano #define _IONIC_DEV_H_ 75ef51809SAlfredo Cardigliano 85ef51809SAlfredo Cardigliano #include "ionic_osdep.h" 95ef51809SAlfredo Cardigliano #include "ionic_if.h" 105ef51809SAlfredo Cardigliano #include "ionic_regs.h" 115ef51809SAlfredo Cardigliano 12598f6726SAlfredo Cardigliano #define IONIC_MIN_MTU RTE_ETHER_MIN_MTU 13598f6726SAlfredo Cardigliano #define IONIC_MAX_MTU 9194 14598f6726SAlfredo Cardigliano 1501a6c311SAlfredo Cardigliano #define IONIC_MAX_RING_DESC 32768 1601a6c311SAlfredo Cardigliano #define IONIC_MIN_RING_DESC 16 17*a27d9013SAlfredo Cardigliano #define IONIC_DEF_TXRX_DESC 4096 1801a6c311SAlfredo Cardigliano 19669c8de6SAlfredo Cardigliano #define IONIC_LIFS_MAX 1024 20669c8de6SAlfredo Cardigliano 215ef51809SAlfredo Cardigliano #define IONIC_DEVCMD_TIMEOUT 30 /* devcmd_timeout */ 2223bf4ddbSAlfredo Cardigliano #define IONIC_ALIGN 4096 235ef51809SAlfredo Cardigliano 245ef51809SAlfredo Cardigliano struct ionic_adapter; 255ef51809SAlfredo Cardigliano 265ef51809SAlfredo Cardigliano struct ionic_dev_bar { 275ef51809SAlfredo Cardigliano void __iomem *vaddr; 285ef51809SAlfredo Cardigliano rte_iova_t bus_addr; 295ef51809SAlfredo Cardigliano unsigned long len; 305ef51809SAlfredo Cardigliano }; 315ef51809SAlfredo Cardigliano 325ef51809SAlfredo Cardigliano static inline void ionic_struct_size_checks(void) 335ef51809SAlfredo Cardigliano { 345ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_doorbell) != 8); 355ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_intr) != 32); 365ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_intr_status) != 8); 375ef51809SAlfredo Cardigliano 385ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(union ionic_dev_regs) != 4096); 395ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(union ionic_dev_info_regs) != 2048); 405ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(union ionic_dev_cmd_regs) != 2048); 415ef51809SAlfredo Cardigliano 425ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_stats) != 1024); 435ef51809SAlfredo Cardigliano 445ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_cmd) != 64); 455ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_comp) != 16); 465ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_cmd) != 64); 475ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_comp) != 16); 485ef51809SAlfredo Cardigliano 495ef51809SAlfredo Cardigliano /* Device commands */ 505ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_cmd) != 64); 515ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_comp) != 16); 525ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_cmd) != 64); 535ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_comp) != 16); 545ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_cmd) != 64); 555ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_comp) != 16); 565ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_cmd) != 64); 575ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_comp) != 16); 585ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_cmd) != 64); 595ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_comp) != 16); 605ef51809SAlfredo Cardigliano 615ef51809SAlfredo Cardigliano /* Port commands */ 625ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_cmd) != 64); 635ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_comp) != 16); 645ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_cmd) != 64); 655ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_comp) != 16); 665ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_cmd) != 64); 675ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_comp) != 16); 685ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_cmd) != 64); 695ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_comp) != 16); 705ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_cmd) != 64); 715ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_comp) != 16); 725ef51809SAlfredo Cardigliano 735ef51809SAlfredo Cardigliano /* LIF commands */ 745ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_cmd) != 64); 755ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_comp) != 16); 765ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_reset_cmd) != 64); 775ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_cmd) != 64); 785ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_comp) != 16); 795ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_cmd) != 64); 805ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_comp) != 16); 815ef51809SAlfredo Cardigliano 825ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_cmd) != 64); 835ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_comp) != 16); 845ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_q_control_cmd) != 64); 855ef51809SAlfredo Cardigliano 865ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_mode_set_cmd) != 64); 875ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_cmd) != 64); 885ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_comp) != 16); 895ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_del_cmd) != 64); 905ef51809SAlfredo Cardigliano 915ef51809SAlfredo Cardigliano /* RDMA commands */ 925ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_reset_cmd) != 64); 935ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_queue_cmd) != 64); 945ef51809SAlfredo Cardigliano 955ef51809SAlfredo Cardigliano /* Events */ 965ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_cmd) != 4); 975ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(union ionic_notifyq_comp) != 64); 985ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_event) != 64); 995ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_link_change_event) != 64); 1005ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_reset_event) != 64); 1015ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_heartbeat_event) != 64); 1025ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_log_event) != 64); 1035ef51809SAlfredo Cardigliano 1045ef51809SAlfredo Cardigliano /* I/O */ 1055ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_desc) != 16); 1065ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc) != 128); 1075ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_comp) != 16); 1085ef51809SAlfredo Cardigliano 1095ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_desc) != 16); 1105ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_sg_desc) != 128); 1115ef51809SAlfredo Cardigliano RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_comp) != 16); 1125ef51809SAlfredo Cardigliano } 1135ef51809SAlfredo Cardigliano 1145ef51809SAlfredo Cardigliano struct ionic_dev { 1155ef51809SAlfredo Cardigliano union ionic_dev_info_regs __iomem *dev_info; 1165ef51809SAlfredo Cardigliano union ionic_dev_cmd_regs __iomem *dev_cmd; 1175ef51809SAlfredo Cardigliano 1185ef51809SAlfredo Cardigliano struct ionic_doorbell __iomem *db_pages; 1195ef51809SAlfredo Cardigliano rte_iova_t phy_db_pages; 1205ef51809SAlfredo Cardigliano 1215ef51809SAlfredo Cardigliano struct ionic_intr __iomem *intr_ctrl; 1225ef51809SAlfredo Cardigliano 1235ef51809SAlfredo Cardigliano struct ionic_intr_status __iomem *intr_status; 12423bf4ddbSAlfredo Cardigliano 12523bf4ddbSAlfredo Cardigliano struct ionic_port_info *port_info; 12623bf4ddbSAlfredo Cardigliano const struct rte_memzone *port_info_z; 12723bf4ddbSAlfredo Cardigliano rte_iova_t port_info_pa; 12823bf4ddbSAlfredo Cardigliano uint32_t port_info_sz; 1295ef51809SAlfredo Cardigliano }; 1305ef51809SAlfredo Cardigliano 13101a6c311SAlfredo Cardigliano struct ionic_queue; 13201a6c311SAlfredo Cardigliano struct ionic_desc_info; 13301a6c311SAlfredo Cardigliano 13401a6c311SAlfredo Cardigliano typedef void (*desc_cb)(struct ionic_queue *q, 13501a6c311SAlfredo Cardigliano uint32_t q_desc_index, 13601a6c311SAlfredo Cardigliano uint32_t cq_desc_index, 13701a6c311SAlfredo Cardigliano void *cb_arg, void *service_cb_arg); 13801a6c311SAlfredo Cardigliano 13901a6c311SAlfredo Cardigliano struct ionic_desc_info { 14001a6c311SAlfredo Cardigliano desc_cb cb; 14101a6c311SAlfredo Cardigliano void *cb_arg; 14201a6c311SAlfredo Cardigliano }; 14301a6c311SAlfredo Cardigliano 14401a6c311SAlfredo Cardigliano struct ionic_queue { 14501a6c311SAlfredo Cardigliano struct ionic_dev *idev; 14601a6c311SAlfredo Cardigliano struct ionic_lif *lif; 14701a6c311SAlfredo Cardigliano struct ionic_cq *bound_cq; 14801a6c311SAlfredo Cardigliano uint32_t index; 14901a6c311SAlfredo Cardigliano uint32_t type; 15001a6c311SAlfredo Cardigliano uint32_t hw_index; 15101a6c311SAlfredo Cardigliano uint32_t hw_type; 15201a6c311SAlfredo Cardigliano void *base; 15301a6c311SAlfredo Cardigliano void *sg_base; 15401a6c311SAlfredo Cardigliano rte_iova_t base_pa; 15501a6c311SAlfredo Cardigliano rte_iova_t sg_base_pa; 15601a6c311SAlfredo Cardigliano struct ionic_desc_info *info; 15701a6c311SAlfredo Cardigliano uint32_t tail_idx; 15801a6c311SAlfredo Cardigliano uint32_t head_idx; 15901a6c311SAlfredo Cardigliano uint32_t num_descs; 16001a6c311SAlfredo Cardigliano uint32_t desc_size; 16101a6c311SAlfredo Cardigliano uint32_t sg_desc_size; 16201a6c311SAlfredo Cardigliano uint32_t pid; 16301a6c311SAlfredo Cardigliano uint32_t qid; 16401a6c311SAlfredo Cardigliano uint32_t qtype; 16501a6c311SAlfredo Cardigliano struct ionic_doorbell __iomem *db; 16601a6c311SAlfredo Cardigliano void *nop_desc; 16701a6c311SAlfredo Cardigliano }; 16801a6c311SAlfredo Cardigliano 169c67719e1SAlfredo Cardigliano #define IONIC_INTR_INDEX_NOT_ASSIGNED (-1) 170c67719e1SAlfredo Cardigliano #define IONIC_INTR_NAME_MAX_SZ (32) 171c67719e1SAlfredo Cardigliano 172c67719e1SAlfredo Cardigliano struct ionic_intr_info { 173c67719e1SAlfredo Cardigliano char name[IONIC_INTR_NAME_MAX_SZ]; 174c67719e1SAlfredo Cardigliano int index; 175c67719e1SAlfredo Cardigliano uint32_t vector; 176c67719e1SAlfredo Cardigliano struct ionic_intr __iomem *ctrl; 177c67719e1SAlfredo Cardigliano }; 178c67719e1SAlfredo Cardigliano 17901a6c311SAlfredo Cardigliano struct ionic_cq { 18001a6c311SAlfredo Cardigliano struct ionic_lif *lif; 18101a6c311SAlfredo Cardigliano struct ionic_queue *bound_q; 18201a6c311SAlfredo Cardigliano uint32_t tail_idx; 18301a6c311SAlfredo Cardigliano uint32_t num_descs; 18401a6c311SAlfredo Cardigliano uint32_t desc_size; 18501a6c311SAlfredo Cardigliano bool done_color; 18601a6c311SAlfredo Cardigliano void *base; 18701a6c311SAlfredo Cardigliano rte_iova_t base_pa; 18801a6c311SAlfredo Cardigliano struct ionic_intr_info *bound_intr; 18901a6c311SAlfredo Cardigliano }; 19001a6c311SAlfredo Cardigliano 19101a6c311SAlfredo Cardigliano /** ionic_admin_ctx - Admin command context. 19201a6c311SAlfredo Cardigliano * @pending_work: Flag that indicates a completion. 19301a6c311SAlfredo Cardigliano * @cmd: Admin command (64B) to be copied to the queue. 19401a6c311SAlfredo Cardigliano * @comp: Admin completion (16B) copied from the queue. 19501a6c311SAlfredo Cardigliano */ 19601a6c311SAlfredo Cardigliano struct ionic_admin_ctx { 19701a6c311SAlfredo Cardigliano bool pending_work; 19801a6c311SAlfredo Cardigliano union ionic_adminq_cmd cmd; 19901a6c311SAlfredo Cardigliano union ionic_adminq_comp comp; 20001a6c311SAlfredo Cardigliano }; 20101a6c311SAlfredo Cardigliano 202c67719e1SAlfredo Cardigliano struct ionic_lif; 203c67719e1SAlfredo Cardigliano struct ionic_adapter; 20401a6c311SAlfredo Cardigliano struct ionic_qcq; 205c67719e1SAlfredo Cardigliano 206c67719e1SAlfredo Cardigliano void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr, 207c67719e1SAlfredo Cardigliano unsigned long index); 208c67719e1SAlfredo Cardigliano 2095ef51809SAlfredo Cardigliano int ionic_dev_setup(struct ionic_adapter *adapter); 2105ef51809SAlfredo Cardigliano 2115ef51809SAlfredo Cardigliano void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd); 2125ef51809SAlfredo Cardigliano uint8_t ionic_dev_cmd_status(struct ionic_dev *idev); 2135ef51809SAlfredo Cardigliano bool ionic_dev_cmd_done(struct ionic_dev *idev); 2145ef51809SAlfredo Cardigliano void ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem); 2155ef51809SAlfredo Cardigliano 2165ef51809SAlfredo Cardigliano void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver); 2175ef51809SAlfredo Cardigliano void ionic_dev_cmd_init(struct ionic_dev *idev); 2185ef51809SAlfredo Cardigliano void ionic_dev_cmd_reset(struct ionic_dev *idev); 2195ef51809SAlfredo Cardigliano 22023bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_identify(struct ionic_dev *idev); 22123bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_init(struct ionic_dev *idev); 22223bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_reset(struct ionic_dev *idev); 22323bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state); 22423bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed); 22523bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu); 22623bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable); 22723bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type); 22823bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type); 22923bf4ddbSAlfredo Cardigliano void ionic_dev_cmd_port_loopback(struct ionic_dev *idev, 23023bf4ddbSAlfredo Cardigliano uint8_t loopback_mode); 23123bf4ddbSAlfredo Cardigliano 232669c8de6SAlfredo Cardigliano void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, uint8_t type, 233669c8de6SAlfredo Cardigliano uint8_t ver); 234669c8de6SAlfredo Cardigliano void ionic_dev_cmd_lif_init(struct ionic_dev *idev, uint16_t lif_index, 235669c8de6SAlfredo Cardigliano rte_iova_t addr); 236669c8de6SAlfredo Cardigliano void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, uint16_t lif_index); 23701a6c311SAlfredo Cardigliano void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq, 23801a6c311SAlfredo Cardigliano uint16_t lif_index, uint16_t intr_index); 239669c8de6SAlfredo Cardigliano 24001a6c311SAlfredo Cardigliano struct ionic_doorbell __iomem *ionic_db_map(struct ionic_lif *lif, 24101a6c311SAlfredo Cardigliano struct ionic_queue *q); 242c67719e1SAlfredo Cardigliano int ionic_db_page_num(struct ionic_lif *lif, int pid); 243c67719e1SAlfredo Cardigliano 24401a6c311SAlfredo Cardigliano int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq, 24501a6c311SAlfredo Cardigliano struct ionic_intr_info *intr, uint32_t num_descs, 24601a6c311SAlfredo Cardigliano size_t desc_size); 24701a6c311SAlfredo Cardigliano void ionic_cq_map(struct ionic_cq *cq, void *base, rte_iova_t base_pa); 24801a6c311SAlfredo Cardigliano void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q); 24901a6c311SAlfredo Cardigliano typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, uint32_t cq_desc_index, 25001a6c311SAlfredo Cardigliano void *cb_arg); 25101a6c311SAlfredo Cardigliano uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do, 25201a6c311SAlfredo Cardigliano ionic_cq_cb cb, void *cb_arg); 25301a6c311SAlfredo Cardigliano 25401a6c311SAlfredo Cardigliano int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev, 25501a6c311SAlfredo Cardigliano struct ionic_queue *q, uint32_t index, uint32_t num_descs, 25601a6c311SAlfredo Cardigliano size_t desc_size, size_t sg_desc_size, uint32_t pid); 25701a6c311SAlfredo Cardigliano void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa); 25801a6c311SAlfredo Cardigliano void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa); 25901a6c311SAlfredo Cardigliano void ionic_q_flush(struct ionic_queue *q); 26001a6c311SAlfredo Cardigliano void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, desc_cb cb, 26101a6c311SAlfredo Cardigliano void *cb_arg); 26201a6c311SAlfredo Cardigliano uint32_t ionic_q_space_avail(struct ionic_queue *q); 26301a6c311SAlfredo Cardigliano bool ionic_q_has_space(struct ionic_queue *q, uint32_t want); 26401a6c311SAlfredo Cardigliano void ionic_q_service(struct ionic_queue *q, uint32_t cq_desc_index, 26501a6c311SAlfredo Cardigliano uint32_t stop_index, void *service_cb_arg); 26601a6c311SAlfredo Cardigliano 26701a6c311SAlfredo Cardigliano int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx); 26801a6c311SAlfredo Cardigliano 2695ef51809SAlfredo Cardigliano #endif /* _IONIC_DEV_H_ */ 270