xref: /dpdk/drivers/net/ionic/ionic_dev.h (revision 5ef518098ec6cbed87e84fe3b2d748aa6fda52c1)
1*5ef51809SAlfredo Cardigliano /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2*5ef51809SAlfredo Cardigliano  * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
3*5ef51809SAlfredo Cardigliano  */
4*5ef51809SAlfredo Cardigliano 
5*5ef51809SAlfredo Cardigliano #ifndef _IONIC_DEV_H_
6*5ef51809SAlfredo Cardigliano #define _IONIC_DEV_H_
7*5ef51809SAlfredo Cardigliano 
8*5ef51809SAlfredo Cardigliano #include "ionic_osdep.h"
9*5ef51809SAlfredo Cardigliano #include "ionic_if.h"
10*5ef51809SAlfredo Cardigliano #include "ionic_regs.h"
11*5ef51809SAlfredo Cardigliano 
12*5ef51809SAlfredo Cardigliano #define IONIC_DEVCMD_TIMEOUT	30 /* devcmd_timeout */
13*5ef51809SAlfredo Cardigliano 
14*5ef51809SAlfredo Cardigliano struct ionic_adapter;
15*5ef51809SAlfredo Cardigliano 
16*5ef51809SAlfredo Cardigliano struct ionic_dev_bar {
17*5ef51809SAlfredo Cardigliano 	void __iomem *vaddr;
18*5ef51809SAlfredo Cardigliano 	rte_iova_t bus_addr;
19*5ef51809SAlfredo Cardigliano 	unsigned long len;
20*5ef51809SAlfredo Cardigliano };
21*5ef51809SAlfredo Cardigliano 
22*5ef51809SAlfredo Cardigliano static inline void ionic_struct_size_checks(void)
23*5ef51809SAlfredo Cardigliano {
24*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_doorbell) != 8);
25*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_intr) != 32);
26*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_intr_status) != 8);
27*5ef51809SAlfredo Cardigliano 
28*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(union ionic_dev_regs) != 4096);
29*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(union ionic_dev_info_regs) != 2048);
30*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(union ionic_dev_cmd_regs) != 2048);
31*5ef51809SAlfredo Cardigliano 
32*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_stats) != 1024);
33*5ef51809SAlfredo Cardigliano 
34*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_cmd) != 64);
35*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_comp) != 16);
36*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_cmd) != 64);
37*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_comp) != 16);
38*5ef51809SAlfredo Cardigliano 
39*5ef51809SAlfredo Cardigliano 	/* Device commands */
40*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_cmd) != 64);
41*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_comp) != 16);
42*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_cmd) != 64);
43*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_comp) != 16);
44*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_cmd) != 64);
45*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_comp) != 16);
46*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_cmd) != 64);
47*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_comp) != 16);
48*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_cmd) != 64);
49*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_comp) != 16);
50*5ef51809SAlfredo Cardigliano 
51*5ef51809SAlfredo Cardigliano 	/* Port commands */
52*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_cmd) != 64);
53*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_comp) != 16);
54*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_cmd) != 64);
55*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_comp) != 16);
56*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_cmd) != 64);
57*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_comp) != 16);
58*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_cmd) != 64);
59*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_comp) != 16);
60*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_cmd) != 64);
61*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_comp) != 16);
62*5ef51809SAlfredo Cardigliano 
63*5ef51809SAlfredo Cardigliano 	/* LIF commands */
64*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_cmd) != 64);
65*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_comp) != 16);
66*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_reset_cmd) != 64);
67*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_cmd) != 64);
68*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_comp) != 16);
69*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_cmd) != 64);
70*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_comp) != 16);
71*5ef51809SAlfredo Cardigliano 
72*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_cmd) != 64);
73*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_comp) != 16);
74*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_q_control_cmd) != 64);
75*5ef51809SAlfredo Cardigliano 
76*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_mode_set_cmd) != 64);
77*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_cmd) != 64);
78*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_comp) != 16);
79*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_del_cmd) != 64);
80*5ef51809SAlfredo Cardigliano 
81*5ef51809SAlfredo Cardigliano 	/* RDMA commands */
82*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_reset_cmd) != 64);
83*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_queue_cmd) != 64);
84*5ef51809SAlfredo Cardigliano 
85*5ef51809SAlfredo Cardigliano 	/* Events */
86*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_cmd) != 4);
87*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(union ionic_notifyq_comp) != 64);
88*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_event) != 64);
89*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_link_change_event) != 64);
90*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_reset_event) != 64);
91*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_heartbeat_event) != 64);
92*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_log_event) != 64);
93*5ef51809SAlfredo Cardigliano 
94*5ef51809SAlfredo Cardigliano 	/* I/O */
95*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_desc) != 16);
96*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc) != 128);
97*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_comp) != 16);
98*5ef51809SAlfredo Cardigliano 
99*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_desc) != 16);
100*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_sg_desc) != 128);
101*5ef51809SAlfredo Cardigliano 	RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_comp) != 16);
102*5ef51809SAlfredo Cardigliano }
103*5ef51809SAlfredo Cardigliano 
104*5ef51809SAlfredo Cardigliano struct ionic_dev {
105*5ef51809SAlfredo Cardigliano 	union ionic_dev_info_regs __iomem *dev_info;
106*5ef51809SAlfredo Cardigliano 	union ionic_dev_cmd_regs __iomem *dev_cmd;
107*5ef51809SAlfredo Cardigliano 
108*5ef51809SAlfredo Cardigliano 	struct ionic_doorbell __iomem *db_pages;
109*5ef51809SAlfredo Cardigliano 	rte_iova_t phy_db_pages;
110*5ef51809SAlfredo Cardigliano 
111*5ef51809SAlfredo Cardigliano 	struct ionic_intr __iomem *intr_ctrl;
112*5ef51809SAlfredo Cardigliano 
113*5ef51809SAlfredo Cardigliano 	struct ionic_intr_status __iomem *intr_status;
114*5ef51809SAlfredo Cardigliano };
115*5ef51809SAlfredo Cardigliano 
116*5ef51809SAlfredo Cardigliano int ionic_dev_setup(struct ionic_adapter *adapter);
117*5ef51809SAlfredo Cardigliano 
118*5ef51809SAlfredo Cardigliano void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
119*5ef51809SAlfredo Cardigliano uint8_t ionic_dev_cmd_status(struct ionic_dev *idev);
120*5ef51809SAlfredo Cardigliano bool ionic_dev_cmd_done(struct ionic_dev *idev);
121*5ef51809SAlfredo Cardigliano void ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem);
122*5ef51809SAlfredo Cardigliano 
123*5ef51809SAlfredo Cardigliano void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver);
124*5ef51809SAlfredo Cardigliano void ionic_dev_cmd_init(struct ionic_dev *idev);
125*5ef51809SAlfredo Cardigliano void ionic_dev_cmd_reset(struct ionic_dev *idev);
126*5ef51809SAlfredo Cardigliano 
127*5ef51809SAlfredo Cardigliano #endif /* _IONIC_DEV_H_ */
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